1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 #define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL BIT(0) 16 #define ROCKCHIP_OUTPUT_DSI_DUAL_LINK BIT(1) 17 18 enum data_format { 19 ROCKCHIP_FMT_ARGB8888 = 0, 20 ROCKCHIP_FMT_RGB888, 21 ROCKCHIP_FMT_RGB565, 22 ROCKCHIP_FMT_YUV420SP = 4, 23 ROCKCHIP_FMT_YUV422SP, 24 ROCKCHIP_FMT_YUV444SP, 25 }; 26 27 enum display_mode { 28 ROCKCHIP_DISPLAY_FULLSCREEN, 29 ROCKCHIP_DISPLAY_CENTER, 30 }; 31 32 enum rockchip_cmd_type { 33 CMD_TYPE_DEFAULT, 34 CMD_TYPE_SPI, 35 CMD_TYPE_MCU 36 }; 37 38 enum rockchip_mcu_cmd { 39 MCU_WRCMD = 0, 40 MCU_WRDATA, 41 MCU_SETBYPASS, 42 }; 43 44 /* 45 * display output interface supported by rockchip lcdc 46 */ 47 #define ROCKCHIP_OUT_MODE_P888 0 48 #define ROCKCHIP_OUT_MODE_P666 1 49 #define ROCKCHIP_OUT_MODE_P565 2 50 #define ROCKCHIP_OUT_MODE_S888 8 51 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 52 #define ROCKCHIP_OUT_MODE_YUV420 14 53 /* for use special outface */ 54 #define ROCKCHIP_OUT_MODE_AAAA 15 55 56 struct rockchip_mcu_timing { 57 int mcu_pix_total; 58 int mcu_cs_pst; 59 int mcu_cs_pend; 60 int mcu_rw_pst; 61 int mcu_rw_pend; 62 int mcu_hold_mode; 63 }; 64 65 struct crtc_state { 66 struct udevice *dev; 67 const struct rockchip_crtc *crtc; 68 void *private; 69 ofnode node; 70 int crtc_id; 71 72 int format; 73 u32 dma_addr; 74 int ymirror; 75 int rb_swap; 76 int xvir; 77 int src_x; 78 int src_y; 79 int src_w; 80 int src_h; 81 int crtc_x; 82 int crtc_y; 83 int crtc_w; 84 int crtc_h; 85 struct rockchip_mcu_timing mcu_timing; 86 }; 87 88 struct panel_state { 89 struct udevice *dev; 90 ofnode node; 91 ofnode dsp_lut_node; 92 93 const struct rockchip_panel *panel; 94 void *private; 95 }; 96 97 struct overscan { 98 int left_margin; 99 int right_margin; 100 int top_margin; 101 int bottom_margin; 102 }; 103 104 struct connector_state { 105 struct udevice *dev; 106 const struct rockchip_connector *connector; 107 struct udevice *phy_dev; 108 const struct rockchip_phy *phy; 109 ofnode node; 110 ofnode phy_node; 111 112 void *private; 113 void *phy_private; 114 115 struct drm_display_mode mode; 116 struct overscan overscan; 117 u8 edid[EDID_SIZE * 4]; 118 int bus_format; 119 int output_mode; 120 int type; 121 int output_type; 122 int color_space; 123 124 struct { 125 u32 *lut; 126 int size; 127 } gamma; 128 }; 129 130 struct logo_info { 131 int mode; 132 char *mem; 133 bool ymirror; 134 u32 offset; 135 u32 width; 136 u32 height; 137 u32 bpp; 138 }; 139 140 struct rockchip_logo_cache { 141 struct list_head head; 142 char name[20]; 143 struct logo_info logo; 144 }; 145 146 struct display_state { 147 struct list_head head; 148 149 const void *blob; 150 ofnode node; 151 152 struct crtc_state crtc_state; 153 struct connector_state conn_state; 154 struct panel_state panel_state; 155 156 const char *ulogo_name; 157 const char *klogo_name; 158 159 struct logo_info logo; 160 int logo_mode; 161 int charge_logo_mode; 162 void *mem_base; 163 int mem_size; 164 165 int enable; 166 int is_init; 167 int is_enable; 168 }; 169 170 int drm_mode_vrefresh(const struct drm_display_mode *mode); 171 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 172 173 #endif 174