1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 #define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL BIT(0) 16 #define ROCKCHIP_OUTPUT_DSI_DUAL_LINK BIT(1) 17 18 enum data_format { 19 ROCKCHIP_FMT_ARGB8888 = 0, 20 ROCKCHIP_FMT_RGB888, 21 ROCKCHIP_FMT_RGB565, 22 ROCKCHIP_FMT_YUV420SP = 4, 23 ROCKCHIP_FMT_YUV422SP, 24 ROCKCHIP_FMT_YUV444SP, 25 }; 26 27 enum display_mode { 28 ROCKCHIP_DISPLAY_FULLSCREEN, 29 ROCKCHIP_DISPLAY_CENTER, 30 }; 31 32 enum rockchip_cmd_type { 33 CMD_TYPE_DEFAULT, 34 CMD_TYPE_SPI, 35 CMD_TYPE_MCU 36 }; 37 38 enum rockchip_mcu_cmd { 39 MCU_WRCMD = 0, 40 MCU_WRDATA, 41 MCU_SETBYPASS, 42 }; 43 44 /* 45 * display output interface supported by rockchip lcdc 46 */ 47 #define ROCKCHIP_OUT_MODE_P888 0 48 #define ROCKCHIP_OUT_MODE_P666 1 49 #define ROCKCHIP_OUT_MODE_P565 2 50 #define ROCKCHIP_OUT_MODE_S888 8 51 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 52 #define ROCKCHIP_OUT_MODE_YUV420 14 53 /* for use special outface */ 54 #define ROCKCHIP_OUT_MODE_AAAA 15 55 56 struct rockchip_mcu_timing { 57 int mcu_pix_total; 58 int mcu_cs_pst; 59 int mcu_cs_pend; 60 int mcu_rw_pst; 61 int mcu_rw_pend; 62 int mcu_hold_mode; 63 }; 64 65 struct crtc_state { 66 struct udevice *dev; 67 struct rockchip_crtc *crtc; 68 void *private; 69 ofnode node; 70 int crtc_id; 71 72 int format; 73 u32 dma_addr; 74 int ymirror; 75 int rb_swap; 76 int xvir; 77 int src_x; 78 int src_y; 79 int src_w; 80 int src_h; 81 int crtc_x; 82 int crtc_y; 83 int crtc_w; 84 int crtc_h; 85 bool yuv_overlay; 86 struct rockchip_mcu_timing mcu_timing; 87 }; 88 89 struct panel_state { 90 struct rockchip_panel *panel; 91 92 ofnode dsp_lut_node; 93 }; 94 95 struct overscan { 96 int left_margin; 97 int right_margin; 98 int top_margin; 99 int bottom_margin; 100 }; 101 102 struct connector_state { 103 struct udevice *dev; 104 const struct rockchip_connector *connector; 105 struct rockchip_bridge *bridge; 106 struct rockchip_phy *phy; 107 ofnode node; 108 109 void *private; 110 111 struct drm_display_mode mode; 112 struct overscan overscan; 113 u8 edid[EDID_SIZE * 4]; 114 int bus_format; 115 int output_mode; 116 int type; 117 int output_type; 118 int color_space; 119 120 struct { 121 u32 *lut; 122 int size; 123 } gamma; 124 }; 125 126 struct logo_info { 127 int mode; 128 char *mem; 129 bool ymirror; 130 u32 offset; 131 u32 width; 132 u32 height; 133 u32 bpp; 134 }; 135 136 struct rockchip_logo_cache { 137 struct list_head head; 138 char name[20]; 139 struct logo_info logo; 140 }; 141 142 struct display_state { 143 struct list_head head; 144 145 const void *blob; 146 ofnode node; 147 148 struct crtc_state crtc_state; 149 struct connector_state conn_state; 150 struct panel_state panel_state; 151 152 char ulogo_name[30]; 153 char klogo_name[30]; 154 155 struct logo_info logo; 156 int logo_mode; 157 int charge_logo_mode; 158 void *mem_base; 159 int mem_size; 160 161 int enable; 162 int is_init; 163 int is_enable; 164 }; 165 166 static inline struct rockchip_panel *state_get_panel(struct display_state *s) 167 { 168 struct panel_state *panel_state = &s->panel_state; 169 170 return panel_state->panel; 171 } 172 173 int drm_mode_vrefresh(const struct drm_display_mode *mode); 174 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 175 bool drm_mode_is_420(const struct drm_display_info *display, 176 struct drm_display_mode *mode); 177 178 #endif 179