xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.h (revision 6414e3bc8687dbcc585b804d5c0bdfdb2d979c4b)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _ROCKCHIP_DISPLAY_H
8 #define _ROCKCHIP_DISPLAY_H
9 
10 #include <bmp_layout.h>
11 #include <drm_modes.h>
12 #include <edid.h>
13 #include <dm/ofnode.h>
14 
15 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE	BIT(0)
16 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE	BIT(1)
17 #define ROCKCHIP_OUTPUT_DATA_SWAP			BIT(2)
18 
19 enum data_format {
20 	ROCKCHIP_FMT_ARGB8888 = 0,
21 	ROCKCHIP_FMT_RGB888,
22 	ROCKCHIP_FMT_RGB565,
23 	ROCKCHIP_FMT_YUV420SP = 4,
24 	ROCKCHIP_FMT_YUV422SP,
25 	ROCKCHIP_FMT_YUV444SP,
26 };
27 
28 enum display_mode {
29 	ROCKCHIP_DISPLAY_FULLSCREEN,
30 	ROCKCHIP_DISPLAY_CENTER,
31 };
32 
33 enum rockchip_cmd_type {
34 	CMD_TYPE_DEFAULT,
35 	CMD_TYPE_SPI,
36 	CMD_TYPE_MCU
37 };
38 
39 enum rockchip_mcu_cmd {
40 	MCU_WRCMD = 0,
41 	MCU_WRDATA,
42 	MCU_SETBYPASS,
43 };
44 
45 /*
46  * display output interface supported by rockchip lcdc
47  */
48 #define ROCKCHIP_OUT_MODE_P888	0
49 #define ROCKCHIP_OUT_MODE_P666	1
50 #define ROCKCHIP_OUT_MODE_P565	2
51 #define ROCKCHIP_OUT_MODE_S888		8
52 #define ROCKCHIP_OUT_MODE_S888_DUMMY	12
53 #define ROCKCHIP_OUT_MODE_YUV420	14
54 /* for use special outface */
55 #define ROCKCHIP_OUT_MODE_AAAA	15
56 
57 #define VOP_OUTPUT_IF_RGB	BIT(0)
58 #define VOP_OUTPUT_IF_BT1120	BIT(1)
59 #define VOP_OUTPUT_IF_BT656	BIT(2)
60 #define VOP_OUTPUT_IF_LVDS0	BIT(3)
61 #define VOP_OUTPUT_IF_LVDS1	BIT(4)
62 #define VOP_OUTPUT_IF_MIPI0	BIT(5)
63 #define VOP_OUTPUT_IF_MIPI1	BIT(6)
64 #define VOP_OUTPUT_IF_eDP0	BIT(7)
65 #define VOP_OUTPUT_IF_eDP1	BIT(8)
66 #define VOP_OUTPUT_IF_DP0	BIT(9)
67 #define VOP_OUTPUT_IF_DP1	BIT(10)
68 #define VOP_OUTPUT_IF_HDMI0	BIT(11)
69 #define VOP_OUTPUT_IF_HDMI1	BIT(12)
70 
71 struct rockchip_mcu_timing {
72 	int mcu_pix_total;
73 	int mcu_cs_pst;
74 	int mcu_cs_pend;
75 	int mcu_rw_pst;
76 	int mcu_rw_pend;
77 	int mcu_hold_mode;
78 };
79 
80 struct vop_rect {
81 	int width;
82 	int height;
83 };
84 
85 struct crtc_state {
86 	struct udevice *dev;
87 	struct rockchip_crtc *crtc;
88 	void *private;
89 	ofnode node;
90 	struct device_node *ports_node; /* if (ports_node) it's vop2; */
91 	int crtc_id;
92 
93 	int format;
94 	u32 dma_addr;
95 	int ymirror;
96 	int rb_swap;
97 	int xvir;
98 	int src_x;
99 	int src_y;
100 	int src_w;
101 	int src_h;
102 	int crtc_x;
103 	int crtc_y;
104 	int crtc_w;
105 	int crtc_h;
106 	bool yuv_overlay;
107 	struct rockchip_mcu_timing mcu_timing;
108 	u32 dual_channel_swap;
109 	u32 feature;
110 	struct vop_rect max_output;
111 };
112 
113 struct panel_state {
114 	struct rockchip_panel *panel;
115 
116 	ofnode dsp_lut_node;
117 };
118 
119 struct overscan {
120 	int left_margin;
121 	int right_margin;
122 	int top_margin;
123 	int bottom_margin;
124 };
125 
126 struct connector_state {
127 	struct udevice *dev;
128 	const struct rockchip_connector *connector;
129 	struct rockchip_bridge *bridge;
130 	struct rockchip_phy *phy;
131 	ofnode node;
132 
133 	void *private;
134 
135 	struct drm_display_mode mode;
136 	struct overscan overscan;
137 	u8 edid[EDID_SIZE * 4];
138 	int bus_format;
139 	int output_mode;
140 	int type;
141 	int output_if;
142 	int output_flags;
143 	int color_space;
144 	unsigned int bpc;
145 
146 	struct base2_disp_info *disp_info; /* disp_info from baseparameter 2.0 */
147 
148 	struct {
149 		u32 *lut;
150 		int size;
151 	} gamma;
152 };
153 
154 struct logo_info {
155 	int mode;
156 	char *mem;
157 	bool ymirror;
158 	u32 offset;
159 	u32 width;
160 	int height;
161 	u32 bpp;
162 };
163 
164 struct rockchip_logo_cache {
165 	struct list_head head;
166 	char name[20];
167 	struct logo_info logo;
168 };
169 
170 struct display_state {
171 	struct list_head head;
172 
173 	const void *blob;
174 	ofnode node;
175 
176 	struct crtc_state crtc_state;
177 	struct connector_state conn_state;
178 	struct panel_state panel_state;
179 
180 	char ulogo_name[30];
181 	char klogo_name[30];
182 
183 	struct logo_info logo;
184 	int logo_mode;
185 	int charge_logo_mode;
186 	void *mem_base;
187 	int mem_size;
188 
189 	int enable;
190 	int is_init;
191 	int is_enable;
192 };
193 
194 static inline struct rockchip_panel *state_get_panel(struct display_state *s)
195 {
196 	struct panel_state *panel_state = &s->panel_state;
197 
198 	return panel_state->panel;
199 }
200 
201 int drm_mode_vrefresh(const struct drm_display_mode *mode);
202 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
203 bool drm_mode_is_420(const struct drm_display_info *display,
204 		     struct drm_display_mode *mode);
205 struct base2_disp_info *rockchip_get_disp_info(int type, int id);
206 
207 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
208 				    struct vop_rect *max_output);
209 unsigned long get_cubic_lut_buffer(int crtc_id);
210 
211 #endif
212