1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 /* 16 * major: IP major vertion, used for IP structure 17 * minor: big feature change under same structure 18 */ 19 #define VOP_VERSION(major, minor) ((major) << 8 | (minor)) 20 #define VOP_MAJOR(version) ((version) >> 8) 21 #define VOP_MINOR(version) ((version) & 0xff) 22 23 #define VOP_VERSION_RK3568 VOP_VERSION(0x40, 0x15) 24 #define VOP_VERSION_RK3588 VOP_VERSION(0x40, 0x17) 25 26 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE BIT(0) 27 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE BIT(1) 28 #define ROCKCHIP_OUTPUT_DATA_SWAP BIT(2) 29 30 #define ROCKCHIP_DSC_PPS_SIZE_BYTE 88 31 32 enum data_format { 33 ROCKCHIP_FMT_ARGB8888 = 0, 34 ROCKCHIP_FMT_RGB888, 35 ROCKCHIP_FMT_RGB565, 36 ROCKCHIP_FMT_YUV420SP = 4, 37 ROCKCHIP_FMT_YUV422SP, 38 ROCKCHIP_FMT_YUV444SP, 39 }; 40 41 enum display_mode { 42 ROCKCHIP_DISPLAY_FULLSCREEN, 43 ROCKCHIP_DISPLAY_CENTER, 44 }; 45 46 enum rockchip_cmd_type { 47 CMD_TYPE_DEFAULT, 48 CMD_TYPE_SPI, 49 CMD_TYPE_MCU 50 }; 51 52 enum rockchip_mcu_cmd { 53 MCU_WRCMD = 0, 54 MCU_WRDATA, 55 MCU_SETBYPASS, 56 }; 57 58 /* 59 * display output interface supported by rockchip lcdc 60 */ 61 #define ROCKCHIP_OUT_MODE_P888 0 62 #define ROCKCHIP_OUT_MODE_BT1120 0 63 #define ROCKCHIP_OUT_MODE_P666 1 64 #define ROCKCHIP_OUT_MODE_P565 2 65 #define ROCKCHIP_OUT_MODE_BT656 5 66 #define ROCKCHIP_OUT_MODE_S888 8 67 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 68 #define ROCKCHIP_OUT_MODE_YUV420 14 69 /* for use special outface */ 70 #define ROCKCHIP_OUT_MODE_AAAA 15 71 72 #define VOP_OUTPUT_IF_RGB BIT(0) 73 #define VOP_OUTPUT_IF_BT1120 BIT(1) 74 #define VOP_OUTPUT_IF_BT656 BIT(2) 75 #define VOP_OUTPUT_IF_LVDS0 BIT(3) 76 #define VOP_OUTPUT_IF_LVDS1 BIT(4) 77 #define VOP_OUTPUT_IF_MIPI0 BIT(5) 78 #define VOP_OUTPUT_IF_MIPI1 BIT(6) 79 #define VOP_OUTPUT_IF_eDP0 BIT(7) 80 #define VOP_OUTPUT_IF_eDP1 BIT(8) 81 #define VOP_OUTPUT_IF_DP0 BIT(9) 82 #define VOP_OUTPUT_IF_DP1 BIT(10) 83 #define VOP_OUTPUT_IF_HDMI0 BIT(11) 84 #define VOP_OUTPUT_IF_HDMI1 BIT(12) 85 86 struct rockchip_mcu_timing { 87 int mcu_pix_total; 88 int mcu_cs_pst; 89 int mcu_cs_pend; 90 int mcu_rw_pst; 91 int mcu_rw_pend; 92 int mcu_hold_mode; 93 }; 94 95 struct vop_rect { 96 int width; 97 int height; 98 }; 99 100 struct rockchip_dsc_sink_cap { 101 /** 102 * @slice_width: the number of pixel columns that comprise the slice width 103 * @slice_height: the number of pixel rows that comprise the slice height 104 * @block_pred: Does block prediction 105 * @native_420: Does sink support DSC with 4:2:0 compression 106 * @bpc_supported: compressed bpc supported by sink : 10, 12 or 16 bpc 107 * @version_major: DSC major version 108 * @version_minor: DSC minor version 109 * @target_bits_per_pixel_x16: bits num after compress and multiply 16 110 */ 111 u16 slice_width; 112 u16 slice_height; 113 bool block_pred; 114 bool native_420; 115 u8 bpc_supported; 116 u8 version_major; 117 u8 version_minor; 118 u16 target_bits_per_pixel_x16; 119 }; 120 121 struct crtc_state { 122 struct udevice *dev; 123 struct rockchip_crtc *crtc; 124 void *private; 125 ofnode node; 126 struct device_node *ports_node; /* if (ports_node) it's vop2; */ 127 int crtc_id; 128 129 int format; 130 u32 dma_addr; 131 int ymirror; 132 int rb_swap; 133 int xvir; 134 int src_x; 135 int src_y; 136 int src_w; 137 int src_h; 138 int crtc_x; 139 int crtc_y; 140 int crtc_w; 141 int crtc_h; 142 bool yuv_overlay; 143 struct rockchip_mcu_timing mcu_timing; 144 u32 dual_channel_swap; 145 u32 feature; 146 struct vop_rect max_output; 147 }; 148 149 struct panel_state { 150 struct rockchip_panel *panel; 151 152 ofnode dsp_lut_node; 153 }; 154 155 struct overscan { 156 int left_margin; 157 int right_margin; 158 int top_margin; 159 int bottom_margin; 160 }; 161 162 struct connector_state { 163 struct udevice *dev; 164 const struct rockchip_connector *connector; 165 struct rockchip_bridge *bridge; 166 struct rockchip_phy *phy; 167 ofnode node; 168 169 void *private; 170 171 struct drm_display_mode mode; 172 struct overscan overscan; 173 u8 edid[EDID_SIZE * 4]; 174 int bus_format; 175 int output_mode; 176 int type; 177 int output_if; 178 int output_flags; 179 int color_space; 180 int dsc_enable; 181 unsigned int bpc; 182 183 struct base2_disp_info *disp_info; /* disp_info from baseparameter 2.0 */ 184 185 u8 dsc_id; 186 u8 dsc_slice_num; 187 u8 dsc_pixel_num; 188 u64 dsc_txp_clk; 189 u64 dsc_pxl_clk; 190 u64 dsc_cds_clk; 191 struct rockchip_dsc_sink_cap dsc_sink_cap; 192 193 struct { 194 u32 *lut; 195 int size; 196 } gamma; 197 }; 198 199 struct logo_info { 200 int mode; 201 char *mem; 202 bool ymirror; 203 u32 offset; 204 u32 width; 205 int height; 206 u32 bpp; 207 }; 208 209 struct rockchip_logo_cache { 210 struct list_head head; 211 char name[20]; 212 struct logo_info logo; 213 }; 214 215 struct display_state { 216 struct list_head head; 217 218 const void *blob; 219 ofnode node; 220 221 struct crtc_state crtc_state; 222 struct connector_state conn_state; 223 struct panel_state panel_state; 224 225 char ulogo_name[30]; 226 char klogo_name[30]; 227 228 struct logo_info logo; 229 int logo_mode; 230 int charge_logo_mode; 231 void *mem_base; 232 int mem_size; 233 234 int enable; 235 int is_init; 236 int is_enable; 237 bool force_output; 238 struct drm_display_mode force_mode; 239 u32 force_bus_format; 240 }; 241 242 static inline struct rockchip_panel *state_get_panel(struct display_state *s) 243 { 244 struct panel_state *panel_state = &s->panel_state; 245 246 return panel_state->panel; 247 } 248 249 int drm_mode_vrefresh(const struct drm_display_mode *mode); 250 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 251 bool drm_mode_is_420(const struct drm_display_info *display, 252 struct drm_display_mode *mode); 253 struct base2_disp_info *rockchip_get_disp_info(int type, int id); 254 255 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 256 struct vop_rect *max_output); 257 unsigned long get_cubic_lut_buffer(int crtc_id); 258 259 #endif 260