1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE BIT(0) 16 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE BIT(1) 17 #define ROCKCHIP_OUTPUT_DATA_SWAP BIT(2) 18 19 enum data_format { 20 ROCKCHIP_FMT_ARGB8888 = 0, 21 ROCKCHIP_FMT_RGB888, 22 ROCKCHIP_FMT_RGB565, 23 ROCKCHIP_FMT_YUV420SP = 4, 24 ROCKCHIP_FMT_YUV422SP, 25 ROCKCHIP_FMT_YUV444SP, 26 }; 27 28 enum display_mode { 29 ROCKCHIP_DISPLAY_FULLSCREEN, 30 ROCKCHIP_DISPLAY_CENTER, 31 }; 32 33 enum rockchip_cmd_type { 34 CMD_TYPE_DEFAULT, 35 CMD_TYPE_SPI, 36 CMD_TYPE_MCU 37 }; 38 39 enum rockchip_mcu_cmd { 40 MCU_WRCMD = 0, 41 MCU_WRDATA, 42 MCU_SETBYPASS, 43 }; 44 45 /* 46 * display output interface supported by rockchip lcdc 47 */ 48 #define ROCKCHIP_OUT_MODE_P888 0 49 #define ROCKCHIP_OUT_MODE_P666 1 50 #define ROCKCHIP_OUT_MODE_P565 2 51 #define ROCKCHIP_OUT_MODE_S888 8 52 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 53 #define ROCKCHIP_OUT_MODE_YUV420 14 54 /* for use special outface */ 55 #define ROCKCHIP_OUT_MODE_AAAA 15 56 57 #define VOP_OUTPUT_IF_RGB BIT(0) 58 #define VOP_OUTPUT_IF_BT1120 BIT(1) 59 #define VOP_OUTPUT_IF_BT656 BIT(2) 60 #define VOP_OUTPUT_IF_LVDS0 BIT(3) 61 #define VOP_OUTPUT_IF_LVDS1 BIT(4) 62 #define VOP_OUTPUT_IF_MIPI0 BIT(5) 63 #define VOP_OUTPUT_IF_MIPI1 BIT(6) 64 #define VOP_OUTPUT_IF_eDP0 BIT(7) 65 #define VOP_OUTPUT_IF_eDP1 BIT(8) 66 #define VOP_OUTPUT_IF_DP0 BIT(9) 67 #define VOP_OUTPUT_IF_DP1 BIT(10) 68 #define VOP_OUTPUT_IF_HDMI0 BIT(11) 69 #define VOP_OUTPUT_IF_HDMI1 BIT(12) 70 71 struct rockchip_mcu_timing { 72 int mcu_pix_total; 73 int mcu_cs_pst; 74 int mcu_cs_pend; 75 int mcu_rw_pst; 76 int mcu_rw_pend; 77 int mcu_hold_mode; 78 }; 79 80 struct vop_rect { 81 int width; 82 int height; 83 }; 84 85 struct crtc_state { 86 struct udevice *dev; 87 struct rockchip_crtc *crtc; 88 void *private; 89 ofnode node; 90 int crtc_id; 91 92 int format; 93 u32 dma_addr; 94 int ymirror; 95 int rb_swap; 96 int xvir; 97 int src_x; 98 int src_y; 99 int src_w; 100 int src_h; 101 int crtc_x; 102 int crtc_y; 103 int crtc_w; 104 int crtc_h; 105 bool yuv_overlay; 106 struct rockchip_mcu_timing mcu_timing; 107 u32 dual_channel_swap; 108 struct vop_rect max_output; 109 }; 110 111 struct panel_state { 112 struct rockchip_panel *panel; 113 114 ofnode dsp_lut_node; 115 }; 116 117 struct overscan { 118 int left_margin; 119 int right_margin; 120 int top_margin; 121 int bottom_margin; 122 }; 123 124 struct connector_state { 125 struct udevice *dev; 126 const struct rockchip_connector *connector; 127 struct rockchip_bridge *bridge; 128 struct rockchip_phy *phy; 129 ofnode node; 130 131 void *private; 132 133 struct drm_display_mode mode; 134 struct overscan overscan; 135 u8 edid[EDID_SIZE * 4]; 136 int bus_format; 137 int output_mode; 138 int type; 139 int output_if; 140 int output_flags; 141 int color_space; 142 unsigned int bpc; 143 144 struct { 145 u32 *lut; 146 int size; 147 } gamma; 148 }; 149 150 struct logo_info { 151 int mode; 152 char *mem; 153 bool ymirror; 154 u32 offset; 155 u32 width; 156 int height; 157 u32 bpp; 158 }; 159 160 struct rockchip_logo_cache { 161 struct list_head head; 162 char name[20]; 163 struct logo_info logo; 164 }; 165 166 struct display_state { 167 struct list_head head; 168 169 const void *blob; 170 ofnode node; 171 172 struct crtc_state crtc_state; 173 struct connector_state conn_state; 174 struct panel_state panel_state; 175 176 char ulogo_name[30]; 177 char klogo_name[30]; 178 179 struct logo_info logo; 180 int logo_mode; 181 int charge_logo_mode; 182 void *mem_base; 183 int mem_size; 184 185 int enable; 186 int is_init; 187 int is_enable; 188 }; 189 190 static inline struct rockchip_panel *state_get_panel(struct display_state *s) 191 { 192 struct panel_state *panel_state = &s->panel_state; 193 194 return panel_state->panel; 195 } 196 197 int drm_mode_vrefresh(const struct drm_display_mode *mode); 198 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 199 bool drm_mode_is_420(const struct drm_display_info *display, 200 struct drm_display_mode *mode); 201 202 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 203 struct vop_rect *max_output); 204 205 #endif 206