1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 void *base_parameter_addr = (void *)&base_parameter; 156 157 for (i = 0; i < 8; i++) { 158 disp_header = &base_parameter.disp_header[i]; 159 if (disp_header->connector_type == type && 160 disp_header->connector_id == id) { 161 printf("disp info %d, type:%d, id:%d\n", i, type, id); 162 offset = disp_header->offset; 163 break; 164 } 165 } 166 167 if (offset < 0) 168 return NULL; 169 disp_info = base_parameter_addr + offset; 170 if (disp_info->screen_info[0].type != type || 171 disp_info->screen_info[0].id != id) { 172 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 173 disp_info->screen_info[0].type, 174 disp_info->screen_info[0].id); 175 return NULL; 176 } 177 178 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 179 return NULL; 180 181 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 182 183 if (crc_val != disp_info->crc) { 184 printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 185 return NULL; 186 } 187 188 return disp_info; 189 } 190 191 /* check which kind of public phy does connector use */ 192 static int check_public_use_phy(struct rockchip_connector *conn) 193 { 194 int ret = NONE; 195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 196 197 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 198 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 199 ret = INNO_HDMI_PHY; 200 #endif 201 202 return ret; 203 } 204 205 /* 206 * get public phy driver and initialize it. 207 * The current version only has inno hdmi phy for hdmi and tve. 208 */ 209 static int get_public_phy(struct rockchip_connector *conn, 210 struct public_phy_data *data) 211 { 212 struct rockchip_phy *phy; 213 struct udevice *dev; 214 int ret = 0; 215 216 switch (data->public_phy_type) { 217 case INNO_HDMI_PHY: 218 #if defined(CONFIG_ROCKCHIP_RK3328) 219 ret = uclass_get_device_by_name(UCLASS_PHY, 220 "hdmiphy@ff430000", &dev); 221 #elif defined(CONFIG_ROCKCHIP_RK322X) 222 ret = uclass_get_device_by_name(UCLASS_PHY, 223 "hdmi-phy@12030000", &dev); 224 #else 225 ret = -EINVAL; 226 #endif 227 if (ret) { 228 printf("Warn: can't find phy driver\n"); 229 return 0; 230 } 231 232 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 233 if (!phy) { 234 printf("failed to get phy driver\n"); 235 return 0; 236 } 237 238 ret = rockchip_phy_init(phy); 239 if (ret) { 240 printf("failed to init phy driver\n"); 241 return ret; 242 } 243 conn->phy = phy; 244 245 debug("inno hdmi phy init success, save it\n"); 246 data->phy_drv = conn->phy; 247 data->phy_init = true; 248 return 0; 249 default: 250 return -EINVAL; 251 } 252 } 253 254 static void init_display_buffer(ulong base) 255 { 256 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 257 memory_end = memory_start; 258 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 259 } 260 261 void *get_display_buffer(int size) 262 { 263 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 264 void *buf; 265 266 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 267 printf("failed to alloc %dbyte memory to display\n", size); 268 return NULL; 269 } 270 buf = (void *)roundup_memory; 271 272 memory_end = roundup_memory + size; 273 274 return buf; 275 } 276 277 static unsigned long get_display_size(void) 278 { 279 return memory_end - memory_start; 280 } 281 282 static unsigned long get_single_cubic_lut_size(void) 283 { 284 ulong cubic_lut_size; 285 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 286 287 /* This is depend on IC designed */ 288 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 289 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 290 291 return cubic_lut_size; 292 } 293 294 static unsigned long get_cubic_lut_offset(int crtc_id) 295 { 296 return crtc_id * get_single_cubic_lut_size(); 297 } 298 299 unsigned long get_cubic_lut_buffer(int crtc_id) 300 { 301 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 302 } 303 304 static unsigned long get_cubic_memory_size(void) 305 { 306 /* Max support 4 cubic lut */ 307 return get_single_cubic_lut_size() * 4; 308 } 309 310 bool can_direct_logo(int bpp) 311 { 312 return bpp == 16 || bpp == 32; 313 } 314 315 static int connector_phy_init(struct rockchip_connector *conn, 316 struct public_phy_data *data) 317 { 318 int type; 319 320 /* does this connector use public phy with others */ 321 type = check_public_use_phy(conn); 322 if (type == INNO_HDMI_PHY) { 323 /* there is no public phy was initialized */ 324 if (!data->phy_init) { 325 debug("start get public phy\n"); 326 data->public_phy_type = type; 327 if (get_public_phy(conn, data)) { 328 printf("can't find correct public phy type\n"); 329 free(data); 330 return -EINVAL; 331 } 332 return 0; 333 } 334 335 /* if this phy has been initialized, get it directly */ 336 conn->phy = (struct rockchip_phy *)data->phy_drv; 337 return 0; 338 } 339 340 return 0; 341 } 342 343 int drm_mode_vrefresh(const struct drm_display_mode *mode) 344 { 345 int refresh = 0; 346 unsigned int calc_val; 347 348 if (mode->vrefresh > 0) { 349 refresh = mode->vrefresh; 350 } else if (mode->htotal > 0 && mode->vtotal > 0) { 351 int vtotal; 352 353 vtotal = mode->vtotal; 354 /* work out vrefresh the value will be x1000 */ 355 calc_val = (mode->clock * 1000); 356 calc_val /= mode->htotal; 357 refresh = (calc_val + vtotal / 2) / vtotal; 358 359 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 360 refresh *= 2; 361 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 362 refresh /= 2; 363 if (mode->vscan > 1) 364 refresh /= mode->vscan; 365 } 366 return refresh; 367 } 368 369 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode) 370 { 371 int hactive, vactive, pixelclock; 372 int hfront_porch, hback_porch, hsync_len; 373 int vfront_porch, vback_porch, vsync_len; 374 int val, flags = 0; 375 376 #define FDT_GET_INT(val, name) \ 377 val = ofnode_read_s32_default(node, name, -1); \ 378 if (val < 0) { \ 379 printf("Can't get %s\n", name); \ 380 return -ENXIO; \ 381 } 382 383 #define FDT_GET_INT_DEFAULT(val, name, default) \ 384 val = ofnode_read_s32_default(node, name, default); 385 386 FDT_GET_INT(hactive, "hactive"); 387 FDT_GET_INT(vactive, "vactive"); 388 FDT_GET_INT(pixelclock, "clock-frequency"); 389 FDT_GET_INT(hsync_len, "hsync-len"); 390 FDT_GET_INT(hfront_porch, "hfront-porch"); 391 FDT_GET_INT(hback_porch, "hback-porch"); 392 FDT_GET_INT(vsync_len, "vsync-len"); 393 FDT_GET_INT(vfront_porch, "vfront-porch"); 394 FDT_GET_INT(vback_porch, "vback-porch"); 395 FDT_GET_INT(val, "hsync-active"); 396 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 397 FDT_GET_INT(val, "vsync-active"); 398 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 399 FDT_GET_INT(val, "pixelclk-active"); 400 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 401 402 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 403 if (val == DRM_MODE_FLAG_XMIRROR) { 404 flags |= DRM_MODE_FLAG_XMIRROR; 405 } else if (val == DRM_MODE_FLAG_YMIRROR) { 406 flags |= DRM_MODE_FLAG_YMIRROR; 407 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 408 flags |= DRM_MODE_FLAG_XMIRROR; 409 flags |= DRM_MODE_FLAG_YMIRROR; 410 } 411 mode->hdisplay = hactive; 412 mode->hsync_start = mode->hdisplay + hfront_porch; 413 mode->hsync_end = mode->hsync_start + hsync_len; 414 mode->htotal = mode->hsync_end + hback_porch; 415 416 mode->vdisplay = vactive; 417 mode->vsync_start = mode->vdisplay + vfront_porch; 418 mode->vsync_end = mode->vsync_start + vsync_len; 419 mode->vtotal = mode->vsync_end + vback_porch; 420 421 mode->clock = pixelclock / 1000; 422 mode->flags = flags; 423 mode->vrefresh = drm_mode_vrefresh(mode); 424 425 return 0; 426 } 427 428 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 429 { 430 int ret = 0; 431 432 ret = rockchip_ofnode_get_display_mode(node, mode); 433 434 if (ret) { 435 mode->clock = 74250; 436 mode->flags = 0x5; 437 mode->hdisplay = 1280; 438 mode->hsync_start = 1390; 439 mode->hsync_end = 1430; 440 mode->htotal = 1650; 441 mode->hskew = 0; 442 mode->vdisplay = 720; 443 mode->vsync_start = 725; 444 mode->vsync_end = 730; 445 mode->vtotal = 750; 446 mode->vrefresh = 60; 447 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 448 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 449 } 450 451 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 452 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 453 mode->vscan); 454 455 return 0; 456 } 457 458 static int display_get_timing_from_dts(struct rockchip_panel *panel, 459 struct drm_display_mode *mode) 460 { 461 struct ofnode_phandle_args args; 462 ofnode dt, timing; 463 int ret; 464 465 dt = dev_read_subnode(panel->dev, "display-timings"); 466 if (ofnode_valid(dt)) { 467 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 468 0, 0, &args); 469 if (ret) 470 return ret; 471 472 timing = args.node; 473 } else { 474 timing = dev_read_subnode(panel->dev, "panel-timing"); 475 } 476 477 if (!ofnode_valid(timing)) { 478 printf("failed to get display timings from DT\n"); 479 return -ENXIO; 480 } 481 482 rockchip_ofnode_get_display_mode(timing, mode); 483 484 return 0; 485 } 486 487 /** 488 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 489 * @edid_data: structure store mode list 490 * @max_output: vop max output resolution 491 */ 492 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 493 struct vop_rect *max_output) 494 { 495 int i; 496 497 for (i = 0; i < edid_data->modes; i++) { 498 if (edid_data->mode_buf[i].hdisplay > max_output->width || 499 edid_data->mode_buf[i].vdisplay > max_output->height) 500 edid_data->mode_buf[i].invalid = true; 501 } 502 } 503 504 /** 505 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 506 * @p: mode 507 * @adjust_flags: a combination of adjustment flags 508 * 509 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 510 * 511 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 512 * interlaced modes. 513 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 514 * buffers containing two eyes (only adjust the timings when needed, eg. for 515 * "frame packing" or "side by side full"). 516 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 517 * be performed for doublescan and vscan > 1 modes respectively. 518 */ 519 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 520 { 521 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 522 return; 523 524 if (p->flags & DRM_MODE_FLAG_DBLCLK) 525 p->crtc_clock = 2 * p->clock; 526 else 527 p->crtc_clock = p->clock; 528 p->crtc_hdisplay = p->hdisplay; 529 p->crtc_hsync_start = p->hsync_start; 530 p->crtc_hsync_end = p->hsync_end; 531 p->crtc_htotal = p->htotal; 532 p->crtc_hskew = p->hskew; 533 p->crtc_vdisplay = p->vdisplay; 534 p->crtc_vsync_start = p->vsync_start; 535 p->crtc_vsync_end = p->vsync_end; 536 p->crtc_vtotal = p->vtotal; 537 538 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 539 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 540 p->crtc_vdisplay /= 2; 541 p->crtc_vsync_start /= 2; 542 p->crtc_vsync_end /= 2; 543 p->crtc_vtotal /= 2; 544 } 545 } 546 547 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 548 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 549 p->crtc_vdisplay *= 2; 550 p->crtc_vsync_start *= 2; 551 p->crtc_vsync_end *= 2; 552 p->crtc_vtotal *= 2; 553 } 554 } 555 556 if (!(adjust_flags & CRTC_NO_VSCAN)) { 557 if (p->vscan > 1) { 558 p->crtc_vdisplay *= p->vscan; 559 p->crtc_vsync_start *= p->vscan; 560 p->crtc_vsync_end *= p->vscan; 561 p->crtc_vtotal *= p->vscan; 562 } 563 } 564 565 if (adjust_flags & CRTC_STEREO_DOUBLE) { 566 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 567 568 switch (layout) { 569 case DRM_MODE_FLAG_3D_FRAME_PACKING: 570 p->crtc_clock *= 2; 571 p->crtc_vdisplay += p->crtc_vtotal; 572 p->crtc_vsync_start += p->crtc_vtotal; 573 p->crtc_vsync_end += p->crtc_vtotal; 574 p->crtc_vtotal += p->crtc_vtotal; 575 break; 576 } 577 } 578 579 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 580 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 581 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 582 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 583 } 584 585 /** 586 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 587 * output format 588 * 589 * @connector: drm connector under action. 590 * @mode: video mode to be tested. 591 * 592 * Returns: 593 * true if the mode can be supported in YCBCR420 format 594 * false if not. 595 */ 596 bool drm_mode_is_420_only(const struct drm_display_info *display, 597 struct drm_display_mode *mode) 598 { 599 u8 vic = drm_match_cea_mode(mode); 600 601 return test_bit(vic, display->hdmi.y420_vdb_modes); 602 } 603 604 /** 605 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 606 * output format also (along with RGB/YCBCR444/422) 607 * 608 * @display: display under action. 609 * @mode: video mode to be tested. 610 * 611 * Returns: 612 * true if the mode can be support YCBCR420 format 613 * false if not. 614 */ 615 bool drm_mode_is_420_also(const struct drm_display_info *display, 616 struct drm_display_mode *mode) 617 { 618 u8 vic = drm_match_cea_mode(mode); 619 620 return test_bit(vic, display->hdmi.y420_cmdb_modes); 621 } 622 623 /** 624 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 625 * output format 626 * 627 * @display: display under action. 628 * @mode: video mode to be tested. 629 * 630 * Returns: 631 * true if the mode can be supported in YCBCR420 format 632 * false if not. 633 */ 634 bool drm_mode_is_420(const struct drm_display_info *display, 635 struct drm_display_mode *mode) 636 { 637 return drm_mode_is_420_only(display, mode) || 638 drm_mode_is_420_also(display, mode); 639 } 640 641 static int display_get_timing(struct display_state *state) 642 { 643 struct connector_state *conn_state = &state->conn_state; 644 struct drm_display_mode *mode = &conn_state->mode; 645 const struct drm_display_mode *m; 646 struct rockchip_panel *panel = conn_state->connector->panel; 647 648 if (panel->funcs->get_mode) 649 return panel->funcs->get_mode(panel, mode); 650 651 if (dev_of_valid(panel->dev) && 652 !display_get_timing_from_dts(panel, mode)) { 653 printf("Using display timing dts\n"); 654 return 0; 655 } 656 657 if (panel->data) { 658 m = (const struct drm_display_mode *)panel->data; 659 memcpy(mode, m, sizeof(*m)); 660 printf("Using display timing from compatible panel driver\n"); 661 return 0; 662 } 663 664 return -ENODEV; 665 } 666 667 static int display_pre_init(void) 668 { 669 struct display_state *state; 670 int ret = 0; 671 672 list_for_each_entry(state, &rockchip_display_list, head) { 673 struct connector_state *conn_state = &state->conn_state; 674 struct crtc_state *crtc_state = &state->crtc_state; 675 struct rockchip_crtc *crtc = crtc_state->crtc; 676 677 ret = rockchip_connector_pre_init(state); 678 if (ret) 679 printf("pre init conn error\n"); 680 681 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 682 } 683 return ret; 684 } 685 686 static int display_use_force_mode(struct display_state *state) 687 { 688 struct connector_state *conn_state = &state->conn_state; 689 struct drm_display_mode *mode = &conn_state->mode; 690 691 conn_state->bpc = 8; 692 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 693 conn_state->bus_format = state->force_bus_format; 694 695 return 0; 696 } 697 698 static int display_get_edid_mode(struct display_state *state) 699 { 700 int ret = 0; 701 struct connector_state *conn_state = &state->conn_state; 702 struct drm_display_mode *mode = &conn_state->mode; 703 int bpc; 704 705 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 706 if (!ret) { 707 conn_state->bpc = bpc; 708 edid_print_info((void *)&conn_state->edid); 709 } else { 710 conn_state->bpc = 8; 711 mode->clock = 74250; 712 mode->flags = 0x5; 713 mode->hdisplay = 1280; 714 mode->hsync_start = 1390; 715 mode->hsync_end = 1430; 716 mode->htotal = 1650; 717 mode->hskew = 0; 718 mode->vdisplay = 720; 719 mode->vsync_start = 725; 720 mode->vsync_end = 730; 721 mode->vtotal = 750; 722 mode->vrefresh = 60; 723 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 724 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 725 726 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 727 state->conn_state.connector->dev->name); 728 } 729 730 return ret; 731 } 732 733 static int display_init(struct display_state *state) 734 { 735 struct connector_state *conn_state = &state->conn_state; 736 struct rockchip_connector *conn = conn_state->connector; 737 struct crtc_state *crtc_state = &state->crtc_state; 738 struct rockchip_crtc *crtc = crtc_state->crtc; 739 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 740 struct drm_display_mode *mode = &conn_state->mode; 741 const char *compatible; 742 int ret = 0; 743 static bool __print_once = false; 744 745 if (!__print_once) { 746 __print_once = true; 747 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 748 } 749 750 if (state->is_init) 751 return 0; 752 753 if (!crtc_funcs) { 754 printf("failed to find crtc functions\n"); 755 return -ENXIO; 756 } 757 758 if (crtc_state->crtc->active && !crtc_state->ports_node && 759 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 760 sizeof(struct drm_display_mode))) { 761 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 762 crtc_state->dev->name, 763 crtc_state->crtc->active_mode.type, 764 crtc_state->crtc->active_mode.hdisplay, 765 crtc_state->crtc->active_mode.vdisplay, 766 crtc_state->crtc->active_mode.vrefresh); 767 return -ENODEV; 768 } 769 770 if (crtc_funcs->preinit) { 771 ret = crtc_funcs->preinit(state); 772 if (ret) 773 return ret; 774 } 775 776 ret = rockchip_connector_init(state); 777 if (ret) 778 goto deinit; 779 780 /* 781 * support hotplug, but not connect; 782 */ 783 #ifdef CONFIG_ROCKCHIP_DRM_TVE 784 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 785 printf("hdmi plugin ,skip tve\n"); 786 goto deinit; 787 } 788 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 789 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 790 printf("hdmi plugin ,skip tve\n"); 791 goto deinit; 792 } 793 #endif 794 795 ret = rockchip_connector_detect(state); 796 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 797 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 798 crtc->hdmi_hpd = ret; 799 #endif 800 if (!ret && !state->force_output) 801 goto deinit; 802 803 if (conn->panel) { 804 ret = display_get_timing(state); 805 if (!ret) 806 conn_state->bpc = conn->panel->bpc; 807 #if defined(CONFIG_I2C_EDID) 808 if (ret < 0 && conn->funcs->get_edid) { 809 rockchip_panel_prepare(conn->panel); 810 ret = conn->funcs->get_edid(conn, state); 811 if (!ret) 812 display_get_edid_mode(state); 813 } 814 #endif 815 } else if (conn->bridge) { 816 ret = video_bridge_read_edid(conn->bridge->dev, 817 conn_state->edid, EDID_SIZE); 818 if (ret > 0) { 819 #if defined(CONFIG_I2C_EDID) 820 display_get_edid_mode(state); 821 #endif 822 } else { 823 ret = video_bridge_get_timing(conn->bridge->dev); 824 } 825 } else if (conn->funcs->get_timing) { 826 ret = conn->funcs->get_timing(conn, state); 827 } else if (conn->funcs->get_edid) { 828 ret = conn->funcs->get_edid(conn, state); 829 #if defined(CONFIG_I2C_EDID) 830 if (!ret) 831 display_get_edid_mode(state); 832 #endif 833 } 834 835 if (!ret && conn_state->secondary) { 836 struct rockchip_connector *connector = conn_state->secondary; 837 838 if (connector->panel) { 839 if (connector->panel->funcs->get_mode) { 840 struct drm_display_mode *_mode = drm_mode_create(); 841 842 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 843 if (!ret && !drm_mode_equal(_mode, mode)) 844 ret = -EINVAL; 845 846 drm_mode_destroy(_mode); 847 } 848 } 849 } 850 851 if (ret && !state->force_output) 852 goto deinit; 853 if (state->force_output) 854 display_use_force_mode(state); 855 856 /* rk356x series drive mipi pixdata on posedge */ 857 compatible = dev_read_string(conn->dev, "compatible"); 858 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 859 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 860 861 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 862 " H: %04d %04d %04d %04d\n" 863 " V: %04d %04d %04d %04d\n" 864 "bus_format: %x\n", 865 conn->dev->name, 866 state->force_output ? "use force output" : "", 867 mode->clock, mode->flags, 868 mode->hdisplay, mode->hsync_start, 869 mode->hsync_end, mode->htotal, 870 mode->vdisplay, mode->vsync_start, 871 mode->vsync_end, mode->vtotal, 872 conn_state->bus_format); 873 874 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 875 876 if (conn_state->secondary) { 877 mode->crtc_clock *= 2; 878 mode->crtc_hdisplay *= 2; 879 mode->crtc_hsync_start *= 2; 880 mode->crtc_hsync_end *= 2; 881 mode->crtc_htotal *= 2; 882 } 883 884 if (conn->bridge) 885 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 886 887 if (crtc_funcs->init) { 888 ret = crtc_funcs->init(state); 889 if (ret) 890 goto deinit; 891 } 892 state->is_init = 1; 893 894 crtc_state->crtc->active = true; 895 memcpy(&crtc_state->crtc->active_mode, 896 &conn_state->mode, sizeof(struct drm_display_mode)); 897 898 return 0; 899 900 deinit: 901 rockchip_connector_deinit(state); 902 return ret; 903 } 904 905 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 906 { 907 struct crtc_state *crtc_state = &state->crtc_state; 908 const struct rockchip_crtc *crtc = crtc_state->crtc; 909 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 910 int ret; 911 912 if (!state->is_init) 913 return -EINVAL; 914 915 if (crtc_funcs->send_mcu_cmd) { 916 ret = crtc_funcs->send_mcu_cmd(state, type, val); 917 if (ret) 918 return ret; 919 } 920 921 return 0; 922 } 923 924 static int display_set_plane(struct display_state *state) 925 { 926 struct crtc_state *crtc_state = &state->crtc_state; 927 const struct rockchip_crtc *crtc = crtc_state->crtc; 928 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 929 int ret; 930 931 if (!state->is_init) 932 return -EINVAL; 933 934 if (crtc_funcs->set_plane) { 935 ret = crtc_funcs->set_plane(state); 936 if (ret) 937 return ret; 938 } 939 940 return 0; 941 } 942 943 static int display_enable(struct display_state *state) 944 { 945 struct crtc_state *crtc_state = &state->crtc_state; 946 const struct rockchip_crtc *crtc = crtc_state->crtc; 947 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 948 949 if (!state->is_init) 950 return -EINVAL; 951 952 if (state->is_enable) 953 return 0; 954 955 if (crtc_funcs->prepare) 956 crtc_funcs->prepare(state); 957 958 rockchip_connector_pre_enable(state); 959 960 if (crtc_funcs->enable) 961 crtc_funcs->enable(state); 962 963 rockchip_connector_enable(state); 964 965 state->is_enable = true; 966 967 return 0; 968 } 969 970 static int display_disable(struct display_state *state) 971 { 972 struct crtc_state *crtc_state = &state->crtc_state; 973 const struct rockchip_crtc *crtc = crtc_state->crtc; 974 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 975 976 if (!state->is_init) 977 return 0; 978 979 if (!state->is_enable) 980 return 0; 981 982 rockchip_connector_disable(state); 983 984 if (crtc_funcs->disable) 985 crtc_funcs->disable(state); 986 987 rockchip_connector_post_disable(state); 988 989 state->is_enable = 0; 990 state->is_init = 0; 991 992 return 0; 993 } 994 995 static int display_rect_calc_scale(int src, int dst) 996 { 997 int scale = 0; 998 999 if (WARN_ON(src < 0 || dst < 0)) 1000 return -EINVAL; 1001 1002 if (dst == 0) 1003 return 0; 1004 1005 src <<= 16; 1006 1007 if (src > (dst << 16)) 1008 return DIV_ROUND_UP(src, dst); 1009 else 1010 scale = src / dst; 1011 1012 return scale; 1013 } 1014 1015 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst, 1016 int min_hscale, int max_hscale) 1017 { 1018 int hscale = display_rect_calc_scale(src->w, dst->w); 1019 1020 if (hscale < 0 || dst->w == 0) 1021 return hscale; 1022 1023 if (hscale < min_hscale || hscale > max_hscale) 1024 return -ERANGE; 1025 1026 return hscale; 1027 } 1028 1029 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst, 1030 int min_vscale, int max_vscale) 1031 { 1032 int vscale = display_rect_calc_scale(src->h, dst->h); 1033 1034 if (vscale < 0 || dst->h == 0) 1035 return vscale; 1036 1037 if (vscale < min_vscale || vscale > max_vscale) 1038 return -ERANGE; 1039 1040 return vscale; 1041 } 1042 1043 static int display_check(struct display_state *state) 1044 { 1045 struct connector_state *conn_state = &state->conn_state; 1046 struct rockchip_connector *conn = conn_state->connector; 1047 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1048 struct crtc_state *crtc_state = &state->crtc_state; 1049 const struct rockchip_crtc *crtc = crtc_state->crtc; 1050 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1051 int ret; 1052 1053 if (!state->is_init) 1054 return 0; 1055 1056 if (conn_funcs->check) { 1057 ret = conn_funcs->check(conn, state); 1058 if (ret) 1059 goto check_fail; 1060 } 1061 1062 if (crtc_funcs->check) { 1063 ret = crtc_funcs->check(state); 1064 if (ret) 1065 goto check_fail; 1066 } 1067 1068 if (crtc_funcs->plane_check) { 1069 ret = crtc_funcs->plane_check(state); 1070 if (ret) 1071 goto check_fail; 1072 } 1073 1074 return 0; 1075 1076 check_fail: 1077 state->is_init = false; 1078 return ret; 1079 } 1080 1081 static int display_mode_valid(struct display_state *state) 1082 { 1083 struct connector_state *conn_state = &state->conn_state; 1084 struct rockchip_connector *conn = conn_state->connector; 1085 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1086 struct crtc_state *crtc_state = &state->crtc_state; 1087 const struct rockchip_crtc *crtc = crtc_state->crtc; 1088 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1089 int ret; 1090 1091 if (!state->is_init) 1092 return 0; 1093 1094 if (conn_funcs->mode_valid) { 1095 ret = conn_funcs->mode_valid(conn, state); 1096 if (ret) 1097 goto invalid_mode; 1098 } 1099 1100 if (crtc_funcs->mode_valid) { 1101 ret = crtc_funcs->mode_valid(state); 1102 if (ret) 1103 goto invalid_mode; 1104 } 1105 1106 return 0; 1107 1108 invalid_mode: 1109 state->is_init = false; 1110 return ret; 1111 } 1112 1113 static int display_logo(struct display_state *state) 1114 { 1115 struct crtc_state *crtc_state = &state->crtc_state; 1116 struct connector_state *conn_state = &state->conn_state; 1117 struct logo_info *logo = &state->logo; 1118 int hdisplay, vdisplay, ret; 1119 1120 ret = display_init(state); 1121 if (!state->is_init || ret) 1122 return -ENODEV; 1123 1124 switch (logo->bpp) { 1125 case 16: 1126 crtc_state->format = ROCKCHIP_FMT_RGB565; 1127 break; 1128 case 24: 1129 crtc_state->format = ROCKCHIP_FMT_RGB888; 1130 break; 1131 case 32: 1132 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1133 break; 1134 default: 1135 printf("can't support bmp bits[%d]\n", logo->bpp); 1136 return -EINVAL; 1137 } 1138 hdisplay = conn_state->mode.crtc_hdisplay; 1139 vdisplay = conn_state->mode.vdisplay; 1140 crtc_state->src_rect.w = logo->width; 1141 crtc_state->src_rect.h = logo->height; 1142 crtc_state->src_rect.x = 0; 1143 crtc_state->src_rect.y = 0; 1144 crtc_state->ymirror = logo->ymirror; 1145 crtc_state->rb_swap = 0; 1146 1147 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1148 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1149 1150 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1151 crtc_state->crtc_rect.x = 0; 1152 crtc_state->crtc_rect.y = 0; 1153 crtc_state->crtc_rect.w = hdisplay; 1154 crtc_state->crtc_rect.h = vdisplay; 1155 } else { 1156 if (crtc_state->src_rect.w >= hdisplay) { 1157 crtc_state->crtc_rect.x = 0; 1158 crtc_state->crtc_rect.w = hdisplay; 1159 } else { 1160 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1161 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1162 } 1163 1164 if (crtc_state->src_rect.h >= vdisplay) { 1165 crtc_state->crtc_rect.y = 0; 1166 crtc_state->crtc_rect.h = vdisplay; 1167 } else { 1168 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1169 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1170 } 1171 } 1172 1173 display_mode_valid(state); 1174 display_check(state); 1175 display_set_plane(state); 1176 display_enable(state); 1177 1178 return 0; 1179 } 1180 1181 static int get_crtc_id(ofnode connect, bool is_ports_node) 1182 { 1183 struct device_node *port_node; 1184 struct device_node *remote; 1185 int phandle; 1186 int val; 1187 1188 if (is_ports_node) { 1189 port_node = of_get_parent(connect.np); 1190 if (!port_node) 1191 goto err; 1192 1193 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1194 if (val < 0) 1195 goto err; 1196 } else { 1197 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1198 if (phandle < 0) 1199 goto err; 1200 1201 remote = of_find_node_by_phandle(phandle); 1202 if (!remote) 1203 goto err; 1204 1205 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1206 if (val < 0) 1207 goto err; 1208 } 1209 1210 return val; 1211 err: 1212 printf("Can't get crtc id, default set to id = 0\n"); 1213 return 0; 1214 } 1215 1216 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1217 { 1218 ofnode mcu_node; 1219 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1220 1221 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1222 if (!ofnode_valid(mcu_node)) 1223 return -ENODEV; 1224 1225 #define FDT_GET_MCU_INT(val, name) \ 1226 do { \ 1227 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1228 if (val < 0) { \ 1229 printf("Can't get %s\n", name); \ 1230 return -ENXIO; \ 1231 } \ 1232 } while (0) 1233 1234 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1235 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1236 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1237 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1238 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1239 1240 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1241 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1242 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1243 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1244 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1245 1246 return 0; 1247 } 1248 1249 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1250 { 1251 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1252 1253 list_for_each_entry(tmp, &logo_cache_list, head) { 1254 if (!strcmp(tmp->name, bmp)) { 1255 logo_cache = tmp; 1256 break; 1257 } 1258 } 1259 1260 if (!logo_cache) { 1261 logo_cache = malloc(sizeof(*logo_cache)); 1262 if (!logo_cache) { 1263 printf("failed to alloc memory for logo cache\n"); 1264 return NULL; 1265 } 1266 memset(logo_cache, 0, sizeof(*logo_cache)); 1267 strcpy(logo_cache->name, bmp); 1268 INIT_LIST_HEAD(&logo_cache->head); 1269 list_add_tail(&logo_cache->head, &logo_cache_list); 1270 } 1271 1272 return logo_cache; 1273 } 1274 1275 /* Note: used only for rkfb kernel driver */ 1276 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1277 { 1278 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1279 void *dst = NULL; 1280 int len, size; 1281 struct bmp_header *header; 1282 1283 if (!logo || !bmp_name) 1284 return -EINVAL; 1285 1286 header = malloc(RK_BLK_SIZE); 1287 if (!header) 1288 return -ENOMEM; 1289 1290 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1291 if (len != RK_BLK_SIZE) { 1292 free(header); 1293 return -EINVAL; 1294 } 1295 size = get_unaligned_le32(&header->file_size); 1296 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1297 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1298 if (len != size) { 1299 printf("failed to load bmp %s\n", bmp_name); 1300 free(header); 1301 return -ENOENT; 1302 } 1303 1304 logo->mem = dst; 1305 #endif 1306 1307 return 0; 1308 } 1309 1310 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1311 { 1312 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1313 struct rockchip_logo_cache *logo_cache; 1314 struct bmp_header *header; 1315 void *dst = NULL, *pdst; 1316 int size, len; 1317 int ret = 0; 1318 int reserved = 0; 1319 int dst_size; 1320 1321 if (!logo || !bmp_name) 1322 return -EINVAL; 1323 logo_cache = find_or_alloc_logo_cache(bmp_name); 1324 if (!logo_cache) 1325 return -ENOMEM; 1326 1327 if (logo_cache->logo.mem) { 1328 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1329 return 0; 1330 } 1331 1332 header = malloc(RK_BLK_SIZE); 1333 if (!header) 1334 return -ENOMEM; 1335 1336 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1337 if (len != RK_BLK_SIZE) { 1338 ret = -EINVAL; 1339 goto free_header; 1340 } 1341 1342 logo->bpp = get_unaligned_le16(&header->bit_count); 1343 logo->width = get_unaligned_le32(&header->width); 1344 logo->height = get_unaligned_le32(&header->height); 1345 dst_size = logo->width * logo->height * logo->bpp >> 3; 1346 reserved = get_unaligned_le32(&header->reserved); 1347 if (logo->height < 0) 1348 logo->height = -logo->height; 1349 size = get_unaligned_le32(&header->file_size); 1350 if (!can_direct_logo(logo->bpp)) { 1351 if (size > MEMORY_POOL_SIZE) { 1352 printf("failed to use boot buf as temp bmp buffer\n"); 1353 ret = -ENOMEM; 1354 goto free_header; 1355 } 1356 pdst = get_display_buffer(size); 1357 1358 } else { 1359 pdst = get_display_buffer(size); 1360 dst = pdst; 1361 } 1362 1363 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1364 if (len != size) { 1365 printf("failed to load bmp %s\n", bmp_name); 1366 ret = -ENOENT; 1367 goto free_header; 1368 } 1369 1370 if (!can_direct_logo(logo->bpp)) { 1371 /* 1372 * TODO: force use 16bpp if bpp less than 16; 1373 */ 1374 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1375 dst_size = logo->width * logo->height * logo->bpp >> 3; 1376 dst = get_display_buffer(dst_size); 1377 if (!dst) { 1378 ret = -ENOMEM; 1379 goto free_header; 1380 } 1381 if (bmpdecoder(pdst, dst, logo->bpp)) { 1382 printf("failed to decode bmp %s\n", bmp_name); 1383 ret = -EINVAL; 1384 goto free_header; 1385 } 1386 1387 logo->offset = 0; 1388 logo->ymirror = 0; 1389 } else { 1390 logo->offset = get_unaligned_le32(&header->data_offset); 1391 if (reserved == BMP_PROCESSED_FLAG) 1392 logo->ymirror = 0; 1393 else 1394 logo->ymirror = 1; 1395 } 1396 logo->mem = dst; 1397 1398 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1399 1400 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1401 1402 free_header: 1403 1404 free(header); 1405 1406 return ret; 1407 #else 1408 return -EINVAL; 1409 #endif 1410 } 1411 1412 void rockchip_show_fbbase(ulong fbbase) 1413 { 1414 struct display_state *s; 1415 1416 list_for_each_entry(s, &rockchip_display_list, head) { 1417 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1418 s->logo.mem = (char *)fbbase; 1419 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1420 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1421 s->logo.bpp = 32; 1422 s->logo.ymirror = 0; 1423 1424 display_logo(s); 1425 } 1426 } 1427 1428 int rockchip_show_bmp(const char *bmp) 1429 { 1430 struct display_state *s; 1431 int ret = 0; 1432 1433 if (!bmp) { 1434 list_for_each_entry(s, &rockchip_display_list, head) 1435 display_disable(s); 1436 return -ENOENT; 1437 } 1438 1439 list_for_each_entry(s, &rockchip_display_list, head) { 1440 s->logo.mode = s->charge_logo_mode; 1441 if (load_bmp_logo(&s->logo, bmp)) 1442 continue; 1443 ret = display_logo(s); 1444 } 1445 1446 return ret; 1447 } 1448 1449 int rockchip_show_logo(void) 1450 { 1451 struct display_state *s; 1452 int ret = 0; 1453 1454 list_for_each_entry(s, &rockchip_display_list, head) { 1455 s->logo.mode = s->logo_mode; 1456 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1457 printf("failed to display uboot logo\n"); 1458 else 1459 ret = display_logo(s); 1460 1461 /* Load kernel bmp in rockchip_display_fixup() later */ 1462 } 1463 1464 return ret; 1465 } 1466 1467 enum { 1468 PORT_DIR_IN, 1469 PORT_DIR_OUT, 1470 }; 1471 1472 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1473 { 1474 ofnode ports, port; 1475 u32 reg; 1476 1477 ports = ofnode_find_subnode(node, "ports"); 1478 if (!ofnode_valid(ports)) 1479 return NULL; 1480 1481 ofnode_for_each_subnode(port, ports) { 1482 if (ofnode_read_u32(port, "reg", ®)) 1483 continue; 1484 1485 if (reg == id) 1486 break; 1487 } 1488 1489 if (reg == id) 1490 return ofnode_to_np(port); 1491 1492 return NULL; 1493 } 1494 1495 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1496 { 1497 ofnode parent; 1498 int is_ports_node; 1499 1500 parent = ofnode_get_parent(port); 1501 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1502 if (is_ports_node) 1503 parent = ofnode_get_parent(parent); 1504 1505 return ofnode_to_np(parent); 1506 } 1507 1508 static const struct device_node *rockchip_of_graph_get_remote_node(ofnode node, int port, 1509 int endpoint) 1510 { 1511 const struct device_node *port_node; 1512 ofnode ep; 1513 u32 reg; 1514 uint phandle; 1515 1516 port_node = rockchip_of_graph_get_port_by_id(node, port); 1517 if (!port_node) 1518 return NULL; 1519 1520 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1521 if (ofnode_read_u32(ep, "reg", ®)) 1522 break; 1523 if (reg == endpoint) 1524 break; 1525 } 1526 1527 if (!ofnode_valid(ep)) 1528 return NULL; 1529 1530 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1531 return NULL; 1532 1533 ep = ofnode_get_by_phandle(phandle); 1534 if (!ofnode_valid(ep)) 1535 return NULL; 1536 1537 return ofnode_to_np(ep); 1538 } 1539 1540 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1541 { 1542 const struct device_node *ep_node, *panel_node; 1543 ofnode panel_ofnode, port; 1544 struct udevice *panel_dev; 1545 int ret = 0; 1546 1547 *panel = NULL; 1548 panel_ofnode = dev_read_subnode(dev, "panel"); 1549 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1550 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1551 &panel_dev); 1552 if (!ret) 1553 goto found; 1554 } 1555 1556 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1557 if (!ep_node) 1558 return -ENODEV; 1559 1560 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1561 if (!ofnode_valid(port)) 1562 return -ENODEV; 1563 1564 panel_node = rockchip_of_graph_get_port_parent(port); 1565 if (!panel_node) 1566 return -ENODEV; 1567 1568 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1569 if (!ret) 1570 goto found; 1571 1572 return -ENODEV; 1573 1574 found: 1575 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1576 return 0; 1577 } 1578 1579 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1580 { 1581 const struct device_node *ep_node, *bridge_node; 1582 ofnode port; 1583 struct udevice *bridge_dev; 1584 int ret = 0; 1585 1586 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1587 if (!ep_node) 1588 return -ENODEV; 1589 1590 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1591 if (!ofnode_valid(port)) 1592 return -ENODEV; 1593 1594 bridge_node = rockchip_of_graph_get_port_parent(port); 1595 if (!bridge_node) 1596 return -ENODEV; 1597 1598 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1599 &bridge_dev); 1600 if (!ret) 1601 goto found; 1602 1603 return -ENODEV; 1604 1605 found: 1606 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1607 return 0; 1608 } 1609 1610 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1611 struct rockchip_bridge **bridge) 1612 { 1613 int ret = 0; 1614 *panel = NULL; 1615 *bridge = NULL; 1616 1617 if (panel) { 1618 ret = rockchip_of_find_panel(dev, panel); 1619 if (!ret) 1620 return 0; 1621 } 1622 1623 if (ret) { 1624 ret = rockchip_of_find_bridge(dev, bridge); 1625 if (!ret) 1626 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1627 &(*bridge)->next_bridge); 1628 } 1629 1630 return ret; 1631 } 1632 1633 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1634 { 1635 struct udevice *phy_dev; 1636 int ret; 1637 1638 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1639 if (ret) 1640 return NULL; 1641 1642 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1643 } 1644 1645 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1646 { 1647 ofnode ep, port, ports, conn; 1648 uint phandle; 1649 struct udevice *dev; 1650 int ret; 1651 1652 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1653 return NULL; 1654 1655 ep = ofnode_get_by_phandle(phandle); 1656 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1657 return NULL; 1658 1659 port = ofnode_get_parent(ep); 1660 if (!ofnode_valid(port)) 1661 return NULL; 1662 1663 ports = ofnode_get_parent(port); 1664 if (!ofnode_valid(ports)) 1665 return NULL; 1666 1667 conn = ofnode_get_parent(ports); 1668 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1669 return NULL; 1670 1671 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1672 if (ret) 1673 return NULL; 1674 1675 return dev; 1676 } 1677 1678 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1679 { 1680 struct rockchip_connector *conn; 1681 struct udevice *dev; 1682 int ret; 1683 1684 dev = rockchip_of_find_connector_device(endpoint); 1685 if (!dev) { 1686 printf("Warn: can't find connect driver\n"); 1687 return NULL; 1688 } 1689 1690 conn = get_rockchip_connector_by_device(dev); 1691 if (!conn) 1692 return NULL; 1693 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1694 if (ret) 1695 debug("Warn: no find panel or bridge\n"); 1696 1697 conn->phy = rockchip_of_find_phy(dev); 1698 1699 return conn; 1700 } 1701 1702 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1703 { 1704 char *conn_name; 1705 struct device_node *split_node; 1706 struct udevice *split_dev; 1707 struct rockchip_connector *split_conn; 1708 bool split_mode; 1709 int ret; 1710 1711 split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1712 if (!split_mode) 1713 return NULL; 1714 1715 switch (conn->type) { 1716 case DRM_MODE_CONNECTOR_DisplayPort: 1717 conn_name = "dp"; 1718 break; 1719 case DRM_MODE_CONNECTOR_eDP: 1720 conn_name = "edp"; 1721 break; 1722 case DRM_MODE_CONNECTOR_HDMIA: 1723 conn_name = "hdmi"; 1724 break; 1725 default: 1726 return NULL; 1727 } 1728 1729 split_node = of_alias_get_dev(conn_name, !conn->id); 1730 if (!split_node || !of_device_is_available(split_node)) 1731 return NULL; 1732 1733 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1734 if (ret) 1735 return NULL; 1736 1737 split_conn = get_rockchip_connector_by_device(split_dev); 1738 if (!split_conn) 1739 return NULL; 1740 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1741 if (ret) 1742 debug("Warn: no find panel or bridge\n"); 1743 1744 split_conn->phy = rockchip_of_find_phy(split_dev); 1745 1746 return split_conn; 1747 } 1748 1749 static bool rockchip_get_display_path_status(ofnode endpoint) 1750 { 1751 ofnode ep; 1752 uint phandle; 1753 1754 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1755 return false; 1756 1757 ep = ofnode_get_by_phandle(phandle); 1758 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1759 return false; 1760 1761 return true; 1762 } 1763 1764 #if defined(CONFIG_ROCKCHIP_RK3568) 1765 static int rockchip_display_fixup_dts(void *blob) 1766 { 1767 ofnode route_node, route_subnode, conn_ep, conn_port; 1768 const struct device_node *route_sub_devnode; 1769 const struct device_node *ep_node, *conn_ep_dev_node; 1770 u32 phandle; 1771 int conn_ep_offset; 1772 const char *route_sub_path, *path; 1773 1774 /* Don't go further if new variant after 1775 * reading PMUGRF_SOC_CON15 1776 */ 1777 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1778 return 0; 1779 1780 route_node = ofnode_path("/display-subsystem/route"); 1781 if (!ofnode_valid(route_node)) 1782 return -EINVAL; 1783 1784 ofnode_for_each_subnode(route_subnode, route_node) { 1785 if (!ofnode_is_available(route_subnode)) 1786 continue; 1787 1788 route_sub_devnode = ofnode_to_np(route_subnode); 1789 route_sub_path = route_sub_devnode->full_name; 1790 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1791 !strstr(ofnode_get_name(route_subnode), "edp")) 1792 return 0; 1793 1794 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1795 if (phandle < 0) { 1796 printf("Warn: can't find connect node's handle\n"); 1797 continue; 1798 } 1799 1800 ep_node = of_find_node_by_phandle(phandle); 1801 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1802 printf("Warn: can't find endpoint node from phandle\n"); 1803 continue; 1804 } 1805 1806 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1807 conn_ep = ofnode_get_by_phandle(phandle); 1808 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1809 return -ENODEV; 1810 1811 conn_port = ofnode_get_parent(conn_ep); 1812 if (!ofnode_valid(conn_port)) 1813 return -ENODEV; 1814 1815 ofnode_for_each_subnode(conn_ep, conn_port) { 1816 conn_ep_dev_node = ofnode_to_np(conn_ep); 1817 path = conn_ep_dev_node->full_name; 1818 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1819 conn_ep_offset = fdt_path_offset(blob, path); 1820 1821 if (!ofnode_is_available(conn_ep) && 1822 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1823 do_fixup_by_path_u32(blob, route_sub_path, 1824 "connect", phandle, 1); 1825 fdt_status_okay(blob, conn_ep_offset); 1826 1827 } else if (ofnode_is_available(conn_ep) && 1828 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1829 fdt_status_disabled(blob, conn_ep_offset); 1830 } 1831 } 1832 } 1833 1834 return 0; 1835 } 1836 #endif 1837 1838 static int rockchip_display_probe(struct udevice *dev) 1839 { 1840 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1841 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1842 const void *blob = gd->fdt_blob; 1843 int phandle; 1844 struct udevice *crtc_dev; 1845 struct rockchip_crtc *crtc; 1846 struct rockchip_connector *conn, *split_conn; 1847 struct display_state *s; 1848 const char *name; 1849 int ret; 1850 ofnode node, route_node, timing_node; 1851 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1852 struct public_phy_data *data; 1853 bool is_ports_node = false; 1854 1855 #if defined(CONFIG_ROCKCHIP_RK3568) 1856 rockchip_display_fixup_dts((void *)blob); 1857 #endif 1858 /* Before relocation we don't need to do anything */ 1859 if (!(gd->flags & GD_FLG_RELOC)) 1860 return 0; 1861 1862 data = malloc(sizeof(struct public_phy_data)); 1863 if (!data) { 1864 printf("failed to alloc phy data\n"); 1865 return -ENOMEM; 1866 } 1867 data->phy_init = false; 1868 1869 init_display_buffer(plat->base); 1870 1871 route_node = dev_read_subnode(dev, "route"); 1872 if (!ofnode_valid(route_node)) 1873 return -ENODEV; 1874 1875 ofnode_for_each_subnode(node, route_node) { 1876 if (!ofnode_is_available(node)) 1877 continue; 1878 phandle = ofnode_read_u32_default(node, "connect", -1); 1879 if (phandle < 0) { 1880 printf("Warn: can't find connect node's handle\n"); 1881 continue; 1882 } 1883 ep_node = of_find_node_by_phandle(phandle); 1884 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1885 printf("Warn: can't find endpoint node from phandle\n"); 1886 continue; 1887 } 1888 port_node = of_get_parent(ep_node); 1889 if (!ofnode_valid(np_to_ofnode(port_node))) { 1890 printf("Warn: can't find port node from phandle\n"); 1891 continue; 1892 } 1893 1894 port_parent_node = of_get_parent(port_node); 1895 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1896 printf("Warn: can't find port parent node from phandle\n"); 1897 continue; 1898 } 1899 1900 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1901 if (is_ports_node) { 1902 vop_node = of_get_parent(port_parent_node); 1903 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1904 printf("Warn: can't find crtc node from phandle\n"); 1905 continue; 1906 } 1907 } else { 1908 vop_node = port_parent_node; 1909 } 1910 1911 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1912 np_to_ofnode(vop_node), 1913 &crtc_dev); 1914 if (ret) { 1915 printf("Warn: can't find crtc driver %d\n", ret); 1916 continue; 1917 } 1918 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1919 1920 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 1921 if (!conn) { 1922 printf("Warn: can't get connect driver\n"); 1923 continue; 1924 } 1925 split_conn = rockchip_get_split_connector(conn); 1926 1927 s = malloc(sizeof(*s)); 1928 if (!s) 1929 continue; 1930 1931 memset(s, 0, sizeof(*s)); 1932 1933 INIT_LIST_HEAD(&s->head); 1934 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1935 if (!ret) 1936 memcpy(s->ulogo_name, name, strlen(name)); 1937 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1938 if (!ret) 1939 memcpy(s->klogo_name, name, strlen(name)); 1940 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1941 if (!strcmp(name, "fullscreen")) 1942 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1943 else 1944 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1945 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1946 if (!strcmp(name, "fullscreen")) 1947 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1948 else 1949 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1950 1951 s->force_output = ofnode_read_bool(node, "force-output"); 1952 1953 if (s->force_output) { 1954 timing_node = ofnode_find_subnode(node, "force_timing"); 1955 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1956 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1957 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1958 } 1959 1960 s->blob = blob; 1961 s->conn_state.connector = conn; 1962 s->conn_state.secondary = NULL; 1963 s->conn_state.type = conn->type; 1964 if (split_conn) { 1965 s->conn_state.secondary = split_conn; 1966 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 1967 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 1968 } 1969 s->conn_state.overscan.left_margin = 100; 1970 s->conn_state.overscan.right_margin = 100; 1971 s->conn_state.overscan.top_margin = 100; 1972 s->conn_state.overscan.bottom_margin = 100; 1973 s->crtc_state.node = np_to_ofnode(vop_node); 1974 s->crtc_state.dev = crtc_dev; 1975 s->crtc_state.crtc = crtc; 1976 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 1977 s->node = node; 1978 1979 if (is_ports_node) { /* only vop2 will get into here */ 1980 ofnode vp_node = np_to_ofnode(port_node); 1981 static bool get_plane_mask_from_dts; 1982 1983 s->crtc_state.ports_node = port_parent_node; 1984 if (!get_plane_mask_from_dts) { 1985 ofnode vp_sub_node; 1986 int vp_id = 0; 1987 bool vp_enable = false; 1988 1989 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1990 int cursor_plane = -1; 1991 1992 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 1993 1994 s->crtc_state.crtc->vps[vp_id].xmirror_en = 1995 ofnode_read_bool(vp_node, "xmirror-enable"); 1996 1997 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1998 1999 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2000 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2001 if (ret) { 2002 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2003 s->crtc_state.crtc->assign_plane |= true; 2004 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2005 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", -1); 2006 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2007 vp_id, 2008 s->crtc_state.crtc->vps[vp_id].plane_mask, 2009 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2010 cursor_plane); 2011 } 2012 2013 /* To check current vp status */ 2014 vp_enable = false; 2015 ofnode_for_each_subnode(vp_sub_node, vp_node) 2016 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2017 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2018 } 2019 get_plane_mask_from_dts = true; 2020 } 2021 } 2022 2023 get_crtc_mcu_mode(&s->crtc_state); 2024 2025 ret = ofnode_read_u32_default(s->crtc_state.node, 2026 "rockchip,dual-channel-swap", 0); 2027 s->crtc_state.dual_channel_swap = ret; 2028 2029 if (connector_phy_init(conn, data)) { 2030 printf("Warn: Failed to init phy drivers\n"); 2031 free(s); 2032 continue; 2033 } 2034 list_add_tail(&s->head, &rockchip_display_list); 2035 } 2036 2037 if (list_empty(&rockchip_display_list)) { 2038 debug("Failed to found available display route\n"); 2039 return -ENODEV; 2040 } 2041 rockchip_get_baseparameter(); 2042 display_pre_init(); 2043 2044 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2045 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2046 uc_priv->bpix = VIDEO_BPP32; 2047 2048 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2049 rockchip_show_fbbase(plat->base); 2050 video_set_flush_dcache(dev, true); 2051 #endif 2052 2053 return 0; 2054 } 2055 2056 void rockchip_display_fixup(void *blob) 2057 { 2058 const struct rockchip_connector_funcs *conn_funcs; 2059 const struct rockchip_crtc_funcs *crtc_funcs; 2060 struct rockchip_connector *conn; 2061 const struct rockchip_crtc *crtc; 2062 struct display_state *s; 2063 int offset; 2064 const struct device_node *np; 2065 const char *path; 2066 2067 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2068 list_for_each_entry(s, &rockchip_display_list, head) 2069 load_bmp_logo(&s->logo, s->klogo_name); 2070 2071 if (!get_display_size()) 2072 return; 2073 2074 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2075 (u64)memory_start, 2076 (u64)get_display_size()); 2077 if (offset < 0) 2078 printf("failed to reserve drm-loader-logo memory\n"); 2079 2080 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2081 (u64)cubic_lut_memory_start, 2082 (u64)get_cubic_memory_size()); 2083 if (offset < 0) 2084 printf("failed to reserve drm-cubic-lut memory\n"); 2085 } else { 2086 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2087 /* Compatible with rkfb display, only need reserve memory */ 2088 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2089 (u64)memory_start, 2090 MEMORY_POOL_SIZE); 2091 if (offset < 0) 2092 printf("failed to reserve fb-loader-logo memory\n"); 2093 else 2094 list_for_each_entry(s, &rockchip_display_list, head) 2095 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2096 return; 2097 } 2098 2099 list_for_each_entry(s, &rockchip_display_list, head) { 2100 if (!s->is_init) 2101 continue; 2102 2103 conn = s->conn_state.connector; 2104 if (!conn) 2105 continue; 2106 conn_funcs = conn->funcs; 2107 if (!conn_funcs) { 2108 printf("failed to get exist connector\n"); 2109 continue; 2110 } 2111 2112 if (s->conn_state.secondary) { 2113 s->conn_state.mode.clock *= 2; 2114 s->conn_state.mode.hdisplay *= 2; 2115 } 2116 2117 crtc = s->crtc_state.crtc; 2118 if (!crtc) 2119 continue; 2120 2121 crtc_funcs = crtc->funcs; 2122 if (!crtc_funcs) { 2123 printf("failed to get exist crtc\n"); 2124 continue; 2125 } 2126 2127 if (crtc_funcs->fixup_dts) 2128 crtc_funcs->fixup_dts(s, blob); 2129 2130 np = ofnode_to_np(s->node); 2131 path = np->full_name; 2132 fdt_increase_size(blob, 0x400); 2133 #define FDT_SET_U32(name, val) \ 2134 do_fixup_by_path_u32(blob, path, name, val, 1); 2135 2136 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2137 - memory_start; 2138 FDT_SET_U32("logo,offset", offset); 2139 FDT_SET_U32("logo,width", s->logo.width); 2140 FDT_SET_U32("logo,height", s->logo.height); 2141 FDT_SET_U32("logo,bpp", s->logo.bpp); 2142 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2143 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2144 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2145 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2146 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2147 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2148 FDT_SET_U32("video,vrefresh", 2149 drm_mode_vrefresh(&s->conn_state.mode)); 2150 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2151 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2152 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2153 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2154 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2155 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2156 2157 if (s->conn_state.disp_info) { 2158 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2159 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2160 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2161 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2162 } 2163 2164 if (s->conn_state.disp_info->cubic_lut_data.size && 2165 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2166 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2167 2168 #undef FDT_SET_U32 2169 } 2170 } 2171 2172 int rockchip_display_bind(struct udevice *dev) 2173 { 2174 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2175 2176 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2177 2178 return 0; 2179 } 2180 2181 static const struct udevice_id rockchip_display_ids[] = { 2182 { .compatible = "rockchip,display-subsystem" }, 2183 { } 2184 }; 2185 2186 U_BOOT_DRIVER(rockchip_display) = { 2187 .name = "rockchip_display", 2188 .id = UCLASS_VIDEO, 2189 .of_match = rockchip_display_ids, 2190 .bind = rockchip_display_bind, 2191 .probe = rockchip_display_probe, 2192 }; 2193 2194 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2195 char *const argv[]) 2196 { 2197 if (argc != 1) 2198 return CMD_RET_USAGE; 2199 2200 rockchip_show_logo(); 2201 2202 return 0; 2203 } 2204 2205 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2206 char *const argv[]) 2207 { 2208 if (argc != 2) 2209 return CMD_RET_USAGE; 2210 2211 rockchip_show_bmp(argv[1]); 2212 2213 return 0; 2214 } 2215 2216 U_BOOT_CMD( 2217 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2218 "load and display log from resource partition", 2219 NULL 2220 ); 2221 2222 U_BOOT_CMD( 2223 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2224 "load and display bmp from resource partition", 2225 " <bmp_name>" 2226 ); 2227