1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 343 * @edid_data: structure store mode list 344 * @max_output: vop max output resolution 345 */ 346 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 347 struct vop_rect *max_output) 348 { 349 int i; 350 351 for (i = 0; i < edid_data->modes; i++) { 352 if (edid_data->mode_buf[i].hdisplay > max_output->width || 353 edid_data->mode_buf[i].vdisplay > max_output->height) 354 edid_data->mode_buf[i].invalid = true; 355 } 356 } 357 358 /** 359 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 360 * @p: mode 361 * @adjust_flags: a combination of adjustment flags 362 * 363 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 364 * 365 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 366 * interlaced modes. 367 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 368 * buffers containing two eyes (only adjust the timings when needed, eg. for 369 * "frame packing" or "side by side full"). 370 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 371 * be performed for doublescan and vscan > 1 modes respectively. 372 */ 373 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 374 { 375 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 376 return; 377 378 if (p->flags & DRM_MODE_FLAG_DBLCLK) 379 p->crtc_clock = 2 * p->clock; 380 else 381 p->crtc_clock = p->clock; 382 p->crtc_hdisplay = p->hdisplay; 383 p->crtc_hsync_start = p->hsync_start; 384 p->crtc_hsync_end = p->hsync_end; 385 p->crtc_htotal = p->htotal; 386 p->crtc_hskew = p->hskew; 387 p->crtc_vdisplay = p->vdisplay; 388 p->crtc_vsync_start = p->vsync_start; 389 p->crtc_vsync_end = p->vsync_end; 390 p->crtc_vtotal = p->vtotal; 391 392 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 393 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 394 p->crtc_vdisplay /= 2; 395 p->crtc_vsync_start /= 2; 396 p->crtc_vsync_end /= 2; 397 p->crtc_vtotal /= 2; 398 } 399 } 400 401 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 402 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 403 p->crtc_vdisplay *= 2; 404 p->crtc_vsync_start *= 2; 405 p->crtc_vsync_end *= 2; 406 p->crtc_vtotal *= 2; 407 } 408 } 409 410 if (!(adjust_flags & CRTC_NO_VSCAN)) { 411 if (p->vscan > 1) { 412 p->crtc_vdisplay *= p->vscan; 413 p->crtc_vsync_start *= p->vscan; 414 p->crtc_vsync_end *= p->vscan; 415 p->crtc_vtotal *= p->vscan; 416 } 417 } 418 419 if (adjust_flags & CRTC_STEREO_DOUBLE) { 420 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 421 422 switch (layout) { 423 case DRM_MODE_FLAG_3D_FRAME_PACKING: 424 p->crtc_clock *= 2; 425 p->crtc_vdisplay += p->crtc_vtotal; 426 p->crtc_vsync_start += p->crtc_vtotal; 427 p->crtc_vsync_end += p->crtc_vtotal; 428 p->crtc_vtotal += p->crtc_vtotal; 429 break; 430 } 431 } 432 433 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 434 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 435 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 436 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 437 } 438 439 /** 440 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 441 * output format 442 * 443 * @connector: drm connector under action. 444 * @mode: video mode to be tested. 445 * 446 * Returns: 447 * true if the mode can be supported in YCBCR420 format 448 * false if not. 449 */ 450 bool drm_mode_is_420_only(const struct drm_display_info *display, 451 struct drm_display_mode *mode) 452 { 453 u8 vic = drm_match_cea_mode(mode); 454 455 return test_bit(vic, display->hdmi.y420_vdb_modes); 456 } 457 458 /** 459 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 460 * output format also (along with RGB/YCBCR444/422) 461 * 462 * @display: display under action. 463 * @mode: video mode to be tested. 464 * 465 * Returns: 466 * true if the mode can be support YCBCR420 format 467 * false if not. 468 */ 469 bool drm_mode_is_420_also(const struct drm_display_info *display, 470 struct drm_display_mode *mode) 471 { 472 u8 vic = drm_match_cea_mode(mode); 473 474 return test_bit(vic, display->hdmi.y420_cmdb_modes); 475 } 476 477 /** 478 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 479 * output format 480 * 481 * @display: display under action. 482 * @mode: video mode to be tested. 483 * 484 * Returns: 485 * true if the mode can be supported in YCBCR420 format 486 * false if not. 487 */ 488 bool drm_mode_is_420(const struct drm_display_info *display, 489 struct drm_display_mode *mode) 490 { 491 return drm_mode_is_420_only(display, mode) || 492 drm_mode_is_420_also(display, mode); 493 } 494 495 static int display_get_timing(struct display_state *state) 496 { 497 struct connector_state *conn_state = &state->conn_state; 498 struct drm_display_mode *mode = &conn_state->mode; 499 const struct drm_display_mode *m; 500 struct panel_state *panel_state = &state->panel_state; 501 const struct rockchip_panel *panel = panel_state->panel; 502 503 if (dev_of_valid(panel->dev) && 504 !display_get_timing_from_dts(panel_state, mode)) { 505 printf("Using display timing dts\n"); 506 return 0; 507 } 508 509 if (panel->data) { 510 m = (const struct drm_display_mode *)panel->data; 511 memcpy(mode, m, sizeof(*m)); 512 printf("Using display timing from compatible panel driver\n"); 513 return 0; 514 } 515 516 return -ENODEV; 517 } 518 519 static int display_init(struct display_state *state) 520 { 521 struct connector_state *conn_state = &state->conn_state; 522 struct panel_state *panel_state = &state->panel_state; 523 const struct rockchip_connector *conn = conn_state->connector; 524 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 525 struct crtc_state *crtc_state = &state->crtc_state; 526 struct rockchip_crtc *crtc = crtc_state->crtc; 527 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 528 struct drm_display_mode *mode = &conn_state->mode; 529 int ret = 0; 530 static bool __print_once = false; 531 #if defined(CONFIG_I2C_EDID) 532 int bpc; 533 #endif 534 if (!__print_once) { 535 __print_once = true; 536 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 537 } 538 539 if (state->is_init) 540 return 0; 541 542 if (!conn_funcs || !crtc_funcs) { 543 printf("failed to find connector or crtc functions\n"); 544 return -ENXIO; 545 } 546 547 if (crtc_state->crtc->active && 548 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 549 sizeof(struct drm_display_mode))) { 550 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 551 crtc_state->dev->name, 552 crtc_state->crtc->active_mode.type, 553 crtc_state->crtc->active_mode.hdisplay, 554 crtc_state->crtc->active_mode.vdisplay, 555 crtc_state->crtc->active_mode.vrefresh); 556 return -ENODEV; 557 } 558 559 if (crtc_funcs->preinit) { 560 ret = crtc_funcs->preinit(state); 561 if (ret) 562 return ret; 563 } 564 565 if (panel_state->panel) 566 rockchip_panel_init(panel_state->panel); 567 568 if (conn_funcs->init) { 569 ret = conn_funcs->init(state); 570 if (ret) 571 goto deinit; 572 } 573 574 if (conn_state->phy) 575 rockchip_phy_init(conn_state->phy); 576 577 /* 578 * support hotplug, but not connect; 579 */ 580 #ifdef CONFIG_ROCKCHIP_DRM_TVE 581 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 582 printf("hdmi plugin ,skip tve\n"); 583 goto deinit; 584 } 585 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 586 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 587 printf("hdmi plugin ,skip tve\n"); 588 goto deinit; 589 } 590 #endif 591 if (conn_funcs->detect) { 592 ret = conn_funcs->detect(state); 593 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 594 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 595 crtc->hdmi_hpd = ret; 596 #endif 597 if (!ret) 598 goto deinit; 599 } 600 601 if (panel_state->panel) { 602 ret = display_get_timing(state); 603 if (!ret) 604 conn_state->bpc = panel_state->panel->bpc; 605 #if defined(CONFIG_I2C_EDID) 606 if (ret < 0 && conn_funcs->get_edid) { 607 rockchip_panel_prepare(panel_state->panel); 608 609 ret = conn_funcs->get_edid(state); 610 if (!ret) { 611 ret = edid_get_drm_mode((void *)&conn_state->edid, 612 sizeof(conn_state->edid), 613 mode, &bpc); 614 if (!ret) { 615 conn_state->bpc = bpc; 616 edid_print_info((void *)&conn_state->edid); 617 } 618 } 619 } 620 #endif 621 } else if (conn_state->bridge) { 622 ret = video_bridge_read_edid(conn_state->bridge->dev, 623 conn_state->edid, EDID_SIZE); 624 if (ret > 0) { 625 #if defined(CONFIG_I2C_EDID) 626 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 627 &bpc); 628 if (!ret) { 629 conn_state->bpc = bpc; 630 edid_print_info((void *)&conn_state->edid); 631 } 632 #endif 633 } else { 634 ret = video_bridge_get_timing(conn_state->bridge->dev); 635 } 636 } else if (conn_funcs->get_timing) { 637 ret = conn_funcs->get_timing(state); 638 } else if (conn_funcs->get_edid) { 639 ret = conn_funcs->get_edid(state); 640 #if defined(CONFIG_I2C_EDID) 641 if (!ret) { 642 ret = edid_get_drm_mode((void *)&conn_state->edid, 643 sizeof(conn_state->edid), mode, 644 &bpc); 645 if (!ret) { 646 conn_state->bpc = bpc; 647 edid_print_info((void *)&conn_state->edid); 648 } 649 } 650 #endif 651 } 652 653 if (ret) 654 goto deinit; 655 656 printf("Detailed mode clock %u kHz, flags[%x]\n" 657 " H: %04d %04d %04d %04d\n" 658 " V: %04d %04d %04d %04d\n" 659 "bus_format: %x\n", 660 mode->clock, mode->flags, 661 mode->hdisplay, mode->hsync_start, 662 mode->hsync_end, mode->htotal, 663 mode->vdisplay, mode->vsync_start, 664 mode->vsync_end, mode->vtotal, 665 conn_state->bus_format); 666 667 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 668 669 if (conn_state->bridge) 670 rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 671 672 if (crtc_funcs->init) { 673 ret = crtc_funcs->init(state); 674 if (ret) 675 goto deinit; 676 } 677 state->is_init = 1; 678 679 crtc_state->crtc->active = true; 680 memcpy(&crtc_state->crtc->active_mode, 681 &conn_state->mode, sizeof(struct drm_display_mode)); 682 683 return 0; 684 685 deinit: 686 if (conn_funcs->deinit) 687 conn_funcs->deinit(state); 688 return ret; 689 } 690 691 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 692 { 693 struct crtc_state *crtc_state = &state->crtc_state; 694 const struct rockchip_crtc *crtc = crtc_state->crtc; 695 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 696 int ret; 697 698 if (!state->is_init) 699 return -EINVAL; 700 701 if (crtc_funcs->send_mcu_cmd) { 702 ret = crtc_funcs->send_mcu_cmd(state, type, val); 703 if (ret) 704 return ret; 705 } 706 707 return 0; 708 } 709 710 static int display_set_plane(struct display_state *state) 711 { 712 struct crtc_state *crtc_state = &state->crtc_state; 713 const struct rockchip_crtc *crtc = crtc_state->crtc; 714 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 715 int ret; 716 717 if (!state->is_init) 718 return -EINVAL; 719 720 if (crtc_funcs->set_plane) { 721 ret = crtc_funcs->set_plane(state); 722 if (ret) 723 return ret; 724 } 725 726 return 0; 727 } 728 729 static int display_enable(struct display_state *state) 730 { 731 struct connector_state *conn_state = &state->conn_state; 732 const struct rockchip_connector *conn = conn_state->connector; 733 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 734 struct crtc_state *crtc_state = &state->crtc_state; 735 const struct rockchip_crtc *crtc = crtc_state->crtc; 736 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 737 struct panel_state *panel_state = &state->panel_state; 738 739 if (!state->is_init) 740 return -EINVAL; 741 742 if (state->is_enable) 743 return 0; 744 745 if (crtc_funcs->prepare) 746 crtc_funcs->prepare(state); 747 748 if (conn_funcs->prepare) 749 conn_funcs->prepare(state); 750 751 if (conn_state->bridge) 752 rockchip_bridge_pre_enable(conn_state->bridge); 753 754 if (panel_state->panel) 755 rockchip_panel_prepare(panel_state->panel); 756 757 if (crtc_funcs->enable) 758 crtc_funcs->enable(state); 759 760 if (conn_funcs->enable) 761 conn_funcs->enable(state); 762 763 if (conn_state->bridge) 764 rockchip_bridge_enable(conn_state->bridge); 765 766 if (panel_state->panel) 767 rockchip_panel_enable(panel_state->panel); 768 769 state->is_enable = true; 770 771 return 0; 772 } 773 774 static int display_disable(struct display_state *state) 775 { 776 struct connector_state *conn_state = &state->conn_state; 777 const struct rockchip_connector *conn = conn_state->connector; 778 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 779 struct crtc_state *crtc_state = &state->crtc_state; 780 const struct rockchip_crtc *crtc = crtc_state->crtc; 781 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 782 struct panel_state *panel_state = &state->panel_state; 783 784 if (!state->is_init) 785 return 0; 786 787 if (!state->is_enable) 788 return 0; 789 790 if (panel_state->panel) 791 rockchip_panel_disable(panel_state->panel); 792 793 if (conn_state->bridge) 794 rockchip_bridge_disable(conn_state->bridge); 795 796 if (conn_funcs->disable) 797 conn_funcs->disable(state); 798 799 if (crtc_funcs->disable) 800 crtc_funcs->disable(state); 801 802 if (panel_state->panel) 803 rockchip_panel_unprepare(panel_state->panel); 804 805 if (conn_state->bridge) 806 rockchip_bridge_post_disable(conn_state->bridge); 807 808 if (conn_funcs->unprepare) 809 conn_funcs->unprepare(state); 810 811 state->is_enable = 0; 812 state->is_init = 0; 813 814 return 0; 815 } 816 817 static int display_logo(struct display_state *state) 818 { 819 struct crtc_state *crtc_state = &state->crtc_state; 820 struct connector_state *conn_state = &state->conn_state; 821 struct logo_info *logo = &state->logo; 822 int hdisplay, vdisplay, ret; 823 824 ret = display_init(state); 825 if (!state->is_init || ret) 826 return -ENODEV; 827 828 switch (logo->bpp) { 829 case 16: 830 crtc_state->format = ROCKCHIP_FMT_RGB565; 831 break; 832 case 24: 833 crtc_state->format = ROCKCHIP_FMT_RGB888; 834 break; 835 case 32: 836 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 837 break; 838 default: 839 printf("can't support bmp bits[%d]\n", logo->bpp); 840 return -EINVAL; 841 } 842 hdisplay = conn_state->mode.hdisplay; 843 vdisplay = conn_state->mode.vdisplay; 844 crtc_state->src_w = logo->width; 845 crtc_state->src_h = logo->height; 846 crtc_state->src_x = 0; 847 crtc_state->src_y = 0; 848 crtc_state->ymirror = logo->ymirror; 849 850 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 851 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 852 853 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 854 crtc_state->crtc_x = 0; 855 crtc_state->crtc_y = 0; 856 crtc_state->crtc_w = hdisplay; 857 crtc_state->crtc_h = vdisplay; 858 } else { 859 if (crtc_state->src_w >= hdisplay) { 860 crtc_state->crtc_x = 0; 861 crtc_state->crtc_w = hdisplay; 862 } else { 863 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 864 crtc_state->crtc_w = crtc_state->src_w; 865 } 866 867 if (crtc_state->src_h >= vdisplay) { 868 crtc_state->crtc_y = 0; 869 crtc_state->crtc_h = vdisplay; 870 } else { 871 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 872 crtc_state->crtc_h = crtc_state->src_h; 873 } 874 } 875 876 display_set_plane(state); 877 display_enable(state); 878 879 return 0; 880 } 881 882 static int get_crtc_id(ofnode connect) 883 { 884 int phandle; 885 struct device_node *remote; 886 int val; 887 888 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 889 if (phandle < 0) 890 goto err; 891 remote = of_find_node_by_phandle(phandle); 892 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 893 if (val < 0) 894 goto err; 895 896 return val; 897 err: 898 printf("Can't get crtc id, default set to id = 0\n"); 899 return 0; 900 } 901 902 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 903 { 904 ofnode mcu_node; 905 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 906 907 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 908 if (!ofnode_valid(mcu_node)) 909 return -ENODEV; 910 911 #define FDT_GET_MCU_INT(val, name) \ 912 do { \ 913 val = ofnode_read_s32_default(mcu_node, name, -1); \ 914 if (val < 0) { \ 915 printf("Can't get %s\n", name); \ 916 return -ENXIO; \ 917 } \ 918 } while (0) 919 920 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 921 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 922 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 923 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 924 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 925 926 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 927 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 928 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 929 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 930 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 931 932 return 0; 933 } 934 935 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 936 { 937 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 938 939 list_for_each_entry(tmp, &logo_cache_list, head) { 940 if (!strcmp(tmp->name, bmp)) { 941 logo_cache = tmp; 942 break; 943 } 944 } 945 946 if (!logo_cache) { 947 logo_cache = malloc(sizeof(*logo_cache)); 948 if (!logo_cache) { 949 printf("failed to alloc memory for logo cache\n"); 950 return NULL; 951 } 952 memset(logo_cache, 0, sizeof(*logo_cache)); 953 strcpy(logo_cache->name, bmp); 954 INIT_LIST_HEAD(&logo_cache->head); 955 list_add_tail(&logo_cache->head, &logo_cache_list); 956 } 957 958 return logo_cache; 959 } 960 961 /* Note: used only for rkfb kernel driver */ 962 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 963 { 964 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 965 void *dst = NULL; 966 int len, size; 967 struct bmp_header *header; 968 969 if (!logo || !bmp_name) 970 return -EINVAL; 971 972 header = malloc(RK_BLK_SIZE); 973 if (!header) 974 return -ENOMEM; 975 976 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 977 if (len != RK_BLK_SIZE) { 978 free(header); 979 return -EINVAL; 980 } 981 size = get_unaligned_le32(&header->file_size); 982 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 983 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 984 if (len != size) { 985 printf("failed to load bmp %s\n", bmp_name); 986 free(header); 987 return -ENOENT; 988 } 989 990 logo->mem = dst; 991 #endif 992 993 return 0; 994 } 995 996 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 997 { 998 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 999 struct rockchip_logo_cache *logo_cache; 1000 struct bmp_header *header; 1001 void *dst = NULL, *pdst; 1002 int size, len; 1003 int ret = 0; 1004 int reserved = 0; 1005 1006 if (!logo || !bmp_name) 1007 return -EINVAL; 1008 logo_cache = find_or_alloc_logo_cache(bmp_name); 1009 if (!logo_cache) 1010 return -ENOMEM; 1011 1012 if (logo_cache->logo.mem) { 1013 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1014 return 0; 1015 } 1016 1017 header = malloc(RK_BLK_SIZE); 1018 if (!header) 1019 return -ENOMEM; 1020 1021 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1022 if (len != RK_BLK_SIZE) { 1023 ret = -EINVAL; 1024 goto free_header; 1025 } 1026 1027 logo->bpp = get_unaligned_le16(&header->bit_count); 1028 logo->width = get_unaligned_le32(&header->width); 1029 logo->height = get_unaligned_le32(&header->height); 1030 reserved = get_unaligned_le32(&header->reserved); 1031 if (logo->height < 0) 1032 logo->height = -logo->height; 1033 size = get_unaligned_le32(&header->file_size); 1034 if (!can_direct_logo(logo->bpp)) { 1035 if (size > MEMORY_POOL_SIZE) { 1036 printf("failed to use boot buf as temp bmp buffer\n"); 1037 ret = -ENOMEM; 1038 goto free_header; 1039 } 1040 pdst = get_display_buffer(size); 1041 1042 } else { 1043 pdst = get_display_buffer(size); 1044 dst = pdst; 1045 } 1046 1047 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1048 if (len != size) { 1049 printf("failed to load bmp %s\n", bmp_name); 1050 ret = -ENOENT; 1051 goto free_header; 1052 } 1053 1054 if (!can_direct_logo(logo->bpp)) { 1055 int dst_size; 1056 /* 1057 * TODO: force use 16bpp if bpp less than 16; 1058 */ 1059 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1060 dst_size = logo->width * logo->height * logo->bpp >> 3; 1061 1062 dst = get_display_buffer(dst_size); 1063 if (!dst) { 1064 ret = -ENOMEM; 1065 goto free_header; 1066 } 1067 if (bmpdecoder(pdst, dst, logo->bpp)) { 1068 printf("failed to decode bmp %s\n", bmp_name); 1069 ret = -EINVAL; 1070 goto free_header; 1071 } 1072 flush_dcache_range((ulong)dst, 1073 ALIGN((ulong)dst + dst_size, 1074 CONFIG_SYS_CACHELINE_SIZE)); 1075 1076 logo->offset = 0; 1077 logo->ymirror = 0; 1078 } else { 1079 logo->offset = get_unaligned_le32(&header->data_offset); 1080 if (reserved == BMP_PROCESSED_FLAG) 1081 logo->ymirror = 0; 1082 else 1083 logo->ymirror = 1; 1084 } 1085 logo->mem = dst; 1086 1087 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1088 1089 free_header: 1090 1091 free(header); 1092 1093 return ret; 1094 #else 1095 return -EINVAL; 1096 #endif 1097 } 1098 1099 void rockchip_show_fbbase(ulong fbbase) 1100 { 1101 struct display_state *s; 1102 1103 list_for_each_entry(s, &rockchip_display_list, head) { 1104 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1105 s->logo.mem = (char *)fbbase; 1106 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1107 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1108 s->logo.bpp = 32; 1109 s->logo.ymirror = 0; 1110 1111 display_logo(s); 1112 } 1113 } 1114 1115 int rockchip_show_bmp(const char *bmp) 1116 { 1117 struct display_state *s; 1118 int ret = 0; 1119 1120 if (!bmp) { 1121 list_for_each_entry(s, &rockchip_display_list, head) 1122 display_disable(s); 1123 return -ENOENT; 1124 } 1125 1126 list_for_each_entry(s, &rockchip_display_list, head) { 1127 s->logo.mode = s->charge_logo_mode; 1128 if (load_bmp_logo(&s->logo, bmp)) 1129 continue; 1130 ret = display_logo(s); 1131 } 1132 1133 return ret; 1134 } 1135 1136 int rockchip_show_logo(void) 1137 { 1138 struct display_state *s; 1139 int ret = 0; 1140 1141 list_for_each_entry(s, &rockchip_display_list, head) { 1142 s->logo.mode = s->logo_mode; 1143 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1144 printf("failed to display uboot logo\n"); 1145 else 1146 ret = display_logo(s); 1147 1148 /* Load kernel bmp in rockchip_display_fixup() later */ 1149 } 1150 1151 return ret; 1152 } 1153 1154 enum { 1155 PORT_DIR_IN, 1156 PORT_DIR_OUT, 1157 }; 1158 1159 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1160 { 1161 ofnode panel_node, ports, port, ep; 1162 struct udevice *panel_dev; 1163 int ret; 1164 1165 panel_node = dev_read_subnode(dev, "panel"); 1166 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1167 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1168 &panel_dev); 1169 if (!ret) 1170 goto found; 1171 } 1172 1173 ports = dev_read_subnode(dev, "ports"); 1174 if (!ofnode_valid(ports)) 1175 return NULL; 1176 1177 ofnode_for_each_subnode(port, ports) { 1178 u32 reg; 1179 1180 if (ofnode_read_u32(port, "reg", ®)) 1181 continue; 1182 1183 if (reg != PORT_DIR_OUT) 1184 continue; 1185 1186 ofnode_for_each_subnode(ep, port) { 1187 ofnode _ep, _port; 1188 uint phandle; 1189 1190 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1191 continue; 1192 1193 _ep = ofnode_get_by_phandle(phandle); 1194 if (!ofnode_valid(_ep)) 1195 continue; 1196 1197 _port = ofnode_get_parent(_ep); 1198 if (!ofnode_valid(_port)) 1199 continue; 1200 1201 panel_node = ofnode_get_parent(_port); 1202 if (!ofnode_valid(panel_node)) 1203 continue; 1204 1205 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1206 panel_node, 1207 &panel_dev); 1208 if (!ret) 1209 goto found; 1210 } 1211 } 1212 1213 return NULL; 1214 1215 found: 1216 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1217 } 1218 1219 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1220 { 1221 ofnode node, ports, port, ep; 1222 struct udevice *dev; 1223 int ret; 1224 1225 ports = dev_read_subnode(conn_dev, "ports"); 1226 if (!ofnode_valid(ports)) 1227 return NULL; 1228 1229 ofnode_for_each_subnode(port, ports) { 1230 u32 reg; 1231 1232 if (ofnode_read_u32(port, "reg", ®)) 1233 continue; 1234 1235 if (reg != PORT_DIR_OUT) 1236 continue; 1237 1238 ofnode_for_each_subnode(ep, port) { 1239 ofnode _ep, _port, _ports; 1240 uint phandle; 1241 1242 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1243 continue; 1244 1245 _ep = ofnode_get_by_phandle(phandle); 1246 if (!ofnode_valid(_ep)) 1247 continue; 1248 1249 _port = ofnode_get_parent(_ep); 1250 if (!ofnode_valid(_port)) 1251 continue; 1252 1253 _ports = ofnode_get_parent(_port); 1254 if (!ofnode_valid(_ports)) 1255 continue; 1256 1257 node = ofnode_get_parent(_ports); 1258 if (!ofnode_valid(node)) 1259 continue; 1260 1261 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1262 node, &dev); 1263 if (!ret) 1264 goto found; 1265 } 1266 } 1267 1268 return NULL; 1269 1270 found: 1271 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1272 } 1273 1274 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1275 { 1276 ofnode ep, port, ports, conn; 1277 uint phandle; 1278 struct udevice *dev; 1279 int ret; 1280 1281 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1282 return NULL; 1283 1284 ep = ofnode_get_by_phandle(phandle); 1285 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1286 return NULL; 1287 1288 port = ofnode_get_parent(ep); 1289 if (!ofnode_valid(port)) 1290 return NULL; 1291 1292 ports = ofnode_get_parent(port); 1293 if (!ofnode_valid(ports)) 1294 return NULL; 1295 1296 conn = ofnode_get_parent(ports); 1297 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1298 return NULL; 1299 1300 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1301 if (ret) 1302 return NULL; 1303 1304 return dev; 1305 } 1306 1307 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1308 { 1309 struct udevice *phy_dev; 1310 int ret; 1311 1312 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1313 if (ret) 1314 return NULL; 1315 1316 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1317 } 1318 1319 static int rockchip_display_probe(struct udevice *dev) 1320 { 1321 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1322 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1323 const void *blob = gd->fdt_blob; 1324 int phandle; 1325 struct udevice *crtc_dev, *conn_dev; 1326 struct rockchip_crtc *crtc; 1327 const struct rockchip_connector *conn; 1328 struct rockchip_panel *panel = NULL; 1329 struct rockchip_bridge *bridge = NULL; 1330 struct rockchip_phy *phy = NULL; 1331 struct display_state *s; 1332 const char *name; 1333 int ret; 1334 ofnode node, route_node; 1335 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1336 struct public_phy_data *data; 1337 bool is_ports_node = false; 1338 1339 /* Before relocation we don't need to do anything */ 1340 if (!(gd->flags & GD_FLG_RELOC)) 1341 return 0; 1342 1343 data = malloc(sizeof(struct public_phy_data)); 1344 if (!data) { 1345 printf("failed to alloc phy data\n"); 1346 return -ENOMEM; 1347 } 1348 data->phy_init = false; 1349 1350 init_display_buffer(plat->base); 1351 1352 route_node = dev_read_subnode(dev, "route"); 1353 if (!ofnode_valid(route_node)) 1354 return -ENODEV; 1355 1356 ofnode_for_each_subnode(node, route_node) { 1357 if (!ofnode_is_available(node)) 1358 continue; 1359 phandle = ofnode_read_u32_default(node, "connect", -1); 1360 if (phandle < 0) { 1361 printf("Warn: can't find connect node's handle\n"); 1362 continue; 1363 } 1364 ep_node = of_find_node_by_phandle(phandle); 1365 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1366 printf("Warn: can't find endpoint node from phandle\n"); 1367 continue; 1368 } 1369 port_node = of_get_parent(ep_node); 1370 if (!ofnode_valid(np_to_ofnode(port_node))) { 1371 printf("Warn: can't find port node from phandle\n"); 1372 continue; 1373 } 1374 1375 port_parent_node = of_get_parent(port_node); 1376 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1377 printf("Warn: can't find port parent node from phandle\n"); 1378 continue; 1379 } 1380 1381 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1382 if (is_ports_node) { 1383 vop_node = of_get_parent(port_parent_node); 1384 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1385 printf("Warn: can't find crtc node from phandle\n"); 1386 continue; 1387 } 1388 } else { 1389 vop_node = port_parent_node; 1390 } 1391 1392 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1393 np_to_ofnode(vop_node), 1394 &crtc_dev); 1395 if (ret) { 1396 printf("Warn: can't find crtc driver %d\n", ret); 1397 continue; 1398 } 1399 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1400 1401 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1402 if (!conn_dev) { 1403 printf("Warn: can't find connect driver\n"); 1404 continue; 1405 } 1406 1407 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1408 1409 phy = rockchip_of_find_phy(conn_dev); 1410 1411 bridge = rockchip_of_find_bridge(conn_dev); 1412 if (bridge) 1413 panel = rockchip_of_find_panel(bridge->dev); 1414 else 1415 panel = rockchip_of_find_panel(conn_dev); 1416 1417 s = malloc(sizeof(*s)); 1418 if (!s) 1419 continue; 1420 1421 memset(s, 0, sizeof(*s)); 1422 1423 INIT_LIST_HEAD(&s->head); 1424 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1425 if (!ret) 1426 memcpy(s->ulogo_name, name, strlen(name)); 1427 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1428 if (!ret) 1429 memcpy(s->klogo_name, name, strlen(name)); 1430 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1431 if (!strcmp(name, "fullscreen")) 1432 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1433 else 1434 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1435 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1436 if (!strcmp(name, "fullscreen")) 1437 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1438 else 1439 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1440 1441 s->blob = blob; 1442 s->panel_state.panel = panel; 1443 s->conn_state.node = conn_dev->node; 1444 s->conn_state.dev = conn_dev; 1445 s->conn_state.connector = conn; 1446 s->conn_state.phy = phy; 1447 s->conn_state.bridge = bridge; 1448 s->conn_state.overscan.left_margin = 100; 1449 s->conn_state.overscan.right_margin = 100; 1450 s->conn_state.overscan.top_margin = 100; 1451 s->conn_state.overscan.bottom_margin = 100; 1452 s->crtc_state.node = np_to_ofnode(vop_node); 1453 s->crtc_state.dev = crtc_dev; 1454 s->crtc_state.crtc = crtc; 1455 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1456 s->node = node; 1457 1458 if (bridge) 1459 bridge->state = s; 1460 1461 if (panel) 1462 panel->state = s; 1463 1464 get_crtc_mcu_mode(&s->crtc_state); 1465 1466 ret = ofnode_read_u32_default(s->crtc_state.node, 1467 "rockchip,dual-channel-swap", 0); 1468 s->crtc_state.dual_channel_swap = ret; 1469 if (connector_panel_init(s)) { 1470 printf("Warn: Failed to init panel drivers\n"); 1471 free(s); 1472 continue; 1473 } 1474 1475 if (connector_phy_init(s, data)) { 1476 printf("Warn: Failed to init phy drivers\n"); 1477 free(s); 1478 continue; 1479 } 1480 list_add_tail(&s->head, &rockchip_display_list); 1481 } 1482 1483 if (list_empty(&rockchip_display_list)) { 1484 debug("Failed to found available display route\n"); 1485 return -ENODEV; 1486 } 1487 1488 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1489 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1490 uc_priv->bpix = VIDEO_BPP32; 1491 1492 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1493 rockchip_show_fbbase(plat->base); 1494 video_set_flush_dcache(dev, true); 1495 #endif 1496 1497 return 0; 1498 } 1499 1500 void rockchip_display_fixup(void *blob) 1501 { 1502 const struct rockchip_connector_funcs *conn_funcs; 1503 const struct rockchip_crtc_funcs *crtc_funcs; 1504 const struct rockchip_connector *conn; 1505 const struct rockchip_crtc *crtc; 1506 struct display_state *s; 1507 int offset; 1508 const struct device_node *np; 1509 const char *path; 1510 1511 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1512 list_for_each_entry(s, &rockchip_display_list, head) 1513 load_bmp_logo(&s->logo, s->klogo_name); 1514 1515 if (!get_display_size()) 1516 return; 1517 1518 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1519 (u64)memory_start, 1520 (u64)get_display_size()); 1521 if (offset < 0) 1522 printf("failed to reserve drm-loader-logo memory\n"); 1523 } else { 1524 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1525 /* Compatible with rkfb display, only need reserve memory */ 1526 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1527 (u64)memory_start, 1528 MEMORY_POOL_SIZE); 1529 if (offset < 0) 1530 printf("failed to reserve fb-loader-logo memory\n"); 1531 else 1532 list_for_each_entry(s, &rockchip_display_list, head) 1533 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1534 return; 1535 } 1536 1537 list_for_each_entry(s, &rockchip_display_list, head) { 1538 conn = s->conn_state.connector; 1539 if (!conn) 1540 continue; 1541 conn_funcs = conn->funcs; 1542 if (!conn_funcs) { 1543 printf("failed to get exist connector\n"); 1544 continue; 1545 } 1546 1547 crtc = s->crtc_state.crtc; 1548 if (!crtc) 1549 continue; 1550 1551 crtc_funcs = crtc->funcs; 1552 if (!crtc_funcs) { 1553 printf("failed to get exist crtc\n"); 1554 continue; 1555 } 1556 1557 if (crtc_funcs->fixup_dts) 1558 crtc_funcs->fixup_dts(s, blob); 1559 1560 if (conn_funcs->fixup_dts) 1561 conn_funcs->fixup_dts(s, blob); 1562 1563 np = ofnode_to_np(s->node); 1564 path = np->full_name; 1565 fdt_increase_size(blob, 0x400); 1566 #define FDT_SET_U32(name, val) \ 1567 do_fixup_by_path_u32(blob, path, name, val, 1); 1568 1569 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1570 - memory_start; 1571 FDT_SET_U32("logo,offset", offset); 1572 FDT_SET_U32("logo,width", s->logo.width); 1573 FDT_SET_U32("logo,height", s->logo.height); 1574 FDT_SET_U32("logo,bpp", s->logo.bpp); 1575 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1576 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1577 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1578 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1579 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1580 FDT_SET_U32("video,vrefresh", 1581 drm_mode_vrefresh(&s->conn_state.mode)); 1582 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1583 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1584 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1585 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1586 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1587 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1588 #undef FDT_SET_U32 1589 } 1590 } 1591 1592 int rockchip_display_bind(struct udevice *dev) 1593 { 1594 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1595 1596 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1597 1598 return 0; 1599 } 1600 1601 static const struct udevice_id rockchip_display_ids[] = { 1602 { .compatible = "rockchip,display-subsystem" }, 1603 { } 1604 }; 1605 1606 U_BOOT_DRIVER(rockchip_display) = { 1607 .name = "rockchip_display", 1608 .id = UCLASS_VIDEO, 1609 .of_match = rockchip_display_ids, 1610 .bind = rockchip_display_bind, 1611 .probe = rockchip_display_probe, 1612 }; 1613 1614 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1615 char *const argv[]) 1616 { 1617 if (argc != 1) 1618 return CMD_RET_USAGE; 1619 1620 rockchip_show_logo(); 1621 1622 return 0; 1623 } 1624 1625 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1626 char *const argv[]) 1627 { 1628 if (argc != 2) 1629 return CMD_RET_USAGE; 1630 1631 rockchip_show_bmp(argv[1]); 1632 1633 return 0; 1634 } 1635 1636 U_BOOT_CMD( 1637 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1638 "load and display log from resource partition", 1639 NULL 1640 ); 1641 1642 U_BOOT_CMD( 1643 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1644 "load and display bmp from resource partition", 1645 " <bmp_name>" 1646 ); 1647