1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 u32 base2_length; 156 void *base_parameter_addr = (void *)&base_parameter; 157 158 for (i = 0; i < 8; i++) { 159 disp_header = &base_parameter.disp_header[i]; 160 if (disp_header->connector_type == type && 161 disp_header->connector_id == id) { 162 printf("disp info %d, type:%d, id:%d\n", i, type, id); 163 offset = disp_header->offset; 164 break; 165 } 166 } 167 168 if (offset < 0) 169 return NULL; 170 disp_info = base_parameter_addr + offset; 171 if (disp_info->screen_info[0].type != type || 172 disp_info->screen_info[0].id != id) { 173 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 174 disp_info->screen_info[0].type, 175 disp_info->screen_info[0].id); 176 return NULL; 177 } 178 179 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 180 return NULL; 181 182 if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) { 183 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, 184 sizeof(struct base2_disp_info) - 4); 185 if (crc_val != disp_info->crc2) { 186 printf("error: connector type[%d], id[%d] disp info crc2 check error\n", 187 type, id); 188 return NULL; 189 } 190 } else { 191 base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) - 192 sizeof(struct acm_data) - 10 * 1024 - 4; 193 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4); 194 if (crc_val != disp_info->crc) { 195 printf("error: connector type[%d], id[%d] disp info crc check error\n", 196 type, id); 197 return NULL; 198 } 199 } 200 201 return disp_info; 202 } 203 204 /* check which kind of public phy does connector use */ 205 static int check_public_use_phy(struct rockchip_connector *conn) 206 { 207 int ret = NONE; 208 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 209 210 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 211 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 212 ret = INNO_HDMI_PHY; 213 #endif 214 215 return ret; 216 } 217 218 /* 219 * get public phy driver and initialize it. 220 * The current version only has inno hdmi phy for hdmi and tve. 221 */ 222 static int get_public_phy(struct rockchip_connector *conn, 223 struct public_phy_data *data) 224 { 225 struct rockchip_phy *phy; 226 struct udevice *dev; 227 int ret = 0; 228 229 switch (data->public_phy_type) { 230 case INNO_HDMI_PHY: 231 #if defined(CONFIG_ROCKCHIP_RK3328) 232 ret = uclass_get_device_by_name(UCLASS_PHY, 233 "hdmiphy@ff430000", &dev); 234 #elif defined(CONFIG_ROCKCHIP_RK322X) 235 ret = uclass_get_device_by_name(UCLASS_PHY, 236 "hdmi-phy@12030000", &dev); 237 #else 238 ret = -EINVAL; 239 #endif 240 if (ret) { 241 printf("Warn: can't find phy driver\n"); 242 return 0; 243 } 244 245 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 246 if (!phy) { 247 printf("failed to get phy driver\n"); 248 return 0; 249 } 250 251 ret = rockchip_phy_init(phy); 252 if (ret) { 253 printf("failed to init phy driver\n"); 254 return ret; 255 } 256 conn->phy = phy; 257 258 debug("inno hdmi phy init success, save it\n"); 259 data->phy_drv = conn->phy; 260 data->phy_init = true; 261 return 0; 262 default: 263 return -EINVAL; 264 } 265 } 266 267 static void init_display_buffer(ulong base) 268 { 269 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 270 memory_end = memory_start; 271 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 272 } 273 274 void *get_display_buffer(int size) 275 { 276 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 277 void *buf; 278 279 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 280 printf("failed to alloc %dbyte memory to display\n", size); 281 return NULL; 282 } 283 buf = (void *)roundup_memory; 284 285 memory_end = roundup_memory + size; 286 287 return buf; 288 } 289 290 static unsigned long get_display_size(void) 291 { 292 return memory_end - memory_start; 293 } 294 295 static unsigned long get_single_cubic_lut_size(void) 296 { 297 ulong cubic_lut_size; 298 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 299 300 /* This is depend on IC designed */ 301 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 302 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 303 304 return cubic_lut_size; 305 } 306 307 static unsigned long get_cubic_lut_offset(int crtc_id) 308 { 309 return crtc_id * get_single_cubic_lut_size(); 310 } 311 312 unsigned long get_cubic_lut_buffer(int crtc_id) 313 { 314 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 315 } 316 317 static unsigned long get_cubic_memory_size(void) 318 { 319 /* Max support 4 cubic lut */ 320 return get_single_cubic_lut_size() * 4; 321 } 322 323 bool can_direct_logo(int bpp) 324 { 325 return bpp == 16 || bpp == 32; 326 } 327 328 static int connector_phy_init(struct rockchip_connector *conn, 329 struct public_phy_data *data) 330 { 331 int type; 332 333 /* does this connector use public phy with others */ 334 type = check_public_use_phy(conn); 335 if (type == INNO_HDMI_PHY) { 336 /* there is no public phy was initialized */ 337 if (!data->phy_init) { 338 debug("start get public phy\n"); 339 data->public_phy_type = type; 340 if (get_public_phy(conn, data)) { 341 printf("can't find correct public phy type\n"); 342 free(data); 343 return -EINVAL; 344 } 345 return 0; 346 } 347 348 /* if this phy has been initialized, get it directly */ 349 conn->phy = (struct rockchip_phy *)data->phy_drv; 350 return 0; 351 } 352 353 return 0; 354 } 355 356 int drm_mode_vrefresh(const struct drm_display_mode *mode) 357 { 358 int refresh = 0; 359 unsigned int calc_val; 360 361 if (mode->vrefresh > 0) { 362 refresh = mode->vrefresh; 363 } else if (mode->htotal > 0 && mode->vtotal > 0) { 364 int vtotal; 365 366 vtotal = mode->vtotal; 367 /* work out vrefresh the value will be x1000 */ 368 calc_val = (mode->clock * 1000); 369 calc_val /= mode->htotal; 370 refresh = (calc_val + vtotal / 2) / vtotal; 371 372 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 373 refresh *= 2; 374 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 375 refresh /= 2; 376 if (mode->vscan > 1) 377 refresh /= mode->vscan; 378 } 379 return refresh; 380 } 381 382 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode) 383 { 384 int hactive, vactive, pixelclock; 385 int hfront_porch, hback_porch, hsync_len; 386 int vfront_porch, vback_porch, vsync_len; 387 int val, flags = 0; 388 389 #define FDT_GET_INT(val, name) \ 390 val = ofnode_read_s32_default(node, name, -1); \ 391 if (val < 0) { \ 392 printf("Can't get %s\n", name); \ 393 return -ENXIO; \ 394 } 395 396 #define FDT_GET_INT_DEFAULT(val, name, default) \ 397 val = ofnode_read_s32_default(node, name, default); 398 399 FDT_GET_INT(hactive, "hactive"); 400 FDT_GET_INT(vactive, "vactive"); 401 FDT_GET_INT(pixelclock, "clock-frequency"); 402 FDT_GET_INT(hsync_len, "hsync-len"); 403 FDT_GET_INT(hfront_porch, "hfront-porch"); 404 FDT_GET_INT(hback_porch, "hback-porch"); 405 FDT_GET_INT(vsync_len, "vsync-len"); 406 FDT_GET_INT(vfront_porch, "vfront-porch"); 407 FDT_GET_INT(vback_porch, "vback-porch"); 408 FDT_GET_INT(val, "hsync-active"); 409 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 410 FDT_GET_INT(val, "vsync-active"); 411 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 412 FDT_GET_INT(val, "pixelclk-active"); 413 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 414 415 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 416 if (val == DRM_MODE_FLAG_XMIRROR) { 417 flags |= DRM_MODE_FLAG_XMIRROR; 418 } else if (val == DRM_MODE_FLAG_YMIRROR) { 419 flags |= DRM_MODE_FLAG_YMIRROR; 420 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 421 flags |= DRM_MODE_FLAG_XMIRROR; 422 flags |= DRM_MODE_FLAG_YMIRROR; 423 } 424 mode->hdisplay = hactive; 425 mode->hsync_start = mode->hdisplay + hfront_porch; 426 mode->hsync_end = mode->hsync_start + hsync_len; 427 mode->htotal = mode->hsync_end + hback_porch; 428 429 mode->vdisplay = vactive; 430 mode->vsync_start = mode->vdisplay + vfront_porch; 431 mode->vsync_end = mode->vsync_start + vsync_len; 432 mode->vtotal = mode->vsync_end + vback_porch; 433 434 mode->clock = pixelclock / 1000; 435 mode->flags = flags; 436 mode->vrefresh = drm_mode_vrefresh(mode); 437 438 return 0; 439 } 440 441 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 442 { 443 int ret = 0; 444 445 ret = rockchip_ofnode_get_display_mode(node, mode); 446 447 if (ret) { 448 mode->clock = 74250; 449 mode->flags = 0x5; 450 mode->hdisplay = 1280; 451 mode->hsync_start = 1390; 452 mode->hsync_end = 1430; 453 mode->htotal = 1650; 454 mode->hskew = 0; 455 mode->vdisplay = 720; 456 mode->vsync_start = 725; 457 mode->vsync_end = 730; 458 mode->vtotal = 750; 459 mode->vrefresh = 60; 460 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 461 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 462 } 463 464 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 465 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 466 mode->vscan); 467 468 return 0; 469 } 470 471 static int display_get_timing_from_dts(struct rockchip_panel *panel, 472 struct drm_display_mode *mode) 473 { 474 struct ofnode_phandle_args args; 475 ofnode dt, timing; 476 int ret; 477 478 dt = dev_read_subnode(panel->dev, "display-timings"); 479 if (ofnode_valid(dt)) { 480 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 481 0, 0, &args); 482 if (ret) 483 return ret; 484 485 timing = args.node; 486 } else { 487 timing = dev_read_subnode(panel->dev, "panel-timing"); 488 } 489 490 if (!ofnode_valid(timing)) { 491 printf("failed to get display timings from DT\n"); 492 return -ENXIO; 493 } 494 495 rockchip_ofnode_get_display_mode(timing, mode); 496 497 return 0; 498 } 499 500 /** 501 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 502 * @edid_data: structure store mode list 503 * @max_output: vop max output resolution 504 */ 505 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 506 struct vop_rect *max_output) 507 { 508 int i; 509 510 for (i = 0; i < edid_data->modes; i++) { 511 if (edid_data->mode_buf[i].hdisplay > max_output->width || 512 edid_data->mode_buf[i].vdisplay > max_output->height) 513 edid_data->mode_buf[i].invalid = true; 514 } 515 } 516 517 /** 518 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 519 * @p: mode 520 * @adjust_flags: a combination of adjustment flags 521 * 522 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 523 * 524 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 525 * interlaced modes. 526 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 527 * buffers containing two eyes (only adjust the timings when needed, eg. for 528 * "frame packing" or "side by side full"). 529 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 530 * be performed for doublescan and vscan > 1 modes respectively. 531 */ 532 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 533 { 534 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 535 return; 536 537 if (p->flags & DRM_MODE_FLAG_DBLCLK) 538 p->crtc_clock = 2 * p->clock; 539 else 540 p->crtc_clock = p->clock; 541 p->crtc_hdisplay = p->hdisplay; 542 p->crtc_hsync_start = p->hsync_start; 543 p->crtc_hsync_end = p->hsync_end; 544 p->crtc_htotal = p->htotal; 545 p->crtc_hskew = p->hskew; 546 p->crtc_vdisplay = p->vdisplay; 547 p->crtc_vsync_start = p->vsync_start; 548 p->crtc_vsync_end = p->vsync_end; 549 p->crtc_vtotal = p->vtotal; 550 551 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 552 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 553 p->crtc_vdisplay /= 2; 554 p->crtc_vsync_start /= 2; 555 p->crtc_vsync_end /= 2; 556 p->crtc_vtotal /= 2; 557 } 558 } 559 560 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 561 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 562 p->crtc_vdisplay *= 2; 563 p->crtc_vsync_start *= 2; 564 p->crtc_vsync_end *= 2; 565 p->crtc_vtotal *= 2; 566 } 567 } 568 569 if (!(adjust_flags & CRTC_NO_VSCAN)) { 570 if (p->vscan > 1) { 571 p->crtc_vdisplay *= p->vscan; 572 p->crtc_vsync_start *= p->vscan; 573 p->crtc_vsync_end *= p->vscan; 574 p->crtc_vtotal *= p->vscan; 575 } 576 } 577 578 if (adjust_flags & CRTC_STEREO_DOUBLE) { 579 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 580 581 switch (layout) { 582 case DRM_MODE_FLAG_3D_FRAME_PACKING: 583 p->crtc_clock *= 2; 584 p->crtc_vdisplay += p->crtc_vtotal; 585 p->crtc_vsync_start += p->crtc_vtotal; 586 p->crtc_vsync_end += p->crtc_vtotal; 587 p->crtc_vtotal += p->crtc_vtotal; 588 break; 589 } 590 } 591 592 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 593 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 594 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 595 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 596 } 597 598 /** 599 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 600 * output format 601 * 602 * @connector: drm connector under action. 603 * @mode: video mode to be tested. 604 * 605 * Returns: 606 * true if the mode can be supported in YCBCR420 format 607 * false if not. 608 */ 609 bool drm_mode_is_420_only(const struct drm_display_info *display, 610 struct drm_display_mode *mode) 611 { 612 u8 vic = drm_match_cea_mode(mode); 613 614 return test_bit(vic, display->hdmi.y420_vdb_modes); 615 } 616 617 /** 618 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 619 * output format also (along with RGB/YCBCR444/422) 620 * 621 * @display: display under action. 622 * @mode: video mode to be tested. 623 * 624 * Returns: 625 * true if the mode can be support YCBCR420 format 626 * false if not. 627 */ 628 bool drm_mode_is_420_also(const struct drm_display_info *display, 629 struct drm_display_mode *mode) 630 { 631 u8 vic = drm_match_cea_mode(mode); 632 633 return test_bit(vic, display->hdmi.y420_cmdb_modes); 634 } 635 636 /** 637 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 638 * output format 639 * 640 * @display: display under action. 641 * @mode: video mode to be tested. 642 * 643 * Returns: 644 * true if the mode can be supported in YCBCR420 format 645 * false if not. 646 */ 647 bool drm_mode_is_420(const struct drm_display_info *display, 648 struct drm_display_mode *mode) 649 { 650 return drm_mode_is_420_only(display, mode) || 651 drm_mode_is_420_also(display, mode); 652 } 653 654 static int display_get_timing(struct display_state *state) 655 { 656 struct connector_state *conn_state = &state->conn_state; 657 struct drm_display_mode *mode = &conn_state->mode; 658 const struct drm_display_mode *m; 659 struct rockchip_panel *panel = conn_state->connector->panel; 660 661 if (panel->funcs->get_mode) 662 return panel->funcs->get_mode(panel, mode); 663 664 if (dev_of_valid(panel->dev) && 665 !display_get_timing_from_dts(panel, mode)) { 666 printf("Using display timing dts\n"); 667 return 0; 668 } 669 670 if (panel->data) { 671 m = (const struct drm_display_mode *)panel->data; 672 memcpy(mode, m, sizeof(*m)); 673 printf("Using display timing from compatible panel driver\n"); 674 return 0; 675 } 676 677 return -ENODEV; 678 } 679 680 static int display_pre_init(void) 681 { 682 struct display_state *state; 683 int ret = 0; 684 685 list_for_each_entry(state, &rockchip_display_list, head) { 686 struct connector_state *conn_state = &state->conn_state; 687 struct crtc_state *crtc_state = &state->crtc_state; 688 struct rockchip_crtc *crtc = crtc_state->crtc; 689 690 ret = rockchip_connector_pre_init(state); 691 if (ret) 692 printf("pre init conn error\n"); 693 694 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 695 } 696 return ret; 697 } 698 699 static int display_use_force_mode(struct display_state *state) 700 { 701 struct connector_state *conn_state = &state->conn_state; 702 struct drm_display_mode *mode = &conn_state->mode; 703 704 conn_state->bpc = 8; 705 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 706 conn_state->bus_format = state->force_bus_format; 707 708 return 0; 709 } 710 711 static int display_get_edid_mode(struct display_state *state) 712 { 713 int ret = 0; 714 struct connector_state *conn_state = &state->conn_state; 715 struct drm_display_mode *mode = &conn_state->mode; 716 int bpc; 717 718 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 719 if (!ret) { 720 conn_state->bpc = bpc; 721 edid_print_info((void *)&conn_state->edid); 722 } else { 723 conn_state->bpc = 8; 724 mode->clock = 74250; 725 mode->flags = 0x5; 726 mode->hdisplay = 1280; 727 mode->hsync_start = 1390; 728 mode->hsync_end = 1430; 729 mode->htotal = 1650; 730 mode->hskew = 0; 731 mode->vdisplay = 720; 732 mode->vsync_start = 725; 733 mode->vsync_end = 730; 734 mode->vtotal = 750; 735 mode->vrefresh = 60; 736 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 737 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 738 739 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 740 state->conn_state.connector->dev->name); 741 } 742 743 return ret; 744 } 745 746 static int display_init(struct display_state *state) 747 { 748 struct connector_state *conn_state = &state->conn_state; 749 struct rockchip_connector *conn = conn_state->connector; 750 struct crtc_state *crtc_state = &state->crtc_state; 751 struct rockchip_crtc *crtc = crtc_state->crtc; 752 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 753 struct drm_display_mode *mode = &conn_state->mode; 754 const char *compatible; 755 int ret = 0; 756 static bool __print_once = false; 757 758 if (!__print_once) { 759 __print_once = true; 760 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 761 } 762 763 if (state->is_init) 764 return 0; 765 766 if (!crtc_funcs) { 767 printf("failed to find crtc functions\n"); 768 return -ENXIO; 769 } 770 771 if (crtc_state->crtc->active && !crtc_state->ports_node && 772 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 773 sizeof(struct drm_display_mode))) { 774 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 775 crtc_state->dev->name, 776 crtc_state->crtc->active_mode.type, 777 crtc_state->crtc->active_mode.hdisplay, 778 crtc_state->crtc->active_mode.vdisplay, 779 crtc_state->crtc->active_mode.vrefresh); 780 return -ENODEV; 781 } 782 783 if (crtc_funcs->preinit) { 784 ret = crtc_funcs->preinit(state); 785 if (ret) 786 return ret; 787 } 788 789 ret = rockchip_connector_init(state); 790 if (ret) 791 goto deinit; 792 793 /* 794 * support hotplug, but not connect; 795 */ 796 #ifdef CONFIG_DRM_ROCKCHIP_TVE 797 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 798 printf("hdmi plugin ,skip tve\n"); 799 goto deinit; 800 } 801 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 802 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 803 printf("hdmi plugin ,skip tve\n"); 804 goto deinit; 805 } 806 #endif 807 808 ret = rockchip_connector_detect(state); 809 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 810 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 811 crtc->hdmi_hpd = ret; 812 #endif 813 if (!ret && !state->force_output) 814 goto deinit; 815 816 if (conn->panel) { 817 ret = display_get_timing(state); 818 if (!ret) 819 conn_state->bpc = conn->panel->bpc; 820 #if defined(CONFIG_I2C_EDID) 821 if (ret < 0 && conn->funcs->get_edid) { 822 rockchip_panel_prepare(conn->panel); 823 ret = conn->funcs->get_edid(conn, state); 824 if (!ret) 825 display_get_edid_mode(state); 826 } 827 #endif 828 } else if (conn->bridge) { 829 ret = video_bridge_read_edid(conn->bridge->dev, 830 conn_state->edid, EDID_SIZE); 831 if (ret > 0) { 832 #if defined(CONFIG_I2C_EDID) 833 display_get_edid_mode(state); 834 #endif 835 } else { 836 ret = video_bridge_get_timing(conn->bridge->dev); 837 } 838 } else if (conn->funcs->get_timing) { 839 ret = conn->funcs->get_timing(conn, state); 840 } else if (conn->funcs->get_edid) { 841 ret = conn->funcs->get_edid(conn, state); 842 #if defined(CONFIG_I2C_EDID) 843 if (!ret) 844 display_get_edid_mode(state); 845 #endif 846 } 847 848 if (!ret && conn_state->secondary) { 849 struct rockchip_connector *connector = conn_state->secondary; 850 851 if (connector->panel) { 852 if (connector->panel->funcs->get_mode) { 853 struct drm_display_mode *_mode = drm_mode_create(); 854 855 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 856 if (!ret && !drm_mode_equal(_mode, mode)) 857 ret = -EINVAL; 858 859 drm_mode_destroy(_mode); 860 } 861 } 862 } 863 864 if (ret && !state->force_output) 865 goto deinit; 866 if (state->force_output) 867 display_use_force_mode(state); 868 869 /* rk356x series drive mipi pixdata on posedge */ 870 compatible = dev_read_string(conn->dev, "compatible"); 871 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 872 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 873 874 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 875 " H: %04d %04d %04d %04d\n" 876 " V: %04d %04d %04d %04d\n" 877 "bus_format: %x\n", 878 conn->dev->name, 879 state->force_output ? "use force output" : "", 880 mode->clock, mode->flags, 881 mode->hdisplay, mode->hsync_start, 882 mode->hsync_end, mode->htotal, 883 mode->vdisplay, mode->vsync_start, 884 mode->vsync_end, mode->vtotal, 885 conn_state->bus_format); 886 887 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 888 889 if (conn_state->secondary) { 890 mode->crtc_clock *= 2; 891 mode->crtc_hdisplay *= 2; 892 mode->crtc_hsync_start *= 2; 893 mode->crtc_hsync_end *= 2; 894 mode->crtc_htotal *= 2; 895 } 896 897 if (conn->bridge) 898 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 899 900 if (crtc_funcs->init) { 901 ret = crtc_funcs->init(state); 902 if (ret) 903 goto deinit; 904 } 905 state->is_init = 1; 906 907 crtc_state->crtc->active = true; 908 memcpy(&crtc_state->crtc->active_mode, 909 &conn_state->mode, sizeof(struct drm_display_mode)); 910 911 return 0; 912 913 deinit: 914 rockchip_connector_deinit(state); 915 return ret; 916 } 917 918 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 919 { 920 struct crtc_state *crtc_state = &state->crtc_state; 921 const struct rockchip_crtc *crtc = crtc_state->crtc; 922 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 923 int ret; 924 925 if (!state->is_init) 926 return -EINVAL; 927 928 if (crtc_funcs->send_mcu_cmd) { 929 ret = crtc_funcs->send_mcu_cmd(state, type, val); 930 if (ret) 931 return ret; 932 } 933 934 return 0; 935 } 936 937 static int display_set_plane(struct display_state *state) 938 { 939 struct crtc_state *crtc_state = &state->crtc_state; 940 const struct rockchip_crtc *crtc = crtc_state->crtc; 941 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 942 int ret; 943 944 if (!state->is_init) 945 return -EINVAL; 946 947 if (crtc_funcs->set_plane) { 948 ret = crtc_funcs->set_plane(state); 949 if (ret) 950 return ret; 951 } 952 953 return 0; 954 } 955 956 static int display_enable(struct display_state *state) 957 { 958 struct crtc_state *crtc_state = &state->crtc_state; 959 const struct rockchip_crtc *crtc = crtc_state->crtc; 960 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 961 962 if (!state->is_init) 963 return -EINVAL; 964 965 if (state->is_enable) 966 return 0; 967 968 if (crtc_funcs->prepare) 969 crtc_funcs->prepare(state); 970 971 rockchip_connector_pre_enable(state); 972 973 if (crtc_funcs->enable) 974 crtc_funcs->enable(state); 975 976 rockchip_connector_enable(state); 977 978 state->is_enable = true; 979 980 return 0; 981 } 982 983 static int display_disable(struct display_state *state) 984 { 985 struct crtc_state *crtc_state = &state->crtc_state; 986 const struct rockchip_crtc *crtc = crtc_state->crtc; 987 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 988 989 if (!state->is_init) 990 return 0; 991 992 if (!state->is_enable) 993 return 0; 994 995 rockchip_connector_disable(state); 996 997 if (crtc_funcs->disable) 998 crtc_funcs->disable(state); 999 1000 rockchip_connector_post_disable(state); 1001 1002 state->is_enable = 0; 1003 state->is_init = 0; 1004 1005 return 0; 1006 } 1007 1008 static int display_rect_calc_scale(int src, int dst) 1009 { 1010 int scale = 0; 1011 1012 if (WARN_ON(src < 0 || dst < 0)) 1013 return -EINVAL; 1014 1015 if (dst == 0) 1016 return 0; 1017 1018 src <<= 16; 1019 1020 if (src > (dst << 16)) 1021 return DIV_ROUND_UP(src, dst); 1022 else 1023 scale = src / dst; 1024 1025 return scale; 1026 } 1027 1028 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst, 1029 int min_hscale, int max_hscale) 1030 { 1031 int hscale = display_rect_calc_scale(src->w, dst->w); 1032 1033 if (hscale < 0 || dst->w == 0) 1034 return hscale; 1035 1036 if (hscale < min_hscale || hscale > max_hscale) 1037 return -ERANGE; 1038 1039 return hscale; 1040 } 1041 1042 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst, 1043 int min_vscale, int max_vscale) 1044 { 1045 int vscale = display_rect_calc_scale(src->h, dst->h); 1046 1047 if (vscale < 0 || dst->h == 0) 1048 return vscale; 1049 1050 if (vscale < min_vscale || vscale > max_vscale) 1051 return -ERANGE; 1052 1053 return vscale; 1054 } 1055 1056 static int display_check(struct display_state *state) 1057 { 1058 struct connector_state *conn_state = &state->conn_state; 1059 struct rockchip_connector *conn = conn_state->connector; 1060 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1061 struct crtc_state *crtc_state = &state->crtc_state; 1062 const struct rockchip_crtc *crtc = crtc_state->crtc; 1063 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1064 int ret; 1065 1066 if (!state->is_init) 1067 return 0; 1068 1069 if (conn_funcs->check) { 1070 ret = conn_funcs->check(conn, state); 1071 if (ret) 1072 goto check_fail; 1073 } 1074 1075 if (crtc_funcs->check) { 1076 ret = crtc_funcs->check(state); 1077 if (ret) 1078 goto check_fail; 1079 } 1080 1081 if (crtc_funcs->plane_check) { 1082 ret = crtc_funcs->plane_check(state); 1083 if (ret) 1084 goto check_fail; 1085 } 1086 1087 return 0; 1088 1089 check_fail: 1090 state->is_init = false; 1091 return ret; 1092 } 1093 1094 static int display_mode_valid(struct display_state *state) 1095 { 1096 struct connector_state *conn_state = &state->conn_state; 1097 struct rockchip_connector *conn = conn_state->connector; 1098 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1099 struct crtc_state *crtc_state = &state->crtc_state; 1100 const struct rockchip_crtc *crtc = crtc_state->crtc; 1101 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1102 int ret; 1103 1104 if (!state->is_init) 1105 return 0; 1106 1107 if (conn_funcs->mode_valid) { 1108 ret = conn_funcs->mode_valid(conn, state); 1109 if (ret) 1110 goto invalid_mode; 1111 } 1112 1113 if (crtc_funcs->mode_valid) { 1114 ret = crtc_funcs->mode_valid(state); 1115 if (ret) 1116 goto invalid_mode; 1117 } 1118 1119 return 0; 1120 1121 invalid_mode: 1122 state->is_init = false; 1123 return ret; 1124 } 1125 1126 static int display_logo(struct display_state *state) 1127 { 1128 struct crtc_state *crtc_state = &state->crtc_state; 1129 struct connector_state *conn_state = &state->conn_state; 1130 struct logo_info *logo = &state->logo; 1131 int hdisplay, vdisplay, ret; 1132 1133 ret = display_init(state); 1134 if (!state->is_init || ret) 1135 return -ENODEV; 1136 1137 switch (logo->bpp) { 1138 case 16: 1139 crtc_state->format = ROCKCHIP_FMT_RGB565; 1140 break; 1141 case 24: 1142 crtc_state->format = ROCKCHIP_FMT_RGB888; 1143 break; 1144 case 32: 1145 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1146 break; 1147 default: 1148 printf("can't support bmp bits[%d]\n", logo->bpp); 1149 return -EINVAL; 1150 } 1151 hdisplay = conn_state->mode.crtc_hdisplay; 1152 vdisplay = conn_state->mode.vdisplay; 1153 crtc_state->src_rect.w = logo->width; 1154 crtc_state->src_rect.h = logo->height; 1155 crtc_state->src_rect.x = 0; 1156 crtc_state->src_rect.y = 0; 1157 crtc_state->ymirror = logo->ymirror; 1158 crtc_state->rb_swap = 0; 1159 1160 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1161 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1162 1163 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1164 crtc_state->crtc_rect.x = 0; 1165 crtc_state->crtc_rect.y = 0; 1166 crtc_state->crtc_rect.w = hdisplay; 1167 crtc_state->crtc_rect.h = vdisplay; 1168 } else { 1169 if (crtc_state->src_rect.w >= hdisplay) { 1170 crtc_state->crtc_rect.x = 0; 1171 crtc_state->crtc_rect.w = hdisplay; 1172 } else { 1173 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1174 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1175 } 1176 1177 if (crtc_state->src_rect.h >= vdisplay) { 1178 crtc_state->crtc_rect.y = 0; 1179 crtc_state->crtc_rect.h = vdisplay; 1180 } else { 1181 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1182 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1183 } 1184 } 1185 1186 display_mode_valid(state); 1187 display_check(state); 1188 display_set_plane(state); 1189 display_enable(state); 1190 1191 return 0; 1192 } 1193 1194 static int get_crtc_id(ofnode connect, bool is_ports_node) 1195 { 1196 struct device_node *port_node; 1197 struct device_node *remote; 1198 int phandle; 1199 int val; 1200 1201 if (is_ports_node) { 1202 port_node = of_get_parent(connect.np); 1203 if (!port_node) 1204 goto err; 1205 1206 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1207 if (val < 0) 1208 goto err; 1209 } else { 1210 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1211 if (phandle < 0) 1212 goto err; 1213 1214 remote = of_find_node_by_phandle(phandle); 1215 if (!remote) 1216 goto err; 1217 1218 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1219 if (val < 0) 1220 goto err; 1221 } 1222 1223 return val; 1224 err: 1225 printf("Can't get crtc id, default set to id = 0\n"); 1226 return 0; 1227 } 1228 1229 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1230 { 1231 ofnode mcu_node; 1232 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1233 1234 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1235 if (!ofnode_valid(mcu_node)) 1236 return -ENODEV; 1237 1238 #define FDT_GET_MCU_INT(val, name) \ 1239 do { \ 1240 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1241 if (val < 0) { \ 1242 printf("Can't get %s\n", name); \ 1243 return -ENXIO; \ 1244 } \ 1245 } while (0) 1246 1247 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1248 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1249 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1250 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1251 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1252 1253 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1254 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1255 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1256 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1257 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1258 1259 return 0; 1260 } 1261 1262 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1263 { 1264 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1265 1266 list_for_each_entry(tmp, &logo_cache_list, head) { 1267 if (!strcmp(tmp->name, bmp)) { 1268 logo_cache = tmp; 1269 break; 1270 } 1271 } 1272 1273 if (!logo_cache) { 1274 logo_cache = malloc(sizeof(*logo_cache)); 1275 if (!logo_cache) { 1276 printf("failed to alloc memory for logo cache\n"); 1277 return NULL; 1278 } 1279 memset(logo_cache, 0, sizeof(*logo_cache)); 1280 strcpy(logo_cache->name, bmp); 1281 INIT_LIST_HEAD(&logo_cache->head); 1282 list_add_tail(&logo_cache->head, &logo_cache_list); 1283 } 1284 1285 return logo_cache; 1286 } 1287 1288 /* Note: used only for rkfb kernel driver */ 1289 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1290 { 1291 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1292 void *dst = NULL; 1293 int len, size; 1294 struct bmp_header *header; 1295 1296 if (!logo || !bmp_name) 1297 return -EINVAL; 1298 1299 header = malloc(RK_BLK_SIZE); 1300 if (!header) 1301 return -ENOMEM; 1302 1303 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1304 if (len != RK_BLK_SIZE) { 1305 free(header); 1306 return -EINVAL; 1307 } 1308 size = get_unaligned_le32(&header->file_size); 1309 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1310 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1311 if (len != size) { 1312 printf("failed to load bmp %s\n", bmp_name); 1313 free(header); 1314 return -ENOENT; 1315 } 1316 1317 logo->mem = dst; 1318 #endif 1319 1320 return 0; 1321 } 1322 1323 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1324 { 1325 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1326 struct rockchip_logo_cache *logo_cache; 1327 struct bmp_header *header; 1328 void *dst = NULL, *pdst; 1329 int size, len; 1330 int ret = 0; 1331 int reserved = 0; 1332 int dst_size; 1333 1334 if (!logo || !bmp_name) 1335 return -EINVAL; 1336 logo_cache = find_or_alloc_logo_cache(bmp_name); 1337 if (!logo_cache) 1338 return -ENOMEM; 1339 1340 if (logo_cache->logo.mem) { 1341 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1342 return 0; 1343 } 1344 1345 header = malloc(RK_BLK_SIZE); 1346 if (!header) 1347 return -ENOMEM; 1348 1349 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1350 if (len != RK_BLK_SIZE) { 1351 ret = -EINVAL; 1352 goto free_header; 1353 } 1354 1355 logo->bpp = get_unaligned_le16(&header->bit_count); 1356 logo->width = get_unaligned_le32(&header->width); 1357 logo->height = get_unaligned_le32(&header->height); 1358 dst_size = logo->width * logo->height * logo->bpp >> 3; 1359 reserved = get_unaligned_le32(&header->reserved); 1360 if (logo->height < 0) 1361 logo->height = -logo->height; 1362 size = get_unaligned_le32(&header->file_size); 1363 if (!can_direct_logo(logo->bpp)) { 1364 if (size > MEMORY_POOL_SIZE) { 1365 printf("failed to use boot buf as temp bmp buffer\n"); 1366 ret = -ENOMEM; 1367 goto free_header; 1368 } 1369 pdst = get_display_buffer(size); 1370 1371 } else { 1372 pdst = get_display_buffer(size); 1373 dst = pdst; 1374 } 1375 1376 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1377 if (len != size) { 1378 printf("failed to load bmp %s\n", bmp_name); 1379 ret = -ENOENT; 1380 goto free_header; 1381 } 1382 1383 if (!can_direct_logo(logo->bpp)) { 1384 /* 1385 * TODO: force use 16bpp if bpp less than 16; 1386 */ 1387 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1388 dst_size = logo->width * logo->height * logo->bpp >> 3; 1389 dst = get_display_buffer(dst_size); 1390 if (!dst) { 1391 ret = -ENOMEM; 1392 goto free_header; 1393 } 1394 if (bmpdecoder(pdst, dst, logo->bpp)) { 1395 printf("failed to decode bmp %s\n", bmp_name); 1396 ret = -EINVAL; 1397 goto free_header; 1398 } 1399 1400 logo->offset = 0; 1401 logo->ymirror = 0; 1402 } else { 1403 logo->offset = get_unaligned_le32(&header->data_offset); 1404 if (reserved == BMP_PROCESSED_FLAG) 1405 logo->ymirror = 0; 1406 else 1407 logo->ymirror = 1; 1408 } 1409 logo->mem = dst; 1410 1411 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1412 1413 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1414 1415 free_header: 1416 1417 free(header); 1418 1419 return ret; 1420 #else 1421 return -EINVAL; 1422 #endif 1423 } 1424 1425 void rockchip_show_fbbase(ulong fbbase) 1426 { 1427 struct display_state *s; 1428 1429 list_for_each_entry(s, &rockchip_display_list, head) { 1430 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1431 s->logo.mem = (char *)fbbase; 1432 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1433 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1434 s->logo.bpp = 32; 1435 s->logo.ymirror = 0; 1436 1437 display_logo(s); 1438 } 1439 } 1440 1441 int rockchip_show_bmp(const char *bmp) 1442 { 1443 struct display_state *s; 1444 int ret = 0; 1445 1446 if (!bmp) { 1447 list_for_each_entry(s, &rockchip_display_list, head) 1448 display_disable(s); 1449 return -ENOENT; 1450 } 1451 1452 list_for_each_entry(s, &rockchip_display_list, head) { 1453 s->logo.mode = s->charge_logo_mode; 1454 if (load_bmp_logo(&s->logo, bmp)) 1455 continue; 1456 ret = display_logo(s); 1457 } 1458 1459 return ret; 1460 } 1461 1462 int rockchip_show_logo(void) 1463 { 1464 struct display_state *s; 1465 int ret = 0; 1466 1467 list_for_each_entry(s, &rockchip_display_list, head) { 1468 s->logo.mode = s->logo_mode; 1469 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1470 printf("failed to display uboot logo\n"); 1471 else 1472 ret = display_logo(s); 1473 1474 /* Load kernel bmp in rockchip_display_fixup() later */ 1475 } 1476 1477 return ret; 1478 } 1479 1480 enum { 1481 PORT_DIR_IN, 1482 PORT_DIR_OUT, 1483 }; 1484 1485 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1486 { 1487 ofnode ports, port; 1488 u32 reg; 1489 1490 ports = ofnode_find_subnode(node, "ports"); 1491 if (!ofnode_valid(ports)) 1492 return NULL; 1493 1494 ofnode_for_each_subnode(port, ports) { 1495 if (ofnode_read_u32(port, "reg", ®)) 1496 continue; 1497 1498 if (reg == id) 1499 break; 1500 } 1501 1502 if (reg == id) 1503 return ofnode_to_np(port); 1504 1505 return NULL; 1506 } 1507 1508 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1509 { 1510 ofnode parent; 1511 int is_ports_node; 1512 1513 parent = ofnode_get_parent(port); 1514 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1515 if (is_ports_node) 1516 parent = ofnode_get_parent(parent); 1517 1518 return ofnode_to_np(parent); 1519 } 1520 1521 static const struct device_node *rockchip_of_graph_get_remote_node(ofnode node, int port, 1522 int endpoint) 1523 { 1524 const struct device_node *port_node; 1525 ofnode ep; 1526 u32 reg; 1527 uint phandle; 1528 1529 port_node = rockchip_of_graph_get_port_by_id(node, port); 1530 if (!port_node) 1531 return NULL; 1532 1533 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1534 if (ofnode_read_u32(ep, "reg", ®)) 1535 break; 1536 if (reg == endpoint) 1537 break; 1538 } 1539 1540 if (!ofnode_valid(ep)) 1541 return NULL; 1542 1543 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1544 return NULL; 1545 1546 ep = ofnode_get_by_phandle(phandle); 1547 if (!ofnode_valid(ep)) 1548 return NULL; 1549 1550 return ofnode_to_np(ep); 1551 } 1552 1553 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1554 { 1555 const struct device_node *ep_node, *panel_node; 1556 ofnode panel_ofnode, port; 1557 struct udevice *panel_dev; 1558 int ret = 0; 1559 1560 *panel = NULL; 1561 panel_ofnode = dev_read_subnode(dev, "panel"); 1562 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1563 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1564 &panel_dev); 1565 if (!ret) 1566 goto found; 1567 } 1568 1569 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1570 if (!ep_node) 1571 return -ENODEV; 1572 1573 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1574 if (!ofnode_valid(port)) 1575 return -ENODEV; 1576 1577 panel_node = rockchip_of_graph_get_port_parent(port); 1578 if (!panel_node) 1579 return -ENODEV; 1580 1581 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1582 if (!ret) 1583 goto found; 1584 1585 return -ENODEV; 1586 1587 found: 1588 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1589 return 0; 1590 } 1591 1592 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1593 { 1594 const struct device_node *ep_node, *bridge_node; 1595 ofnode port; 1596 struct udevice *bridge_dev; 1597 int ret = 0; 1598 1599 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1600 if (!ep_node) 1601 return -ENODEV; 1602 1603 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1604 if (!ofnode_valid(port)) 1605 return -ENODEV; 1606 1607 bridge_node = rockchip_of_graph_get_port_parent(port); 1608 if (!bridge_node) 1609 return -ENODEV; 1610 1611 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1612 &bridge_dev); 1613 if (!ret) 1614 goto found; 1615 1616 return -ENODEV; 1617 1618 found: 1619 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1620 return 0; 1621 } 1622 1623 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1624 struct rockchip_bridge **bridge) 1625 { 1626 int ret = 0; 1627 *panel = NULL; 1628 *bridge = NULL; 1629 1630 if (panel) { 1631 ret = rockchip_of_find_panel(dev, panel); 1632 if (!ret) 1633 return 0; 1634 } 1635 1636 if (ret) { 1637 ret = rockchip_of_find_bridge(dev, bridge); 1638 if (!ret) 1639 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1640 &(*bridge)->next_bridge); 1641 } 1642 1643 return ret; 1644 } 1645 1646 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1647 { 1648 struct udevice *phy_dev; 1649 int ret; 1650 1651 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1652 if (ret) 1653 return NULL; 1654 1655 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1656 } 1657 1658 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1659 { 1660 ofnode ep, port, ports, conn; 1661 uint phandle; 1662 struct udevice *dev; 1663 int ret; 1664 1665 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1666 return NULL; 1667 1668 ep = ofnode_get_by_phandle(phandle); 1669 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1670 return NULL; 1671 1672 port = ofnode_get_parent(ep); 1673 if (!ofnode_valid(port)) 1674 return NULL; 1675 1676 ports = ofnode_get_parent(port); 1677 if (!ofnode_valid(ports)) 1678 return NULL; 1679 1680 conn = ofnode_get_parent(ports); 1681 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1682 return NULL; 1683 1684 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1685 if (ret) 1686 return NULL; 1687 1688 return dev; 1689 } 1690 1691 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1692 { 1693 struct rockchip_connector *conn; 1694 struct udevice *dev; 1695 int ret; 1696 1697 dev = rockchip_of_find_connector_device(endpoint); 1698 if (!dev) { 1699 printf("Warn: can't find connect driver\n"); 1700 return NULL; 1701 } 1702 1703 conn = get_rockchip_connector_by_device(dev); 1704 if (!conn) 1705 return NULL; 1706 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1707 if (ret) 1708 debug("Warn: no find panel or bridge\n"); 1709 1710 conn->phy = rockchip_of_find_phy(dev); 1711 1712 return conn; 1713 } 1714 1715 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1716 { 1717 char *conn_name; 1718 struct device_node *split_node; 1719 struct udevice *split_dev; 1720 struct rockchip_connector *split_conn; 1721 bool split_mode; 1722 int ret; 1723 1724 split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1725 if (!split_mode) 1726 return NULL; 1727 1728 switch (conn->type) { 1729 case DRM_MODE_CONNECTOR_DisplayPort: 1730 conn_name = "dp"; 1731 break; 1732 case DRM_MODE_CONNECTOR_eDP: 1733 conn_name = "edp"; 1734 break; 1735 case DRM_MODE_CONNECTOR_HDMIA: 1736 conn_name = "hdmi"; 1737 break; 1738 default: 1739 return NULL; 1740 } 1741 1742 split_node = of_alias_get_dev(conn_name, !conn->id); 1743 if (!split_node || !of_device_is_available(split_node)) 1744 return NULL; 1745 1746 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1747 if (ret) 1748 return NULL; 1749 1750 split_conn = get_rockchip_connector_by_device(split_dev); 1751 if (!split_conn) 1752 return NULL; 1753 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1754 if (ret) 1755 debug("Warn: no find panel or bridge\n"); 1756 1757 split_conn->phy = rockchip_of_find_phy(split_dev); 1758 1759 return split_conn; 1760 } 1761 1762 static bool rockchip_get_display_path_status(ofnode endpoint) 1763 { 1764 ofnode ep; 1765 uint phandle; 1766 1767 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1768 return false; 1769 1770 ep = ofnode_get_by_phandle(phandle); 1771 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1772 return false; 1773 1774 return true; 1775 } 1776 1777 #if defined(CONFIG_ROCKCHIP_RK3568) 1778 static int rockchip_display_fixup_dts(void *blob) 1779 { 1780 ofnode route_node, route_subnode, conn_ep, conn_port; 1781 const struct device_node *route_sub_devnode; 1782 const struct device_node *ep_node, *conn_ep_dev_node; 1783 u32 phandle; 1784 int conn_ep_offset; 1785 const char *route_sub_path, *path; 1786 1787 /* Don't go further if new variant after 1788 * reading PMUGRF_SOC_CON15 1789 */ 1790 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1791 return 0; 1792 1793 route_node = ofnode_path("/display-subsystem/route"); 1794 if (!ofnode_valid(route_node)) 1795 return -EINVAL; 1796 1797 ofnode_for_each_subnode(route_subnode, route_node) { 1798 if (!ofnode_is_available(route_subnode)) 1799 continue; 1800 1801 route_sub_devnode = ofnode_to_np(route_subnode); 1802 route_sub_path = route_sub_devnode->full_name; 1803 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1804 !strstr(ofnode_get_name(route_subnode), "edp")) 1805 return 0; 1806 1807 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1808 if (phandle < 0) { 1809 printf("Warn: can't find connect node's handle\n"); 1810 continue; 1811 } 1812 1813 ep_node = of_find_node_by_phandle(phandle); 1814 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1815 printf("Warn: can't find endpoint node from phandle\n"); 1816 continue; 1817 } 1818 1819 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1820 conn_ep = ofnode_get_by_phandle(phandle); 1821 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1822 return -ENODEV; 1823 1824 conn_port = ofnode_get_parent(conn_ep); 1825 if (!ofnode_valid(conn_port)) 1826 return -ENODEV; 1827 1828 ofnode_for_each_subnode(conn_ep, conn_port) { 1829 conn_ep_dev_node = ofnode_to_np(conn_ep); 1830 path = conn_ep_dev_node->full_name; 1831 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1832 conn_ep_offset = fdt_path_offset(blob, path); 1833 1834 if (!ofnode_is_available(conn_ep) && 1835 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1836 do_fixup_by_path_u32(blob, route_sub_path, 1837 "connect", phandle, 1); 1838 fdt_status_okay(blob, conn_ep_offset); 1839 1840 } else if (ofnode_is_available(conn_ep) && 1841 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1842 fdt_status_disabled(blob, conn_ep_offset); 1843 } 1844 } 1845 } 1846 1847 return 0; 1848 } 1849 #endif 1850 1851 static int rockchip_display_probe(struct udevice *dev) 1852 { 1853 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1854 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1855 const void *blob = gd->fdt_blob; 1856 int phandle; 1857 struct udevice *crtc_dev; 1858 struct rockchip_crtc *crtc; 1859 struct rockchip_connector *conn, *split_conn; 1860 struct display_state *s; 1861 const char *name; 1862 int ret; 1863 ofnode node, route_node, timing_node; 1864 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1865 struct public_phy_data *data; 1866 bool is_ports_node = false; 1867 1868 #if defined(CONFIG_ROCKCHIP_RK3568) 1869 rockchip_display_fixup_dts((void *)blob); 1870 #endif 1871 /* Before relocation we don't need to do anything */ 1872 if (!(gd->flags & GD_FLG_RELOC)) 1873 return 0; 1874 1875 data = malloc(sizeof(struct public_phy_data)); 1876 if (!data) { 1877 printf("failed to alloc phy data\n"); 1878 return -ENOMEM; 1879 } 1880 data->phy_init = false; 1881 1882 init_display_buffer(plat->base); 1883 1884 route_node = dev_read_subnode(dev, "route"); 1885 if (!ofnode_valid(route_node)) 1886 return -ENODEV; 1887 1888 ofnode_for_each_subnode(node, route_node) { 1889 if (!ofnode_is_available(node)) 1890 continue; 1891 phandle = ofnode_read_u32_default(node, "connect", -1); 1892 if (phandle < 0) { 1893 printf("Warn: can't find connect node's handle\n"); 1894 continue; 1895 } 1896 ep_node = of_find_node_by_phandle(phandle); 1897 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1898 printf("Warn: can't find endpoint node from phandle\n"); 1899 continue; 1900 } 1901 port_node = of_get_parent(ep_node); 1902 if (!ofnode_valid(np_to_ofnode(port_node))) { 1903 printf("Warn: can't find port node from phandle\n"); 1904 continue; 1905 } 1906 1907 port_parent_node = of_get_parent(port_node); 1908 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1909 printf("Warn: can't find port parent node from phandle\n"); 1910 continue; 1911 } 1912 1913 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1914 if (is_ports_node) { 1915 vop_node = of_get_parent(port_parent_node); 1916 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1917 printf("Warn: can't find crtc node from phandle\n"); 1918 continue; 1919 } 1920 } else { 1921 vop_node = port_parent_node; 1922 } 1923 1924 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1925 np_to_ofnode(vop_node), 1926 &crtc_dev); 1927 if (ret) { 1928 printf("Warn: can't find crtc driver %d\n", ret); 1929 continue; 1930 } 1931 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1932 1933 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 1934 if (!conn) { 1935 printf("Warn: can't get connect driver\n"); 1936 continue; 1937 } 1938 split_conn = rockchip_get_split_connector(conn); 1939 1940 s = malloc(sizeof(*s)); 1941 if (!s) 1942 continue; 1943 1944 memset(s, 0, sizeof(*s)); 1945 1946 INIT_LIST_HEAD(&s->head); 1947 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1948 if (!ret) 1949 memcpy(s->ulogo_name, name, strlen(name)); 1950 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1951 if (!ret) 1952 memcpy(s->klogo_name, name, strlen(name)); 1953 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1954 if (!strcmp(name, "fullscreen")) 1955 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1956 else 1957 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1958 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1959 if (!strcmp(name, "fullscreen")) 1960 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1961 else 1962 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1963 1964 s->force_output = ofnode_read_bool(node, "force-output"); 1965 1966 if (s->force_output) { 1967 timing_node = ofnode_find_subnode(node, "force_timing"); 1968 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1969 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1970 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1971 } 1972 1973 s->blob = blob; 1974 s->conn_state.connector = conn; 1975 s->conn_state.secondary = NULL; 1976 s->conn_state.type = conn->type; 1977 if (split_conn) { 1978 s->conn_state.secondary = split_conn; 1979 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 1980 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 1981 } 1982 s->conn_state.overscan.left_margin = 100; 1983 s->conn_state.overscan.right_margin = 100; 1984 s->conn_state.overscan.top_margin = 100; 1985 s->conn_state.overscan.bottom_margin = 100; 1986 s->crtc_state.node = np_to_ofnode(vop_node); 1987 s->crtc_state.dev = crtc_dev; 1988 s->crtc_state.crtc = crtc; 1989 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 1990 s->node = node; 1991 1992 if (is_ports_node) { /* only vop2 will get into here */ 1993 ofnode vp_node = np_to_ofnode(port_node); 1994 static bool get_plane_mask_from_dts; 1995 1996 s->crtc_state.ports_node = port_parent_node; 1997 if (!get_plane_mask_from_dts) { 1998 ofnode vp_sub_node; 1999 int vp_id = 0; 2000 bool vp_enable = false; 2001 2002 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 2003 int cursor_plane = -1; 2004 2005 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 2006 2007 s->crtc_state.crtc->vps[vp_id].xmirror_en = 2008 ofnode_read_bool(vp_node, "xmirror-enable"); 2009 2010 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 2011 2012 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2013 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2014 if (ret) { 2015 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2016 s->crtc_state.crtc->assign_plane |= true; 2017 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2018 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX); 2019 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2020 vp_id, 2021 s->crtc_state.crtc->vps[vp_id].plane_mask, 2022 s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 : 2023 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2024 cursor_plane); 2025 } 2026 2027 /* To check current vp status */ 2028 vp_enable = false; 2029 ofnode_for_each_subnode(vp_sub_node, vp_node) 2030 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2031 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2032 } 2033 get_plane_mask_from_dts = true; 2034 } 2035 } 2036 2037 get_crtc_mcu_mode(&s->crtc_state); 2038 2039 ret = ofnode_read_u32_default(s->crtc_state.node, 2040 "rockchip,dual-channel-swap", 0); 2041 s->crtc_state.dual_channel_swap = ret; 2042 2043 if (connector_phy_init(conn, data)) { 2044 printf("Warn: Failed to init phy drivers\n"); 2045 free(s); 2046 continue; 2047 } 2048 list_add_tail(&s->head, &rockchip_display_list); 2049 } 2050 2051 if (list_empty(&rockchip_display_list)) { 2052 debug("Failed to found available display route\n"); 2053 return -ENODEV; 2054 } 2055 rockchip_get_baseparameter(); 2056 display_pre_init(); 2057 2058 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2059 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2060 uc_priv->bpix = VIDEO_BPP32; 2061 2062 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2063 rockchip_show_fbbase(plat->base); 2064 video_set_flush_dcache(dev, true); 2065 #endif 2066 2067 return 0; 2068 } 2069 2070 void rockchip_display_fixup(void *blob) 2071 { 2072 const struct rockchip_connector_funcs *conn_funcs; 2073 const struct rockchip_crtc_funcs *crtc_funcs; 2074 struct rockchip_connector *conn; 2075 const struct rockchip_crtc *crtc; 2076 struct display_state *s; 2077 int offset; 2078 int ret; 2079 const struct device_node *np; 2080 const char *path; 2081 const char *cacm_header; 2082 2083 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2084 list_for_each_entry(s, &rockchip_display_list, head) { 2085 ret = load_bmp_logo(&s->logo, s->klogo_name); 2086 if (ret < 0) { 2087 s->is_klogo_valid = false; 2088 printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id); 2089 } else { 2090 s->is_klogo_valid = true; 2091 } 2092 } 2093 2094 if (!get_display_size()) 2095 return; 2096 2097 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2098 (u64)memory_start, 2099 (u64)get_display_size()); 2100 if (offset < 0) 2101 printf("failed to reserve drm-loader-logo memory\n"); 2102 2103 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2104 (u64)cubic_lut_memory_start, 2105 (u64)get_cubic_memory_size()); 2106 if (offset < 0) 2107 printf("failed to reserve drm-cubic-lut memory\n"); 2108 } else { 2109 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2110 /* Compatible with rkfb display, only need reserve memory */ 2111 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2112 (u64)memory_start, 2113 MEMORY_POOL_SIZE); 2114 if (offset < 0) 2115 printf("failed to reserve fb-loader-logo memory\n"); 2116 else 2117 list_for_each_entry(s, &rockchip_display_list, head) 2118 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2119 return; 2120 } 2121 2122 list_for_each_entry(s, &rockchip_display_list, head) { 2123 if (!s->is_init || !s->is_klogo_valid) 2124 continue; 2125 2126 conn = s->conn_state.connector; 2127 if (!conn) 2128 continue; 2129 conn_funcs = conn->funcs; 2130 if (!conn_funcs) { 2131 printf("failed to get exist connector\n"); 2132 continue; 2133 } 2134 2135 if (s->conn_state.secondary) { 2136 s->conn_state.mode.clock *= 2; 2137 s->conn_state.mode.hdisplay *= 2; 2138 } 2139 2140 crtc = s->crtc_state.crtc; 2141 if (!crtc) 2142 continue; 2143 2144 crtc_funcs = crtc->funcs; 2145 if (!crtc_funcs) { 2146 printf("failed to get exist crtc\n"); 2147 continue; 2148 } 2149 2150 if (crtc_funcs->fixup_dts) 2151 crtc_funcs->fixup_dts(s, blob); 2152 2153 np = ofnode_to_np(s->node); 2154 path = np->full_name; 2155 fdt_increase_size(blob, 0x400); 2156 #define FDT_SET_U32(name, val) \ 2157 do_fixup_by_path_u32(blob, path, name, val, 1); 2158 2159 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2160 - memory_start; 2161 FDT_SET_U32("logo,offset", offset); 2162 FDT_SET_U32("logo,width", s->logo.width); 2163 FDT_SET_U32("logo,height", s->logo.height); 2164 FDT_SET_U32("logo,bpp", s->logo.bpp); 2165 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2166 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2167 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2168 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2169 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2170 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2171 FDT_SET_U32("video,vrefresh", 2172 drm_mode_vrefresh(&s->conn_state.mode)); 2173 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2174 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2175 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2176 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2177 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2178 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2179 2180 if (s->conn_state.disp_info) { 2181 cacm_header = (const char*)&s->conn_state.disp_info->cacm_header; 2182 2183 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2184 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2185 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2186 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2187 2188 if (!strncasecmp(cacm_header, "CACM", 4)) { 2189 FDT_SET_U32("post_csc,hue", 2190 s->conn_state.disp_info->csc_info.hue); 2191 FDT_SET_U32("post_csc,saturation", 2192 s->conn_state.disp_info->csc_info.saturation); 2193 FDT_SET_U32("post_csc,contrast", 2194 s->conn_state.disp_info->csc_info.contrast); 2195 FDT_SET_U32("post_csc,brightness", 2196 s->conn_state.disp_info->csc_info.brightness); 2197 FDT_SET_U32("post_csc,r_gain", 2198 s->conn_state.disp_info->csc_info.r_gain); 2199 FDT_SET_U32("post_csc,g_gain", 2200 s->conn_state.disp_info->csc_info.g_gain); 2201 FDT_SET_U32("post_csc,b_gain", 2202 s->conn_state.disp_info->csc_info.b_gain); 2203 FDT_SET_U32("post_csc,r_offset", 2204 s->conn_state.disp_info->csc_info.r_offset); 2205 FDT_SET_U32("post_csc,g_offset", 2206 s->conn_state.disp_info->csc_info.g_offset); 2207 FDT_SET_U32("post_csc,b_offset", 2208 s->conn_state.disp_info->csc_info.b_offset); 2209 FDT_SET_U32("post_csc,csc_enable", 2210 s->conn_state.disp_info->csc_info.csc_enable); 2211 } 2212 } 2213 2214 if (s->conn_state.disp_info->cubic_lut_data.size && 2215 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2216 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2217 2218 #undef FDT_SET_U32 2219 } 2220 } 2221 2222 int rockchip_display_bind(struct udevice *dev) 2223 { 2224 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2225 2226 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2227 2228 return 0; 2229 } 2230 2231 static const struct udevice_id rockchip_display_ids[] = { 2232 { .compatible = "rockchip,display-subsystem" }, 2233 { } 2234 }; 2235 2236 U_BOOT_DRIVER(rockchip_display) = { 2237 .name = "rockchip_display", 2238 .id = UCLASS_VIDEO, 2239 .of_match = rockchip_display_ids, 2240 .bind = rockchip_display_bind, 2241 .probe = rockchip_display_probe, 2242 }; 2243 2244 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2245 char *const argv[]) 2246 { 2247 if (argc != 1) 2248 return CMD_RET_USAGE; 2249 2250 rockchip_show_logo(); 2251 2252 return 0; 2253 } 2254 2255 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2256 char *const argv[]) 2257 { 2258 if (argc != 2) 2259 return CMD_RET_USAGE; 2260 2261 rockchip_show_bmp(argv[1]); 2262 2263 return 0; 2264 } 2265 2266 U_BOOT_CMD( 2267 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2268 "load and display log from resource partition", 2269 NULL 2270 ); 2271 2272 U_BOOT_CMD( 2273 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2274 "load and display bmp from resource partition", 2275 " <bmp_name>" 2276 ); 2277