1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 printf("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 static void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 static bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 printf("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 FDT_GET_INT(hactive, "hactive"); 298 FDT_GET_INT(vactive, "vactive"); 299 FDT_GET_INT(pixelclock, "clock-frequency"); 300 FDT_GET_INT(hsync_len, "hsync-len"); 301 FDT_GET_INT(hfront_porch, "hfront-porch"); 302 FDT_GET_INT(hback_porch, "hback-porch"); 303 FDT_GET_INT(vsync_len, "vsync-len"); 304 FDT_GET_INT(vfront_porch, "vfront-porch"); 305 FDT_GET_INT(vback_porch, "vback-porch"); 306 FDT_GET_INT(val, "hsync-active"); 307 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 308 FDT_GET_INT(val, "vsync-active"); 309 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 310 FDT_GET_INT(val, "pixelclk-active"); 311 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 312 313 mode->hdisplay = hactive; 314 mode->hsync_start = mode->hdisplay + hfront_porch; 315 mode->hsync_end = mode->hsync_start + hsync_len; 316 mode->htotal = mode->hsync_end + hback_porch; 317 318 mode->vdisplay = vactive; 319 mode->vsync_start = mode->vdisplay + vfront_porch; 320 mode->vsync_end = mode->vsync_start + vsync_len; 321 mode->vtotal = mode->vsync_end + vback_porch; 322 323 mode->clock = pixelclock / 1000; 324 mode->flags = flags; 325 326 return 0; 327 } 328 329 /** 330 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 331 * @p: mode 332 * @adjust_flags: a combination of adjustment flags 333 * 334 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 335 * 336 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 337 * interlaced modes. 338 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 339 * buffers containing two eyes (only adjust the timings when needed, eg. for 340 * "frame packing" or "side by side full"). 341 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 342 * be performed for doublescan and vscan > 1 modes respectively. 343 */ 344 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 345 { 346 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 347 return; 348 349 if (p->flags & DRM_MODE_FLAG_DBLCLK) 350 p->crtc_clock = 2 * p->clock; 351 else 352 p->crtc_clock = p->clock; 353 p->crtc_hdisplay = p->hdisplay; 354 p->crtc_hsync_start = p->hsync_start; 355 p->crtc_hsync_end = p->hsync_end; 356 p->crtc_htotal = p->htotal; 357 p->crtc_hskew = p->hskew; 358 p->crtc_vdisplay = p->vdisplay; 359 p->crtc_vsync_start = p->vsync_start; 360 p->crtc_vsync_end = p->vsync_end; 361 p->crtc_vtotal = p->vtotal; 362 363 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 364 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 365 p->crtc_vdisplay /= 2; 366 p->crtc_vsync_start /= 2; 367 p->crtc_vsync_end /= 2; 368 p->crtc_vtotal /= 2; 369 } 370 } 371 372 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 373 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 374 p->crtc_vdisplay *= 2; 375 p->crtc_vsync_start *= 2; 376 p->crtc_vsync_end *= 2; 377 p->crtc_vtotal *= 2; 378 } 379 } 380 381 if (!(adjust_flags & CRTC_NO_VSCAN)) { 382 if (p->vscan > 1) { 383 p->crtc_vdisplay *= p->vscan; 384 p->crtc_vsync_start *= p->vscan; 385 p->crtc_vsync_end *= p->vscan; 386 p->crtc_vtotal *= p->vscan; 387 } 388 } 389 390 if (adjust_flags & CRTC_STEREO_DOUBLE) { 391 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 392 393 switch (layout) { 394 case DRM_MODE_FLAG_3D_FRAME_PACKING: 395 p->crtc_clock *= 2; 396 p->crtc_vdisplay += p->crtc_vtotal; 397 p->crtc_vsync_start += p->crtc_vtotal; 398 p->crtc_vsync_end += p->crtc_vtotal; 399 p->crtc_vtotal += p->crtc_vtotal; 400 break; 401 } 402 } 403 404 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 405 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 406 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 407 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 408 } 409 410 /** 411 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 412 * output format 413 * 414 * @connector: drm connector under action. 415 * @mode: video mode to be tested. 416 * 417 * Returns: 418 * true if the mode can be supported in YCBCR420 format 419 * false if not. 420 */ 421 bool drm_mode_is_420_only(const struct drm_display_info *display, 422 struct drm_display_mode *mode) 423 { 424 u8 vic = drm_match_cea_mode(mode); 425 426 return test_bit(vic, display->hdmi.y420_vdb_modes); 427 } 428 429 /** 430 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 431 * output format also (along with RGB/YCBCR444/422) 432 * 433 * @display: display under action. 434 * @mode: video mode to be tested. 435 * 436 * Returns: 437 * true if the mode can be support YCBCR420 format 438 * false if not. 439 */ 440 bool drm_mode_is_420_also(const struct drm_display_info *display, 441 struct drm_display_mode *mode) 442 { 443 u8 vic = drm_match_cea_mode(mode); 444 445 return test_bit(vic, display->hdmi.y420_cmdb_modes); 446 } 447 448 /** 449 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 450 * output format 451 * 452 * @display: display under action. 453 * @mode: video mode to be tested. 454 * 455 * Returns: 456 * true if the mode can be supported in YCBCR420 format 457 * false if not. 458 */ 459 bool drm_mode_is_420(const struct drm_display_info *display, 460 struct drm_display_mode *mode) 461 { 462 return drm_mode_is_420_only(display, mode) || 463 drm_mode_is_420_also(display, mode); 464 } 465 466 static int display_get_timing(struct display_state *state) 467 { 468 struct connector_state *conn_state = &state->conn_state; 469 struct drm_display_mode *mode = &conn_state->mode; 470 const struct drm_display_mode *m; 471 struct panel_state *panel_state = &state->panel_state; 472 const struct rockchip_panel *panel = panel_state->panel; 473 474 if (dev_of_valid(panel->dev) && 475 !display_get_timing_from_dts(panel_state, mode)) { 476 printf("Using display timing dts\n"); 477 goto done; 478 } 479 480 if (panel->data) { 481 m = (const struct drm_display_mode *)panel->data; 482 memcpy(mode, m, sizeof(*m)); 483 printf("Using display timing from compatible panel driver\n"); 484 goto done; 485 } 486 487 printf("failed to find display timing\n"); 488 return -ENODEV; 489 done: 490 printf("Detailed mode clock %u kHz, flags[%x]\n" 491 " H: %04d %04d %04d %04d\n" 492 " V: %04d %04d %04d %04d\n" 493 "bus_format: %x\n", 494 mode->clock, mode->flags, 495 mode->hdisplay, mode->hsync_start, 496 mode->hsync_end, mode->htotal, 497 mode->vdisplay, mode->vsync_start, 498 mode->vsync_end, mode->vtotal, 499 conn_state->bus_format); 500 501 return 0; 502 } 503 504 static int display_init(struct display_state *state) 505 { 506 struct connector_state *conn_state = &state->conn_state; 507 struct panel_state *panel_state = &state->panel_state; 508 const struct rockchip_connector *conn = conn_state->connector; 509 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 510 struct crtc_state *crtc_state = &state->crtc_state; 511 struct rockchip_crtc *crtc = crtc_state->crtc; 512 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 513 struct drm_display_mode *mode = &conn_state->mode; 514 int bpc; 515 int ret = 0; 516 static bool __print_once = false; 517 518 if (!__print_once) { 519 __print_once = true; 520 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 521 } 522 523 if (state->is_init) 524 return 0; 525 526 if (!conn_funcs || !crtc_funcs) { 527 printf("failed to find connector or crtc functions\n"); 528 return -ENXIO; 529 } 530 531 if (panel_state->panel) 532 rockchip_panel_init(panel_state->panel); 533 534 if (conn_funcs->init) { 535 ret = conn_funcs->init(state); 536 if (ret) 537 goto deinit; 538 } 539 540 if (conn_state->phy) 541 rockchip_phy_init(conn_state->phy); 542 543 /* 544 * support hotplug, but not connect; 545 */ 546 #ifdef CONFIG_ROCKCHIP_DRM_TVE 547 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 548 printf("hdmi plugin ,skip tve\n"); 549 goto deinit; 550 } 551 #elif defined(CONFIG_ROCKCHIP_DRM_RK1000) 552 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 553 printf("hdmi plugin ,skip tve\n"); 554 goto deinit; 555 } 556 #endif 557 if (conn_funcs->detect) { 558 ret = conn_funcs->detect(state); 559 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_ROCKCHIP_DRM_RK1000) 560 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 561 crtc->hdmi_hpd = ret; 562 #endif 563 if (!ret) 564 goto deinit; 565 } 566 567 if (panel_state->panel) { 568 ret = display_get_timing(state); 569 } else if (conn_state->bridge) { 570 ret = video_bridge_read_edid(conn_state->bridge->dev, 571 conn_state->edid, EDID_SIZE); 572 if (ret > 0) { 573 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 574 &bpc); 575 if (!ret) 576 edid_print_info((void *)&conn_state->edid); 577 } 578 } else if (conn_funcs->get_timing) { 579 ret = conn_funcs->get_timing(state); 580 } else if (conn_funcs->get_edid) { 581 ret = conn_funcs->get_edid(state); 582 if (!ret) { 583 ret = edid_get_drm_mode((void *)&conn_state->edid, 584 sizeof(conn_state->edid), mode, 585 &bpc); 586 if (!ret) 587 edid_print_info((void *)&conn_state->edid); 588 } 589 } 590 591 if (ret) 592 goto deinit; 593 594 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 595 596 if (crtc_funcs->init) { 597 ret = crtc_funcs->init(state); 598 if (ret) 599 goto deinit; 600 } 601 state->is_init = 1; 602 603 return 0; 604 605 deinit: 606 if (conn_funcs->deinit) 607 conn_funcs->deinit(state); 608 return ret; 609 } 610 611 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 612 { 613 struct crtc_state *crtc_state = &state->crtc_state; 614 const struct rockchip_crtc *crtc = crtc_state->crtc; 615 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 616 int ret; 617 618 if (!state->is_init) 619 return -EINVAL; 620 621 if (crtc_funcs->send_mcu_cmd) { 622 ret = crtc_funcs->send_mcu_cmd(state, type, val); 623 if (ret) 624 return ret; 625 } 626 627 return 0; 628 } 629 630 static int display_set_plane(struct display_state *state) 631 { 632 struct crtc_state *crtc_state = &state->crtc_state; 633 const struct rockchip_crtc *crtc = crtc_state->crtc; 634 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 635 int ret; 636 637 if (!state->is_init) 638 return -EINVAL; 639 640 if (crtc_funcs->set_plane) { 641 ret = crtc_funcs->set_plane(state); 642 if (ret) 643 return ret; 644 } 645 646 return 0; 647 } 648 649 static int display_enable(struct display_state *state) 650 { 651 struct connector_state *conn_state = &state->conn_state; 652 const struct rockchip_connector *conn = conn_state->connector; 653 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 654 struct crtc_state *crtc_state = &state->crtc_state; 655 const struct rockchip_crtc *crtc = crtc_state->crtc; 656 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 657 struct panel_state *panel_state = &state->panel_state; 658 659 display_init(state); 660 661 if (!state->is_init) 662 return -EINVAL; 663 664 if (state->is_enable) 665 return 0; 666 667 if (crtc_funcs->prepare) 668 crtc_funcs->prepare(state); 669 670 if (conn_funcs->prepare) 671 conn_funcs->prepare(state); 672 673 if (conn_state->bridge) 674 rockchip_bridge_pre_enable(conn_state->bridge); 675 676 if (panel_state->panel) 677 rockchip_panel_prepare(panel_state->panel); 678 679 if (crtc_funcs->enable) 680 crtc_funcs->enable(state); 681 682 if (conn_funcs->enable) 683 conn_funcs->enable(state); 684 685 if (conn_state->bridge) 686 rockchip_bridge_enable(conn_state->bridge); 687 688 if (panel_state->panel) 689 rockchip_panel_enable(panel_state->panel); 690 691 state->is_enable = true; 692 693 return 0; 694 } 695 696 static int display_disable(struct display_state *state) 697 { 698 struct connector_state *conn_state = &state->conn_state; 699 const struct rockchip_connector *conn = conn_state->connector; 700 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 701 struct crtc_state *crtc_state = &state->crtc_state; 702 const struct rockchip_crtc *crtc = crtc_state->crtc; 703 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 704 struct panel_state *panel_state = &state->panel_state; 705 706 if (!state->is_init) 707 return 0; 708 709 if (!state->is_enable) 710 return 0; 711 712 if (panel_state->panel) 713 rockchip_panel_disable(panel_state->panel); 714 715 if (conn_state->bridge) 716 rockchip_bridge_disable(conn_state->bridge); 717 718 if (conn_funcs->disable) 719 conn_funcs->disable(state); 720 721 if (crtc_funcs->disable) 722 crtc_funcs->disable(state); 723 724 if (panel_state->panel) 725 rockchip_panel_unprepare(panel_state->panel); 726 727 if (conn_state->bridge) 728 rockchip_bridge_post_disable(conn_state->bridge); 729 730 if (conn_funcs->unprepare) 731 conn_funcs->unprepare(state); 732 733 state->is_enable = 0; 734 state->is_init = 0; 735 736 return 0; 737 } 738 739 static int display_logo(struct display_state *state) 740 { 741 struct crtc_state *crtc_state = &state->crtc_state; 742 struct connector_state *conn_state = &state->conn_state; 743 struct logo_info *logo = &state->logo; 744 int hdisplay, vdisplay; 745 746 display_init(state); 747 if (!state->is_init) 748 return -ENODEV; 749 750 switch (logo->bpp) { 751 case 16: 752 crtc_state->format = ROCKCHIP_FMT_RGB565; 753 break; 754 case 24: 755 crtc_state->format = ROCKCHIP_FMT_RGB888; 756 break; 757 case 32: 758 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 759 break; 760 default: 761 printf("can't support bmp bits[%d]\n", logo->bpp); 762 return -EINVAL; 763 } 764 crtc_state->rb_swap = logo->bpp != 32; 765 hdisplay = conn_state->mode.hdisplay; 766 vdisplay = conn_state->mode.vdisplay; 767 crtc_state->src_w = logo->width; 768 crtc_state->src_h = logo->height; 769 crtc_state->src_x = 0; 770 crtc_state->src_y = 0; 771 crtc_state->ymirror = logo->ymirror; 772 773 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 774 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 775 776 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 777 crtc_state->crtc_x = 0; 778 crtc_state->crtc_y = 0; 779 crtc_state->crtc_w = hdisplay; 780 crtc_state->crtc_h = vdisplay; 781 } else { 782 if (crtc_state->src_w >= hdisplay) { 783 crtc_state->crtc_x = 0; 784 crtc_state->crtc_w = hdisplay; 785 } else { 786 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 787 crtc_state->crtc_w = crtc_state->src_w; 788 } 789 790 if (crtc_state->src_h >= vdisplay) { 791 crtc_state->crtc_y = 0; 792 crtc_state->crtc_h = vdisplay; 793 } else { 794 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 795 crtc_state->crtc_h = crtc_state->src_h; 796 } 797 } 798 799 display_set_plane(state); 800 display_enable(state); 801 802 return 0; 803 } 804 805 static int get_crtc_id(ofnode connect) 806 { 807 int phandle; 808 struct device_node *remote; 809 int val; 810 811 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 812 if (phandle < 0) 813 goto err; 814 remote = of_find_node_by_phandle(phandle); 815 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 816 if (val < 0) 817 goto err; 818 819 return val; 820 err: 821 printf("Can't get crtc id, default set to id = 0\n"); 822 return 0; 823 } 824 825 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 826 { 827 ofnode mcu_node; 828 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 829 830 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 831 if (!ofnode_valid(mcu_node)) 832 return -ENODEV; 833 834 #define FDT_GET_MCU_INT(val, name) \ 835 do { \ 836 val = ofnode_read_s32_default(mcu_node, name, -1); \ 837 if (val < 0) { \ 838 printf("Can't get %s\n", name); \ 839 return -ENXIO; \ 840 } \ 841 } while (0) 842 843 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 844 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 845 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 846 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 847 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 848 849 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 850 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 851 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 852 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 853 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 854 855 return 0; 856 } 857 858 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 859 { 860 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 861 862 list_for_each_entry(tmp, &logo_cache_list, head) { 863 if (!strcmp(tmp->name, bmp)) { 864 logo_cache = tmp; 865 break; 866 } 867 } 868 869 if (!logo_cache) { 870 logo_cache = malloc(sizeof(*logo_cache)); 871 if (!logo_cache) { 872 printf("failed to alloc memory for logo cache\n"); 873 return NULL; 874 } 875 memset(logo_cache, 0, sizeof(*logo_cache)); 876 strcpy(logo_cache->name, bmp); 877 INIT_LIST_HEAD(&logo_cache->head); 878 list_add_tail(&logo_cache->head, &logo_cache_list); 879 } 880 881 return logo_cache; 882 } 883 884 /* Note: used only for rkfb kernel driver */ 885 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 886 { 887 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 888 void *dst = NULL; 889 int len, size; 890 struct bmp_header *header; 891 892 if (!logo || !bmp_name) 893 return -EINVAL; 894 895 header = malloc(RK_BLK_SIZE); 896 if (!header) 897 return -ENOMEM; 898 899 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 900 if (len != RK_BLK_SIZE) { 901 free(header); 902 return -EINVAL; 903 } 904 size = get_unaligned_le32(&header->file_size); 905 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 906 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 907 if (len != size) { 908 printf("failed to load bmp %s\n", bmp_name); 909 free(header); 910 return -ENOENT; 911 } 912 913 logo->mem = dst; 914 915 return 0; 916 #endif 917 } 918 919 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 920 { 921 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 922 struct rockchip_logo_cache *logo_cache; 923 struct bmp_header *header; 924 void *dst = NULL, *pdst; 925 int size, len; 926 int ret = 0; 927 int reserved = 0; 928 929 if (!logo || !bmp_name) 930 return -EINVAL; 931 logo_cache = find_or_alloc_logo_cache(bmp_name); 932 if (!logo_cache) 933 return -ENOMEM; 934 935 if (logo_cache->logo.mem) { 936 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 937 return 0; 938 } 939 940 header = malloc(RK_BLK_SIZE); 941 if (!header) 942 return -ENOMEM; 943 944 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 945 if (len != RK_BLK_SIZE) { 946 ret = -EINVAL; 947 goto free_header; 948 } 949 950 logo->bpp = get_unaligned_le16(&header->bit_count); 951 logo->width = get_unaligned_le32(&header->width); 952 logo->height = get_unaligned_le32(&header->height); 953 reserved = get_unaligned_le32(&header->reserved); 954 if (logo->height < 0) 955 logo->height = -logo->height; 956 size = get_unaligned_le32(&header->file_size); 957 if (!can_direct_logo(logo->bpp)) { 958 if (size > MEMORY_POOL_SIZE) { 959 printf("failed to use boot buf as temp bmp buffer\n"); 960 ret = -ENOMEM; 961 goto free_header; 962 } 963 pdst = get_display_buffer(size); 964 965 } else { 966 pdst = get_display_buffer(size); 967 dst = pdst; 968 } 969 970 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 971 if (len != size) { 972 printf("failed to load bmp %s\n", bmp_name); 973 ret = -ENOENT; 974 goto free_header; 975 } 976 977 if (!can_direct_logo(logo->bpp)) { 978 int dst_size; 979 /* 980 * TODO: force use 16bpp if bpp less than 16; 981 */ 982 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 983 dst_size = logo->width * logo->height * logo->bpp >> 3; 984 985 dst = get_display_buffer(dst_size); 986 if (!dst) { 987 ret = -ENOMEM; 988 goto free_header; 989 } 990 if (bmpdecoder(pdst, dst, logo->bpp)) { 991 printf("failed to decode bmp %s\n", bmp_name); 992 ret = -EINVAL; 993 goto free_header; 994 } 995 flush_dcache_range((ulong)dst, 996 ALIGN((ulong)dst + dst_size, 997 CONFIG_SYS_CACHELINE_SIZE)); 998 999 logo->offset = 0; 1000 logo->ymirror = 0; 1001 } else { 1002 logo->offset = get_unaligned_le32(&header->data_offset); 1003 if (reserved == BMP_PROCESSED_FLAG) 1004 logo->ymirror = 0; 1005 else 1006 logo->ymirror = 1; 1007 } 1008 logo->mem = dst; 1009 1010 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1011 1012 free_header: 1013 1014 free(header); 1015 1016 return ret; 1017 #else 1018 return -EINVAL; 1019 #endif 1020 } 1021 1022 void rockchip_show_fbbase(ulong fbbase) 1023 { 1024 struct display_state *s; 1025 1026 list_for_each_entry(s, &rockchip_display_list, head) { 1027 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1028 s->logo.mem = (char *)fbbase; 1029 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1030 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1031 s->logo.bpp = 32; 1032 s->logo.ymirror = 0; 1033 1034 display_logo(s); 1035 } 1036 } 1037 1038 void rockchip_show_bmp(const char *bmp) 1039 { 1040 struct display_state *s; 1041 1042 if (!bmp) { 1043 list_for_each_entry(s, &rockchip_display_list, head) 1044 display_disable(s); 1045 return; 1046 } 1047 1048 list_for_each_entry(s, &rockchip_display_list, head) { 1049 s->logo.mode = s->charge_logo_mode; 1050 if (load_bmp_logo(&s->logo, bmp)) 1051 continue; 1052 display_logo(s); 1053 } 1054 } 1055 1056 void rockchip_show_logo(void) 1057 { 1058 struct display_state *s; 1059 1060 list_for_each_entry(s, &rockchip_display_list, head) { 1061 s->logo.mode = s->logo_mode; 1062 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1063 printf("failed to display uboot logo\n"); 1064 else 1065 display_logo(s); 1066 1067 /* Load kernel bmp in rockchip_display_fixup() later */ 1068 } 1069 } 1070 1071 enum { 1072 PORT_DIR_IN, 1073 PORT_DIR_OUT, 1074 }; 1075 1076 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1077 { 1078 ofnode panel_node, ports, port, ep; 1079 struct udevice *panel_dev; 1080 int ret; 1081 1082 panel_node = dev_read_subnode(dev, "panel"); 1083 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1084 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1085 &panel_dev); 1086 if (!ret) 1087 goto found; 1088 } 1089 1090 ports = dev_read_subnode(dev, "ports"); 1091 if (!ofnode_valid(ports)) 1092 return NULL; 1093 1094 ofnode_for_each_subnode(port, ports) { 1095 u32 reg; 1096 1097 if (ofnode_read_u32(port, "reg", ®)) 1098 continue; 1099 1100 if (reg != PORT_DIR_OUT) 1101 continue; 1102 1103 ofnode_for_each_subnode(ep, port) { 1104 ofnode _ep, _port; 1105 uint phandle; 1106 1107 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1108 continue; 1109 1110 _ep = ofnode_get_by_phandle(phandle); 1111 if (!ofnode_valid(_ep)) 1112 continue; 1113 1114 _port = ofnode_get_parent(_ep); 1115 if (!ofnode_valid(_port)) 1116 continue; 1117 1118 panel_node = ofnode_get_parent(_port); 1119 if (!ofnode_valid(panel_node)) 1120 continue; 1121 1122 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1123 panel_node, 1124 &panel_dev); 1125 if (!ret) 1126 goto found; 1127 } 1128 } 1129 1130 return NULL; 1131 1132 found: 1133 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1134 } 1135 1136 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1137 { 1138 ofnode node, ports, port, ep; 1139 struct udevice *dev; 1140 int ret; 1141 1142 ports = dev_read_subnode(conn_dev, "ports"); 1143 if (!ofnode_valid(ports)) 1144 return NULL; 1145 1146 ofnode_for_each_subnode(port, ports) { 1147 u32 reg; 1148 1149 if (ofnode_read_u32(port, "reg", ®)) 1150 continue; 1151 1152 if (reg != PORT_DIR_OUT) 1153 continue; 1154 1155 ofnode_for_each_subnode(ep, port) { 1156 ofnode _ep, _port, _ports; 1157 uint phandle; 1158 1159 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1160 continue; 1161 1162 _ep = ofnode_get_by_phandle(phandle); 1163 if (!ofnode_valid(_ep)) 1164 continue; 1165 1166 _port = ofnode_get_parent(_ep); 1167 if (!ofnode_valid(_port)) 1168 continue; 1169 1170 _ports = ofnode_get_parent(_port); 1171 if (!ofnode_valid(_ports)) 1172 continue; 1173 1174 node = ofnode_get_parent(_ports); 1175 if (!ofnode_valid(node)) 1176 continue; 1177 1178 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1179 node, &dev); 1180 if (!ret) 1181 goto found; 1182 } 1183 } 1184 1185 return NULL; 1186 1187 found: 1188 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1189 } 1190 1191 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1192 { 1193 ofnode ep, port, ports, conn; 1194 uint phandle; 1195 struct udevice *dev; 1196 int ret; 1197 1198 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1199 return NULL; 1200 1201 ep = ofnode_get_by_phandle(phandle); 1202 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1203 return NULL; 1204 1205 port = ofnode_get_parent(ep); 1206 if (!ofnode_valid(port)) 1207 return NULL; 1208 1209 ports = ofnode_get_parent(port); 1210 if (!ofnode_valid(ports)) 1211 return NULL; 1212 1213 conn = ofnode_get_parent(ports); 1214 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1215 return NULL; 1216 1217 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1218 if (ret) 1219 return NULL; 1220 1221 return dev; 1222 } 1223 1224 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1225 { 1226 struct udevice *phy_dev; 1227 int ret; 1228 1229 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1230 if (ret) 1231 return NULL; 1232 1233 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1234 } 1235 1236 static int rockchip_display_probe(struct udevice *dev) 1237 { 1238 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1239 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1240 const void *blob = gd->fdt_blob; 1241 int phandle; 1242 struct udevice *crtc_dev, *conn_dev; 1243 struct rockchip_crtc *crtc; 1244 const struct rockchip_connector *conn; 1245 struct rockchip_panel *panel = NULL; 1246 struct rockchip_bridge *bridge = NULL; 1247 struct rockchip_phy *phy = NULL; 1248 struct display_state *s; 1249 const char *name; 1250 int ret; 1251 ofnode node, route_node; 1252 struct device_node *port_node, *vop_node, *ep_node; 1253 struct public_phy_data *data; 1254 1255 /* Before relocation we don't need to do anything */ 1256 if (!(gd->flags & GD_FLG_RELOC)) 1257 return 0; 1258 1259 data = malloc(sizeof(struct public_phy_data)); 1260 if (!data) { 1261 printf("failed to alloc phy data\n"); 1262 return -ENOMEM; 1263 } 1264 data->phy_init = false; 1265 1266 init_display_buffer(plat->base); 1267 1268 route_node = dev_read_subnode(dev, "route"); 1269 if (!ofnode_valid(route_node)) 1270 return -ENODEV; 1271 1272 ofnode_for_each_subnode(node, route_node) { 1273 if (!ofnode_is_available(node)) 1274 continue; 1275 phandle = ofnode_read_u32_default(node, "connect", -1); 1276 if (phandle < 0) { 1277 printf("Warn: can't find connect node's handle\n"); 1278 continue; 1279 } 1280 ep_node = of_find_node_by_phandle(phandle); 1281 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1282 printf("Warn: can't find endpoint node from phandle\n"); 1283 continue; 1284 } 1285 port_node = of_get_parent(ep_node); 1286 if (!ofnode_valid(np_to_ofnode(port_node))) { 1287 printf("Warn: can't find port node from phandle\n"); 1288 continue; 1289 } 1290 vop_node = of_get_parent(port_node); 1291 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1292 printf("Warn: can't find crtc node from phandle\n"); 1293 continue; 1294 } 1295 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1296 np_to_ofnode(vop_node), 1297 &crtc_dev); 1298 if (ret) { 1299 printf("Warn: can't find crtc driver %d\n", ret); 1300 continue; 1301 } 1302 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1303 1304 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1305 if (!conn_dev) { 1306 printf("Warn: can't find connect driver\n"); 1307 continue; 1308 } 1309 1310 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1311 1312 phy = rockchip_of_find_phy(conn_dev); 1313 1314 bridge = rockchip_of_find_bridge(conn_dev); 1315 if (bridge) 1316 panel = rockchip_of_find_panel(bridge->dev); 1317 else 1318 panel = rockchip_of_find_panel(conn_dev); 1319 1320 s = malloc(sizeof(*s)); 1321 if (!s) 1322 continue; 1323 1324 memset(s, 0, sizeof(*s)); 1325 1326 INIT_LIST_HEAD(&s->head); 1327 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1328 if (!ret) 1329 memcpy(s->ulogo_name, name, strlen(name)); 1330 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1331 if (!ret) 1332 memcpy(s->klogo_name, name, strlen(name)); 1333 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1334 if (!strcmp(name, "fullscreen")) 1335 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1336 else 1337 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1338 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1339 if (!strcmp(name, "fullscreen")) 1340 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1341 else 1342 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1343 1344 s->blob = blob; 1345 s->panel_state.panel = panel; 1346 s->conn_state.node = conn_dev->node; 1347 s->conn_state.dev = conn_dev; 1348 s->conn_state.connector = conn; 1349 s->conn_state.phy = phy; 1350 s->conn_state.bridge = bridge; 1351 s->conn_state.overscan.left_margin = 100; 1352 s->conn_state.overscan.right_margin = 100; 1353 s->conn_state.overscan.top_margin = 100; 1354 s->conn_state.overscan.bottom_margin = 100; 1355 s->crtc_state.node = np_to_ofnode(vop_node); 1356 s->crtc_state.dev = crtc_dev; 1357 s->crtc_state.crtc = crtc; 1358 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1359 s->node = node; 1360 1361 if (bridge) 1362 bridge->state = s; 1363 1364 if (panel) 1365 panel->state = s; 1366 1367 get_crtc_mcu_mode(&s->crtc_state); 1368 1369 if (connector_panel_init(s)) { 1370 printf("Warn: Failed to init panel drivers\n"); 1371 free(s); 1372 continue; 1373 } 1374 1375 if (connector_phy_init(s, data)) { 1376 printf("Warn: Failed to init phy drivers\n"); 1377 free(s); 1378 continue; 1379 } 1380 list_add_tail(&s->head, &rockchip_display_list); 1381 } 1382 1383 if (list_empty(&rockchip_display_list)) { 1384 printf("Failed to found available display route\n"); 1385 return -ENODEV; 1386 } 1387 1388 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1389 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1390 uc_priv->bpix = VIDEO_BPP32; 1391 1392 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1393 rockchip_show_fbbase(plat->base); 1394 video_set_flush_dcache(dev, true); 1395 #endif 1396 1397 return 0; 1398 } 1399 1400 void rockchip_display_fixup(void *blob) 1401 { 1402 const struct rockchip_connector_funcs *conn_funcs; 1403 const struct rockchip_crtc_funcs *crtc_funcs; 1404 const struct rockchip_connector *conn; 1405 const struct rockchip_crtc *crtc; 1406 struct display_state *s; 1407 int offset; 1408 const struct device_node *np; 1409 const char *path; 1410 1411 if (!get_display_size()) 1412 return; 1413 1414 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1415 list_for_each_entry(s, &rockchip_display_list, head) 1416 load_bmp_logo(&s->logo, s->klogo_name); 1417 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1418 (u64)memory_start, 1419 (u64)get_display_size()); 1420 if (offset < 0) 1421 printf("failed to reserve drm-loader-logo memory\n"); 1422 } else { 1423 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1424 /* Compatible with rkfb display, only need reserve memory */ 1425 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1426 (u64)memory_start, 1427 MEMORY_POOL_SIZE); 1428 if (offset < 0) 1429 printf("failed to reserve fb-loader-logo memory\n"); 1430 else 1431 list_for_each_entry(s, &rockchip_display_list, head) 1432 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1433 return; 1434 } 1435 1436 list_for_each_entry(s, &rockchip_display_list, head) { 1437 conn = s->conn_state.connector; 1438 if (!conn) 1439 continue; 1440 conn_funcs = conn->funcs; 1441 if (!conn_funcs) { 1442 printf("failed to get exist connector\n"); 1443 continue; 1444 } 1445 1446 crtc = s->crtc_state.crtc; 1447 if (!crtc) 1448 continue; 1449 1450 crtc_funcs = crtc->funcs; 1451 if (!crtc_funcs) { 1452 printf("failed to get exist crtc\n"); 1453 continue; 1454 } 1455 1456 if (crtc_funcs->fixup_dts) 1457 crtc_funcs->fixup_dts(s, blob); 1458 1459 if (conn_funcs->fixup_dts) 1460 conn_funcs->fixup_dts(s, blob); 1461 1462 np = ofnode_to_np(s->node); 1463 path = np->full_name; 1464 fdt_increase_size(blob, 0x400); 1465 #define FDT_SET_U32(name, val) \ 1466 do_fixup_by_path_u32(blob, path, name, val, 1); 1467 1468 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1469 - memory_start; 1470 FDT_SET_U32("logo,offset", offset); 1471 FDT_SET_U32("logo,width", s->logo.width); 1472 FDT_SET_U32("logo,height", s->logo.height); 1473 FDT_SET_U32("logo,bpp", s->logo.bpp); 1474 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1475 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1476 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1477 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1478 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1479 FDT_SET_U32("video,vrefresh", 1480 drm_mode_vrefresh(&s->conn_state.mode)); 1481 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1482 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1483 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1484 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1485 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1486 #undef FDT_SET_U32 1487 } 1488 } 1489 1490 int rockchip_display_bind(struct udevice *dev) 1491 { 1492 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1493 1494 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1495 1496 return 0; 1497 } 1498 1499 static const struct udevice_id rockchip_display_ids[] = { 1500 { .compatible = "rockchip,display-subsystem" }, 1501 { } 1502 }; 1503 1504 U_BOOT_DRIVER(rockchip_display) = { 1505 .name = "rockchip_display", 1506 .id = UCLASS_VIDEO, 1507 .of_match = rockchip_display_ids, 1508 .bind = rockchip_display_bind, 1509 .probe = rockchip_display_probe, 1510 }; 1511 1512 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1513 char *const argv[]) 1514 { 1515 if (argc != 1) 1516 return CMD_RET_USAGE; 1517 1518 rockchip_show_logo(); 1519 1520 return 0; 1521 } 1522 1523 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1524 char *const argv[]) 1525 { 1526 if (argc != 2) 1527 return CMD_RET_USAGE; 1528 1529 rockchip_show_bmp(argv[1]); 1530 1531 return 0; 1532 } 1533 1534 U_BOOT_CMD( 1535 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1536 "load and display log from resource partition", 1537 NULL 1538 ); 1539 1540 U_BOOT_CMD( 1541 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1542 "load and display bmp from resource partition", 1543 " <bmp_name>" 1544 ); 1545