1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 static u32 align_size = PAGE_SIZE; 62 63 /* 64 * the phy types are used by different connectors in public. 65 * The current version only has inno hdmi phy for hdmi and tve. 66 */ 67 enum public_use_phy { 68 NONE, 69 INNO_HDMI_PHY 70 }; 71 72 /* save public phy data */ 73 struct public_phy_data { 74 const struct rockchip_phy *phy_drv; 75 int phy_node; 76 int public_phy_type; 77 bool phy_init; 78 }; 79 80 void rockchip_display_make_crc32_table(void) 81 { 82 uint32_t c; 83 int n, k; 84 unsigned long poly; /* polynomial exclusive-or pattern */ 85 /* terms of polynomial defining this crc (except x^32): */ 86 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 87 88 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 89 poly = 0L; 90 for (n = 0; n < sizeof(p) / sizeof(char); n++) 91 poly |= 1L << (31 - p[n]); 92 93 for (n = 0; n < 256; n++) { 94 c = (unsigned long)n; 95 for (k = 0; k < 8; k++) 96 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 97 crc32_table[n] = cpu_to_le32(c); 98 } 99 } 100 101 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 102 { 103 int i; 104 uint32_t crc; 105 crc = 0xFFFFFFFF; 106 107 for (i = 0; i < length; i++) { 108 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 109 data++; 110 } 111 112 return crc ^ 0xffffffff; 113 } 114 115 int rockchip_get_baseparameter(void) 116 { 117 struct blk_desc *dev_desc; 118 disk_partition_t part_info; 119 int block_num = 2048; 120 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 121 int ret = 0; 122 123 dev_desc = rockchip_get_bootdev(); 124 if (!dev_desc) { 125 printf("%s: Could not find device\n", __func__); 126 return -ENOENT; 127 } 128 129 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 130 printf("Could not find baseparameter partition\n"); 131 return -ENOENT; 132 } 133 134 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 135 if (ret < 0) { 136 printf("read baseparameter failed\n"); 137 return ret; 138 } 139 140 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 141 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 142 printf("warning: bad baseparameter\n"); 143 memset(&base_parameter, 0, sizeof(base_parameter)); 144 } 145 rockchip_display_make_crc32_table(); 146 147 return ret; 148 } 149 150 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 151 { 152 struct base2_disp_info *disp_info; 153 struct base2_disp_header *disp_header; 154 int i = 0, offset = -1; 155 u32 crc_val; 156 u32 base2_length; 157 void *base_parameter_addr = (void *)&base_parameter; 158 159 for (i = 0; i < 8; i++) { 160 disp_header = &base_parameter.disp_header[i]; 161 if (disp_header->connector_type == type && 162 disp_header->connector_id == id) { 163 printf("disp info %d, type:%d, id:%d\n", i, type, id); 164 offset = disp_header->offset; 165 break; 166 } 167 } 168 169 if (offset < 0) 170 return NULL; 171 disp_info = base_parameter_addr + offset; 172 if (disp_info->screen_info[0].type != type || 173 disp_info->screen_info[0].id != id) { 174 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 175 disp_info->screen_info[0].type, 176 disp_info->screen_info[0].id); 177 return NULL; 178 } 179 180 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 181 return NULL; 182 183 if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) { 184 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, 185 sizeof(struct base2_disp_info) - 4); 186 if (crc_val != disp_info->crc2) { 187 printf("error: connector type[%d], id[%d] disp info crc2 check error\n", 188 type, id); 189 return NULL; 190 } 191 } else { 192 base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) - 193 sizeof(struct acm_data) - 10 * 1024 - 4; 194 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4); 195 if (crc_val != disp_info->crc) { 196 printf("error: connector type[%d], id[%d] disp info crc check error\n", 197 type, id); 198 return NULL; 199 } 200 } 201 202 return disp_info; 203 } 204 205 /* check which kind of public phy does connector use */ 206 static int check_public_use_phy(struct rockchip_connector *conn) 207 { 208 int ret = NONE; 209 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 210 211 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 212 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 213 ret = INNO_HDMI_PHY; 214 #endif 215 216 return ret; 217 } 218 219 /* 220 * get public phy driver and initialize it. 221 * The current version only has inno hdmi phy for hdmi and tve. 222 */ 223 static int get_public_phy(struct rockchip_connector *conn, 224 struct public_phy_data *data) 225 { 226 struct rockchip_phy *phy; 227 struct udevice *dev; 228 int ret = 0; 229 230 switch (data->public_phy_type) { 231 case INNO_HDMI_PHY: 232 #if defined(CONFIG_ROCKCHIP_RK3328) 233 ret = uclass_get_device_by_name(UCLASS_PHY, 234 "hdmiphy@ff430000", &dev); 235 #elif defined(CONFIG_ROCKCHIP_RK322X) 236 ret = uclass_get_device_by_name(UCLASS_PHY, 237 "hdmi-phy@12030000", &dev); 238 #else 239 ret = -EINVAL; 240 #endif 241 if (ret) { 242 printf("Warn: can't find phy driver\n"); 243 return 0; 244 } 245 246 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 247 if (!phy) { 248 printf("failed to get phy driver\n"); 249 return 0; 250 } 251 252 ret = rockchip_phy_init(phy); 253 if (ret) { 254 printf("failed to init phy driver\n"); 255 return ret; 256 } 257 conn->phy = phy; 258 259 debug("inno hdmi phy init success, save it\n"); 260 data->phy_drv = conn->phy; 261 data->phy_init = true; 262 return 0; 263 default: 264 return -EINVAL; 265 } 266 } 267 268 static void init_display_buffer(ulong base) 269 { 270 memory_start = ALIGN(base + DRM_ROCKCHIP_FB_SIZE, align_size); 271 memory_end = memory_start; 272 cubic_lut_memory_start = ALIGN(memory_start + MEMORY_POOL_SIZE, align_size); 273 } 274 275 void *get_display_buffer(int size) 276 { 277 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 278 void *buf; 279 280 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 281 printf("failed to alloc %dbyte memory to display\n", size); 282 return NULL; 283 } 284 buf = (void *)roundup_memory; 285 286 memory_end = roundup_memory + size; 287 288 return buf; 289 } 290 291 static unsigned long get_display_size(void) 292 { 293 return memory_end - memory_start; 294 } 295 296 static unsigned long get_single_cubic_lut_size(void) 297 { 298 ulong cubic_lut_size; 299 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 300 301 /* This is depend on IC designed */ 302 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 303 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 304 305 return cubic_lut_size; 306 } 307 308 static unsigned long get_cubic_lut_offset(int crtc_id) 309 { 310 return crtc_id * get_single_cubic_lut_size(); 311 } 312 313 unsigned long get_cubic_lut_buffer(int crtc_id) 314 { 315 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 316 } 317 318 static unsigned long get_cubic_memory_size(void) 319 { 320 /* Max support 4 cubic lut */ 321 return get_single_cubic_lut_size() * 4; 322 } 323 324 bool can_direct_logo(int bpp) 325 { 326 return bpp == 16 || bpp == 32; 327 } 328 329 static int connector_phy_init(struct rockchip_connector *conn, 330 struct public_phy_data *data) 331 { 332 int type; 333 334 /* does this connector use public phy with others */ 335 type = check_public_use_phy(conn); 336 if (type == INNO_HDMI_PHY) { 337 /* there is no public phy was initialized */ 338 if (!data->phy_init) { 339 debug("start get public phy\n"); 340 data->public_phy_type = type; 341 if (get_public_phy(conn, data)) { 342 printf("can't find correct public phy type\n"); 343 free(data); 344 return -EINVAL; 345 } 346 return 0; 347 } 348 349 /* if this phy has been initialized, get it directly */ 350 conn->phy = (struct rockchip_phy *)data->phy_drv; 351 return 0; 352 } 353 354 return 0; 355 } 356 357 int drm_mode_vrefresh(const struct drm_display_mode *mode) 358 { 359 int refresh = 0; 360 unsigned int calc_val; 361 362 if (mode->vrefresh > 0) { 363 refresh = mode->vrefresh; 364 } else if (mode->htotal > 0 && mode->vtotal > 0) { 365 int vtotal; 366 367 vtotal = mode->vtotal; 368 /* work out vrefresh the value will be x1000 */ 369 calc_val = (mode->clock * 1000); 370 calc_val /= mode->htotal; 371 refresh = (calc_val + vtotal / 2) / vtotal; 372 373 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 374 refresh *= 2; 375 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 376 refresh /= 2; 377 if (mode->vscan > 1) 378 refresh /= mode->vscan; 379 } 380 return refresh; 381 } 382 383 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode) 384 { 385 int hactive, vactive, pixelclock; 386 int hfront_porch, hback_porch, hsync_len; 387 int vfront_porch, vback_porch, vsync_len; 388 int val, flags = 0; 389 390 #define FDT_GET_INT(val, name) \ 391 val = ofnode_read_s32_default(node, name, -1); \ 392 if (val < 0) { \ 393 printf("Can't get %s\n", name); \ 394 return -ENXIO; \ 395 } 396 397 #define FDT_GET_INT_DEFAULT(val, name, default) \ 398 val = ofnode_read_s32_default(node, name, default); 399 400 FDT_GET_INT(hactive, "hactive"); 401 FDT_GET_INT(vactive, "vactive"); 402 FDT_GET_INT(pixelclock, "clock-frequency"); 403 FDT_GET_INT(hsync_len, "hsync-len"); 404 FDT_GET_INT(hfront_porch, "hfront-porch"); 405 FDT_GET_INT(hback_porch, "hback-porch"); 406 FDT_GET_INT(vsync_len, "vsync-len"); 407 FDT_GET_INT(vfront_porch, "vfront-porch"); 408 FDT_GET_INT(vback_porch, "vback-porch"); 409 FDT_GET_INT(val, "hsync-active"); 410 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 411 FDT_GET_INT(val, "vsync-active"); 412 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 413 FDT_GET_INT(val, "pixelclk-active"); 414 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 415 416 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 417 if (val == DRM_MODE_FLAG_XMIRROR) { 418 flags |= DRM_MODE_FLAG_XMIRROR; 419 } else if (val == DRM_MODE_FLAG_YMIRROR) { 420 flags |= DRM_MODE_FLAG_YMIRROR; 421 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 422 flags |= DRM_MODE_FLAG_XMIRROR; 423 flags |= DRM_MODE_FLAG_YMIRROR; 424 } 425 mode->hdisplay = hactive; 426 mode->hsync_start = mode->hdisplay + hfront_porch; 427 mode->hsync_end = mode->hsync_start + hsync_len; 428 mode->htotal = mode->hsync_end + hback_porch; 429 430 mode->vdisplay = vactive; 431 mode->vsync_start = mode->vdisplay + vfront_porch; 432 mode->vsync_end = mode->vsync_start + vsync_len; 433 mode->vtotal = mode->vsync_end + vback_porch; 434 435 mode->clock = pixelclock / 1000; 436 mode->flags = flags; 437 mode->vrefresh = drm_mode_vrefresh(mode); 438 439 return 0; 440 } 441 442 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 443 { 444 int ret = 0; 445 446 ret = rockchip_ofnode_get_display_mode(node, mode); 447 448 if (ret) { 449 mode->clock = 74250; 450 mode->flags = 0x5; 451 mode->hdisplay = 1280; 452 mode->hsync_start = 1390; 453 mode->hsync_end = 1430; 454 mode->htotal = 1650; 455 mode->hskew = 0; 456 mode->vdisplay = 720; 457 mode->vsync_start = 725; 458 mode->vsync_end = 730; 459 mode->vtotal = 750; 460 mode->vrefresh = 60; 461 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 462 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 463 } 464 465 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 466 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 467 mode->vscan); 468 469 return 0; 470 } 471 472 static int display_get_timing_from_dts(struct rockchip_panel *panel, 473 struct drm_display_mode *mode) 474 { 475 struct ofnode_phandle_args args; 476 ofnode dt, timing, mcu_panel; 477 int ret; 478 479 mcu_panel = dev_read_subnode(panel->dev, "mcu-panel"); 480 dt = dev_read_subnode(panel->dev, "display-timings"); 481 if (ofnode_valid(dt)) { 482 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 483 0, 0, &args); 484 if (ret) 485 return ret; 486 487 timing = args.node; 488 } else if (ofnode_valid(mcu_panel)) { 489 dt = ofnode_find_subnode(mcu_panel, "display-timings"); 490 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 491 0, 0, &args); 492 if (ret) 493 return ret; 494 495 timing = args.node; 496 } else { 497 timing = dev_read_subnode(panel->dev, "panel-timing"); 498 } 499 500 if (!ofnode_valid(timing)) { 501 printf("failed to get display timings from DT\n"); 502 return -ENXIO; 503 } 504 505 rockchip_ofnode_get_display_mode(timing, mode); 506 507 return 0; 508 } 509 510 /** 511 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 512 * @edid_data: structure store mode list 513 * @max_output: vop max output resolution 514 */ 515 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 516 struct vop_rect *max_output) 517 { 518 int i; 519 520 for (i = 0; i < edid_data->modes; i++) { 521 if (edid_data->mode_buf[i].hdisplay > max_output->width || 522 edid_data->mode_buf[i].vdisplay > max_output->height) 523 edid_data->mode_buf[i].invalid = true; 524 } 525 } 526 527 /** 528 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 529 * @p: mode 530 * @adjust_flags: a combination of adjustment flags 531 * 532 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 533 * 534 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 535 * interlaced modes. 536 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 537 * buffers containing two eyes (only adjust the timings when needed, eg. for 538 * "frame packing" or "side by side full"). 539 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 540 * be performed for doublescan and vscan > 1 modes respectively. 541 */ 542 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 543 { 544 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 545 return; 546 547 if (p->flags & DRM_MODE_FLAG_DBLCLK) 548 p->crtc_clock = 2 * p->clock; 549 else 550 p->crtc_clock = p->clock; 551 p->crtc_hdisplay = p->hdisplay; 552 p->crtc_hsync_start = p->hsync_start; 553 p->crtc_hsync_end = p->hsync_end; 554 p->crtc_htotal = p->htotal; 555 p->crtc_hskew = p->hskew; 556 p->crtc_vdisplay = p->vdisplay; 557 p->crtc_vsync_start = p->vsync_start; 558 p->crtc_vsync_end = p->vsync_end; 559 p->crtc_vtotal = p->vtotal; 560 561 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 562 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 563 p->crtc_vdisplay /= 2; 564 p->crtc_vsync_start /= 2; 565 p->crtc_vsync_end /= 2; 566 p->crtc_vtotal /= 2; 567 } 568 } 569 570 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 571 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 572 p->crtc_vdisplay *= 2; 573 p->crtc_vsync_start *= 2; 574 p->crtc_vsync_end *= 2; 575 p->crtc_vtotal *= 2; 576 } 577 } 578 579 if (!(adjust_flags & CRTC_NO_VSCAN)) { 580 if (p->vscan > 1) { 581 p->crtc_vdisplay *= p->vscan; 582 p->crtc_vsync_start *= p->vscan; 583 p->crtc_vsync_end *= p->vscan; 584 p->crtc_vtotal *= p->vscan; 585 } 586 } 587 588 if (adjust_flags & CRTC_STEREO_DOUBLE) { 589 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 590 591 switch (layout) { 592 case DRM_MODE_FLAG_3D_FRAME_PACKING: 593 p->crtc_clock *= 2; 594 p->crtc_vdisplay += p->crtc_vtotal; 595 p->crtc_vsync_start += p->crtc_vtotal; 596 p->crtc_vsync_end += p->crtc_vtotal; 597 p->crtc_vtotal += p->crtc_vtotal; 598 break; 599 } 600 } 601 602 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 603 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 604 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 605 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 606 } 607 608 /** 609 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 610 * output format 611 * 612 * @connector: drm connector under action. 613 * @mode: video mode to be tested. 614 * 615 * Returns: 616 * true if the mode can be supported in YCBCR420 format 617 * false if not. 618 */ 619 bool drm_mode_is_420_only(const struct drm_display_info *display, 620 struct drm_display_mode *mode) 621 { 622 u8 vic = drm_match_cea_mode(mode); 623 624 return test_bit(vic, display->hdmi.y420_vdb_modes); 625 } 626 627 /** 628 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 629 * output format also (along with RGB/YCBCR444/422) 630 * 631 * @display: display under action. 632 * @mode: video mode to be tested. 633 * 634 * Returns: 635 * true if the mode can be support YCBCR420 format 636 * false if not. 637 */ 638 bool drm_mode_is_420_also(const struct drm_display_info *display, 639 struct drm_display_mode *mode) 640 { 641 u8 vic = drm_match_cea_mode(mode); 642 643 return test_bit(vic, display->hdmi.y420_cmdb_modes); 644 } 645 646 /** 647 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 648 * output format 649 * 650 * @display: display under action. 651 * @mode: video mode to be tested. 652 * 653 * Returns: 654 * true if the mode can be supported in YCBCR420 format 655 * false if not. 656 */ 657 bool drm_mode_is_420(const struct drm_display_info *display, 658 struct drm_display_mode *mode) 659 { 660 return drm_mode_is_420_only(display, mode) || 661 drm_mode_is_420_also(display, mode); 662 } 663 664 static int display_get_timing(struct display_state *state) 665 { 666 struct connector_state *conn_state = &state->conn_state; 667 struct drm_display_mode *mode = &conn_state->mode; 668 const struct drm_display_mode *m; 669 struct rockchip_panel *panel = conn_state->connector->panel; 670 671 if (panel->funcs->get_mode) 672 return panel->funcs->get_mode(panel, mode); 673 674 if (dev_of_valid(panel->dev) && 675 !display_get_timing_from_dts(panel, mode)) { 676 printf("Using display timing dts\n"); 677 return 0; 678 } 679 680 if (panel->data) { 681 m = (const struct drm_display_mode *)panel->data; 682 memcpy(mode, m, sizeof(*m)); 683 printf("Using display timing from compatible panel driver\n"); 684 return 0; 685 } 686 687 return -ENODEV; 688 } 689 690 static int display_pre_init(void) 691 { 692 struct display_state *state; 693 int ret = 0; 694 695 list_for_each_entry(state, &rockchip_display_list, head) { 696 struct connector_state *conn_state = &state->conn_state; 697 struct crtc_state *crtc_state = &state->crtc_state; 698 struct rockchip_crtc *crtc = crtc_state->crtc; 699 700 ret = rockchip_connector_pre_init(state); 701 if (ret) 702 printf("pre init conn error\n"); 703 704 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 705 } 706 return ret; 707 } 708 709 static int display_use_force_mode(struct display_state *state) 710 { 711 struct connector_state *conn_state = &state->conn_state; 712 struct drm_display_mode *mode = &conn_state->mode; 713 714 conn_state->bpc = 8; 715 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 716 conn_state->bus_format = state->force_bus_format; 717 718 return 0; 719 } 720 721 static int display_get_edid_mode(struct display_state *state) 722 { 723 int ret = 0; 724 struct connector_state *conn_state = &state->conn_state; 725 struct drm_display_mode *mode = &conn_state->mode; 726 int bpc; 727 728 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 729 if (!ret) { 730 conn_state->bpc = bpc; 731 edid_print_info((void *)&conn_state->edid); 732 } else { 733 conn_state->bpc = 8; 734 mode->clock = 74250; 735 mode->flags = 0x5; 736 mode->hdisplay = 1280; 737 mode->hsync_start = 1390; 738 mode->hsync_end = 1430; 739 mode->htotal = 1650; 740 mode->hskew = 0; 741 mode->vdisplay = 720; 742 mode->vsync_start = 725; 743 mode->vsync_end = 730; 744 mode->vtotal = 750; 745 mode->vrefresh = 60; 746 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 747 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 748 749 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 750 state->conn_state.connector->dev->name); 751 } 752 753 return ret; 754 } 755 756 static int display_mode_valid(struct display_state *state) 757 { 758 struct connector_state *conn_state = &state->conn_state; 759 struct rockchip_connector *conn = conn_state->connector; 760 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 761 struct crtc_state *crtc_state = &state->crtc_state; 762 const struct rockchip_crtc *crtc = crtc_state->crtc; 763 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 764 int ret; 765 766 if (conn_funcs->mode_valid) { 767 ret = conn_funcs->mode_valid(conn, state); 768 if (ret) 769 return ret; 770 } 771 772 if (crtc_funcs->mode_valid) { 773 ret = crtc_funcs->mode_valid(state); 774 if (ret) 775 return ret; 776 } 777 778 return 0; 779 } 780 781 static int display_init(struct display_state *state) 782 { 783 struct connector_state *conn_state = &state->conn_state; 784 struct rockchip_connector *conn = conn_state->connector; 785 struct crtc_state *crtc_state = &state->crtc_state; 786 struct rockchip_crtc *crtc = crtc_state->crtc; 787 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 788 struct drm_display_mode *mode = &conn_state->mode; 789 const char *compatible; 790 int ret = 0; 791 static bool __print_once = false; 792 793 if (!__print_once) { 794 __print_once = true; 795 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 796 } 797 798 if (state->is_init) 799 return 0; 800 801 if (!crtc_funcs) { 802 printf("failed to find crtc functions\n"); 803 return -ENXIO; 804 } 805 806 if (crtc_state->crtc->active && !crtc_state->ports_node && 807 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 808 sizeof(struct drm_display_mode))) { 809 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 810 crtc_state->dev->name, 811 crtc_state->crtc->active_mode.type, 812 crtc_state->crtc->active_mode.hdisplay, 813 crtc_state->crtc->active_mode.vdisplay, 814 crtc_state->crtc->active_mode.vrefresh); 815 return -ENODEV; 816 } 817 818 if (crtc_funcs->preinit) { 819 ret = crtc_funcs->preinit(state); 820 if (ret) 821 return ret; 822 } 823 824 ret = rockchip_connector_init(state); 825 if (ret) 826 goto deinit; 827 828 /* 829 * support hotplug, but not connect; 830 */ 831 #ifdef CONFIG_DRM_ROCKCHIP_TVE 832 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 833 printf("hdmi plugin ,skip tve\n"); 834 goto deinit; 835 } 836 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 837 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 838 printf("hdmi plugin ,skip tve\n"); 839 goto deinit; 840 } 841 #endif 842 843 ret = rockchip_connector_detect(state); 844 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 845 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 846 crtc->hdmi_hpd = ret; 847 #endif 848 if (!ret && !state->force_output) 849 goto deinit; 850 851 if (conn->panel) { 852 ret = display_get_timing(state); 853 if (!ret) 854 conn_state->bpc = conn->panel->bpc; 855 #if defined(CONFIG_I2C_EDID) 856 if (ret < 0 && conn->funcs->get_edid) { 857 rockchip_panel_prepare(conn->panel); 858 ret = conn->funcs->get_edid(conn, state); 859 if (!ret) 860 display_get_edid_mode(state); 861 } 862 #endif 863 } else if (conn->bridge) { 864 ret = video_bridge_read_edid(conn->bridge->dev, 865 conn_state->edid, EDID_SIZE); 866 if (ret > 0) { 867 #if defined(CONFIG_I2C_EDID) 868 display_get_edid_mode(state); 869 #endif 870 } else { 871 ret = video_bridge_get_timing(conn->bridge->dev); 872 } 873 } else if (conn->funcs->get_timing) { 874 ret = conn->funcs->get_timing(conn, state); 875 } else if (conn->funcs->get_edid) { 876 ret = conn->funcs->get_edid(conn, state); 877 #if defined(CONFIG_I2C_EDID) 878 if (!ret) 879 display_get_edid_mode(state); 880 #endif 881 } 882 883 if (!ret && conn_state->secondary) { 884 struct rockchip_connector *connector = conn_state->secondary; 885 886 if (connector->panel) { 887 if (connector->panel->funcs->get_mode) { 888 struct drm_display_mode *_mode = drm_mode_create(); 889 890 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 891 if (!ret && !drm_mode_equal(_mode, mode)) 892 ret = -EINVAL; 893 894 drm_mode_destroy(_mode); 895 } 896 } 897 } 898 899 if (ret && !state->force_output) 900 goto deinit; 901 if (state->force_output) 902 display_use_force_mode(state); 903 904 if (display_mode_valid(state)) 905 goto deinit; 906 907 /* rk356x series drive mipi pixdata on posedge */ 908 compatible = dev_read_string(conn->dev, "compatible"); 909 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 910 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 911 912 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 913 " H: %04d %04d %04d %04d\n" 914 " V: %04d %04d %04d %04d\n" 915 "bus_format: %x\n", 916 conn->dev->name, 917 state->force_output ? "use force output" : "", 918 mode->clock, mode->flags, 919 mode->hdisplay, mode->hsync_start, 920 mode->hsync_end, mode->htotal, 921 mode->vdisplay, mode->vsync_start, 922 mode->vsync_end, mode->vtotal, 923 conn_state->bus_format); 924 925 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 926 927 if (conn_state->secondary) { 928 mode->crtc_clock *= 2; 929 mode->crtc_hdisplay *= 2; 930 mode->crtc_hsync_start *= 2; 931 mode->crtc_hsync_end *= 2; 932 mode->crtc_htotal *= 2; 933 } 934 935 if (conn->bridge) 936 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 937 938 if (crtc_funcs->init) { 939 ret = crtc_funcs->init(state); 940 if (ret) 941 goto deinit; 942 } 943 state->is_init = 1; 944 945 crtc_state->crtc->active = true; 946 memcpy(&crtc_state->crtc->active_mode, 947 &conn_state->mode, sizeof(struct drm_display_mode)); 948 949 return 0; 950 951 deinit: 952 rockchip_connector_deinit(state); 953 return ret; 954 } 955 956 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 957 { 958 struct crtc_state *crtc_state = &state->crtc_state; 959 const struct rockchip_crtc *crtc = crtc_state->crtc; 960 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 961 int ret; 962 963 if (!state->is_init) 964 return -EINVAL; 965 966 if (crtc_funcs->send_mcu_cmd) { 967 ret = crtc_funcs->send_mcu_cmd(state, type, val); 968 if (ret) 969 return ret; 970 } 971 972 return 0; 973 } 974 975 static int display_set_plane(struct display_state *state) 976 { 977 struct crtc_state *crtc_state = &state->crtc_state; 978 const struct rockchip_crtc *crtc = crtc_state->crtc; 979 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 980 int ret; 981 982 if (!state->is_init) 983 return -EINVAL; 984 985 if (crtc_funcs->set_plane) { 986 ret = crtc_funcs->set_plane(state); 987 if (ret) 988 return ret; 989 } 990 991 return 0; 992 } 993 994 static int display_enable(struct display_state *state) 995 { 996 struct crtc_state *crtc_state = &state->crtc_state; 997 const struct rockchip_crtc *crtc = crtc_state->crtc; 998 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 999 1000 if (!state->is_init) 1001 return -EINVAL; 1002 1003 if (state->is_enable) 1004 return 0; 1005 1006 if (crtc_funcs->prepare) 1007 crtc_funcs->prepare(state); 1008 1009 rockchip_connector_pre_enable(state); 1010 1011 if (crtc_funcs->enable) 1012 crtc_funcs->enable(state); 1013 1014 rockchip_connector_enable(state); 1015 1016 if (crtc_state->soft_te) 1017 crtc_funcs->apply_soft_te(state); 1018 1019 state->is_enable = true; 1020 1021 return 0; 1022 } 1023 1024 static int display_disable(struct display_state *state) 1025 { 1026 struct crtc_state *crtc_state = &state->crtc_state; 1027 const struct rockchip_crtc *crtc = crtc_state->crtc; 1028 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1029 1030 if (!state->is_init) 1031 return 0; 1032 1033 if (!state->is_enable) 1034 return 0; 1035 1036 rockchip_connector_disable(state); 1037 1038 if (crtc_funcs->disable) 1039 crtc_funcs->disable(state); 1040 1041 rockchip_connector_post_disable(state); 1042 1043 state->is_enable = 0; 1044 state->is_init = 0; 1045 1046 return 0; 1047 } 1048 1049 static int display_rect_calc_scale(int src, int dst) 1050 { 1051 int scale = 0; 1052 1053 if (WARN_ON(src < 0 || dst < 0)) 1054 return -EINVAL; 1055 1056 if (dst == 0) 1057 return 0; 1058 1059 src <<= 16; 1060 1061 if (src > (dst << 16)) 1062 return DIV_ROUND_UP(src, dst); 1063 else 1064 scale = src / dst; 1065 1066 return scale; 1067 } 1068 1069 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst, 1070 int min_hscale, int max_hscale) 1071 { 1072 int hscale = display_rect_calc_scale(src->w, dst->w); 1073 1074 if (hscale < 0 || dst->w == 0) 1075 return hscale; 1076 1077 if (hscale < min_hscale || hscale > max_hscale) 1078 return -ERANGE; 1079 1080 return hscale; 1081 } 1082 1083 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst, 1084 int min_vscale, int max_vscale) 1085 { 1086 int vscale = display_rect_calc_scale(src->h, dst->h); 1087 1088 if (vscale < 0 || dst->h == 0) 1089 return vscale; 1090 1091 if (vscale < min_vscale || vscale > max_vscale) 1092 return -ERANGE; 1093 1094 return vscale; 1095 } 1096 1097 static int display_check(struct display_state *state) 1098 { 1099 struct connector_state *conn_state = &state->conn_state; 1100 struct rockchip_connector *conn = conn_state->connector; 1101 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1102 struct crtc_state *crtc_state = &state->crtc_state; 1103 const struct rockchip_crtc *crtc = crtc_state->crtc; 1104 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1105 int ret; 1106 1107 if (!state->is_init) 1108 return 0; 1109 1110 if (conn_funcs->check) { 1111 ret = conn_funcs->check(conn, state); 1112 if (ret) 1113 goto check_fail; 1114 } 1115 1116 if (crtc_funcs->check) { 1117 ret = crtc_funcs->check(state); 1118 if (ret) 1119 goto check_fail; 1120 } 1121 1122 if (crtc_funcs->plane_check) { 1123 ret = crtc_funcs->plane_check(state); 1124 if (ret) 1125 goto check_fail; 1126 } 1127 1128 return 0; 1129 1130 check_fail: 1131 state->is_init = false; 1132 return ret; 1133 } 1134 1135 static int display_logo(struct display_state *state) 1136 { 1137 struct crtc_state *crtc_state = &state->crtc_state; 1138 struct connector_state *conn_state = &state->conn_state; 1139 struct logo_info *logo = &state->logo; 1140 int hdisplay, vdisplay, ret; 1141 1142 ret = display_init(state); 1143 if (!state->is_init || ret) 1144 return -ENODEV; 1145 1146 switch (logo->bpp) { 1147 case 16: 1148 crtc_state->format = ROCKCHIP_FMT_RGB565; 1149 break; 1150 case 24: 1151 crtc_state->format = ROCKCHIP_FMT_RGB888; 1152 break; 1153 case 32: 1154 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1155 break; 1156 default: 1157 printf("can't support bmp bits[%d]\n", logo->bpp); 1158 return -EINVAL; 1159 } 1160 hdisplay = conn_state->mode.crtc_hdisplay; 1161 vdisplay = conn_state->mode.vdisplay; 1162 crtc_state->src_rect.w = logo->width; 1163 crtc_state->src_rect.h = logo->height; 1164 crtc_state->src_rect.x = 0; 1165 crtc_state->src_rect.y = 0; 1166 crtc_state->ymirror = logo->ymirror; 1167 crtc_state->rb_swap = 0; 1168 1169 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1170 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1171 1172 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1173 crtc_state->crtc_rect.x = 0; 1174 crtc_state->crtc_rect.y = 0; 1175 crtc_state->crtc_rect.w = hdisplay; 1176 crtc_state->crtc_rect.h = vdisplay; 1177 } else { 1178 if (crtc_state->src_rect.w >= hdisplay) { 1179 crtc_state->crtc_rect.x = 0; 1180 crtc_state->crtc_rect.w = hdisplay; 1181 } else { 1182 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1183 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1184 } 1185 1186 if (crtc_state->src_rect.h >= vdisplay) { 1187 crtc_state->crtc_rect.y = 0; 1188 crtc_state->crtc_rect.h = vdisplay; 1189 } else { 1190 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1191 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1192 } 1193 } 1194 1195 display_check(state); 1196 display_set_plane(state); 1197 display_enable(state); 1198 1199 return 0; 1200 } 1201 1202 static int get_crtc_id(ofnode connect, bool is_ports_node) 1203 { 1204 struct device_node *port_node; 1205 struct device_node *remote; 1206 int phandle; 1207 int val; 1208 1209 if (is_ports_node) { 1210 port_node = of_get_parent(connect.np); 1211 if (!port_node) 1212 goto err; 1213 1214 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1215 if (val < 0) 1216 goto err; 1217 } else { 1218 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1219 if (phandle < 0) 1220 goto err; 1221 1222 remote = of_find_node_by_phandle(phandle); 1223 if (!remote) 1224 goto err; 1225 1226 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1227 if (val < 0) 1228 goto err; 1229 } 1230 1231 return val; 1232 err: 1233 printf("Can't get crtc id, default set to id = 0\n"); 1234 return 0; 1235 } 1236 1237 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1238 { 1239 ofnode mcu_node; 1240 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1241 1242 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1243 if (!ofnode_valid(mcu_node)) 1244 return -ENODEV; 1245 1246 #define FDT_GET_MCU_INT(val, name) \ 1247 do { \ 1248 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1249 if (val < 0) { \ 1250 printf("Can't get %s\n", name); \ 1251 return -ENXIO; \ 1252 } \ 1253 } while (0) 1254 1255 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1256 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1257 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1258 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1259 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1260 1261 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1262 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1263 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1264 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1265 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1266 1267 return 0; 1268 } 1269 1270 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1271 { 1272 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1273 1274 list_for_each_entry(tmp, &logo_cache_list, head) { 1275 if (!strcmp(tmp->name, bmp)) { 1276 logo_cache = tmp; 1277 break; 1278 } 1279 } 1280 1281 if (!logo_cache) { 1282 logo_cache = malloc(sizeof(*logo_cache)); 1283 if (!logo_cache) { 1284 printf("failed to alloc memory for logo cache\n"); 1285 return NULL; 1286 } 1287 memset(logo_cache, 0, sizeof(*logo_cache)); 1288 strcpy(logo_cache->name, bmp); 1289 INIT_LIST_HEAD(&logo_cache->head); 1290 list_add_tail(&logo_cache->head, &logo_cache_list); 1291 } 1292 1293 return logo_cache; 1294 } 1295 1296 /* Note: used only for rkfb kernel driver */ 1297 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1298 { 1299 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1300 void *dst = NULL; 1301 int len, size; 1302 struct bmp_header *header; 1303 1304 if (!logo || !bmp_name) 1305 return -EINVAL; 1306 1307 header = malloc(RK_BLK_SIZE); 1308 if (!header) 1309 return -ENOMEM; 1310 1311 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1312 if (len != RK_BLK_SIZE) { 1313 free(header); 1314 return -EINVAL; 1315 } 1316 size = get_unaligned_le32(&header->file_size); 1317 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1318 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1319 if (len != size) { 1320 printf("failed to load bmp %s\n", bmp_name); 1321 free(header); 1322 return -ENOENT; 1323 } 1324 1325 logo->mem = dst; 1326 #endif 1327 1328 return 0; 1329 } 1330 1331 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1332 { 1333 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1334 struct rockchip_logo_cache *logo_cache; 1335 struct bmp_header *header; 1336 void *dst = NULL, *pdst; 1337 int size, len; 1338 int ret = 0; 1339 int reserved = 0; 1340 int dst_size; 1341 1342 if (!logo || !bmp_name) 1343 return -EINVAL; 1344 logo_cache = find_or_alloc_logo_cache(bmp_name); 1345 if (!logo_cache) 1346 return -ENOMEM; 1347 1348 if (logo_cache->logo.mem) { 1349 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1350 return 0; 1351 } 1352 1353 header = malloc(RK_BLK_SIZE); 1354 if (!header) 1355 return -ENOMEM; 1356 1357 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1358 if (len != RK_BLK_SIZE) { 1359 ret = -EINVAL; 1360 goto free_header; 1361 } 1362 1363 logo->bpp = get_unaligned_le16(&header->bit_count); 1364 logo->width = get_unaligned_le32(&header->width); 1365 logo->height = get_unaligned_le32(&header->height); 1366 dst_size = logo->width * logo->height * logo->bpp >> 3; 1367 reserved = get_unaligned_le32(&header->reserved); 1368 if (logo->height < 0) 1369 logo->height = -logo->height; 1370 size = get_unaligned_le32(&header->file_size); 1371 if (!can_direct_logo(logo->bpp)) { 1372 if (size > MEMORY_POOL_SIZE) { 1373 printf("failed to use boot buf as temp bmp buffer\n"); 1374 ret = -ENOMEM; 1375 goto free_header; 1376 } 1377 pdst = get_display_buffer(size); 1378 1379 } else { 1380 pdst = get_display_buffer(size); 1381 dst = pdst; 1382 } 1383 1384 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1385 if (len != size) { 1386 printf("failed to load bmp %s\n", bmp_name); 1387 ret = -ENOENT; 1388 goto free_header; 1389 } 1390 1391 if (!can_direct_logo(logo->bpp)) { 1392 /* 1393 * TODO: force use 16bpp if bpp less than 16; 1394 */ 1395 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1396 dst_size = logo->width * logo->height * logo->bpp >> 3; 1397 dst = get_display_buffer(dst_size); 1398 if (!dst) { 1399 ret = -ENOMEM; 1400 goto free_header; 1401 } 1402 if (bmpdecoder(pdst, dst, logo->bpp)) { 1403 printf("failed to decode bmp %s\n", bmp_name); 1404 ret = -EINVAL; 1405 goto free_header; 1406 } 1407 1408 logo->offset = 0; 1409 logo->ymirror = 0; 1410 } else { 1411 logo->offset = get_unaligned_le32(&header->data_offset); 1412 if (reserved == BMP_PROCESSED_FLAG) 1413 logo->ymirror = 0; 1414 else 1415 logo->ymirror = 1; 1416 } 1417 logo->mem = dst; 1418 1419 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1420 1421 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1422 1423 free_header: 1424 1425 free(header); 1426 1427 return ret; 1428 #else 1429 return -EINVAL; 1430 #endif 1431 } 1432 1433 void rockchip_show_fbbase(ulong fbbase) 1434 { 1435 struct display_state *s; 1436 1437 list_for_each_entry(s, &rockchip_display_list, head) { 1438 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1439 s->logo.mem = (char *)fbbase; 1440 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1441 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1442 s->logo.bpp = 32; 1443 s->logo.ymirror = 0; 1444 1445 display_logo(s); 1446 } 1447 } 1448 1449 int rockchip_show_bmp(const char *bmp) 1450 { 1451 struct display_state *s; 1452 int ret = 0; 1453 1454 if (!bmp) { 1455 list_for_each_entry(s, &rockchip_display_list, head) 1456 display_disable(s); 1457 return -ENOENT; 1458 } 1459 1460 list_for_each_entry(s, &rockchip_display_list, head) { 1461 s->logo.mode = s->charge_logo_mode; 1462 if (load_bmp_logo(&s->logo, bmp)) 1463 continue; 1464 ret = display_logo(s); 1465 } 1466 1467 return ret; 1468 } 1469 1470 int rockchip_show_logo(void) 1471 { 1472 struct display_state *s; 1473 int ret = 0; 1474 1475 list_for_each_entry(s, &rockchip_display_list, head) { 1476 s->logo.mode = s->logo_mode; 1477 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1478 printf("failed to display uboot logo\n"); 1479 else 1480 ret = display_logo(s); 1481 1482 /* Load kernel bmp in rockchip_display_fixup() later */ 1483 } 1484 1485 return ret; 1486 } 1487 1488 int rockchip_vop_dump(const char *cmd) 1489 { 1490 struct display_state *state; 1491 struct crtc_state *crtc_state; 1492 struct rockchip_crtc *crtc; 1493 const struct rockchip_crtc_funcs *crtc_funcs; 1494 int ret = -EINVAL; 1495 1496 list_for_each_entry(state, &rockchip_display_list, head) { 1497 if (!state->is_init) 1498 continue; 1499 crtc_state = &state->crtc_state; 1500 crtc = crtc_state->crtc; 1501 crtc_funcs = crtc->funcs; 1502 1503 if (!cmd) 1504 ret = crtc_funcs->active_regs_dump(state); 1505 else if (!strcmp(cmd, "a") || !strcmp(cmd, "all")) 1506 ret = crtc_funcs->regs_dump(state); 1507 if (!ret) 1508 break; 1509 } 1510 1511 if (ret) 1512 ret = CMD_RET_USAGE; 1513 1514 return ret; 1515 } 1516 1517 enum { 1518 PORT_DIR_IN, 1519 PORT_DIR_OUT, 1520 }; 1521 1522 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1523 { 1524 ofnode ports, port; 1525 u32 reg; 1526 1527 ports = ofnode_find_subnode(node, "ports"); 1528 if (!ofnode_valid(ports)) 1529 return NULL; 1530 1531 ofnode_for_each_subnode(port, ports) { 1532 if (ofnode_read_u32(port, "reg", ®)) 1533 continue; 1534 1535 if (reg == id) 1536 break; 1537 } 1538 1539 if (reg == id) 1540 return ofnode_to_np(port); 1541 1542 return NULL; 1543 } 1544 1545 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1546 { 1547 ofnode parent; 1548 int is_ports_node; 1549 1550 parent = ofnode_get_parent(port); 1551 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1552 if (is_ports_node) 1553 parent = ofnode_get_parent(parent); 1554 1555 return ofnode_to_np(parent); 1556 } 1557 1558 const struct device_node * 1559 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint) 1560 { 1561 const struct device_node *port_node; 1562 ofnode ep; 1563 u32 reg; 1564 1565 port_node = rockchip_of_graph_get_port_by_id(node, port); 1566 if (!port_node) 1567 return NULL; 1568 1569 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1570 if (ofnode_read_u32(ep, "reg", ®)) 1571 break; 1572 if (reg == endpoint) 1573 break; 1574 } 1575 1576 if (!ofnode_valid(ep)) 1577 return NULL; 1578 1579 return ofnode_to_np(ep); 1580 } 1581 1582 static const struct device_node * 1583 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint) 1584 { 1585 const struct device_node *ep_node; 1586 ofnode ep; 1587 uint phandle; 1588 1589 ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint); 1590 if (!ep_node) 1591 return NULL; 1592 1593 if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle)) 1594 return NULL; 1595 1596 ep = ofnode_get_by_phandle(phandle); 1597 if (!ofnode_valid(ep)) 1598 return NULL; 1599 1600 return ofnode_to_np(ep); 1601 } 1602 1603 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1604 { 1605 const struct device_node *ep_node, *panel_node; 1606 ofnode panel_ofnode, port; 1607 struct udevice *panel_dev; 1608 int ret = 0; 1609 1610 *panel = NULL; 1611 panel_ofnode = dev_read_subnode(dev, "panel"); 1612 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1613 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1614 &panel_dev); 1615 if (!ret) 1616 goto found; 1617 } 1618 1619 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1620 if (!ep_node) 1621 return -ENODEV; 1622 1623 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1624 if (!ofnode_valid(port)) 1625 return -ENODEV; 1626 1627 panel_node = rockchip_of_graph_get_port_parent(port); 1628 if (!panel_node) 1629 return -ENODEV; 1630 1631 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1632 if (!ret) 1633 goto found; 1634 1635 return -ENODEV; 1636 1637 found: 1638 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1639 return 0; 1640 } 1641 1642 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1643 { 1644 const struct device_node *ep_node, *bridge_node; 1645 ofnode port; 1646 struct udevice *bridge_dev; 1647 int ret = 0; 1648 1649 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1650 if (!ep_node) 1651 return -ENODEV; 1652 1653 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1654 if (!ofnode_valid(port)) 1655 return -ENODEV; 1656 1657 bridge_node = rockchip_of_graph_get_port_parent(port); 1658 if (!bridge_node) 1659 return -ENODEV; 1660 1661 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1662 &bridge_dev); 1663 if (!ret) 1664 goto found; 1665 1666 return -ENODEV; 1667 1668 found: 1669 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1670 return 0; 1671 } 1672 1673 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1674 struct rockchip_bridge **bridge) 1675 { 1676 int ret = 0; 1677 1678 if (*panel) 1679 return 0; 1680 1681 *panel = NULL; 1682 *bridge = NULL; 1683 1684 if (panel) { 1685 ret = rockchip_of_find_panel(dev, panel); 1686 if (!ret) 1687 return 0; 1688 } 1689 1690 if (ret) { 1691 ret = rockchip_of_find_bridge(dev, bridge); 1692 if (!ret) 1693 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1694 &(*bridge)->next_bridge); 1695 } 1696 1697 return ret; 1698 } 1699 1700 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1701 { 1702 struct udevice *phy_dev; 1703 int ret; 1704 1705 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1706 if (ret) 1707 return NULL; 1708 1709 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1710 } 1711 1712 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1713 { 1714 ofnode ep, port, ports, conn; 1715 uint phandle; 1716 struct udevice *dev; 1717 int ret; 1718 1719 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1720 return NULL; 1721 1722 ep = ofnode_get_by_phandle(phandle); 1723 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1724 return NULL; 1725 1726 port = ofnode_get_parent(ep); 1727 if (!ofnode_valid(port)) 1728 return NULL; 1729 1730 ports = ofnode_get_parent(port); 1731 if (!ofnode_valid(ports)) 1732 return NULL; 1733 1734 conn = ofnode_get_parent(ports); 1735 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1736 return NULL; 1737 1738 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1739 if (ret) 1740 return NULL; 1741 1742 return dev; 1743 } 1744 1745 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1746 { 1747 struct rockchip_connector *conn; 1748 struct udevice *dev; 1749 int ret; 1750 1751 dev = rockchip_of_find_connector_device(endpoint); 1752 if (!dev) { 1753 printf("Warn: can't find connect driver\n"); 1754 return NULL; 1755 } 1756 1757 conn = get_rockchip_connector_by_device(dev); 1758 if (!conn) 1759 return NULL; 1760 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1761 if (ret) 1762 debug("Warn: no find panel or bridge\n"); 1763 1764 conn->phy = rockchip_of_find_phy(dev); 1765 1766 return conn; 1767 } 1768 1769 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1770 { 1771 char *conn_name; 1772 struct device_node *split_node; 1773 struct udevice *split_dev; 1774 struct rockchip_connector *split_conn; 1775 bool split_mode; 1776 int ret; 1777 1778 split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1779 if (!split_mode) 1780 return NULL; 1781 1782 switch (conn->type) { 1783 case DRM_MODE_CONNECTOR_DisplayPort: 1784 conn_name = "dp"; 1785 break; 1786 case DRM_MODE_CONNECTOR_eDP: 1787 conn_name = "edp"; 1788 break; 1789 case DRM_MODE_CONNECTOR_HDMIA: 1790 conn_name = "hdmi"; 1791 break; 1792 default: 1793 return NULL; 1794 } 1795 1796 split_node = of_alias_get_dev(conn_name, !conn->id); 1797 if (!split_node || !of_device_is_available(split_node)) 1798 return NULL; 1799 1800 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1801 if (ret) 1802 return NULL; 1803 1804 split_conn = get_rockchip_connector_by_device(split_dev); 1805 if (!split_conn) 1806 return NULL; 1807 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1808 if (ret) 1809 debug("Warn: no find panel or bridge\n"); 1810 1811 split_conn->phy = rockchip_of_find_phy(split_dev); 1812 1813 return split_conn; 1814 } 1815 1816 static bool rockchip_get_display_path_status(ofnode endpoint) 1817 { 1818 ofnode ep; 1819 uint phandle; 1820 1821 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1822 return false; 1823 1824 ep = ofnode_get_by_phandle(phandle); 1825 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1826 return false; 1827 1828 return true; 1829 } 1830 1831 #if defined(CONFIG_ROCKCHIP_RK3568) 1832 static int rockchip_display_fixup_dts(void *blob) 1833 { 1834 ofnode route_node, route_subnode, conn_ep, conn_port; 1835 const struct device_node *route_sub_devnode; 1836 const struct device_node *ep_node, *conn_ep_dev_node; 1837 u32 phandle; 1838 int conn_ep_offset; 1839 const char *route_sub_path, *path; 1840 1841 /* Don't go further if new variant after 1842 * reading PMUGRF_SOC_CON15 1843 */ 1844 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1845 return 0; 1846 1847 route_node = ofnode_path("/display-subsystem/route"); 1848 if (!ofnode_valid(route_node)) 1849 return -EINVAL; 1850 1851 ofnode_for_each_subnode(route_subnode, route_node) { 1852 if (!ofnode_is_available(route_subnode)) 1853 continue; 1854 1855 route_sub_devnode = ofnode_to_np(route_subnode); 1856 route_sub_path = route_sub_devnode->full_name; 1857 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1858 !strstr(ofnode_get_name(route_subnode), "edp")) 1859 return 0; 1860 1861 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1862 if (phandle < 0) { 1863 printf("Warn: can't find connect node's handle\n"); 1864 continue; 1865 } 1866 1867 ep_node = of_find_node_by_phandle(phandle); 1868 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1869 printf("Warn: can't find endpoint node from phandle\n"); 1870 continue; 1871 } 1872 1873 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1874 conn_ep = ofnode_get_by_phandle(phandle); 1875 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1876 return -ENODEV; 1877 1878 conn_port = ofnode_get_parent(conn_ep); 1879 if (!ofnode_valid(conn_port)) 1880 return -ENODEV; 1881 1882 ofnode_for_each_subnode(conn_ep, conn_port) { 1883 conn_ep_dev_node = ofnode_to_np(conn_ep); 1884 path = conn_ep_dev_node->full_name; 1885 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1886 conn_ep_offset = fdt_path_offset(blob, path); 1887 1888 if (!ofnode_is_available(conn_ep) && 1889 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1890 do_fixup_by_path_u32(blob, route_sub_path, 1891 "connect", phandle, 1); 1892 fdt_status_okay(blob, conn_ep_offset); 1893 1894 } else if (ofnode_is_available(conn_ep) && 1895 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1896 fdt_status_disabled(blob, conn_ep_offset); 1897 } 1898 } 1899 } 1900 1901 return 0; 1902 } 1903 #endif 1904 1905 static int rockchip_display_probe(struct udevice *dev) 1906 { 1907 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1908 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1909 const void *blob = gd->fdt_blob; 1910 int phandle; 1911 struct udevice *crtc_dev; 1912 struct rockchip_crtc *crtc; 1913 struct rockchip_connector *conn, *split_conn; 1914 struct display_state *s; 1915 const char *name; 1916 int ret; 1917 ofnode node, route_node, timing_node; 1918 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1919 struct public_phy_data *data; 1920 bool is_ports_node = false; 1921 1922 #if defined(CONFIG_ROCKCHIP_RK3568) 1923 rockchip_display_fixup_dts((void *)blob); 1924 #endif 1925 /* Before relocation we don't need to do anything */ 1926 if (!(gd->flags & GD_FLG_RELOC)) 1927 return 0; 1928 1929 data = malloc(sizeof(struct public_phy_data)); 1930 if (!data) { 1931 printf("failed to alloc phy data\n"); 1932 return -ENOMEM; 1933 } 1934 data->phy_init = false; 1935 1936 init_display_buffer(plat->base); 1937 1938 route_node = dev_read_subnode(dev, "route"); 1939 if (!ofnode_valid(route_node)) 1940 return -ENODEV; 1941 1942 ofnode_for_each_subnode(node, route_node) { 1943 if (!ofnode_is_available(node)) 1944 continue; 1945 phandle = ofnode_read_u32_default(node, "connect", -1); 1946 if (phandle < 0) { 1947 printf("Warn: can't find connect node's handle\n"); 1948 continue; 1949 } 1950 ep_node = of_find_node_by_phandle(phandle); 1951 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1952 printf("Warn: can't find endpoint node from phandle\n"); 1953 continue; 1954 } 1955 port_node = of_get_parent(ep_node); 1956 if (!ofnode_valid(np_to_ofnode(port_node))) { 1957 printf("Warn: can't find port node from phandle\n"); 1958 continue; 1959 } 1960 1961 port_parent_node = of_get_parent(port_node); 1962 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1963 printf("Warn: can't find port parent node from phandle\n"); 1964 continue; 1965 } 1966 1967 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1968 if (is_ports_node) { 1969 vop_node = of_get_parent(port_parent_node); 1970 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1971 printf("Warn: can't find crtc node from phandle\n"); 1972 continue; 1973 } 1974 } else { 1975 vop_node = port_parent_node; 1976 } 1977 1978 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1979 np_to_ofnode(vop_node), 1980 &crtc_dev); 1981 if (ret) { 1982 printf("Warn: can't find crtc driver %d\n", ret); 1983 continue; 1984 } 1985 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1986 1987 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 1988 if (!conn) { 1989 printf("Warn: can't get connect driver\n"); 1990 continue; 1991 } 1992 split_conn = rockchip_get_split_connector(conn); 1993 1994 s = malloc(sizeof(*s)); 1995 if (!s) 1996 continue; 1997 1998 memset(s, 0, sizeof(*s)); 1999 2000 INIT_LIST_HEAD(&s->head); 2001 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 2002 if (!ret) 2003 memcpy(s->ulogo_name, name, strlen(name)); 2004 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 2005 if (!ret) 2006 memcpy(s->klogo_name, name, strlen(name)); 2007 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 2008 if (!strcmp(name, "fullscreen")) 2009 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2010 else 2011 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 2012 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 2013 if (!strcmp(name, "fullscreen")) 2014 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2015 else 2016 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 2017 2018 s->force_output = ofnode_read_bool(node, "force-output"); 2019 2020 if (s->force_output) { 2021 timing_node = ofnode_find_subnode(node, "force_timing"); 2022 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 2023 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 2024 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 2025 } 2026 2027 s->blob = blob; 2028 s->conn_state.connector = conn; 2029 s->conn_state.secondary = NULL; 2030 s->conn_state.type = conn->type; 2031 if (split_conn) { 2032 s->conn_state.secondary = split_conn; 2033 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 2034 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 2035 } 2036 s->conn_state.overscan.left_margin = 100; 2037 s->conn_state.overscan.right_margin = 100; 2038 s->conn_state.overscan.top_margin = 100; 2039 s->conn_state.overscan.bottom_margin = 100; 2040 s->crtc_state.node = np_to_ofnode(vop_node); 2041 s->crtc_state.dev = crtc_dev; 2042 s->crtc_state.crtc = crtc; 2043 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 2044 s->node = node; 2045 2046 if (is_ports_node) { /* only vop2 will get into here */ 2047 ofnode vp_node = np_to_ofnode(port_node); 2048 static bool get_plane_mask_from_dts; 2049 2050 s->crtc_state.ports_node = port_parent_node; 2051 if (!get_plane_mask_from_dts) { 2052 ofnode vp_sub_node; 2053 int vp_id = 0; 2054 bool vp_enable = false; 2055 2056 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 2057 int cursor_plane = -1; 2058 2059 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 2060 2061 s->crtc_state.crtc->vps[vp_id].xmirror_en = 2062 ofnode_read_bool(vp_node, "xmirror-enable"); 2063 2064 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 2065 2066 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2067 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2068 if (ret) { 2069 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2070 s->crtc_state.crtc->assign_plane |= true; 2071 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2072 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX); 2073 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2074 vp_id, 2075 s->crtc_state.crtc->vps[vp_id].plane_mask, 2076 s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 : 2077 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2078 cursor_plane); 2079 } 2080 2081 /* To check current vp status */ 2082 vp_enable = false; 2083 ofnode_for_each_subnode(vp_sub_node, vp_node) 2084 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2085 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2086 } 2087 get_plane_mask_from_dts = true; 2088 } 2089 } 2090 2091 get_crtc_mcu_mode(&s->crtc_state); 2092 2093 ret = ofnode_read_u32_default(s->crtc_state.node, 2094 "rockchip,dual-channel-swap", 0); 2095 s->crtc_state.dual_channel_swap = ret; 2096 2097 if (connector_phy_init(conn, data)) { 2098 printf("Warn: Failed to init phy drivers\n"); 2099 free(s); 2100 continue; 2101 } 2102 list_add_tail(&s->head, &rockchip_display_list); 2103 } 2104 2105 if (list_empty(&rockchip_display_list)) { 2106 debug("Failed to found available display route\n"); 2107 return -ENODEV; 2108 } 2109 rockchip_get_baseparameter(); 2110 display_pre_init(); 2111 2112 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2113 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2114 uc_priv->bpix = VIDEO_BPP32; 2115 2116 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2117 rockchip_show_fbbase(plat->base); 2118 video_set_flush_dcache(dev, true); 2119 #endif 2120 2121 return 0; 2122 } 2123 2124 void rockchip_display_fixup(void *blob) 2125 { 2126 const struct rockchip_connector_funcs *conn_funcs; 2127 const struct rockchip_crtc_funcs *crtc_funcs; 2128 struct rockchip_connector *conn; 2129 const struct rockchip_crtc *crtc; 2130 struct display_state *s; 2131 int offset; 2132 int ret; 2133 const struct device_node *np; 2134 const char *path; 2135 const char *cacm_header; 2136 u64 aligned_memory_size; 2137 2138 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2139 list_for_each_entry(s, &rockchip_display_list, head) { 2140 ret = load_bmp_logo(&s->logo, s->klogo_name); 2141 if (ret < 0) { 2142 s->is_klogo_valid = false; 2143 printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id); 2144 } else { 2145 s->is_klogo_valid = true; 2146 } 2147 } 2148 2149 if (!get_display_size()) 2150 return; 2151 2152 aligned_memory_size = (u64)ALIGN(get_display_size(), align_size); 2153 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2154 (u64)memory_start, 2155 aligned_memory_size); 2156 if (offset < 0) 2157 printf("failed to reserve drm-loader-logo memory\n"); 2158 2159 if (get_cubic_memory_size()) { 2160 aligned_memory_size = (u64)ALIGN(get_cubic_memory_size(), align_size); 2161 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2162 (u64)cubic_lut_memory_start, 2163 aligned_memory_size); 2164 if (offset < 0) 2165 printf("failed to reserve drm-cubic-lut memory\n"); 2166 } 2167 } else { 2168 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2169 /* Compatible with rkfb display, only need reserve memory */ 2170 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2171 (u64)memory_start, 2172 MEMORY_POOL_SIZE); 2173 if (offset < 0) 2174 printf("failed to reserve fb-loader-logo memory\n"); 2175 else 2176 list_for_each_entry(s, &rockchip_display_list, head) 2177 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2178 return; 2179 } 2180 2181 list_for_each_entry(s, &rockchip_display_list, head) { 2182 /* 2183 * If plane mask is not set in dts, fixup dts to assign it 2184 * whether crtc is initialized or not. 2185 */ 2186 if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane) 2187 s->crtc_state.crtc->funcs->fixup_dts(s, blob); 2188 2189 if (!s->is_init || !s->is_klogo_valid) 2190 continue; 2191 2192 conn = s->conn_state.connector; 2193 if (!conn) 2194 continue; 2195 conn_funcs = conn->funcs; 2196 if (!conn_funcs) { 2197 printf("failed to get exist connector\n"); 2198 continue; 2199 } 2200 2201 if (s->conn_state.secondary) { 2202 s->conn_state.mode.clock *= 2; 2203 s->conn_state.mode.hdisplay *= 2; 2204 } 2205 2206 crtc = s->crtc_state.crtc; 2207 if (!crtc) 2208 continue; 2209 2210 crtc_funcs = crtc->funcs; 2211 if (!crtc_funcs) { 2212 printf("failed to get exist crtc\n"); 2213 continue; 2214 } 2215 2216 np = ofnode_to_np(s->node); 2217 path = np->full_name; 2218 fdt_increase_size(blob, 0x400); 2219 #define FDT_SET_U32(name, val) \ 2220 do_fixup_by_path_u32(blob, path, name, val, 1); 2221 2222 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2223 - memory_start; 2224 FDT_SET_U32("logo,offset", offset); 2225 FDT_SET_U32("logo,width", s->logo.width); 2226 FDT_SET_U32("logo,height", s->logo.height); 2227 FDT_SET_U32("logo,bpp", s->logo.bpp); 2228 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2229 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2230 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2231 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2232 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2233 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2234 FDT_SET_U32("video,vrefresh", 2235 drm_mode_vrefresh(&s->conn_state.mode)); 2236 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2237 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2238 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2239 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2240 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2241 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2242 2243 if (s->conn_state.disp_info) { 2244 cacm_header = (const char*)&s->conn_state.disp_info->cacm_header; 2245 2246 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2247 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2248 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2249 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2250 2251 if (!strncasecmp(cacm_header, "CACM", 4)) { 2252 FDT_SET_U32("post_csc,hue", 2253 s->conn_state.disp_info->csc_info.hue); 2254 FDT_SET_U32("post_csc,saturation", 2255 s->conn_state.disp_info->csc_info.saturation); 2256 FDT_SET_U32("post_csc,contrast", 2257 s->conn_state.disp_info->csc_info.contrast); 2258 FDT_SET_U32("post_csc,brightness", 2259 s->conn_state.disp_info->csc_info.brightness); 2260 FDT_SET_U32("post_csc,r_gain", 2261 s->conn_state.disp_info->csc_info.r_gain); 2262 FDT_SET_U32("post_csc,g_gain", 2263 s->conn_state.disp_info->csc_info.g_gain); 2264 FDT_SET_U32("post_csc,b_gain", 2265 s->conn_state.disp_info->csc_info.b_gain); 2266 FDT_SET_U32("post_csc,r_offset", 2267 s->conn_state.disp_info->csc_info.r_offset); 2268 FDT_SET_U32("post_csc,g_offset", 2269 s->conn_state.disp_info->csc_info.g_offset); 2270 FDT_SET_U32("post_csc,b_offset", 2271 s->conn_state.disp_info->csc_info.b_offset); 2272 FDT_SET_U32("post_csc,csc_enable", 2273 s->conn_state.disp_info->csc_info.csc_enable); 2274 } 2275 } 2276 2277 if (s->conn_state.disp_info->cubic_lut_data.size && 2278 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2279 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2280 2281 #undef FDT_SET_U32 2282 } 2283 } 2284 2285 int rockchip_display_bind(struct udevice *dev) 2286 { 2287 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2288 2289 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2290 2291 return 0; 2292 } 2293 2294 static const struct udevice_id rockchip_display_ids[] = { 2295 { .compatible = "rockchip,display-subsystem" }, 2296 { } 2297 }; 2298 2299 U_BOOT_DRIVER(rockchip_display) = { 2300 .name = "rockchip_display", 2301 .id = UCLASS_VIDEO, 2302 .of_match = rockchip_display_ids, 2303 .bind = rockchip_display_bind, 2304 .probe = rockchip_display_probe, 2305 }; 2306 2307 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2308 char *const argv[]) 2309 { 2310 if (argc != 1) 2311 return CMD_RET_USAGE; 2312 2313 rockchip_show_logo(); 2314 2315 return 0; 2316 } 2317 2318 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2319 char *const argv[]) 2320 { 2321 if (argc != 2) 2322 return CMD_RET_USAGE; 2323 2324 rockchip_show_bmp(argv[1]); 2325 2326 return 0; 2327 } 2328 2329 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc, 2330 char *const argv[]) 2331 { 2332 int ret; 2333 2334 if (argc < 1 || argc > 2) 2335 return CMD_RET_USAGE; 2336 2337 ret = rockchip_vop_dump(argv[1]); 2338 2339 return ret; 2340 } 2341 2342 U_BOOT_CMD( 2343 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2344 "load and display log from resource partition", 2345 NULL 2346 ); 2347 2348 U_BOOT_CMD( 2349 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2350 "load and display bmp from resource partition", 2351 " <bmp_name>" 2352 ); 2353 2354 U_BOOT_CMD( 2355 vop_dump, 2, 1, do_rockchip_vop_dump, 2356 "dump vop regs", 2357 " [a/all]" 2358 ); 2359