1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 static void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 static bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 343 * @p: mode 344 * @adjust_flags: a combination of adjustment flags 345 * 346 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 347 * 348 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 349 * interlaced modes. 350 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 351 * buffers containing two eyes (only adjust the timings when needed, eg. for 352 * "frame packing" or "side by side full"). 353 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 354 * be performed for doublescan and vscan > 1 modes respectively. 355 */ 356 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 357 { 358 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 359 return; 360 361 if (p->flags & DRM_MODE_FLAG_DBLCLK) 362 p->crtc_clock = 2 * p->clock; 363 else 364 p->crtc_clock = p->clock; 365 p->crtc_hdisplay = p->hdisplay; 366 p->crtc_hsync_start = p->hsync_start; 367 p->crtc_hsync_end = p->hsync_end; 368 p->crtc_htotal = p->htotal; 369 p->crtc_hskew = p->hskew; 370 p->crtc_vdisplay = p->vdisplay; 371 p->crtc_vsync_start = p->vsync_start; 372 p->crtc_vsync_end = p->vsync_end; 373 p->crtc_vtotal = p->vtotal; 374 375 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 376 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 377 p->crtc_vdisplay /= 2; 378 p->crtc_vsync_start /= 2; 379 p->crtc_vsync_end /= 2; 380 p->crtc_vtotal /= 2; 381 } 382 } 383 384 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 385 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 386 p->crtc_vdisplay *= 2; 387 p->crtc_vsync_start *= 2; 388 p->crtc_vsync_end *= 2; 389 p->crtc_vtotal *= 2; 390 } 391 } 392 393 if (!(adjust_flags & CRTC_NO_VSCAN)) { 394 if (p->vscan > 1) { 395 p->crtc_vdisplay *= p->vscan; 396 p->crtc_vsync_start *= p->vscan; 397 p->crtc_vsync_end *= p->vscan; 398 p->crtc_vtotal *= p->vscan; 399 } 400 } 401 402 if (adjust_flags & CRTC_STEREO_DOUBLE) { 403 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 404 405 switch (layout) { 406 case DRM_MODE_FLAG_3D_FRAME_PACKING: 407 p->crtc_clock *= 2; 408 p->crtc_vdisplay += p->crtc_vtotal; 409 p->crtc_vsync_start += p->crtc_vtotal; 410 p->crtc_vsync_end += p->crtc_vtotal; 411 p->crtc_vtotal += p->crtc_vtotal; 412 break; 413 } 414 } 415 416 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 417 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 418 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 419 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 420 } 421 422 /** 423 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 424 * output format 425 * 426 * @connector: drm connector under action. 427 * @mode: video mode to be tested. 428 * 429 * Returns: 430 * true if the mode can be supported in YCBCR420 format 431 * false if not. 432 */ 433 bool drm_mode_is_420_only(const struct drm_display_info *display, 434 struct drm_display_mode *mode) 435 { 436 u8 vic = drm_match_cea_mode(mode); 437 438 return test_bit(vic, display->hdmi.y420_vdb_modes); 439 } 440 441 /** 442 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 443 * output format also (along with RGB/YCBCR444/422) 444 * 445 * @display: display under action. 446 * @mode: video mode to be tested. 447 * 448 * Returns: 449 * true if the mode can be support YCBCR420 format 450 * false if not. 451 */ 452 bool drm_mode_is_420_also(const struct drm_display_info *display, 453 struct drm_display_mode *mode) 454 { 455 u8 vic = drm_match_cea_mode(mode); 456 457 return test_bit(vic, display->hdmi.y420_cmdb_modes); 458 } 459 460 /** 461 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 462 * output format 463 * 464 * @display: display under action. 465 * @mode: video mode to be tested. 466 * 467 * Returns: 468 * true if the mode can be supported in YCBCR420 format 469 * false if not. 470 */ 471 bool drm_mode_is_420(const struct drm_display_info *display, 472 struct drm_display_mode *mode) 473 { 474 return drm_mode_is_420_only(display, mode) || 475 drm_mode_is_420_also(display, mode); 476 } 477 478 static int display_get_timing(struct display_state *state) 479 { 480 struct connector_state *conn_state = &state->conn_state; 481 struct drm_display_mode *mode = &conn_state->mode; 482 const struct drm_display_mode *m; 483 struct panel_state *panel_state = &state->panel_state; 484 const struct rockchip_panel *panel = panel_state->panel; 485 486 if (dev_of_valid(panel->dev) && 487 !display_get_timing_from_dts(panel_state, mode)) { 488 printf("Using display timing dts\n"); 489 goto done; 490 } 491 492 if (panel->data) { 493 m = (const struct drm_display_mode *)panel->data; 494 memcpy(mode, m, sizeof(*m)); 495 printf("Using display timing from compatible panel driver\n"); 496 goto done; 497 } 498 499 printf("failed to find display timing\n"); 500 return -ENODEV; 501 done: 502 printf("Detailed mode clock %u kHz, flags[%x]\n" 503 " H: %04d %04d %04d %04d\n" 504 " V: %04d %04d %04d %04d\n" 505 "bus_format: %x\n", 506 mode->clock, mode->flags, 507 mode->hdisplay, mode->hsync_start, 508 mode->hsync_end, mode->htotal, 509 mode->vdisplay, mode->vsync_start, 510 mode->vsync_end, mode->vtotal, 511 conn_state->bus_format); 512 513 return 0; 514 } 515 516 static int display_init(struct display_state *state) 517 { 518 struct connector_state *conn_state = &state->conn_state; 519 struct panel_state *panel_state = &state->panel_state; 520 const struct rockchip_connector *conn = conn_state->connector; 521 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 522 struct crtc_state *crtc_state = &state->crtc_state; 523 struct rockchip_crtc *crtc = crtc_state->crtc; 524 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 525 struct drm_display_mode *mode = &conn_state->mode; 526 int bpc; 527 int ret = 0; 528 static bool __print_once = false; 529 530 if (!__print_once) { 531 __print_once = true; 532 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 533 } 534 535 if (state->is_init) 536 return 0; 537 538 if (!conn_funcs || !crtc_funcs) { 539 printf("failed to find connector or crtc functions\n"); 540 return -ENXIO; 541 } 542 543 if (panel_state->panel) 544 rockchip_panel_init(panel_state->panel); 545 546 if (conn_funcs->init) { 547 ret = conn_funcs->init(state); 548 if (ret) 549 goto deinit; 550 } 551 552 if (conn_state->phy) 553 rockchip_phy_init(conn_state->phy); 554 555 /* 556 * support hotplug, but not connect; 557 */ 558 #ifdef CONFIG_ROCKCHIP_DRM_TVE 559 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 560 printf("hdmi plugin ,skip tve\n"); 561 goto deinit; 562 } 563 #elif defined(CONFIG_ROCKCHIP_DRM_RK1000) 564 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 565 printf("hdmi plugin ,skip tve\n"); 566 goto deinit; 567 } 568 #endif 569 if (conn_funcs->detect) { 570 ret = conn_funcs->detect(state); 571 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_ROCKCHIP_DRM_RK1000) 572 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 573 crtc->hdmi_hpd = ret; 574 #endif 575 if (!ret) 576 goto deinit; 577 } 578 579 if (panel_state->panel) { 580 ret = display_get_timing(state); 581 } else if (conn_state->bridge) { 582 ret = video_bridge_read_edid(conn_state->bridge->dev, 583 conn_state->edid, EDID_SIZE); 584 if (ret > 0) { 585 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 586 &bpc); 587 if (!ret) 588 edid_print_info((void *)&conn_state->edid); 589 } 590 } else if (conn_funcs->get_timing) { 591 ret = conn_funcs->get_timing(state); 592 } else if (conn_funcs->get_edid) { 593 ret = conn_funcs->get_edid(state); 594 if (!ret) { 595 ret = edid_get_drm_mode((void *)&conn_state->edid, 596 sizeof(conn_state->edid), mode, 597 &bpc); 598 if (!ret) 599 edid_print_info((void *)&conn_state->edid); 600 } 601 } 602 603 if (ret) 604 goto deinit; 605 606 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 607 608 if (crtc_funcs->init) { 609 ret = crtc_funcs->init(state); 610 if (ret) 611 goto deinit; 612 } 613 state->is_init = 1; 614 615 return 0; 616 617 deinit: 618 if (conn_funcs->deinit) 619 conn_funcs->deinit(state); 620 return ret; 621 } 622 623 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 624 { 625 struct crtc_state *crtc_state = &state->crtc_state; 626 const struct rockchip_crtc *crtc = crtc_state->crtc; 627 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 628 int ret; 629 630 if (!state->is_init) 631 return -EINVAL; 632 633 if (crtc_funcs->send_mcu_cmd) { 634 ret = crtc_funcs->send_mcu_cmd(state, type, val); 635 if (ret) 636 return ret; 637 } 638 639 return 0; 640 } 641 642 static int display_set_plane(struct display_state *state) 643 { 644 struct crtc_state *crtc_state = &state->crtc_state; 645 const struct rockchip_crtc *crtc = crtc_state->crtc; 646 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 647 int ret; 648 649 if (!state->is_init) 650 return -EINVAL; 651 652 if (crtc_funcs->set_plane) { 653 ret = crtc_funcs->set_plane(state); 654 if (ret) 655 return ret; 656 } 657 658 return 0; 659 } 660 661 static int display_enable(struct display_state *state) 662 { 663 struct connector_state *conn_state = &state->conn_state; 664 const struct rockchip_connector *conn = conn_state->connector; 665 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 666 struct crtc_state *crtc_state = &state->crtc_state; 667 const struct rockchip_crtc *crtc = crtc_state->crtc; 668 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 669 struct panel_state *panel_state = &state->panel_state; 670 671 display_init(state); 672 673 if (!state->is_init) 674 return -EINVAL; 675 676 if (state->is_enable) 677 return 0; 678 679 if (crtc_funcs->prepare) 680 crtc_funcs->prepare(state); 681 682 if (conn_funcs->prepare) 683 conn_funcs->prepare(state); 684 685 if (conn_state->bridge) 686 rockchip_bridge_pre_enable(conn_state->bridge); 687 688 if (panel_state->panel) 689 rockchip_panel_prepare(panel_state->panel); 690 691 if (crtc_funcs->enable) 692 crtc_funcs->enable(state); 693 694 if (conn_funcs->enable) 695 conn_funcs->enable(state); 696 697 if (conn_state->bridge) 698 rockchip_bridge_enable(conn_state->bridge); 699 700 if (panel_state->panel) 701 rockchip_panel_enable(panel_state->panel); 702 703 state->is_enable = true; 704 705 return 0; 706 } 707 708 static int display_disable(struct display_state *state) 709 { 710 struct connector_state *conn_state = &state->conn_state; 711 const struct rockchip_connector *conn = conn_state->connector; 712 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 713 struct crtc_state *crtc_state = &state->crtc_state; 714 const struct rockchip_crtc *crtc = crtc_state->crtc; 715 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 716 struct panel_state *panel_state = &state->panel_state; 717 718 if (!state->is_init) 719 return 0; 720 721 if (!state->is_enable) 722 return 0; 723 724 if (panel_state->panel) 725 rockchip_panel_disable(panel_state->panel); 726 727 if (conn_state->bridge) 728 rockchip_bridge_disable(conn_state->bridge); 729 730 if (conn_funcs->disable) 731 conn_funcs->disable(state); 732 733 if (crtc_funcs->disable) 734 crtc_funcs->disable(state); 735 736 if (panel_state->panel) 737 rockchip_panel_unprepare(panel_state->panel); 738 739 if (conn_state->bridge) 740 rockchip_bridge_post_disable(conn_state->bridge); 741 742 if (conn_funcs->unprepare) 743 conn_funcs->unprepare(state); 744 745 state->is_enable = 0; 746 state->is_init = 0; 747 748 return 0; 749 } 750 751 static int display_logo(struct display_state *state) 752 { 753 struct crtc_state *crtc_state = &state->crtc_state; 754 struct connector_state *conn_state = &state->conn_state; 755 struct logo_info *logo = &state->logo; 756 int hdisplay, vdisplay; 757 758 display_init(state); 759 if (!state->is_init) 760 return -ENODEV; 761 762 switch (logo->bpp) { 763 case 16: 764 crtc_state->format = ROCKCHIP_FMT_RGB565; 765 break; 766 case 24: 767 crtc_state->format = ROCKCHIP_FMT_RGB888; 768 break; 769 case 32: 770 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 771 break; 772 default: 773 printf("can't support bmp bits[%d]\n", logo->bpp); 774 return -EINVAL; 775 } 776 crtc_state->rb_swap = logo->bpp != 32; 777 hdisplay = conn_state->mode.hdisplay; 778 vdisplay = conn_state->mode.vdisplay; 779 crtc_state->src_w = logo->width; 780 crtc_state->src_h = logo->height; 781 crtc_state->src_x = 0; 782 crtc_state->src_y = 0; 783 crtc_state->ymirror = logo->ymirror; 784 785 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 786 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 787 788 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 789 crtc_state->crtc_x = 0; 790 crtc_state->crtc_y = 0; 791 crtc_state->crtc_w = hdisplay; 792 crtc_state->crtc_h = vdisplay; 793 } else { 794 if (crtc_state->src_w >= hdisplay) { 795 crtc_state->crtc_x = 0; 796 crtc_state->crtc_w = hdisplay; 797 } else { 798 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 799 crtc_state->crtc_w = crtc_state->src_w; 800 } 801 802 if (crtc_state->src_h >= vdisplay) { 803 crtc_state->crtc_y = 0; 804 crtc_state->crtc_h = vdisplay; 805 } else { 806 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 807 crtc_state->crtc_h = crtc_state->src_h; 808 } 809 } 810 811 display_set_plane(state); 812 display_enable(state); 813 814 return 0; 815 } 816 817 static int get_crtc_id(ofnode connect) 818 { 819 int phandle; 820 struct device_node *remote; 821 int val; 822 823 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 824 if (phandle < 0) 825 goto err; 826 remote = of_find_node_by_phandle(phandle); 827 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 828 if (val < 0) 829 goto err; 830 831 return val; 832 err: 833 printf("Can't get crtc id, default set to id = 0\n"); 834 return 0; 835 } 836 837 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 838 { 839 ofnode mcu_node; 840 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 841 842 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 843 if (!ofnode_valid(mcu_node)) 844 return -ENODEV; 845 846 #define FDT_GET_MCU_INT(val, name) \ 847 do { \ 848 val = ofnode_read_s32_default(mcu_node, name, -1); \ 849 if (val < 0) { \ 850 printf("Can't get %s\n", name); \ 851 return -ENXIO; \ 852 } \ 853 } while (0) 854 855 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 856 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 857 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 858 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 859 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 860 861 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 862 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 863 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 864 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 865 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 866 867 return 0; 868 } 869 870 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 871 { 872 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 873 874 list_for_each_entry(tmp, &logo_cache_list, head) { 875 if (!strcmp(tmp->name, bmp)) { 876 logo_cache = tmp; 877 break; 878 } 879 } 880 881 if (!logo_cache) { 882 logo_cache = malloc(sizeof(*logo_cache)); 883 if (!logo_cache) { 884 printf("failed to alloc memory for logo cache\n"); 885 return NULL; 886 } 887 memset(logo_cache, 0, sizeof(*logo_cache)); 888 strcpy(logo_cache->name, bmp); 889 INIT_LIST_HEAD(&logo_cache->head); 890 list_add_tail(&logo_cache->head, &logo_cache_list); 891 } 892 893 return logo_cache; 894 } 895 896 /* Note: used only for rkfb kernel driver */ 897 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 898 { 899 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 900 void *dst = NULL; 901 int len, size; 902 struct bmp_header *header; 903 904 if (!logo || !bmp_name) 905 return -EINVAL; 906 907 header = malloc(RK_BLK_SIZE); 908 if (!header) 909 return -ENOMEM; 910 911 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 912 if (len != RK_BLK_SIZE) { 913 free(header); 914 return -EINVAL; 915 } 916 size = get_unaligned_le32(&header->file_size); 917 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 918 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 919 if (len != size) { 920 printf("failed to load bmp %s\n", bmp_name); 921 free(header); 922 return -ENOENT; 923 } 924 925 logo->mem = dst; 926 927 return 0; 928 #endif 929 } 930 931 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 932 { 933 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 934 struct rockchip_logo_cache *logo_cache; 935 struct bmp_header *header; 936 void *dst = NULL, *pdst; 937 int size, len; 938 int ret = 0; 939 int reserved = 0; 940 941 if (!logo || !bmp_name) 942 return -EINVAL; 943 logo_cache = find_or_alloc_logo_cache(bmp_name); 944 if (!logo_cache) 945 return -ENOMEM; 946 947 if (logo_cache->logo.mem) { 948 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 949 return 0; 950 } 951 952 header = malloc(RK_BLK_SIZE); 953 if (!header) 954 return -ENOMEM; 955 956 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 957 if (len != RK_BLK_SIZE) { 958 ret = -EINVAL; 959 goto free_header; 960 } 961 962 logo->bpp = get_unaligned_le16(&header->bit_count); 963 logo->width = get_unaligned_le32(&header->width); 964 logo->height = get_unaligned_le32(&header->height); 965 reserved = get_unaligned_le32(&header->reserved); 966 if (logo->height < 0) 967 logo->height = -logo->height; 968 size = get_unaligned_le32(&header->file_size); 969 if (!can_direct_logo(logo->bpp)) { 970 if (size > MEMORY_POOL_SIZE) { 971 printf("failed to use boot buf as temp bmp buffer\n"); 972 ret = -ENOMEM; 973 goto free_header; 974 } 975 pdst = get_display_buffer(size); 976 977 } else { 978 pdst = get_display_buffer(size); 979 dst = pdst; 980 } 981 982 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 983 if (len != size) { 984 printf("failed to load bmp %s\n", bmp_name); 985 ret = -ENOENT; 986 goto free_header; 987 } 988 989 if (!can_direct_logo(logo->bpp)) { 990 int dst_size; 991 /* 992 * TODO: force use 16bpp if bpp less than 16; 993 */ 994 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 995 dst_size = logo->width * logo->height * logo->bpp >> 3; 996 997 dst = get_display_buffer(dst_size); 998 if (!dst) { 999 ret = -ENOMEM; 1000 goto free_header; 1001 } 1002 if (bmpdecoder(pdst, dst, logo->bpp)) { 1003 printf("failed to decode bmp %s\n", bmp_name); 1004 ret = -EINVAL; 1005 goto free_header; 1006 } 1007 flush_dcache_range((ulong)dst, 1008 ALIGN((ulong)dst + dst_size, 1009 CONFIG_SYS_CACHELINE_SIZE)); 1010 1011 logo->offset = 0; 1012 logo->ymirror = 0; 1013 } else { 1014 logo->offset = get_unaligned_le32(&header->data_offset); 1015 if (reserved == BMP_PROCESSED_FLAG) 1016 logo->ymirror = 0; 1017 else 1018 logo->ymirror = 1; 1019 } 1020 logo->mem = dst; 1021 1022 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1023 1024 free_header: 1025 1026 free(header); 1027 1028 return ret; 1029 #else 1030 return -EINVAL; 1031 #endif 1032 } 1033 1034 void rockchip_show_fbbase(ulong fbbase) 1035 { 1036 struct display_state *s; 1037 1038 list_for_each_entry(s, &rockchip_display_list, head) { 1039 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1040 s->logo.mem = (char *)fbbase; 1041 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1042 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1043 s->logo.bpp = 32; 1044 s->logo.ymirror = 0; 1045 1046 display_logo(s); 1047 } 1048 } 1049 1050 int rockchip_show_bmp(const char *bmp) 1051 { 1052 struct display_state *s; 1053 int ret = 0; 1054 1055 if (!bmp) { 1056 list_for_each_entry(s, &rockchip_display_list, head) 1057 display_disable(s); 1058 return -ENOENT; 1059 } 1060 1061 list_for_each_entry(s, &rockchip_display_list, head) { 1062 s->logo.mode = s->charge_logo_mode; 1063 if (load_bmp_logo(&s->logo, bmp)) 1064 continue; 1065 ret = display_logo(s); 1066 } 1067 1068 return ret; 1069 } 1070 1071 int rockchip_show_logo(void) 1072 { 1073 struct display_state *s; 1074 int ret = 0; 1075 1076 list_for_each_entry(s, &rockchip_display_list, head) { 1077 s->logo.mode = s->logo_mode; 1078 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1079 printf("failed to display uboot logo\n"); 1080 else 1081 ret = display_logo(s); 1082 1083 /* Load kernel bmp in rockchip_display_fixup() later */ 1084 } 1085 1086 return ret; 1087 } 1088 1089 enum { 1090 PORT_DIR_IN, 1091 PORT_DIR_OUT, 1092 }; 1093 1094 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1095 { 1096 ofnode panel_node, ports, port, ep; 1097 struct udevice *panel_dev; 1098 int ret; 1099 1100 panel_node = dev_read_subnode(dev, "panel"); 1101 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1102 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1103 &panel_dev); 1104 if (!ret) 1105 goto found; 1106 } 1107 1108 ports = dev_read_subnode(dev, "ports"); 1109 if (!ofnode_valid(ports)) 1110 return NULL; 1111 1112 ofnode_for_each_subnode(port, ports) { 1113 u32 reg; 1114 1115 if (ofnode_read_u32(port, "reg", ®)) 1116 continue; 1117 1118 if (reg != PORT_DIR_OUT) 1119 continue; 1120 1121 ofnode_for_each_subnode(ep, port) { 1122 ofnode _ep, _port; 1123 uint phandle; 1124 1125 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1126 continue; 1127 1128 _ep = ofnode_get_by_phandle(phandle); 1129 if (!ofnode_valid(_ep)) 1130 continue; 1131 1132 _port = ofnode_get_parent(_ep); 1133 if (!ofnode_valid(_port)) 1134 continue; 1135 1136 panel_node = ofnode_get_parent(_port); 1137 if (!ofnode_valid(panel_node)) 1138 continue; 1139 1140 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1141 panel_node, 1142 &panel_dev); 1143 if (!ret) 1144 goto found; 1145 } 1146 } 1147 1148 return NULL; 1149 1150 found: 1151 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1152 } 1153 1154 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1155 { 1156 ofnode node, ports, port, ep; 1157 struct udevice *dev; 1158 int ret; 1159 1160 ports = dev_read_subnode(conn_dev, "ports"); 1161 if (!ofnode_valid(ports)) 1162 return NULL; 1163 1164 ofnode_for_each_subnode(port, ports) { 1165 u32 reg; 1166 1167 if (ofnode_read_u32(port, "reg", ®)) 1168 continue; 1169 1170 if (reg != PORT_DIR_OUT) 1171 continue; 1172 1173 ofnode_for_each_subnode(ep, port) { 1174 ofnode _ep, _port, _ports; 1175 uint phandle; 1176 1177 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1178 continue; 1179 1180 _ep = ofnode_get_by_phandle(phandle); 1181 if (!ofnode_valid(_ep)) 1182 continue; 1183 1184 _port = ofnode_get_parent(_ep); 1185 if (!ofnode_valid(_port)) 1186 continue; 1187 1188 _ports = ofnode_get_parent(_port); 1189 if (!ofnode_valid(_ports)) 1190 continue; 1191 1192 node = ofnode_get_parent(_ports); 1193 if (!ofnode_valid(node)) 1194 continue; 1195 1196 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1197 node, &dev); 1198 if (!ret) 1199 goto found; 1200 } 1201 } 1202 1203 return NULL; 1204 1205 found: 1206 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1207 } 1208 1209 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1210 { 1211 ofnode ep, port, ports, conn; 1212 uint phandle; 1213 struct udevice *dev; 1214 int ret; 1215 1216 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1217 return NULL; 1218 1219 ep = ofnode_get_by_phandle(phandle); 1220 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1221 return NULL; 1222 1223 port = ofnode_get_parent(ep); 1224 if (!ofnode_valid(port)) 1225 return NULL; 1226 1227 ports = ofnode_get_parent(port); 1228 if (!ofnode_valid(ports)) 1229 return NULL; 1230 1231 conn = ofnode_get_parent(ports); 1232 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1233 return NULL; 1234 1235 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1236 if (ret) 1237 return NULL; 1238 1239 return dev; 1240 } 1241 1242 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1243 { 1244 struct udevice *phy_dev; 1245 int ret; 1246 1247 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1248 if (ret) 1249 return NULL; 1250 1251 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1252 } 1253 1254 static int rockchip_display_probe(struct udevice *dev) 1255 { 1256 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1257 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1258 const void *blob = gd->fdt_blob; 1259 int phandle; 1260 struct udevice *crtc_dev, *conn_dev; 1261 struct rockchip_crtc *crtc; 1262 const struct rockchip_connector *conn; 1263 struct rockchip_panel *panel = NULL; 1264 struct rockchip_bridge *bridge = NULL; 1265 struct rockchip_phy *phy = NULL; 1266 struct display_state *s; 1267 const char *name; 1268 int ret; 1269 ofnode node, route_node; 1270 struct device_node *port_node, *vop_node, *ep_node; 1271 struct public_phy_data *data; 1272 1273 /* Before relocation we don't need to do anything */ 1274 if (!(gd->flags & GD_FLG_RELOC)) 1275 return 0; 1276 1277 data = malloc(sizeof(struct public_phy_data)); 1278 if (!data) { 1279 printf("failed to alloc phy data\n"); 1280 return -ENOMEM; 1281 } 1282 data->phy_init = false; 1283 1284 init_display_buffer(plat->base); 1285 1286 route_node = dev_read_subnode(dev, "route"); 1287 if (!ofnode_valid(route_node)) 1288 return -ENODEV; 1289 1290 ofnode_for_each_subnode(node, route_node) { 1291 if (!ofnode_is_available(node)) 1292 continue; 1293 phandle = ofnode_read_u32_default(node, "connect", -1); 1294 if (phandle < 0) { 1295 printf("Warn: can't find connect node's handle\n"); 1296 continue; 1297 } 1298 ep_node = of_find_node_by_phandle(phandle); 1299 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1300 printf("Warn: can't find endpoint node from phandle\n"); 1301 continue; 1302 } 1303 port_node = of_get_parent(ep_node); 1304 if (!ofnode_valid(np_to_ofnode(port_node))) { 1305 printf("Warn: can't find port node from phandle\n"); 1306 continue; 1307 } 1308 vop_node = of_get_parent(port_node); 1309 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1310 printf("Warn: can't find crtc node from phandle\n"); 1311 continue; 1312 } 1313 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1314 np_to_ofnode(vop_node), 1315 &crtc_dev); 1316 if (ret) { 1317 printf("Warn: can't find crtc driver %d\n", ret); 1318 continue; 1319 } 1320 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1321 1322 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1323 if (!conn_dev) { 1324 printf("Warn: can't find connect driver\n"); 1325 continue; 1326 } 1327 1328 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1329 1330 phy = rockchip_of_find_phy(conn_dev); 1331 1332 bridge = rockchip_of_find_bridge(conn_dev); 1333 if (bridge) 1334 panel = rockchip_of_find_panel(bridge->dev); 1335 else 1336 panel = rockchip_of_find_panel(conn_dev); 1337 1338 s = malloc(sizeof(*s)); 1339 if (!s) 1340 continue; 1341 1342 memset(s, 0, sizeof(*s)); 1343 1344 INIT_LIST_HEAD(&s->head); 1345 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1346 if (!ret) 1347 memcpy(s->ulogo_name, name, strlen(name)); 1348 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1349 if (!ret) 1350 memcpy(s->klogo_name, name, strlen(name)); 1351 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1352 if (!strcmp(name, "fullscreen")) 1353 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1354 else 1355 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1356 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1357 if (!strcmp(name, "fullscreen")) 1358 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1359 else 1360 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1361 1362 s->blob = blob; 1363 s->panel_state.panel = panel; 1364 s->conn_state.node = conn_dev->node; 1365 s->conn_state.dev = conn_dev; 1366 s->conn_state.connector = conn; 1367 s->conn_state.phy = phy; 1368 s->conn_state.bridge = bridge; 1369 s->conn_state.overscan.left_margin = 100; 1370 s->conn_state.overscan.right_margin = 100; 1371 s->conn_state.overscan.top_margin = 100; 1372 s->conn_state.overscan.bottom_margin = 100; 1373 s->crtc_state.node = np_to_ofnode(vop_node); 1374 s->crtc_state.dev = crtc_dev; 1375 s->crtc_state.crtc = crtc; 1376 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1377 s->node = node; 1378 1379 if (bridge) 1380 bridge->state = s; 1381 1382 if (panel) 1383 panel->state = s; 1384 1385 get_crtc_mcu_mode(&s->crtc_state); 1386 1387 if (connector_panel_init(s)) { 1388 printf("Warn: Failed to init panel drivers\n"); 1389 free(s); 1390 continue; 1391 } 1392 1393 if (connector_phy_init(s, data)) { 1394 printf("Warn: Failed to init phy drivers\n"); 1395 free(s); 1396 continue; 1397 } 1398 list_add_tail(&s->head, &rockchip_display_list); 1399 } 1400 1401 if (list_empty(&rockchip_display_list)) { 1402 printf("Failed to found available display route\n"); 1403 return -ENODEV; 1404 } 1405 1406 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1407 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1408 uc_priv->bpix = VIDEO_BPP32; 1409 1410 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1411 rockchip_show_fbbase(plat->base); 1412 video_set_flush_dcache(dev, true); 1413 #endif 1414 1415 return 0; 1416 } 1417 1418 void rockchip_display_fixup(void *blob) 1419 { 1420 const struct rockchip_connector_funcs *conn_funcs; 1421 const struct rockchip_crtc_funcs *crtc_funcs; 1422 const struct rockchip_connector *conn; 1423 const struct rockchip_crtc *crtc; 1424 struct display_state *s; 1425 int offset; 1426 const struct device_node *np; 1427 const char *path; 1428 1429 if (!get_display_size()) 1430 return; 1431 1432 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1433 list_for_each_entry(s, &rockchip_display_list, head) 1434 load_bmp_logo(&s->logo, s->klogo_name); 1435 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1436 (u64)memory_start, 1437 (u64)get_display_size()); 1438 if (offset < 0) 1439 printf("failed to reserve drm-loader-logo memory\n"); 1440 } else { 1441 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1442 /* Compatible with rkfb display, only need reserve memory */ 1443 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1444 (u64)memory_start, 1445 MEMORY_POOL_SIZE); 1446 if (offset < 0) 1447 printf("failed to reserve fb-loader-logo memory\n"); 1448 else 1449 list_for_each_entry(s, &rockchip_display_list, head) 1450 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1451 return; 1452 } 1453 1454 list_for_each_entry(s, &rockchip_display_list, head) { 1455 conn = s->conn_state.connector; 1456 if (!conn) 1457 continue; 1458 conn_funcs = conn->funcs; 1459 if (!conn_funcs) { 1460 printf("failed to get exist connector\n"); 1461 continue; 1462 } 1463 1464 crtc = s->crtc_state.crtc; 1465 if (!crtc) 1466 continue; 1467 1468 crtc_funcs = crtc->funcs; 1469 if (!crtc_funcs) { 1470 printf("failed to get exist crtc\n"); 1471 continue; 1472 } 1473 1474 if (crtc_funcs->fixup_dts) 1475 crtc_funcs->fixup_dts(s, blob); 1476 1477 if (conn_funcs->fixup_dts) 1478 conn_funcs->fixup_dts(s, blob); 1479 1480 np = ofnode_to_np(s->node); 1481 path = np->full_name; 1482 fdt_increase_size(blob, 0x400); 1483 #define FDT_SET_U32(name, val) \ 1484 do_fixup_by_path_u32(blob, path, name, val, 1); 1485 1486 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1487 - memory_start; 1488 FDT_SET_U32("logo,offset", offset); 1489 FDT_SET_U32("logo,width", s->logo.width); 1490 FDT_SET_U32("logo,height", s->logo.height); 1491 FDT_SET_U32("logo,bpp", s->logo.bpp); 1492 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1493 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1494 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1495 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1496 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1497 FDT_SET_U32("video,vrefresh", 1498 drm_mode_vrefresh(&s->conn_state.mode)); 1499 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1500 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1501 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1502 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1503 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1504 #undef FDT_SET_U32 1505 } 1506 } 1507 1508 int rockchip_display_bind(struct udevice *dev) 1509 { 1510 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1511 1512 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1513 1514 return 0; 1515 } 1516 1517 static const struct udevice_id rockchip_display_ids[] = { 1518 { .compatible = "rockchip,display-subsystem" }, 1519 { } 1520 }; 1521 1522 U_BOOT_DRIVER(rockchip_display) = { 1523 .name = "rockchip_display", 1524 .id = UCLASS_VIDEO, 1525 .of_match = rockchip_display_ids, 1526 .bind = rockchip_display_bind, 1527 .probe = rockchip_display_probe, 1528 }; 1529 1530 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1531 char *const argv[]) 1532 { 1533 if (argc != 1) 1534 return CMD_RET_USAGE; 1535 1536 rockchip_show_logo(); 1537 1538 return 0; 1539 } 1540 1541 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1542 char *const argv[]) 1543 { 1544 if (argc != 2) 1545 return CMD_RET_USAGE; 1546 1547 rockchip_show_bmp(argv[1]); 1548 1549 return 0; 1550 } 1551 1552 U_BOOT_CMD( 1553 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1554 "load and display log from resource partition", 1555 NULL 1556 ); 1557 1558 U_BOOT_CMD( 1559 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1560 "load and display bmp from resource partition", 1561 " <bmp_name>" 1562 ); 1563