xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision e091b6c996a68a6a0faa2bd3ffdd90b3ba5f44ce)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <config.h>
9 #include <common.h>
10 #include <errno.h>
11 #include <linux/libfdt.h>
12 #include <fdtdec.h>
13 #include <fdt_support.h>
14 #include <linux/hdmi.h>
15 #include <linux/list.h>
16 #include <linux/compat.h>
17 #include <linux/media-bus-format.h>
18 #include <malloc.h>
19 #include <video.h>
20 #include <video_rockchip.h>
21 #include <video_bridge.h>
22 #include <dm/device.h>
23 #include <dm/uclass-internal.h>
24 #include <asm/arch-rockchip/resource_img.h>
25 
26 #include "bmp_helper.h"
27 #include "rockchip_display.h"
28 #include "rockchip_crtc.h"
29 #include "rockchip_connector.h"
30 #include "rockchip_bridge.h"
31 #include "rockchip_phy.h"
32 #include "rockchip_panel.h"
33 #include <dm.h>
34 #include <dm/of_access.h>
35 #include <dm/ofnode.h>
36 #include <asm/io.h>
37 
38 #define DRIVER_VERSION	"v1.0.1"
39 
40 /***********************************************************************
41  *  Rockchip UBOOT DRM driver version
42  *
43  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
44  *  v1.0.1	: add much dsi update(hjc)
45  *
46  **********************************************************************/
47 
48 #define RK_BLK_SIZE 512
49 #define BMP_PROCESSED_FLAG 8399
50 
51 DECLARE_GLOBAL_DATA_PTR;
52 static LIST_HEAD(rockchip_display_list);
53 static LIST_HEAD(logo_cache_list);
54 
55 static unsigned long memory_start;
56 static unsigned long memory_end;
57 
58 /*
59  * the phy types are used by different connectors in public.
60  * The current version only has inno hdmi phy for hdmi and tve.
61  */
62 enum public_use_phy {
63 	NONE,
64 	INNO_HDMI_PHY
65 };
66 
67 /* save public phy data */
68 struct public_phy_data {
69 	const struct rockchip_phy *phy_drv;
70 	int phy_node;
71 	int public_phy_type;
72 	bool phy_init;
73 };
74 
75 /* check which kind of public phy does connector use */
76 static int check_public_use_phy(struct display_state *state)
77 {
78 	int ret = NONE;
79 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
80 	struct connector_state *conn_state = &state->conn_state;
81 
82 	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
83 	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
84 		ret = INNO_HDMI_PHY;
85 #endif
86 
87 	return ret;
88 }
89 
90 /*
91  * get public phy driver and initialize it.
92  * The current version only has inno hdmi phy for hdmi and tve.
93  */
94 static int get_public_phy(struct display_state *state,
95 			  struct public_phy_data *data)
96 {
97 	struct connector_state *conn_state = &state->conn_state;
98 	struct rockchip_phy *phy;
99 	struct udevice *dev;
100 	int ret = 0;
101 
102 	switch (data->public_phy_type) {
103 	case INNO_HDMI_PHY:
104 #if defined(CONFIG_ROCKCHIP_RK3328)
105 		ret = uclass_get_device_by_name(UCLASS_PHY,
106 						"hdmiphy@ff430000", &dev);
107 #elif defined(CONFIG_ROCKCHIP_RK322X)
108 		ret = uclass_get_device_by_name(UCLASS_PHY,
109 						"hdmi-phy@12030000", &dev);
110 #else
111 		ret = -EINVAL;
112 #endif
113 		if (ret) {
114 			printf("Warn: can't find phy driver\n");
115 			return 0;
116 		}
117 
118 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
119 		if (!phy) {
120 			printf("failed to get phy driver\n");
121 			return 0;
122 		}
123 
124 		ret = rockchip_phy_init(phy);
125 		if (ret) {
126 			printf("failed to init phy driver\n");
127 			return ret;
128 		}
129 		conn_state->phy = phy;
130 
131 		debug("inno hdmi phy init success, save it\n");
132 		data->phy_drv = conn_state->phy;
133 		data->phy_init = true;
134 		return 0;
135 	default:
136 		return -EINVAL;
137 	}
138 }
139 
140 static void init_display_buffer(ulong base)
141 {
142 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
143 	memory_end = memory_start;
144 }
145 
146 void *get_display_buffer(int size)
147 {
148 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
149 	void *buf;
150 
151 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
152 		printf("failed to alloc %dbyte memory to display\n", size);
153 		return NULL;
154 	}
155 	buf = (void *)roundup_memory;
156 
157 	memory_end = roundup_memory + size;
158 
159 	return buf;
160 }
161 
162 static unsigned long get_display_size(void)
163 {
164 	return memory_end - memory_start;
165 }
166 
167 bool can_direct_logo(int bpp)
168 {
169 	return bpp == 24 || bpp == 32;
170 }
171 
172 static int connector_phy_init(struct display_state *state,
173 			      struct public_phy_data *data)
174 {
175 	struct connector_state *conn_state = &state->conn_state;
176 	int type;
177 
178 	/* does this connector use public phy with others */
179 	type = check_public_use_phy(state);
180 	if (type == INNO_HDMI_PHY) {
181 		/* there is no public phy was initialized */
182 		if (!data->phy_init) {
183 			debug("start get public phy\n");
184 			data->public_phy_type = type;
185 			if (get_public_phy(state, data)) {
186 				printf("can't find correct public phy type\n");
187 				free(data);
188 				return -EINVAL;
189 			}
190 			return 0;
191 		}
192 
193 		/* if this phy has been initialized, get it directly */
194 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
195 		return 0;
196 	}
197 
198 	return 0;
199 }
200 
201 static int connector_panel_init(struct display_state *state)
202 {
203 	struct connector_state *conn_state = &state->conn_state;
204 	struct panel_state *panel_state = &state->panel_state;
205 	const struct rockchip_panel *panel = panel_state->panel;
206 	ofnode dsp_lut_node;
207 	int ret, len;
208 
209 	if (!panel)
210 		return 0;
211 
212 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
213 	if (!ofnode_valid(dsp_lut_node)) {
214 		debug("%s can not find dsp-lut node\n", __func__);
215 		return 0;
216 	}
217 
218 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
219 	if (len > 0) {
220 		conn_state->gamma.size = len / sizeof(u32);
221 		conn_state->gamma.lut = malloc(len);
222 		if (!conn_state->gamma.lut) {
223 			printf("malloc gamma lut failed\n");
224 			return -ENOMEM;
225 		}
226 		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
227 					    conn_state->gamma.lut,
228 					    conn_state->gamma.size);
229 		if (ret) {
230 			printf("Cannot decode gamma_lut\n");
231 			conn_state->gamma.lut = NULL;
232 			return -EINVAL;
233 		}
234 		panel_state->dsp_lut_node = dsp_lut_node;
235 	}
236 
237 	return 0;
238 }
239 
240 int drm_mode_vrefresh(const struct drm_display_mode *mode)
241 {
242 	int refresh = 0;
243 	unsigned int calc_val;
244 
245 	if (mode->vrefresh > 0) {
246 		refresh = mode->vrefresh;
247 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
248 		int vtotal;
249 
250 		vtotal = mode->vtotal;
251 		/* work out vrefresh the value will be x1000 */
252 		calc_val = (mode->clock * 1000);
253 		calc_val /= mode->htotal;
254 		refresh = (calc_val + vtotal / 2) / vtotal;
255 
256 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
257 			refresh *= 2;
258 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
259 			refresh /= 2;
260 		if (mode->vscan > 1)
261 			refresh /= mode->vscan;
262 	}
263 	return refresh;
264 }
265 
266 static int display_get_timing_from_dts(struct panel_state *panel_state,
267 				       struct drm_display_mode *mode)
268 {
269 	struct rockchip_panel *panel = panel_state->panel;
270 	int phandle;
271 	int hactive, vactive, pixelclock;
272 	int hfront_porch, hback_porch, hsync_len;
273 	int vfront_porch, vback_porch, vsync_len;
274 	int val, flags = 0;
275 	ofnode timing, native_mode;
276 
277 	timing = dev_read_subnode(panel->dev, "display-timings");
278 	if (!ofnode_valid(timing))
279 		return -ENODEV;
280 
281 	native_mode = ofnode_find_subnode(timing, "timing");
282 	if (!ofnode_valid(native_mode)) {
283 		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
284 		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
285 		if (!ofnode_valid(native_mode)) {
286 			printf("failed to get display timings from DT\n");
287 			return -ENXIO;
288 		}
289 	}
290 
291 #define FDT_GET_INT(val, name) \
292 	val = ofnode_read_s32_default(native_mode, name, -1); \
293 	if (val < 0) { \
294 		printf("Can't get %s\n", name); \
295 		return -ENXIO; \
296 	}
297 
298 #define FDT_GET_INT_DEFAULT(val, name, default) \
299 	val = ofnode_read_s32_default(native_mode, name, default);
300 
301 	FDT_GET_INT(hactive, "hactive");
302 	FDT_GET_INT(vactive, "vactive");
303 	FDT_GET_INT(pixelclock, "clock-frequency");
304 	FDT_GET_INT(hsync_len, "hsync-len");
305 	FDT_GET_INT(hfront_porch, "hfront-porch");
306 	FDT_GET_INT(hback_porch, "hback-porch");
307 	FDT_GET_INT(vsync_len, "vsync-len");
308 	FDT_GET_INT(vfront_porch, "vfront-porch");
309 	FDT_GET_INT(vback_porch, "vback-porch");
310 	FDT_GET_INT(val, "hsync-active");
311 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
312 	FDT_GET_INT(val, "vsync-active");
313 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
314 	FDT_GET_INT(val, "pixelclk-active");
315 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
316 
317 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
318 	if (val == DRM_MODE_FLAG_XMIRROR) {
319 		flags |= DRM_MODE_FLAG_XMIRROR;
320 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
321 		flags |= DRM_MODE_FLAG_YMIRROR;
322 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
323 		flags |= DRM_MODE_FLAG_XMIRROR;
324 		flags |= DRM_MODE_FLAG_YMIRROR;
325 	}
326 	mode->hdisplay = hactive;
327 	mode->hsync_start = mode->hdisplay + hfront_porch;
328 	mode->hsync_end = mode->hsync_start + hsync_len;
329 	mode->htotal = mode->hsync_end + hback_porch;
330 
331 	mode->vdisplay = vactive;
332 	mode->vsync_start = mode->vdisplay + vfront_porch;
333 	mode->vsync_end = mode->vsync_start + vsync_len;
334 	mode->vtotal = mode->vsync_end + vback_porch;
335 
336 	mode->clock = pixelclock / 1000;
337 	mode->flags = flags;
338 
339 	return 0;
340 }
341 
342 /**
343  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
344  * @edid_data: structure store mode list
345  * @max_output: vop max output resolution
346  */
347 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
348 				    struct vop_rect *max_output)
349 {
350 	int i;
351 
352 	for (i = 0; i < edid_data->modes; i++) {
353 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
354 		    edid_data->mode_buf[i].vdisplay > max_output->height)
355 			edid_data->mode_buf[i].invalid = true;
356 	}
357 }
358 
359 /**
360  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
361  * @p: mode
362  * @adjust_flags: a combination of adjustment flags
363  *
364  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
365  *
366  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
367  *   interlaced modes.
368  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
369  *   buffers containing two eyes (only adjust the timings when needed, eg. for
370  *   "frame packing" or "side by side full").
371  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
372  *   be performed for doublescan and vscan > 1 modes respectively.
373  */
374 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
375 {
376 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
377 		return;
378 
379 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
380 		p->crtc_clock = 2 * p->clock;
381 	else
382 		p->crtc_clock = p->clock;
383 	p->crtc_hdisplay = p->hdisplay;
384 	p->crtc_hsync_start = p->hsync_start;
385 	p->crtc_hsync_end = p->hsync_end;
386 	p->crtc_htotal = p->htotal;
387 	p->crtc_hskew = p->hskew;
388 	p->crtc_vdisplay = p->vdisplay;
389 	p->crtc_vsync_start = p->vsync_start;
390 	p->crtc_vsync_end = p->vsync_end;
391 	p->crtc_vtotal = p->vtotal;
392 
393 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
394 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
395 			p->crtc_vdisplay /= 2;
396 			p->crtc_vsync_start /= 2;
397 			p->crtc_vsync_end /= 2;
398 			p->crtc_vtotal /= 2;
399 		}
400 	}
401 
402 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
403 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
404 			p->crtc_vdisplay *= 2;
405 			p->crtc_vsync_start *= 2;
406 			p->crtc_vsync_end *= 2;
407 			p->crtc_vtotal *= 2;
408 		}
409 	}
410 
411 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
412 		if (p->vscan > 1) {
413 			p->crtc_vdisplay *= p->vscan;
414 			p->crtc_vsync_start *= p->vscan;
415 			p->crtc_vsync_end *= p->vscan;
416 			p->crtc_vtotal *= p->vscan;
417 		}
418 	}
419 
420 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
421 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
422 
423 		switch (layout) {
424 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
425 			p->crtc_clock *= 2;
426 			p->crtc_vdisplay += p->crtc_vtotal;
427 			p->crtc_vsync_start += p->crtc_vtotal;
428 			p->crtc_vsync_end += p->crtc_vtotal;
429 			p->crtc_vtotal += p->crtc_vtotal;
430 			break;
431 		}
432 	}
433 
434 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
435 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
436 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
437 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
438 }
439 
440 /**
441  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
442  * output format
443  *
444  * @connector: drm connector under action.
445  * @mode: video mode to be tested.
446  *
447  * Returns:
448  * true if the mode can be supported in YCBCR420 format
449  * false if not.
450  */
451 bool drm_mode_is_420_only(const struct drm_display_info *display,
452 			  struct drm_display_mode *mode)
453 {
454 	u8 vic = drm_match_cea_mode(mode);
455 
456 	return test_bit(vic, display->hdmi.y420_vdb_modes);
457 }
458 
459 /**
460  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
461  * output format also (along with RGB/YCBCR444/422)
462  *
463  * @display: display under action.
464  * @mode: video mode to be tested.
465  *
466  * Returns:
467  * true if the mode can be support YCBCR420 format
468  * false if not.
469  */
470 bool drm_mode_is_420_also(const struct drm_display_info *display,
471 			  struct drm_display_mode *mode)
472 {
473 	u8 vic = drm_match_cea_mode(mode);
474 
475 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
476 }
477 
478 /**
479  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
480  * output format
481  *
482  * @display: display under action.
483  * @mode: video mode to be tested.
484  *
485  * Returns:
486  * true if the mode can be supported in YCBCR420 format
487  * false if not.
488  */
489 bool drm_mode_is_420(const struct drm_display_info *display,
490 		     struct drm_display_mode *mode)
491 {
492 	return drm_mode_is_420_only(display, mode) ||
493 		drm_mode_is_420_also(display, mode);
494 }
495 
496 static int display_get_timing(struct display_state *state)
497 {
498 	struct connector_state *conn_state = &state->conn_state;
499 	struct drm_display_mode *mode = &conn_state->mode;
500 	const struct drm_display_mode *m;
501 	struct panel_state *panel_state = &state->panel_state;
502 	const struct rockchip_panel *panel = panel_state->panel;
503 
504 	if (dev_of_valid(panel->dev) &&
505 	    !display_get_timing_from_dts(panel_state, mode)) {
506 		printf("Using display timing dts\n");
507 		return 0;
508 	}
509 
510 	if (panel->data) {
511 		m = (const struct drm_display_mode *)panel->data;
512 		memcpy(mode, m, sizeof(*m));
513 		printf("Using display timing from compatible panel driver\n");
514 		return 0;
515 	}
516 
517 	return -ENODEV;
518 }
519 
520 static int display_init(struct display_state *state)
521 {
522 	struct connector_state *conn_state = &state->conn_state;
523 	struct panel_state *panel_state = &state->panel_state;
524 	const struct rockchip_connector *conn = conn_state->connector;
525 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
526 	struct crtc_state *crtc_state = &state->crtc_state;
527 	struct rockchip_crtc *crtc = crtc_state->crtc;
528 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
529 	struct drm_display_mode *mode = &conn_state->mode;
530 	const char *compatible;
531 	int ret = 0;
532 	static bool __print_once = false;
533 #if defined(CONFIG_I2C_EDID)
534 	int bpc;
535 #endif
536 	if (!__print_once) {
537 		__print_once = true;
538 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
539 	}
540 
541 	if (state->is_init)
542 		return 0;
543 
544 	if (!conn_funcs || !crtc_funcs) {
545 		printf("failed to find connector or crtc functions\n");
546 		return -ENXIO;
547 	}
548 
549 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
550 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
551 		   sizeof(struct drm_display_mode))) {
552 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
553 			crtc_state->dev->name,
554 			crtc_state->crtc->active_mode.type,
555 			crtc_state->crtc->active_mode.hdisplay,
556 			crtc_state->crtc->active_mode.vdisplay,
557 			crtc_state->crtc->active_mode.vrefresh);
558 		return -ENODEV;
559 	}
560 
561 	if (crtc_funcs->preinit) {
562 		ret = crtc_funcs->preinit(state);
563 		if (ret)
564 			return ret;
565 	}
566 
567 	if (panel_state->panel)
568 		rockchip_panel_init(panel_state->panel);
569 
570 	if (conn_funcs->init) {
571 		ret = conn_funcs->init(state);
572 		if (ret)
573 			goto deinit;
574 	}
575 
576 	if (conn_state->phy)
577 		rockchip_phy_init(conn_state->phy);
578 
579 	/*
580 	 * support hotplug, but not connect;
581 	 */
582 #ifdef CONFIG_ROCKCHIP_DRM_TVE
583 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
584 		printf("hdmi plugin ,skip tve\n");
585 		goto deinit;
586 	}
587 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
588 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
589 		printf("hdmi plugin ,skip tve\n");
590 		goto deinit;
591 	}
592 #endif
593 	if (conn_funcs->detect) {
594 		ret = conn_funcs->detect(state);
595 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
596 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
597 			crtc->hdmi_hpd = ret;
598 #endif
599 		if (!ret)
600 			goto deinit;
601 	}
602 
603 	if (panel_state->panel) {
604 		ret = display_get_timing(state);
605 		if (!ret)
606 			conn_state->bpc = panel_state->panel->bpc;
607 #if defined(CONFIG_I2C_EDID)
608 		if (ret < 0 && conn_funcs->get_edid) {
609 			rockchip_panel_prepare(panel_state->panel);
610 
611 			ret = conn_funcs->get_edid(state);
612 			if (!ret) {
613 				ret = edid_get_drm_mode((void *)&conn_state->edid,
614 							sizeof(conn_state->edid),
615 							mode, &bpc);
616 				if (!ret) {
617 					conn_state->bpc = bpc;
618 					edid_print_info((void *)&conn_state->edid);
619 				}
620 			}
621 		}
622 #endif
623 	} else if (conn_state->bridge) {
624 		ret = video_bridge_read_edid(conn_state->bridge->dev,
625 					     conn_state->edid, EDID_SIZE);
626 		if (ret > 0) {
627 #if defined(CONFIG_I2C_EDID)
628 			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
629 						&bpc);
630 			if (!ret) {
631 				conn_state->bpc = bpc;
632 				edid_print_info((void *)&conn_state->edid);
633 			}
634 #endif
635 		} else {
636 			ret = video_bridge_get_timing(conn_state->bridge->dev);
637 		}
638 	} else if (conn_funcs->get_timing) {
639 		ret = conn_funcs->get_timing(state);
640 	} else if (conn_funcs->get_edid) {
641 		ret = conn_funcs->get_edid(state);
642 #if defined(CONFIG_I2C_EDID)
643 		if (!ret) {
644 			ret = edid_get_drm_mode((void *)&conn_state->edid,
645 						sizeof(conn_state->edid), mode,
646 						&bpc);
647 			if (!ret) {
648 				conn_state->bpc = bpc;
649 				edid_print_info((void *)&conn_state->edid);
650 			}
651 		}
652 #endif
653 	}
654 
655 	if (ret)
656 		goto deinit;
657 
658 	/* rk356x series drive mipi pixdata on posedge */
659 	compatible = dev_read_string(conn_state->dev, "compatible");
660 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
661 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
662 
663 	printf("Detailed mode clock %u kHz, flags[%x]\n"
664 	       "    H: %04d %04d %04d %04d\n"
665 	       "    V: %04d %04d %04d %04d\n"
666 	       "bus_format: %x\n",
667 	       mode->clock, mode->flags,
668 	       mode->hdisplay, mode->hsync_start,
669 	       mode->hsync_end, mode->htotal,
670 	       mode->vdisplay, mode->vsync_start,
671 	       mode->vsync_end, mode->vtotal,
672 	       conn_state->bus_format);
673 
674 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
675 
676 	if (conn_state->bridge)
677 		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
678 
679 	if (crtc_funcs->init) {
680 		ret = crtc_funcs->init(state);
681 		if (ret)
682 			goto deinit;
683 	}
684 	state->is_init = 1;
685 
686 	crtc_state->crtc->active = true;
687 	memcpy(&crtc_state->crtc->active_mode,
688 	       &conn_state->mode, sizeof(struct drm_display_mode));
689 
690 	return 0;
691 
692 deinit:
693 	if (conn_funcs->deinit)
694 		conn_funcs->deinit(state);
695 	return ret;
696 }
697 
698 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
699 {
700 	struct crtc_state *crtc_state = &state->crtc_state;
701 	const struct rockchip_crtc *crtc = crtc_state->crtc;
702 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
703 	int ret;
704 
705 	if (!state->is_init)
706 		return -EINVAL;
707 
708 	if (crtc_funcs->send_mcu_cmd) {
709 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
710 		if (ret)
711 			return ret;
712 	}
713 
714 	return 0;
715 }
716 
717 static int display_set_plane(struct display_state *state)
718 {
719 	struct crtc_state *crtc_state = &state->crtc_state;
720 	const struct rockchip_crtc *crtc = crtc_state->crtc;
721 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
722 	int ret;
723 
724 	if (!state->is_init)
725 		return -EINVAL;
726 
727 	if (crtc_funcs->set_plane) {
728 		ret = crtc_funcs->set_plane(state);
729 		if (ret)
730 			return ret;
731 	}
732 
733 	return 0;
734 }
735 
736 static int display_enable(struct display_state *state)
737 {
738 	struct connector_state *conn_state = &state->conn_state;
739 	const struct rockchip_connector *conn = conn_state->connector;
740 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
741 	struct crtc_state *crtc_state = &state->crtc_state;
742 	const struct rockchip_crtc *crtc = crtc_state->crtc;
743 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
744 	struct panel_state *panel_state = &state->panel_state;
745 
746 	if (!state->is_init)
747 		return -EINVAL;
748 
749 	if (state->is_enable)
750 		return 0;
751 
752 	if (crtc_funcs->prepare)
753 		crtc_funcs->prepare(state);
754 
755 	if (conn_funcs->prepare)
756 		conn_funcs->prepare(state);
757 
758 	if (conn_state->bridge)
759 		rockchip_bridge_pre_enable(conn_state->bridge);
760 
761 	if (panel_state->panel)
762 		rockchip_panel_prepare(panel_state->panel);
763 
764 	if (crtc_funcs->enable)
765 		crtc_funcs->enable(state);
766 
767 	if (conn_funcs->enable)
768 		conn_funcs->enable(state);
769 
770 	if (conn_state->bridge)
771 		rockchip_bridge_enable(conn_state->bridge);
772 
773 	if (panel_state->panel)
774 		rockchip_panel_enable(panel_state->panel);
775 
776 	state->is_enable = true;
777 
778 	return 0;
779 }
780 
781 static int display_disable(struct display_state *state)
782 {
783 	struct connector_state *conn_state = &state->conn_state;
784 	const struct rockchip_connector *conn = conn_state->connector;
785 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
786 	struct crtc_state *crtc_state = &state->crtc_state;
787 	const struct rockchip_crtc *crtc = crtc_state->crtc;
788 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
789 	struct panel_state *panel_state = &state->panel_state;
790 
791 	if (!state->is_init)
792 		return 0;
793 
794 	if (!state->is_enable)
795 		return 0;
796 
797 	if (panel_state->panel)
798 		rockchip_panel_disable(panel_state->panel);
799 
800 	if (conn_state->bridge)
801 		rockchip_bridge_disable(conn_state->bridge);
802 
803 	if (conn_funcs->disable)
804 		conn_funcs->disable(state);
805 
806 	if (crtc_funcs->disable)
807 		crtc_funcs->disable(state);
808 
809 	if (panel_state->panel)
810 		rockchip_panel_unprepare(panel_state->panel);
811 
812 	if (conn_state->bridge)
813 		rockchip_bridge_post_disable(conn_state->bridge);
814 
815 	if (conn_funcs->unprepare)
816 		conn_funcs->unprepare(state);
817 
818 	state->is_enable = 0;
819 	state->is_init = 0;
820 
821 	return 0;
822 }
823 
824 static int display_logo(struct display_state *state)
825 {
826 	struct crtc_state *crtc_state = &state->crtc_state;
827 	struct connector_state *conn_state = &state->conn_state;
828 	struct logo_info *logo = &state->logo;
829 	int hdisplay, vdisplay, ret;
830 
831 	ret = display_init(state);
832 	if (!state->is_init || ret)
833 		return -ENODEV;
834 
835 	switch (logo->bpp) {
836 	case 16:
837 		crtc_state->format = ROCKCHIP_FMT_RGB565;
838 		break;
839 	case 24:
840 		crtc_state->format = ROCKCHIP_FMT_RGB888;
841 		break;
842 	case 32:
843 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
844 		break;
845 	default:
846 		printf("can't support bmp bits[%d]\n", logo->bpp);
847 		return -EINVAL;
848 	}
849 	hdisplay = conn_state->mode.hdisplay;
850 	vdisplay = conn_state->mode.vdisplay;
851 	crtc_state->src_w = logo->width;
852 	crtc_state->src_h = logo->height;
853 	crtc_state->src_x = 0;
854 	crtc_state->src_y = 0;
855 	crtc_state->ymirror = logo->ymirror;
856 
857 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
858 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
859 
860 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
861 		crtc_state->crtc_x = 0;
862 		crtc_state->crtc_y = 0;
863 		crtc_state->crtc_w = hdisplay;
864 		crtc_state->crtc_h = vdisplay;
865 	} else {
866 		if (crtc_state->src_w >= hdisplay) {
867 			crtc_state->crtc_x = 0;
868 			crtc_state->crtc_w = hdisplay;
869 		} else {
870 			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
871 			crtc_state->crtc_w = crtc_state->src_w;
872 		}
873 
874 		if (crtc_state->src_h >= vdisplay) {
875 			crtc_state->crtc_y = 0;
876 			crtc_state->crtc_h = vdisplay;
877 		} else {
878 			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
879 			crtc_state->crtc_h = crtc_state->src_h;
880 		}
881 	}
882 
883 	display_set_plane(state);
884 	display_enable(state);
885 
886 	return 0;
887 }
888 
889 static int get_crtc_id(ofnode connect)
890 {
891 	int phandle;
892 	struct device_node *remote;
893 	int val;
894 
895 	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
896 	if (phandle < 0)
897 		goto err;
898 	remote = of_find_node_by_phandle(phandle);
899 	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
900 	if (val < 0)
901 		goto err;
902 
903 	return val;
904 err:
905 	printf("Can't get crtc id, default set to id = 0\n");
906 	return 0;
907 }
908 
909 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
910 {
911 	ofnode mcu_node;
912 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
913 
914 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
915 	if (!ofnode_valid(mcu_node))
916 		return -ENODEV;
917 
918 #define FDT_GET_MCU_INT(val, name) \
919 	do { \
920 		val = ofnode_read_s32_default(mcu_node, name, -1); \
921 		if (val < 0) { \
922 			printf("Can't get %s\n", name); \
923 			return -ENXIO; \
924 		} \
925 	} while (0)
926 
927 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
928 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
929 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
930 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
931 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
932 
933 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
934 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
935 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
936 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
937 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
938 
939 	return 0;
940 }
941 
942 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
943 {
944 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
945 
946 	list_for_each_entry(tmp, &logo_cache_list, head) {
947 		if (!strcmp(tmp->name, bmp)) {
948 			logo_cache = tmp;
949 			break;
950 		}
951 	}
952 
953 	if (!logo_cache) {
954 		logo_cache = malloc(sizeof(*logo_cache));
955 		if (!logo_cache) {
956 			printf("failed to alloc memory for logo cache\n");
957 			return NULL;
958 		}
959 		memset(logo_cache, 0, sizeof(*logo_cache));
960 		strcpy(logo_cache->name, bmp);
961 		INIT_LIST_HEAD(&logo_cache->head);
962 		list_add_tail(&logo_cache->head, &logo_cache_list);
963 	}
964 
965 	return logo_cache;
966 }
967 
968 /* Note: used only for rkfb kernel driver */
969 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
970 {
971 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
972 	void *dst = NULL;
973 	int len, size;
974 	struct bmp_header *header;
975 
976 	if (!logo || !bmp_name)
977 		return -EINVAL;
978 
979 	header = malloc(RK_BLK_SIZE);
980 	if (!header)
981 		return -ENOMEM;
982 
983 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
984 	if (len != RK_BLK_SIZE) {
985 		free(header);
986 		return -EINVAL;
987 	}
988 	size = get_unaligned_le32(&header->file_size);
989 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
990 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
991 	if (len != size) {
992 		printf("failed to load bmp %s\n", bmp_name);
993 		free(header);
994 		return -ENOENT;
995 	}
996 
997 	logo->mem = dst;
998 #endif
999 
1000 	return 0;
1001 }
1002 
1003 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1004 {
1005 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1006 	struct rockchip_logo_cache *logo_cache;
1007 	struct bmp_header *header;
1008 	void *dst = NULL, *pdst;
1009 	int size, len;
1010 	int ret = 0;
1011 	int reserved = 0;
1012 
1013 	if (!logo || !bmp_name)
1014 		return -EINVAL;
1015 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1016 	if (!logo_cache)
1017 		return -ENOMEM;
1018 
1019 	if (logo_cache->logo.mem) {
1020 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1021 		return 0;
1022 	}
1023 
1024 	header = malloc(RK_BLK_SIZE);
1025 	if (!header)
1026 		return -ENOMEM;
1027 
1028 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1029 	if (len != RK_BLK_SIZE) {
1030 		ret = -EINVAL;
1031 		goto free_header;
1032 	}
1033 
1034 	logo->bpp = get_unaligned_le16(&header->bit_count);
1035 	logo->width = get_unaligned_le32(&header->width);
1036 	logo->height = get_unaligned_le32(&header->height);
1037 	reserved = get_unaligned_le32(&header->reserved);
1038 	if (logo->height < 0)
1039 	    logo->height = -logo->height;
1040 	size = get_unaligned_le32(&header->file_size);
1041 	if (!can_direct_logo(logo->bpp)) {
1042 		if (size > MEMORY_POOL_SIZE) {
1043 			printf("failed to use boot buf as temp bmp buffer\n");
1044 			ret = -ENOMEM;
1045 			goto free_header;
1046 		}
1047 		pdst = get_display_buffer(size);
1048 
1049 	} else {
1050 		pdst = get_display_buffer(size);
1051 		dst = pdst;
1052 	}
1053 
1054 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1055 	if (len != size) {
1056 		printf("failed to load bmp %s\n", bmp_name);
1057 		ret = -ENOENT;
1058 		goto free_header;
1059 	}
1060 
1061 	if (!can_direct_logo(logo->bpp)) {
1062 		int dst_size;
1063 		/*
1064 		 * TODO: force use 16bpp if bpp less than 16;
1065 		 */
1066 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1067 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1068 
1069 		dst = get_display_buffer(dst_size);
1070 		if (!dst) {
1071 			ret = -ENOMEM;
1072 			goto free_header;
1073 		}
1074 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1075 			printf("failed to decode bmp %s\n", bmp_name);
1076 			ret = -EINVAL;
1077 			goto free_header;
1078 		}
1079 		flush_dcache_range((ulong)dst,
1080 				   ALIGN((ulong)dst + dst_size,
1081 					 CONFIG_SYS_CACHELINE_SIZE));
1082 
1083 		logo->offset = 0;
1084 		logo->ymirror = 0;
1085 	} else {
1086 		logo->offset = get_unaligned_le32(&header->data_offset);
1087 		if (reserved == BMP_PROCESSED_FLAG)
1088 			logo->ymirror = 0;
1089 		else
1090 			logo->ymirror = 1;
1091 	}
1092 	logo->mem = dst;
1093 
1094 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1095 
1096 free_header:
1097 
1098 	free(header);
1099 
1100 	return ret;
1101 #else
1102 	return -EINVAL;
1103 #endif
1104 }
1105 
1106 void rockchip_show_fbbase(ulong fbbase)
1107 {
1108 	struct display_state *s;
1109 
1110 	list_for_each_entry(s, &rockchip_display_list, head) {
1111 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1112 		s->logo.mem = (char *)fbbase;
1113 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1114 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1115 		s->logo.bpp = 32;
1116 		s->logo.ymirror = 0;
1117 
1118 		display_logo(s);
1119 	}
1120 }
1121 
1122 int rockchip_show_bmp(const char *bmp)
1123 {
1124 	struct display_state *s;
1125 	int ret = 0;
1126 
1127 	if (!bmp) {
1128 		list_for_each_entry(s, &rockchip_display_list, head)
1129 			display_disable(s);
1130 		return -ENOENT;
1131 	}
1132 
1133 	list_for_each_entry(s, &rockchip_display_list, head) {
1134 		s->logo.mode = s->charge_logo_mode;
1135 		if (load_bmp_logo(&s->logo, bmp))
1136 			continue;
1137 		ret = display_logo(s);
1138 	}
1139 
1140 	return ret;
1141 }
1142 
1143 int rockchip_show_logo(void)
1144 {
1145 	struct display_state *s;
1146 	int ret = 0;
1147 
1148 	list_for_each_entry(s, &rockchip_display_list, head) {
1149 		s->logo.mode = s->logo_mode;
1150 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1151 			printf("failed to display uboot logo\n");
1152 		else
1153 			ret = display_logo(s);
1154 
1155 		/* Load kernel bmp in rockchip_display_fixup() later */
1156 	}
1157 
1158 	return ret;
1159 }
1160 
1161 enum {
1162 	PORT_DIR_IN,
1163 	PORT_DIR_OUT,
1164 };
1165 
1166 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
1167 {
1168 	ofnode panel_node, ports, port, ep, port_parent_node;
1169 	struct udevice *panel_dev;
1170 	int ret;
1171 
1172 	panel_node = dev_read_subnode(dev, "panel");
1173 	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
1174 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
1175 						  &panel_dev);
1176 		if (!ret)
1177 			goto found;
1178 	}
1179 
1180 	ports = dev_read_subnode(dev, "ports");
1181 	if (!ofnode_valid(ports))
1182 		return NULL;
1183 
1184 	ofnode_for_each_subnode(port, ports) {
1185 		u32 reg;
1186 
1187 		if (ofnode_read_u32(port, "reg", &reg))
1188 			continue;
1189 
1190 		if (reg != PORT_DIR_OUT)
1191 			continue;
1192 
1193 		ofnode_for_each_subnode(ep, port) {
1194 			ofnode _ep, _port;
1195 			uint phandle;
1196 			bool is_ports_node = false;
1197 
1198 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1199 				continue;
1200 
1201 			_ep = ofnode_get_by_phandle(phandle);
1202 			if (!ofnode_valid(_ep))
1203 				continue;
1204 
1205 			_port = ofnode_get_parent(_ep);
1206 			if (!ofnode_valid(_port))
1207 				continue;
1208 
1209 			port_parent_node = ofnode_get_parent(_port);
1210 			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
1211 			if (is_ports_node)
1212 				panel_node = ofnode_get_parent(port_parent_node);
1213 			else
1214 				panel_node = ofnode_get_parent(_port);
1215 			if (!ofnode_valid(panel_node))
1216 				continue;
1217 
1218 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
1219 							  panel_node,
1220 							  &panel_dev);
1221 			if (!ret)
1222 				goto found;
1223 		}
1224 	}
1225 
1226 	return NULL;
1227 
1228 found:
1229 	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1230 }
1231 
1232 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
1233 {
1234 	ofnode node, ports, port, ep;
1235 	struct udevice *dev;
1236 	int ret;
1237 
1238 	ports = dev_read_subnode(conn_dev, "ports");
1239 	if (!ofnode_valid(ports))
1240 		return NULL;
1241 
1242 	ofnode_for_each_subnode(port, ports) {
1243 		u32 reg;
1244 
1245 		if (ofnode_read_u32(port, "reg", &reg))
1246 			continue;
1247 
1248 		if (reg != PORT_DIR_OUT)
1249 			continue;
1250 
1251 		ofnode_for_each_subnode(ep, port) {
1252 			ofnode _ep, _port, _ports;
1253 			uint phandle;
1254 
1255 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1256 				continue;
1257 
1258 			_ep = ofnode_get_by_phandle(phandle);
1259 			if (!ofnode_valid(_ep))
1260 				continue;
1261 
1262 			_port = ofnode_get_parent(_ep);
1263 			if (!ofnode_valid(_port))
1264 				continue;
1265 
1266 			_ports = ofnode_get_parent(_port);
1267 			if (!ofnode_valid(_ports))
1268 				continue;
1269 
1270 			node = ofnode_get_parent(_ports);
1271 			if (!ofnode_valid(node))
1272 				continue;
1273 
1274 			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
1275 							  node, &dev);
1276 			if (!ret)
1277 				goto found;
1278 		}
1279 	}
1280 
1281 	return NULL;
1282 
1283 found:
1284 	return (struct rockchip_bridge *)dev_get_driver_data(dev);
1285 }
1286 
1287 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
1288 {
1289 	ofnode ep, port, ports, conn;
1290 	uint phandle;
1291 	struct udevice *dev;
1292 	int ret;
1293 
1294 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1295 		return NULL;
1296 
1297 	ep = ofnode_get_by_phandle(phandle);
1298 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1299 		return NULL;
1300 
1301 	port = ofnode_get_parent(ep);
1302 	if (!ofnode_valid(port))
1303 		return NULL;
1304 
1305 	ports = ofnode_get_parent(port);
1306 	if (!ofnode_valid(ports))
1307 		return NULL;
1308 
1309 	conn = ofnode_get_parent(ports);
1310 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1311 		return NULL;
1312 
1313 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1314 	if (ret)
1315 		return NULL;
1316 
1317 	return dev;
1318 }
1319 
1320 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1321 {
1322 	struct udevice *phy_dev;
1323 	int ret;
1324 
1325 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1326 	if (ret)
1327 		return NULL;
1328 
1329 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1330 }
1331 
1332 #if defined(CONFIG_ROCKCHIP_RK3568)
1333 static int rockchip_display_fixup_dts(void *blob)
1334 {
1335 	ofnode route_node, route_subnode, conn_ep, conn_port;
1336 	const struct device_node *route_sub_devnode;
1337 	const struct device_node *ep_node, *conn_ep_dev_node;
1338 	u32 phandle;
1339 	int conn_ep_offset;
1340 	const char *route_sub_path, *path;
1341 
1342 	/* Don't go further if new variant after
1343 	 * reading PMUGRF_SOC_CON15
1344 	 */
1345 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1346 		return 0;
1347 
1348 	route_node = ofnode_path("/display-subsystem/route");
1349 	if (!ofnode_valid(route_node))
1350 		return -EINVAL;
1351 
1352 	ofnode_for_each_subnode(route_subnode, route_node) {
1353 		if (!ofnode_is_available(route_subnode))
1354 			continue;
1355 
1356 		route_sub_devnode = ofnode_to_np(route_subnode);
1357 		route_sub_path = route_sub_devnode->full_name;
1358 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1359 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1360 			return 0;
1361 
1362 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1363 		if (phandle < 0) {
1364 			printf("Warn: can't find connect node's handle\n");
1365 			continue;
1366 		}
1367 
1368 		ep_node = of_find_node_by_phandle(phandle);
1369 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1370 			printf("Warn: can't find endpoint node from phandle\n");
1371 			continue;
1372 		}
1373 
1374 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1375 		conn_ep = ofnode_get_by_phandle(phandle);
1376 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1377 			return -ENODEV;
1378 
1379 		conn_port = ofnode_get_parent(conn_ep);
1380 		if (!ofnode_valid(conn_port))
1381 			return -ENODEV;
1382 
1383 		ofnode_for_each_subnode(conn_ep, conn_port) {
1384 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1385 			path = conn_ep_dev_node->full_name;
1386 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1387 			conn_ep_offset = fdt_path_offset(blob, path);
1388 
1389 			if (!ofnode_is_available(conn_ep) &&
1390 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1391 				do_fixup_by_path_u32(blob, route_sub_path,
1392 						     "connect", phandle, 1);
1393 				fdt_status_okay(blob, conn_ep_offset);
1394 
1395 			} else if (ofnode_is_available(conn_ep) &&
1396 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1397 				fdt_status_disabled(blob, conn_ep_offset);
1398 			}
1399 		}
1400 	}
1401 
1402 	return 0;
1403 }
1404 #endif
1405 
1406 static int rockchip_display_probe(struct udevice *dev)
1407 {
1408 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1409 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1410 	const void *blob = gd->fdt_blob;
1411 	int phandle;
1412 	struct udevice *crtc_dev, *conn_dev;
1413 	struct rockchip_crtc *crtc;
1414 	const struct rockchip_connector *conn;
1415 	struct rockchip_panel *panel = NULL;
1416 	struct rockchip_bridge *bridge = NULL;
1417 	struct rockchip_phy *phy = NULL;
1418 	struct display_state *s;
1419 	const char *name;
1420 	int ret;
1421 	ofnode node, route_node;
1422 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1423 	struct public_phy_data *data;
1424 	bool is_ports_node = false;
1425 
1426 #if defined(CONFIG_ROCKCHIP_RK3568)
1427 	rockchip_display_fixup_dts((void *)blob);
1428 #endif
1429 
1430 	/* Before relocation we don't need to do anything */
1431 	if (!(gd->flags & GD_FLG_RELOC))
1432 		return 0;
1433 
1434 	data = malloc(sizeof(struct public_phy_data));
1435 	if (!data) {
1436 		printf("failed to alloc phy data\n");
1437 		return -ENOMEM;
1438 	}
1439 	data->phy_init = false;
1440 
1441 	init_display_buffer(plat->base);
1442 
1443 	route_node = dev_read_subnode(dev, "route");
1444 	if (!ofnode_valid(route_node))
1445 		return -ENODEV;
1446 
1447 	ofnode_for_each_subnode(node, route_node) {
1448 		if (!ofnode_is_available(node))
1449 			continue;
1450 		phandle = ofnode_read_u32_default(node, "connect", -1);
1451 		if (phandle < 0) {
1452 			printf("Warn: can't find connect node's handle\n");
1453 			continue;
1454 		}
1455 		ep_node = of_find_node_by_phandle(phandle);
1456 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1457 			printf("Warn: can't find endpoint node from phandle\n");
1458 			continue;
1459 		}
1460 		port_node = of_get_parent(ep_node);
1461 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1462 			printf("Warn: can't find port node from phandle\n");
1463 			continue;
1464 		}
1465 
1466 		port_parent_node = of_get_parent(port_node);
1467 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1468 			printf("Warn: can't find port parent node from phandle\n");
1469 			continue;
1470 		}
1471 
1472 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1473 		if (is_ports_node) {
1474 			vop_node = of_get_parent(port_parent_node);
1475 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1476 				printf("Warn: can't find crtc node from phandle\n");
1477 				continue;
1478 			}
1479 		} else {
1480 			vop_node = port_parent_node;
1481 		}
1482 
1483 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1484 						  np_to_ofnode(vop_node),
1485 						  &crtc_dev);
1486 		if (ret) {
1487 			printf("Warn: can't find crtc driver %d\n", ret);
1488 			continue;
1489 		}
1490 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1491 
1492 		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
1493 		if (!conn_dev) {
1494 			printf("Warn: can't find connect driver\n");
1495 			continue;
1496 		}
1497 
1498 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
1499 
1500 		phy = rockchip_of_find_phy(conn_dev);
1501 
1502 		bridge = rockchip_of_find_bridge(conn_dev);
1503 		if (bridge)
1504 			panel = rockchip_of_find_panel(bridge->dev);
1505 		else
1506 			panel = rockchip_of_find_panel(conn_dev);
1507 
1508 		s = malloc(sizeof(*s));
1509 		if (!s)
1510 			continue;
1511 
1512 		memset(s, 0, sizeof(*s));
1513 
1514 		INIT_LIST_HEAD(&s->head);
1515 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1516 		if (!ret)
1517 			memcpy(s->ulogo_name, name, strlen(name));
1518 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1519 		if (!ret)
1520 			memcpy(s->klogo_name, name, strlen(name));
1521 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1522 		if (!strcmp(name, "fullscreen"))
1523 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1524 		else
1525 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1526 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1527 		if (!strcmp(name, "fullscreen"))
1528 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1529 		else
1530 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1531 
1532 		s->blob = blob;
1533 		s->panel_state.panel = panel;
1534 		s->conn_state.node = conn_dev->node;
1535 		s->conn_state.dev = conn_dev;
1536 		s->conn_state.connector = conn;
1537 		s->conn_state.phy = phy;
1538 		s->conn_state.bridge = bridge;
1539 		s->conn_state.overscan.left_margin = 100;
1540 		s->conn_state.overscan.right_margin = 100;
1541 		s->conn_state.overscan.top_margin = 100;
1542 		s->conn_state.overscan.bottom_margin = 100;
1543 		s->crtc_state.node = np_to_ofnode(vop_node);
1544 		s->crtc_state.dev = crtc_dev;
1545 		s->crtc_state.crtc = crtc;
1546 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
1547 		s->crtc_state.crtc->vps[s->crtc_state.crtc_id].enable = true;
1548 		s->node = node;
1549 		if (is_ports_node)
1550 			s->crtc_state.ports_node = port_parent_node;
1551 
1552 		if (bridge)
1553 			bridge->state = s;
1554 
1555 		if (panel)
1556 			panel->state = s;
1557 
1558 		get_crtc_mcu_mode(&s->crtc_state);
1559 
1560 		ret = ofnode_read_u32_default(s->crtc_state.node,
1561 					      "rockchip,dual-channel-swap", 0);
1562 		s->crtc_state.dual_channel_swap = ret;
1563 		if (connector_panel_init(s)) {
1564 			printf("Warn: Failed to init panel drivers\n");
1565 			free(s);
1566 			continue;
1567 		}
1568 
1569 		if (connector_phy_init(s, data)) {
1570 			printf("Warn: Failed to init phy drivers\n");
1571 			free(s);
1572 			continue;
1573 		}
1574 		list_add_tail(&s->head, &rockchip_display_list);
1575 	}
1576 
1577 	if (list_empty(&rockchip_display_list)) {
1578 		debug("Failed to found available display route\n");
1579 		return -ENODEV;
1580 	}
1581 
1582 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1583 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1584 	uc_priv->bpix = VIDEO_BPP32;
1585 
1586 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1587 	rockchip_show_fbbase(plat->base);
1588 	video_set_flush_dcache(dev, true);
1589 	#endif
1590 
1591 	return 0;
1592 }
1593 
1594 void rockchip_display_fixup(void *blob)
1595 {
1596 	const struct rockchip_connector_funcs *conn_funcs;
1597 	const struct rockchip_crtc_funcs *crtc_funcs;
1598 	const struct rockchip_connector *conn;
1599 	const struct rockchip_crtc *crtc;
1600 	struct display_state *s;
1601 	int offset;
1602 	const struct device_node *np;
1603 	const char *path;
1604 
1605 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1606 		list_for_each_entry(s, &rockchip_display_list, head)
1607 			load_bmp_logo(&s->logo, s->klogo_name);
1608 
1609 		if (!get_display_size())
1610 			return;
1611 
1612 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1613 						    (u64)memory_start,
1614 						    (u64)get_display_size());
1615 		if (offset < 0)
1616 			printf("failed to reserve drm-loader-logo memory\n");
1617 	} else {
1618 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1619 		/* Compatible with rkfb display, only need reserve memory */
1620 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1621 						    (u64)memory_start,
1622 						    MEMORY_POOL_SIZE);
1623 		if (offset < 0)
1624 			printf("failed to reserve fb-loader-logo memory\n");
1625 		else
1626 			list_for_each_entry(s, &rockchip_display_list, head)
1627 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
1628 		return;
1629 	}
1630 
1631 	list_for_each_entry(s, &rockchip_display_list, head) {
1632 		conn = s->conn_state.connector;
1633 		if (!conn)
1634 			continue;
1635 		conn_funcs = conn->funcs;
1636 		if (!conn_funcs) {
1637 			printf("failed to get exist connector\n");
1638 			continue;
1639 		}
1640 
1641 		crtc = s->crtc_state.crtc;
1642 		if (!crtc)
1643 			continue;
1644 
1645 		crtc_funcs = crtc->funcs;
1646 		if (!crtc_funcs) {
1647 			printf("failed to get exist crtc\n");
1648 			continue;
1649 		}
1650 
1651 		if (crtc_funcs->fixup_dts)
1652 			crtc_funcs->fixup_dts(s, blob);
1653 
1654 		if (conn_funcs->fixup_dts)
1655 			conn_funcs->fixup_dts(s, blob);
1656 
1657 		np = ofnode_to_np(s->node);
1658 		path = np->full_name;
1659 		fdt_increase_size(blob, 0x400);
1660 #define FDT_SET_U32(name, val) \
1661 		do_fixup_by_path_u32(blob, path, name, val, 1);
1662 
1663 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
1664 			 - memory_start;
1665 		FDT_SET_U32("logo,offset", offset);
1666 		FDT_SET_U32("logo,width", s->logo.width);
1667 		FDT_SET_U32("logo,height", s->logo.height);
1668 		FDT_SET_U32("logo,bpp", s->logo.bpp);
1669 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
1670 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
1671 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
1672 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
1673 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
1674 		FDT_SET_U32("video,vrefresh",
1675 			    drm_mode_vrefresh(&s->conn_state.mode));
1676 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
1677 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
1678 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
1679 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
1680 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
1681 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
1682 #undef FDT_SET_U32
1683 	}
1684 }
1685 
1686 int rockchip_display_bind(struct udevice *dev)
1687 {
1688 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1689 
1690 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
1691 
1692 	return 0;
1693 }
1694 
1695 static const struct udevice_id rockchip_display_ids[] = {
1696 	{ .compatible = "rockchip,display-subsystem" },
1697 	{ }
1698 };
1699 
1700 U_BOOT_DRIVER(rockchip_display) = {
1701 	.name	= "rockchip_display",
1702 	.id	= UCLASS_VIDEO,
1703 	.of_match = rockchip_display_ids,
1704 	.bind	= rockchip_display_bind,
1705 	.probe	= rockchip_display_probe,
1706 };
1707 
1708 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
1709 			char *const argv[])
1710 {
1711 	if (argc != 1)
1712 		return CMD_RET_USAGE;
1713 
1714 	rockchip_show_logo();
1715 
1716 	return 0;
1717 }
1718 
1719 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
1720 				char *const argv[])
1721 {
1722 	if (argc != 2)
1723 		return CMD_RET_USAGE;
1724 
1725 	rockchip_show_bmp(argv[1]);
1726 
1727 	return 0;
1728 }
1729 
1730 U_BOOT_CMD(
1731 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
1732 	"load and display log from resource partition",
1733 	NULL
1734 );
1735 
1736 U_BOOT_CMD(
1737 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
1738 	"load and display bmp from resource partition",
1739 	"    <bmp_name>"
1740 );
1741