1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 343 * @edid_data: structure store mode list 344 * @max_output: vop max output resolution 345 */ 346 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 347 struct vop_rect *max_output) 348 { 349 int i; 350 351 for (i = 0; i < edid_data->modes; i++) { 352 if (edid_data->mode_buf[i].hdisplay > max_output->width || 353 edid_data->mode_buf[i].vdisplay > max_output->height) 354 edid_data->mode_buf[i].invalid = true; 355 } 356 } 357 358 /** 359 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 360 * @p: mode 361 * @adjust_flags: a combination of adjustment flags 362 * 363 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 364 * 365 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 366 * interlaced modes. 367 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 368 * buffers containing two eyes (only adjust the timings when needed, eg. for 369 * "frame packing" or "side by side full"). 370 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 371 * be performed for doublescan and vscan > 1 modes respectively. 372 */ 373 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 374 { 375 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 376 return; 377 378 if (p->flags & DRM_MODE_FLAG_DBLCLK) 379 p->crtc_clock = 2 * p->clock; 380 else 381 p->crtc_clock = p->clock; 382 p->crtc_hdisplay = p->hdisplay; 383 p->crtc_hsync_start = p->hsync_start; 384 p->crtc_hsync_end = p->hsync_end; 385 p->crtc_htotal = p->htotal; 386 p->crtc_hskew = p->hskew; 387 p->crtc_vdisplay = p->vdisplay; 388 p->crtc_vsync_start = p->vsync_start; 389 p->crtc_vsync_end = p->vsync_end; 390 p->crtc_vtotal = p->vtotal; 391 392 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 393 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 394 p->crtc_vdisplay /= 2; 395 p->crtc_vsync_start /= 2; 396 p->crtc_vsync_end /= 2; 397 p->crtc_vtotal /= 2; 398 } 399 } 400 401 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 402 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 403 p->crtc_vdisplay *= 2; 404 p->crtc_vsync_start *= 2; 405 p->crtc_vsync_end *= 2; 406 p->crtc_vtotal *= 2; 407 } 408 } 409 410 if (!(adjust_flags & CRTC_NO_VSCAN)) { 411 if (p->vscan > 1) { 412 p->crtc_vdisplay *= p->vscan; 413 p->crtc_vsync_start *= p->vscan; 414 p->crtc_vsync_end *= p->vscan; 415 p->crtc_vtotal *= p->vscan; 416 } 417 } 418 419 if (adjust_flags & CRTC_STEREO_DOUBLE) { 420 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 421 422 switch (layout) { 423 case DRM_MODE_FLAG_3D_FRAME_PACKING: 424 p->crtc_clock *= 2; 425 p->crtc_vdisplay += p->crtc_vtotal; 426 p->crtc_vsync_start += p->crtc_vtotal; 427 p->crtc_vsync_end += p->crtc_vtotal; 428 p->crtc_vtotal += p->crtc_vtotal; 429 break; 430 } 431 } 432 433 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 434 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 435 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 436 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 437 } 438 439 /** 440 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 441 * output format 442 * 443 * @connector: drm connector under action. 444 * @mode: video mode to be tested. 445 * 446 * Returns: 447 * true if the mode can be supported in YCBCR420 format 448 * false if not. 449 */ 450 bool drm_mode_is_420_only(const struct drm_display_info *display, 451 struct drm_display_mode *mode) 452 { 453 u8 vic = drm_match_cea_mode(mode); 454 455 return test_bit(vic, display->hdmi.y420_vdb_modes); 456 } 457 458 /** 459 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 460 * output format also (along with RGB/YCBCR444/422) 461 * 462 * @display: display under action. 463 * @mode: video mode to be tested. 464 * 465 * Returns: 466 * true if the mode can be support YCBCR420 format 467 * false if not. 468 */ 469 bool drm_mode_is_420_also(const struct drm_display_info *display, 470 struct drm_display_mode *mode) 471 { 472 u8 vic = drm_match_cea_mode(mode); 473 474 return test_bit(vic, display->hdmi.y420_cmdb_modes); 475 } 476 477 /** 478 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 479 * output format 480 * 481 * @display: display under action. 482 * @mode: video mode to be tested. 483 * 484 * Returns: 485 * true if the mode can be supported in YCBCR420 format 486 * false if not. 487 */ 488 bool drm_mode_is_420(const struct drm_display_info *display, 489 struct drm_display_mode *mode) 490 { 491 return drm_mode_is_420_only(display, mode) || 492 drm_mode_is_420_also(display, mode); 493 } 494 495 static int display_get_timing(struct display_state *state) 496 { 497 struct connector_state *conn_state = &state->conn_state; 498 struct drm_display_mode *mode = &conn_state->mode; 499 const struct drm_display_mode *m; 500 struct panel_state *panel_state = &state->panel_state; 501 const struct rockchip_panel *panel = panel_state->panel; 502 503 if (dev_of_valid(panel->dev) && 504 !display_get_timing_from_dts(panel_state, mode)) { 505 printf("Using display timing dts\n"); 506 goto done; 507 } 508 509 if (panel->data) { 510 m = (const struct drm_display_mode *)panel->data; 511 memcpy(mode, m, sizeof(*m)); 512 printf("Using display timing from compatible panel driver\n"); 513 goto done; 514 } 515 516 printf("failed to find display timing\n"); 517 return -ENODEV; 518 done: 519 printf("Detailed mode clock %u kHz, flags[%x]\n" 520 " H: %04d %04d %04d %04d\n" 521 " V: %04d %04d %04d %04d\n" 522 "bus_format: %x\n", 523 mode->clock, mode->flags, 524 mode->hdisplay, mode->hsync_start, 525 mode->hsync_end, mode->htotal, 526 mode->vdisplay, mode->vsync_start, 527 mode->vsync_end, mode->vtotal, 528 conn_state->bus_format); 529 530 return 0; 531 } 532 533 static int display_init(struct display_state *state) 534 { 535 struct connector_state *conn_state = &state->conn_state; 536 struct panel_state *panel_state = &state->panel_state; 537 const struct rockchip_connector *conn = conn_state->connector; 538 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 539 struct crtc_state *crtc_state = &state->crtc_state; 540 struct rockchip_crtc *crtc = crtc_state->crtc; 541 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 542 struct drm_display_mode *mode = &conn_state->mode; 543 int ret = 0; 544 static bool __print_once = false; 545 #if defined(CONFIG_I2C_EDID) 546 int bpc; 547 #endif 548 if (!__print_once) { 549 __print_once = true; 550 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 551 } 552 553 if (state->is_init) 554 return 0; 555 556 if (!conn_funcs || !crtc_funcs) { 557 printf("failed to find connector or crtc functions\n"); 558 return -ENXIO; 559 } 560 561 if (crtc_state->crtc->active && 562 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 563 sizeof(struct drm_display_mode))) { 564 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 565 crtc_state->dev->name, 566 crtc_state->crtc->active_mode.type, 567 crtc_state->crtc->active_mode.hdisplay, 568 crtc_state->crtc->active_mode.vdisplay, 569 crtc_state->crtc->active_mode.vrefresh); 570 return -ENODEV; 571 } 572 573 if (crtc_funcs->preinit) { 574 ret = crtc_funcs->preinit(state); 575 if (ret) 576 return ret; 577 } 578 579 if (panel_state->panel) 580 rockchip_panel_init(panel_state->panel); 581 582 if (conn_funcs->init) { 583 ret = conn_funcs->init(state); 584 if (ret) 585 goto deinit; 586 } 587 588 if (conn_state->phy) 589 rockchip_phy_init(conn_state->phy); 590 591 /* 592 * support hotplug, but not connect; 593 */ 594 #ifdef CONFIG_ROCKCHIP_DRM_TVE 595 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 596 printf("hdmi plugin ,skip tve\n"); 597 goto deinit; 598 } 599 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 600 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 601 printf("hdmi plugin ,skip tve\n"); 602 goto deinit; 603 } 604 #endif 605 if (conn_funcs->detect) { 606 ret = conn_funcs->detect(state); 607 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 608 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 609 crtc->hdmi_hpd = ret; 610 #endif 611 if (!ret) 612 goto deinit; 613 } 614 615 if (panel_state->panel) { 616 ret = display_get_timing(state); 617 } else if (conn_state->bridge) { 618 ret = video_bridge_read_edid(conn_state->bridge->dev, 619 conn_state->edid, EDID_SIZE); 620 if (ret > 0) { 621 #if defined(CONFIG_I2C_EDID) 622 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 623 &bpc); 624 if (!ret) 625 edid_print_info((void *)&conn_state->edid); 626 #endif 627 } else { 628 ret = video_bridge_get_timing(conn_state->bridge->dev); 629 } 630 } else if (conn_funcs->get_timing) { 631 ret = conn_funcs->get_timing(state); 632 } else if (conn_funcs->get_edid) { 633 ret = conn_funcs->get_edid(state); 634 #if defined(CONFIG_I2C_EDID) 635 if (!ret) { 636 ret = edid_get_drm_mode((void *)&conn_state->edid, 637 sizeof(conn_state->edid), mode, 638 &bpc); 639 if (!ret) 640 edid_print_info((void *)&conn_state->edid); 641 } 642 #endif 643 } 644 645 if (ret) 646 goto deinit; 647 648 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 649 650 if (crtc_funcs->init) { 651 ret = crtc_funcs->init(state); 652 if (ret) 653 goto deinit; 654 } 655 state->is_init = 1; 656 657 crtc_state->crtc->active = true; 658 memcpy(&crtc_state->crtc->active_mode, 659 &conn_state->mode, sizeof(struct drm_display_mode)); 660 661 return 0; 662 663 deinit: 664 if (conn_funcs->deinit) 665 conn_funcs->deinit(state); 666 return ret; 667 } 668 669 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 670 { 671 struct crtc_state *crtc_state = &state->crtc_state; 672 const struct rockchip_crtc *crtc = crtc_state->crtc; 673 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 674 int ret; 675 676 if (!state->is_init) 677 return -EINVAL; 678 679 if (crtc_funcs->send_mcu_cmd) { 680 ret = crtc_funcs->send_mcu_cmd(state, type, val); 681 if (ret) 682 return ret; 683 } 684 685 return 0; 686 } 687 688 static int display_set_plane(struct display_state *state) 689 { 690 struct crtc_state *crtc_state = &state->crtc_state; 691 const struct rockchip_crtc *crtc = crtc_state->crtc; 692 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 693 int ret; 694 695 if (!state->is_init) 696 return -EINVAL; 697 698 if (crtc_funcs->set_plane) { 699 ret = crtc_funcs->set_plane(state); 700 if (ret) 701 return ret; 702 } 703 704 return 0; 705 } 706 707 static int display_enable(struct display_state *state) 708 { 709 struct connector_state *conn_state = &state->conn_state; 710 const struct rockchip_connector *conn = conn_state->connector; 711 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 712 struct crtc_state *crtc_state = &state->crtc_state; 713 const struct rockchip_crtc *crtc = crtc_state->crtc; 714 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 715 struct panel_state *panel_state = &state->panel_state; 716 717 if (!state->is_init) 718 return -EINVAL; 719 720 if (state->is_enable) 721 return 0; 722 723 if (crtc_funcs->prepare) 724 crtc_funcs->prepare(state); 725 726 if (conn_funcs->prepare) 727 conn_funcs->prepare(state); 728 729 if (conn_state->bridge) 730 rockchip_bridge_pre_enable(conn_state->bridge); 731 732 if (panel_state->panel) 733 rockchip_panel_prepare(panel_state->panel); 734 735 if (crtc_funcs->enable) 736 crtc_funcs->enable(state); 737 738 if (conn_funcs->enable) 739 conn_funcs->enable(state); 740 741 if (conn_state->bridge) 742 rockchip_bridge_enable(conn_state->bridge); 743 744 if (panel_state->panel) 745 rockchip_panel_enable(panel_state->panel); 746 747 state->is_enable = true; 748 749 return 0; 750 } 751 752 static int display_disable(struct display_state *state) 753 { 754 struct connector_state *conn_state = &state->conn_state; 755 const struct rockchip_connector *conn = conn_state->connector; 756 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 757 struct crtc_state *crtc_state = &state->crtc_state; 758 const struct rockchip_crtc *crtc = crtc_state->crtc; 759 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 760 struct panel_state *panel_state = &state->panel_state; 761 762 if (!state->is_init) 763 return 0; 764 765 if (!state->is_enable) 766 return 0; 767 768 if (panel_state->panel) 769 rockchip_panel_disable(panel_state->panel); 770 771 if (conn_state->bridge) 772 rockchip_bridge_disable(conn_state->bridge); 773 774 if (conn_funcs->disable) 775 conn_funcs->disable(state); 776 777 if (crtc_funcs->disable) 778 crtc_funcs->disable(state); 779 780 if (panel_state->panel) 781 rockchip_panel_unprepare(panel_state->panel); 782 783 if (conn_state->bridge) 784 rockchip_bridge_post_disable(conn_state->bridge); 785 786 if (conn_funcs->unprepare) 787 conn_funcs->unprepare(state); 788 789 state->is_enable = 0; 790 state->is_init = 0; 791 792 return 0; 793 } 794 795 static int display_logo(struct display_state *state) 796 { 797 struct crtc_state *crtc_state = &state->crtc_state; 798 struct connector_state *conn_state = &state->conn_state; 799 struct logo_info *logo = &state->logo; 800 int hdisplay, vdisplay, ret; 801 802 ret = display_init(state); 803 if (!state->is_init || ret) 804 return -ENODEV; 805 806 switch (logo->bpp) { 807 case 16: 808 crtc_state->format = ROCKCHIP_FMT_RGB565; 809 break; 810 case 24: 811 crtc_state->format = ROCKCHIP_FMT_RGB888; 812 break; 813 case 32: 814 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 815 break; 816 default: 817 printf("can't support bmp bits[%d]\n", logo->bpp); 818 return -EINVAL; 819 } 820 hdisplay = conn_state->mode.hdisplay; 821 vdisplay = conn_state->mode.vdisplay; 822 crtc_state->src_w = logo->width; 823 crtc_state->src_h = logo->height; 824 crtc_state->src_x = 0; 825 crtc_state->src_y = 0; 826 crtc_state->ymirror = logo->ymirror; 827 828 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 829 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 830 831 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 832 crtc_state->crtc_x = 0; 833 crtc_state->crtc_y = 0; 834 crtc_state->crtc_w = hdisplay; 835 crtc_state->crtc_h = vdisplay; 836 } else { 837 if (crtc_state->src_w >= hdisplay) { 838 crtc_state->crtc_x = 0; 839 crtc_state->crtc_w = hdisplay; 840 } else { 841 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 842 crtc_state->crtc_w = crtc_state->src_w; 843 } 844 845 if (crtc_state->src_h >= vdisplay) { 846 crtc_state->crtc_y = 0; 847 crtc_state->crtc_h = vdisplay; 848 } else { 849 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 850 crtc_state->crtc_h = crtc_state->src_h; 851 } 852 } 853 854 display_set_plane(state); 855 display_enable(state); 856 857 return 0; 858 } 859 860 static int get_crtc_id(ofnode connect) 861 { 862 int phandle; 863 struct device_node *remote; 864 int val; 865 866 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 867 if (phandle < 0) 868 goto err; 869 remote = of_find_node_by_phandle(phandle); 870 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 871 if (val < 0) 872 goto err; 873 874 return val; 875 err: 876 printf("Can't get crtc id, default set to id = 0\n"); 877 return 0; 878 } 879 880 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 881 { 882 ofnode mcu_node; 883 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 884 885 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 886 if (!ofnode_valid(mcu_node)) 887 return -ENODEV; 888 889 #define FDT_GET_MCU_INT(val, name) \ 890 do { \ 891 val = ofnode_read_s32_default(mcu_node, name, -1); \ 892 if (val < 0) { \ 893 printf("Can't get %s\n", name); \ 894 return -ENXIO; \ 895 } \ 896 } while (0) 897 898 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 899 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 900 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 901 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 902 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 903 904 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 905 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 906 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 907 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 908 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 909 910 return 0; 911 } 912 913 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 914 { 915 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 916 917 list_for_each_entry(tmp, &logo_cache_list, head) { 918 if (!strcmp(tmp->name, bmp)) { 919 logo_cache = tmp; 920 break; 921 } 922 } 923 924 if (!logo_cache) { 925 logo_cache = malloc(sizeof(*logo_cache)); 926 if (!logo_cache) { 927 printf("failed to alloc memory for logo cache\n"); 928 return NULL; 929 } 930 memset(logo_cache, 0, sizeof(*logo_cache)); 931 strcpy(logo_cache->name, bmp); 932 INIT_LIST_HEAD(&logo_cache->head); 933 list_add_tail(&logo_cache->head, &logo_cache_list); 934 } 935 936 return logo_cache; 937 } 938 939 /* Note: used only for rkfb kernel driver */ 940 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 941 { 942 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 943 void *dst = NULL; 944 int len, size; 945 struct bmp_header *header; 946 947 if (!logo || !bmp_name) 948 return -EINVAL; 949 950 header = malloc(RK_BLK_SIZE); 951 if (!header) 952 return -ENOMEM; 953 954 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 955 if (len != RK_BLK_SIZE) { 956 free(header); 957 return -EINVAL; 958 } 959 size = get_unaligned_le32(&header->file_size); 960 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 961 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 962 if (len != size) { 963 printf("failed to load bmp %s\n", bmp_name); 964 free(header); 965 return -ENOENT; 966 } 967 968 logo->mem = dst; 969 #endif 970 971 return 0; 972 } 973 974 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 975 { 976 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 977 struct rockchip_logo_cache *logo_cache; 978 struct bmp_header *header; 979 void *dst = NULL, *pdst; 980 int size, len; 981 int ret = 0; 982 int reserved = 0; 983 984 if (!logo || !bmp_name) 985 return -EINVAL; 986 logo_cache = find_or_alloc_logo_cache(bmp_name); 987 if (!logo_cache) 988 return -ENOMEM; 989 990 if (logo_cache->logo.mem) { 991 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 992 return 0; 993 } 994 995 header = malloc(RK_BLK_SIZE); 996 if (!header) 997 return -ENOMEM; 998 999 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1000 if (len != RK_BLK_SIZE) { 1001 ret = -EINVAL; 1002 goto free_header; 1003 } 1004 1005 logo->bpp = get_unaligned_le16(&header->bit_count); 1006 logo->width = get_unaligned_le32(&header->width); 1007 logo->height = get_unaligned_le32(&header->height); 1008 reserved = get_unaligned_le32(&header->reserved); 1009 if (logo->height < 0) 1010 logo->height = -logo->height; 1011 size = get_unaligned_le32(&header->file_size); 1012 if (!can_direct_logo(logo->bpp)) { 1013 if (size > MEMORY_POOL_SIZE) { 1014 printf("failed to use boot buf as temp bmp buffer\n"); 1015 ret = -ENOMEM; 1016 goto free_header; 1017 } 1018 pdst = get_display_buffer(size); 1019 1020 } else { 1021 pdst = get_display_buffer(size); 1022 dst = pdst; 1023 } 1024 1025 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1026 if (len != size) { 1027 printf("failed to load bmp %s\n", bmp_name); 1028 ret = -ENOENT; 1029 goto free_header; 1030 } 1031 1032 if (!can_direct_logo(logo->bpp)) { 1033 int dst_size; 1034 /* 1035 * TODO: force use 16bpp if bpp less than 16; 1036 */ 1037 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1038 dst_size = logo->width * logo->height * logo->bpp >> 3; 1039 1040 dst = get_display_buffer(dst_size); 1041 if (!dst) { 1042 ret = -ENOMEM; 1043 goto free_header; 1044 } 1045 if (bmpdecoder(pdst, dst, logo->bpp)) { 1046 printf("failed to decode bmp %s\n", bmp_name); 1047 ret = -EINVAL; 1048 goto free_header; 1049 } 1050 flush_dcache_range((ulong)dst, 1051 ALIGN((ulong)dst + dst_size, 1052 CONFIG_SYS_CACHELINE_SIZE)); 1053 1054 logo->offset = 0; 1055 logo->ymirror = 0; 1056 } else { 1057 logo->offset = get_unaligned_le32(&header->data_offset); 1058 if (reserved == BMP_PROCESSED_FLAG) 1059 logo->ymirror = 0; 1060 else 1061 logo->ymirror = 1; 1062 } 1063 logo->mem = dst; 1064 1065 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1066 1067 free_header: 1068 1069 free(header); 1070 1071 return ret; 1072 #else 1073 return -EINVAL; 1074 #endif 1075 } 1076 1077 void rockchip_show_fbbase(ulong fbbase) 1078 { 1079 struct display_state *s; 1080 1081 list_for_each_entry(s, &rockchip_display_list, head) { 1082 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1083 s->logo.mem = (char *)fbbase; 1084 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1085 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1086 s->logo.bpp = 32; 1087 s->logo.ymirror = 0; 1088 1089 display_logo(s); 1090 } 1091 } 1092 1093 int rockchip_show_bmp(const char *bmp) 1094 { 1095 struct display_state *s; 1096 int ret = 0; 1097 1098 if (!bmp) { 1099 list_for_each_entry(s, &rockchip_display_list, head) 1100 display_disable(s); 1101 return -ENOENT; 1102 } 1103 1104 list_for_each_entry(s, &rockchip_display_list, head) { 1105 s->logo.mode = s->charge_logo_mode; 1106 if (load_bmp_logo(&s->logo, bmp)) 1107 continue; 1108 ret = display_logo(s); 1109 } 1110 1111 return ret; 1112 } 1113 1114 int rockchip_show_logo(void) 1115 { 1116 struct display_state *s; 1117 int ret = 0; 1118 1119 list_for_each_entry(s, &rockchip_display_list, head) { 1120 s->logo.mode = s->logo_mode; 1121 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1122 printf("failed to display uboot logo\n"); 1123 else 1124 ret = display_logo(s); 1125 1126 /* Load kernel bmp in rockchip_display_fixup() later */ 1127 } 1128 1129 return ret; 1130 } 1131 1132 enum { 1133 PORT_DIR_IN, 1134 PORT_DIR_OUT, 1135 }; 1136 1137 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1138 { 1139 ofnode panel_node, ports, port, ep; 1140 struct udevice *panel_dev; 1141 int ret; 1142 1143 panel_node = dev_read_subnode(dev, "panel"); 1144 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1145 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1146 &panel_dev); 1147 if (!ret) 1148 goto found; 1149 } 1150 1151 ports = dev_read_subnode(dev, "ports"); 1152 if (!ofnode_valid(ports)) 1153 return NULL; 1154 1155 ofnode_for_each_subnode(port, ports) { 1156 u32 reg; 1157 1158 if (ofnode_read_u32(port, "reg", ®)) 1159 continue; 1160 1161 if (reg != PORT_DIR_OUT) 1162 continue; 1163 1164 ofnode_for_each_subnode(ep, port) { 1165 ofnode _ep, _port; 1166 uint phandle; 1167 1168 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1169 continue; 1170 1171 _ep = ofnode_get_by_phandle(phandle); 1172 if (!ofnode_valid(_ep)) 1173 continue; 1174 1175 _port = ofnode_get_parent(_ep); 1176 if (!ofnode_valid(_port)) 1177 continue; 1178 1179 panel_node = ofnode_get_parent(_port); 1180 if (!ofnode_valid(panel_node)) 1181 continue; 1182 1183 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1184 panel_node, 1185 &panel_dev); 1186 if (!ret) 1187 goto found; 1188 } 1189 } 1190 1191 return NULL; 1192 1193 found: 1194 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1195 } 1196 1197 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1198 { 1199 ofnode node, ports, port, ep; 1200 struct udevice *dev; 1201 int ret; 1202 1203 ports = dev_read_subnode(conn_dev, "ports"); 1204 if (!ofnode_valid(ports)) 1205 return NULL; 1206 1207 ofnode_for_each_subnode(port, ports) { 1208 u32 reg; 1209 1210 if (ofnode_read_u32(port, "reg", ®)) 1211 continue; 1212 1213 if (reg != PORT_DIR_OUT) 1214 continue; 1215 1216 ofnode_for_each_subnode(ep, port) { 1217 ofnode _ep, _port, _ports; 1218 uint phandle; 1219 1220 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1221 continue; 1222 1223 _ep = ofnode_get_by_phandle(phandle); 1224 if (!ofnode_valid(_ep)) 1225 continue; 1226 1227 _port = ofnode_get_parent(_ep); 1228 if (!ofnode_valid(_port)) 1229 continue; 1230 1231 _ports = ofnode_get_parent(_port); 1232 if (!ofnode_valid(_ports)) 1233 continue; 1234 1235 node = ofnode_get_parent(_ports); 1236 if (!ofnode_valid(node)) 1237 continue; 1238 1239 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1240 node, &dev); 1241 if (!ret) 1242 goto found; 1243 } 1244 } 1245 1246 return NULL; 1247 1248 found: 1249 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1250 } 1251 1252 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1253 { 1254 ofnode ep, port, ports, conn; 1255 uint phandle; 1256 struct udevice *dev; 1257 int ret; 1258 1259 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1260 return NULL; 1261 1262 ep = ofnode_get_by_phandle(phandle); 1263 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1264 return NULL; 1265 1266 port = ofnode_get_parent(ep); 1267 if (!ofnode_valid(port)) 1268 return NULL; 1269 1270 ports = ofnode_get_parent(port); 1271 if (!ofnode_valid(ports)) 1272 return NULL; 1273 1274 conn = ofnode_get_parent(ports); 1275 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1276 return NULL; 1277 1278 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1279 if (ret) 1280 return NULL; 1281 1282 return dev; 1283 } 1284 1285 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1286 { 1287 struct udevice *phy_dev; 1288 int ret; 1289 1290 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1291 if (ret) 1292 return NULL; 1293 1294 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1295 } 1296 1297 static int rockchip_display_probe(struct udevice *dev) 1298 { 1299 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1300 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1301 const void *blob = gd->fdt_blob; 1302 int phandle; 1303 struct udevice *crtc_dev, *conn_dev; 1304 struct rockchip_crtc *crtc; 1305 const struct rockchip_connector *conn; 1306 struct rockchip_panel *panel = NULL; 1307 struct rockchip_bridge *bridge = NULL; 1308 struct rockchip_phy *phy = NULL; 1309 struct display_state *s; 1310 const char *name; 1311 int ret; 1312 ofnode node, route_node; 1313 struct device_node *port_node, *vop_node, *ep_node; 1314 struct public_phy_data *data; 1315 1316 /* Before relocation we don't need to do anything */ 1317 if (!(gd->flags & GD_FLG_RELOC)) 1318 return 0; 1319 1320 data = malloc(sizeof(struct public_phy_data)); 1321 if (!data) { 1322 printf("failed to alloc phy data\n"); 1323 return -ENOMEM; 1324 } 1325 data->phy_init = false; 1326 1327 init_display_buffer(plat->base); 1328 1329 route_node = dev_read_subnode(dev, "route"); 1330 if (!ofnode_valid(route_node)) 1331 return -ENODEV; 1332 1333 ofnode_for_each_subnode(node, route_node) { 1334 if (!ofnode_is_available(node)) 1335 continue; 1336 phandle = ofnode_read_u32_default(node, "connect", -1); 1337 if (phandle < 0) { 1338 printf("Warn: can't find connect node's handle\n"); 1339 continue; 1340 } 1341 ep_node = of_find_node_by_phandle(phandle); 1342 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1343 printf("Warn: can't find endpoint node from phandle\n"); 1344 continue; 1345 } 1346 port_node = of_get_parent(ep_node); 1347 if (!ofnode_valid(np_to_ofnode(port_node))) { 1348 printf("Warn: can't find port node from phandle\n"); 1349 continue; 1350 } 1351 vop_node = of_get_parent(port_node); 1352 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1353 printf("Warn: can't find crtc node from phandle\n"); 1354 continue; 1355 } 1356 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1357 np_to_ofnode(vop_node), 1358 &crtc_dev); 1359 if (ret) { 1360 printf("Warn: can't find crtc driver %d\n", ret); 1361 continue; 1362 } 1363 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1364 1365 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1366 if (!conn_dev) { 1367 printf("Warn: can't find connect driver\n"); 1368 continue; 1369 } 1370 1371 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1372 1373 phy = rockchip_of_find_phy(conn_dev); 1374 1375 bridge = rockchip_of_find_bridge(conn_dev); 1376 if (bridge) 1377 panel = rockchip_of_find_panel(bridge->dev); 1378 else 1379 panel = rockchip_of_find_panel(conn_dev); 1380 1381 s = malloc(sizeof(*s)); 1382 if (!s) 1383 continue; 1384 1385 memset(s, 0, sizeof(*s)); 1386 1387 INIT_LIST_HEAD(&s->head); 1388 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1389 if (!ret) 1390 memcpy(s->ulogo_name, name, strlen(name)); 1391 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1392 if (!ret) 1393 memcpy(s->klogo_name, name, strlen(name)); 1394 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1395 if (!strcmp(name, "fullscreen")) 1396 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1397 else 1398 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1399 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1400 if (!strcmp(name, "fullscreen")) 1401 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1402 else 1403 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1404 1405 s->blob = blob; 1406 s->panel_state.panel = panel; 1407 s->conn_state.node = conn_dev->node; 1408 s->conn_state.dev = conn_dev; 1409 s->conn_state.connector = conn; 1410 s->conn_state.phy = phy; 1411 s->conn_state.bridge = bridge; 1412 s->conn_state.overscan.left_margin = 100; 1413 s->conn_state.overscan.right_margin = 100; 1414 s->conn_state.overscan.top_margin = 100; 1415 s->conn_state.overscan.bottom_margin = 100; 1416 s->crtc_state.node = np_to_ofnode(vop_node); 1417 s->crtc_state.dev = crtc_dev; 1418 s->crtc_state.crtc = crtc; 1419 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1420 s->node = node; 1421 1422 if (bridge) 1423 bridge->state = s; 1424 1425 if (panel) 1426 panel->state = s; 1427 1428 get_crtc_mcu_mode(&s->crtc_state); 1429 1430 ret = ofnode_read_u32_default(s->crtc_state.node, 1431 "rockchip,dual-channel-swap", 0); 1432 s->crtc_state.dual_channel_swap = ret; 1433 if (connector_panel_init(s)) { 1434 printf("Warn: Failed to init panel drivers\n"); 1435 free(s); 1436 continue; 1437 } 1438 1439 if (connector_phy_init(s, data)) { 1440 printf("Warn: Failed to init phy drivers\n"); 1441 free(s); 1442 continue; 1443 } 1444 list_add_tail(&s->head, &rockchip_display_list); 1445 } 1446 1447 if (list_empty(&rockchip_display_list)) { 1448 printf("Failed to found available display route\n"); 1449 return -ENODEV; 1450 } 1451 1452 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1453 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1454 uc_priv->bpix = VIDEO_BPP32; 1455 1456 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1457 rockchip_show_fbbase(plat->base); 1458 video_set_flush_dcache(dev, true); 1459 #endif 1460 1461 return 0; 1462 } 1463 1464 void rockchip_display_fixup(void *blob) 1465 { 1466 const struct rockchip_connector_funcs *conn_funcs; 1467 const struct rockchip_crtc_funcs *crtc_funcs; 1468 const struct rockchip_connector *conn; 1469 const struct rockchip_crtc *crtc; 1470 struct display_state *s; 1471 int offset; 1472 const struct device_node *np; 1473 const char *path; 1474 1475 if (!get_display_size()) 1476 return; 1477 1478 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1479 list_for_each_entry(s, &rockchip_display_list, head) 1480 load_bmp_logo(&s->logo, s->klogo_name); 1481 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1482 (u64)memory_start, 1483 (u64)get_display_size()); 1484 if (offset < 0) 1485 printf("failed to reserve drm-loader-logo memory\n"); 1486 } else { 1487 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1488 /* Compatible with rkfb display, only need reserve memory */ 1489 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1490 (u64)memory_start, 1491 MEMORY_POOL_SIZE); 1492 if (offset < 0) 1493 printf("failed to reserve fb-loader-logo memory\n"); 1494 else 1495 list_for_each_entry(s, &rockchip_display_list, head) 1496 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1497 return; 1498 } 1499 1500 list_for_each_entry(s, &rockchip_display_list, head) { 1501 conn = s->conn_state.connector; 1502 if (!conn) 1503 continue; 1504 conn_funcs = conn->funcs; 1505 if (!conn_funcs) { 1506 printf("failed to get exist connector\n"); 1507 continue; 1508 } 1509 1510 crtc = s->crtc_state.crtc; 1511 if (!crtc) 1512 continue; 1513 1514 crtc_funcs = crtc->funcs; 1515 if (!crtc_funcs) { 1516 printf("failed to get exist crtc\n"); 1517 continue; 1518 } 1519 1520 if (crtc_funcs->fixup_dts) 1521 crtc_funcs->fixup_dts(s, blob); 1522 1523 if (conn_funcs->fixup_dts) 1524 conn_funcs->fixup_dts(s, blob); 1525 1526 np = ofnode_to_np(s->node); 1527 path = np->full_name; 1528 fdt_increase_size(blob, 0x400); 1529 #define FDT_SET_U32(name, val) \ 1530 do_fixup_by_path_u32(blob, path, name, val, 1); 1531 1532 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1533 - memory_start; 1534 FDT_SET_U32("logo,offset", offset); 1535 FDT_SET_U32("logo,width", s->logo.width); 1536 FDT_SET_U32("logo,height", s->logo.height); 1537 FDT_SET_U32("logo,bpp", s->logo.bpp); 1538 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1539 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1540 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1541 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1542 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1543 FDT_SET_U32("video,vrefresh", 1544 drm_mode_vrefresh(&s->conn_state.mode)); 1545 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1546 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1547 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1548 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1549 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1550 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1551 #undef FDT_SET_U32 1552 } 1553 } 1554 1555 int rockchip_display_bind(struct udevice *dev) 1556 { 1557 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1558 1559 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1560 1561 return 0; 1562 } 1563 1564 static const struct udevice_id rockchip_display_ids[] = { 1565 { .compatible = "rockchip,display-subsystem" }, 1566 { } 1567 }; 1568 1569 U_BOOT_DRIVER(rockchip_display) = { 1570 .name = "rockchip_display", 1571 .id = UCLASS_VIDEO, 1572 .of_match = rockchip_display_ids, 1573 .bind = rockchip_display_bind, 1574 .probe = rockchip_display_probe, 1575 }; 1576 1577 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1578 char *const argv[]) 1579 { 1580 if (argc != 1) 1581 return CMD_RET_USAGE; 1582 1583 rockchip_show_logo(); 1584 1585 return 0; 1586 } 1587 1588 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1589 char *const argv[]) 1590 { 1591 if (argc != 2) 1592 return CMD_RET_USAGE; 1593 1594 rockchip_show_bmp(argv[1]); 1595 1596 return 0; 1597 } 1598 1599 U_BOOT_CMD( 1600 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1601 "load and display log from resource partition", 1602 NULL 1603 ); 1604 1605 U_BOOT_CMD( 1606 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1607 "load and display bmp from resource partition", 1608 " <bmp_name>" 1609 ); 1610