1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 343 * @p: mode 344 * @adjust_flags: a combination of adjustment flags 345 * 346 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 347 * 348 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 349 * interlaced modes. 350 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 351 * buffers containing two eyes (only adjust the timings when needed, eg. for 352 * "frame packing" or "side by side full"). 353 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 354 * be performed for doublescan and vscan > 1 modes respectively. 355 */ 356 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 357 { 358 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 359 return; 360 361 if (p->flags & DRM_MODE_FLAG_DBLCLK) 362 p->crtc_clock = 2 * p->clock; 363 else 364 p->crtc_clock = p->clock; 365 p->crtc_hdisplay = p->hdisplay; 366 p->crtc_hsync_start = p->hsync_start; 367 p->crtc_hsync_end = p->hsync_end; 368 p->crtc_htotal = p->htotal; 369 p->crtc_hskew = p->hskew; 370 p->crtc_vdisplay = p->vdisplay; 371 p->crtc_vsync_start = p->vsync_start; 372 p->crtc_vsync_end = p->vsync_end; 373 p->crtc_vtotal = p->vtotal; 374 375 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 376 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 377 p->crtc_vdisplay /= 2; 378 p->crtc_vsync_start /= 2; 379 p->crtc_vsync_end /= 2; 380 p->crtc_vtotal /= 2; 381 } 382 } 383 384 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 385 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 386 p->crtc_vdisplay *= 2; 387 p->crtc_vsync_start *= 2; 388 p->crtc_vsync_end *= 2; 389 p->crtc_vtotal *= 2; 390 } 391 } 392 393 if (!(adjust_flags & CRTC_NO_VSCAN)) { 394 if (p->vscan > 1) { 395 p->crtc_vdisplay *= p->vscan; 396 p->crtc_vsync_start *= p->vscan; 397 p->crtc_vsync_end *= p->vscan; 398 p->crtc_vtotal *= p->vscan; 399 } 400 } 401 402 if (adjust_flags & CRTC_STEREO_DOUBLE) { 403 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 404 405 switch (layout) { 406 case DRM_MODE_FLAG_3D_FRAME_PACKING: 407 p->crtc_clock *= 2; 408 p->crtc_vdisplay += p->crtc_vtotal; 409 p->crtc_vsync_start += p->crtc_vtotal; 410 p->crtc_vsync_end += p->crtc_vtotal; 411 p->crtc_vtotal += p->crtc_vtotal; 412 break; 413 } 414 } 415 416 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 417 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 418 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 419 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 420 } 421 422 /** 423 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 424 * output format 425 * 426 * @connector: drm connector under action. 427 * @mode: video mode to be tested. 428 * 429 * Returns: 430 * true if the mode can be supported in YCBCR420 format 431 * false if not. 432 */ 433 bool drm_mode_is_420_only(const struct drm_display_info *display, 434 struct drm_display_mode *mode) 435 { 436 u8 vic = drm_match_cea_mode(mode); 437 438 return test_bit(vic, display->hdmi.y420_vdb_modes); 439 } 440 441 /** 442 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 443 * output format also (along with RGB/YCBCR444/422) 444 * 445 * @display: display under action. 446 * @mode: video mode to be tested. 447 * 448 * Returns: 449 * true if the mode can be support YCBCR420 format 450 * false if not. 451 */ 452 bool drm_mode_is_420_also(const struct drm_display_info *display, 453 struct drm_display_mode *mode) 454 { 455 u8 vic = drm_match_cea_mode(mode); 456 457 return test_bit(vic, display->hdmi.y420_cmdb_modes); 458 } 459 460 /** 461 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 462 * output format 463 * 464 * @display: display under action. 465 * @mode: video mode to be tested. 466 * 467 * Returns: 468 * true if the mode can be supported in YCBCR420 format 469 * false if not. 470 */ 471 bool drm_mode_is_420(const struct drm_display_info *display, 472 struct drm_display_mode *mode) 473 { 474 return drm_mode_is_420_only(display, mode) || 475 drm_mode_is_420_also(display, mode); 476 } 477 478 static int display_get_timing(struct display_state *state) 479 { 480 struct connector_state *conn_state = &state->conn_state; 481 struct drm_display_mode *mode = &conn_state->mode; 482 const struct drm_display_mode *m; 483 struct panel_state *panel_state = &state->panel_state; 484 const struct rockchip_panel *panel = panel_state->panel; 485 486 if (dev_of_valid(panel->dev) && 487 !display_get_timing_from_dts(panel_state, mode)) { 488 printf("Using display timing dts\n"); 489 goto done; 490 } 491 492 if (panel->data) { 493 m = (const struct drm_display_mode *)panel->data; 494 memcpy(mode, m, sizeof(*m)); 495 printf("Using display timing from compatible panel driver\n"); 496 goto done; 497 } 498 499 printf("failed to find display timing\n"); 500 return -ENODEV; 501 done: 502 printf("Detailed mode clock %u kHz, flags[%x]\n" 503 " H: %04d %04d %04d %04d\n" 504 " V: %04d %04d %04d %04d\n" 505 "bus_format: %x\n", 506 mode->clock, mode->flags, 507 mode->hdisplay, mode->hsync_start, 508 mode->hsync_end, mode->htotal, 509 mode->vdisplay, mode->vsync_start, 510 mode->vsync_end, mode->vtotal, 511 conn_state->bus_format); 512 513 return 0; 514 } 515 516 static int display_init(struct display_state *state) 517 { 518 struct connector_state *conn_state = &state->conn_state; 519 struct panel_state *panel_state = &state->panel_state; 520 const struct rockchip_connector *conn = conn_state->connector; 521 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 522 struct crtc_state *crtc_state = &state->crtc_state; 523 struct rockchip_crtc *crtc = crtc_state->crtc; 524 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 525 struct drm_display_mode *mode = &conn_state->mode; 526 int bpc; 527 int ret = 0; 528 static bool __print_once = false; 529 530 if (!__print_once) { 531 __print_once = true; 532 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 533 } 534 535 if (state->is_init) 536 return 0; 537 538 if (!conn_funcs || !crtc_funcs) { 539 printf("failed to find connector or crtc functions\n"); 540 return -ENXIO; 541 } 542 543 if (crtc_state->crtc->active && 544 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 545 sizeof(struct drm_display_mode))) { 546 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 547 crtc_state->dev->name, 548 crtc_state->crtc->active_mode.type, 549 crtc_state->crtc->active_mode.hdisplay, 550 crtc_state->crtc->active_mode.vdisplay, 551 crtc_state->crtc->active_mode.vrefresh); 552 return -ENODEV; 553 } 554 555 if (panel_state->panel) 556 rockchip_panel_init(panel_state->panel); 557 558 if (conn_funcs->init) { 559 ret = conn_funcs->init(state); 560 if (ret) 561 goto deinit; 562 } 563 564 if (conn_state->phy) 565 rockchip_phy_init(conn_state->phy); 566 567 /* 568 * support hotplug, but not connect; 569 */ 570 #ifdef CONFIG_ROCKCHIP_DRM_TVE 571 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 572 printf("hdmi plugin ,skip tve\n"); 573 goto deinit; 574 } 575 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 576 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 577 printf("hdmi plugin ,skip tve\n"); 578 goto deinit; 579 } 580 #endif 581 if (conn_funcs->detect) { 582 ret = conn_funcs->detect(state); 583 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 584 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 585 crtc->hdmi_hpd = ret; 586 #endif 587 if (!ret) 588 goto deinit; 589 } 590 591 if (panel_state->panel) { 592 ret = display_get_timing(state); 593 } else if (conn_state->bridge) { 594 ret = video_bridge_read_edid(conn_state->bridge->dev, 595 conn_state->edid, EDID_SIZE); 596 if (ret > 0) { 597 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 598 &bpc); 599 if (!ret) 600 edid_print_info((void *)&conn_state->edid); 601 } else { 602 ret = video_bridge_get_timing(conn_state->bridge->dev); 603 } 604 } else if (conn_funcs->get_timing) { 605 ret = conn_funcs->get_timing(state); 606 } else if (conn_funcs->get_edid) { 607 ret = conn_funcs->get_edid(state); 608 if (!ret) { 609 ret = edid_get_drm_mode((void *)&conn_state->edid, 610 sizeof(conn_state->edid), mode, 611 &bpc); 612 if (!ret) 613 edid_print_info((void *)&conn_state->edid); 614 } 615 } 616 617 if (ret) 618 goto deinit; 619 620 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 621 622 if (crtc_funcs->init) { 623 ret = crtc_funcs->init(state); 624 if (ret) 625 goto deinit; 626 } 627 state->is_init = 1; 628 629 crtc_state->crtc->active = true; 630 memcpy(&crtc_state->crtc->active_mode, 631 &conn_state->mode, sizeof(struct drm_display_mode)); 632 633 return 0; 634 635 deinit: 636 if (conn_funcs->deinit) 637 conn_funcs->deinit(state); 638 return ret; 639 } 640 641 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 642 { 643 struct crtc_state *crtc_state = &state->crtc_state; 644 const struct rockchip_crtc *crtc = crtc_state->crtc; 645 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 646 int ret; 647 648 if (!state->is_init) 649 return -EINVAL; 650 651 if (crtc_funcs->send_mcu_cmd) { 652 ret = crtc_funcs->send_mcu_cmd(state, type, val); 653 if (ret) 654 return ret; 655 } 656 657 return 0; 658 } 659 660 static int display_set_plane(struct display_state *state) 661 { 662 struct crtc_state *crtc_state = &state->crtc_state; 663 const struct rockchip_crtc *crtc = crtc_state->crtc; 664 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 665 int ret; 666 667 if (!state->is_init) 668 return -EINVAL; 669 670 if (crtc_funcs->set_plane) { 671 ret = crtc_funcs->set_plane(state); 672 if (ret) 673 return ret; 674 } 675 676 return 0; 677 } 678 679 static int display_enable(struct display_state *state) 680 { 681 struct connector_state *conn_state = &state->conn_state; 682 const struct rockchip_connector *conn = conn_state->connector; 683 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 684 struct crtc_state *crtc_state = &state->crtc_state; 685 const struct rockchip_crtc *crtc = crtc_state->crtc; 686 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 687 struct panel_state *panel_state = &state->panel_state; 688 689 if (!state->is_init) 690 return -EINVAL; 691 692 if (state->is_enable) 693 return 0; 694 695 if (crtc_funcs->prepare) 696 crtc_funcs->prepare(state); 697 698 if (conn_funcs->prepare) 699 conn_funcs->prepare(state); 700 701 if (conn_state->bridge) 702 rockchip_bridge_pre_enable(conn_state->bridge); 703 704 if (panel_state->panel) 705 rockchip_panel_prepare(panel_state->panel); 706 707 if (crtc_funcs->enable) 708 crtc_funcs->enable(state); 709 710 if (conn_funcs->enable) 711 conn_funcs->enable(state); 712 713 if (conn_state->bridge) 714 rockchip_bridge_enable(conn_state->bridge); 715 716 if (panel_state->panel) 717 rockchip_panel_enable(panel_state->panel); 718 719 state->is_enable = true; 720 721 return 0; 722 } 723 724 static int display_disable(struct display_state *state) 725 { 726 struct connector_state *conn_state = &state->conn_state; 727 const struct rockchip_connector *conn = conn_state->connector; 728 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 729 struct crtc_state *crtc_state = &state->crtc_state; 730 const struct rockchip_crtc *crtc = crtc_state->crtc; 731 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 732 struct panel_state *panel_state = &state->panel_state; 733 734 if (!state->is_init) 735 return 0; 736 737 if (!state->is_enable) 738 return 0; 739 740 if (panel_state->panel) 741 rockchip_panel_disable(panel_state->panel); 742 743 if (conn_state->bridge) 744 rockchip_bridge_disable(conn_state->bridge); 745 746 if (conn_funcs->disable) 747 conn_funcs->disable(state); 748 749 if (crtc_funcs->disable) 750 crtc_funcs->disable(state); 751 752 if (panel_state->panel) 753 rockchip_panel_unprepare(panel_state->panel); 754 755 if (conn_state->bridge) 756 rockchip_bridge_post_disable(conn_state->bridge); 757 758 if (conn_funcs->unprepare) 759 conn_funcs->unprepare(state); 760 761 state->is_enable = 0; 762 state->is_init = 0; 763 764 return 0; 765 } 766 767 static int display_logo(struct display_state *state) 768 { 769 struct crtc_state *crtc_state = &state->crtc_state; 770 struct connector_state *conn_state = &state->conn_state; 771 struct logo_info *logo = &state->logo; 772 int hdisplay, vdisplay, ret; 773 774 ret = display_init(state); 775 if (!state->is_init || ret) 776 return -ENODEV; 777 778 switch (logo->bpp) { 779 case 16: 780 crtc_state->format = ROCKCHIP_FMT_RGB565; 781 break; 782 case 24: 783 crtc_state->format = ROCKCHIP_FMT_RGB888; 784 break; 785 case 32: 786 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 787 break; 788 default: 789 printf("can't support bmp bits[%d]\n", logo->bpp); 790 return -EINVAL; 791 } 792 crtc_state->rb_swap = logo->bpp != 32; 793 hdisplay = conn_state->mode.hdisplay; 794 vdisplay = conn_state->mode.vdisplay; 795 crtc_state->src_w = logo->width; 796 crtc_state->src_h = logo->height; 797 crtc_state->src_x = 0; 798 crtc_state->src_y = 0; 799 crtc_state->ymirror = logo->ymirror; 800 801 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 802 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 803 804 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 805 crtc_state->crtc_x = 0; 806 crtc_state->crtc_y = 0; 807 crtc_state->crtc_w = hdisplay; 808 crtc_state->crtc_h = vdisplay; 809 } else { 810 if (crtc_state->src_w >= hdisplay) { 811 crtc_state->crtc_x = 0; 812 crtc_state->crtc_w = hdisplay; 813 } else { 814 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 815 crtc_state->crtc_w = crtc_state->src_w; 816 } 817 818 if (crtc_state->src_h >= vdisplay) { 819 crtc_state->crtc_y = 0; 820 crtc_state->crtc_h = vdisplay; 821 } else { 822 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 823 crtc_state->crtc_h = crtc_state->src_h; 824 } 825 } 826 827 display_set_plane(state); 828 display_enable(state); 829 830 return 0; 831 } 832 833 static int get_crtc_id(ofnode connect) 834 { 835 int phandle; 836 struct device_node *remote; 837 int val; 838 839 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 840 if (phandle < 0) 841 goto err; 842 remote = of_find_node_by_phandle(phandle); 843 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 844 if (val < 0) 845 goto err; 846 847 return val; 848 err: 849 printf("Can't get crtc id, default set to id = 0\n"); 850 return 0; 851 } 852 853 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 854 { 855 ofnode mcu_node; 856 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 857 858 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 859 if (!ofnode_valid(mcu_node)) 860 return -ENODEV; 861 862 #define FDT_GET_MCU_INT(val, name) \ 863 do { \ 864 val = ofnode_read_s32_default(mcu_node, name, -1); \ 865 if (val < 0) { \ 866 printf("Can't get %s\n", name); \ 867 return -ENXIO; \ 868 } \ 869 } while (0) 870 871 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 872 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 873 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 874 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 875 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 876 877 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 878 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 879 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 880 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 881 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 882 883 return 0; 884 } 885 886 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 887 { 888 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 889 890 list_for_each_entry(tmp, &logo_cache_list, head) { 891 if (!strcmp(tmp->name, bmp)) { 892 logo_cache = tmp; 893 break; 894 } 895 } 896 897 if (!logo_cache) { 898 logo_cache = malloc(sizeof(*logo_cache)); 899 if (!logo_cache) { 900 printf("failed to alloc memory for logo cache\n"); 901 return NULL; 902 } 903 memset(logo_cache, 0, sizeof(*logo_cache)); 904 strcpy(logo_cache->name, bmp); 905 INIT_LIST_HEAD(&logo_cache->head); 906 list_add_tail(&logo_cache->head, &logo_cache_list); 907 } 908 909 return logo_cache; 910 } 911 912 /* Note: used only for rkfb kernel driver */ 913 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 914 { 915 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 916 void *dst = NULL; 917 int len, size; 918 struct bmp_header *header; 919 920 if (!logo || !bmp_name) 921 return -EINVAL; 922 923 header = malloc(RK_BLK_SIZE); 924 if (!header) 925 return -ENOMEM; 926 927 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 928 if (len != RK_BLK_SIZE) { 929 free(header); 930 return -EINVAL; 931 } 932 size = get_unaligned_le32(&header->file_size); 933 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 934 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 935 if (len != size) { 936 printf("failed to load bmp %s\n", bmp_name); 937 free(header); 938 return -ENOENT; 939 } 940 941 logo->mem = dst; 942 #endif 943 944 return 0; 945 } 946 947 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 948 { 949 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 950 struct rockchip_logo_cache *logo_cache; 951 struct bmp_header *header; 952 void *dst = NULL, *pdst; 953 int size, len; 954 int ret = 0; 955 int reserved = 0; 956 957 if (!logo || !bmp_name) 958 return -EINVAL; 959 logo_cache = find_or_alloc_logo_cache(bmp_name); 960 if (!logo_cache) 961 return -ENOMEM; 962 963 if (logo_cache->logo.mem) { 964 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 965 return 0; 966 } 967 968 header = malloc(RK_BLK_SIZE); 969 if (!header) 970 return -ENOMEM; 971 972 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 973 if (len != RK_BLK_SIZE) { 974 ret = -EINVAL; 975 goto free_header; 976 } 977 978 logo->bpp = get_unaligned_le16(&header->bit_count); 979 logo->width = get_unaligned_le32(&header->width); 980 logo->height = get_unaligned_le32(&header->height); 981 reserved = get_unaligned_le32(&header->reserved); 982 if (logo->height < 0) 983 logo->height = -logo->height; 984 size = get_unaligned_le32(&header->file_size); 985 if (!can_direct_logo(logo->bpp)) { 986 if (size > MEMORY_POOL_SIZE) { 987 printf("failed to use boot buf as temp bmp buffer\n"); 988 ret = -ENOMEM; 989 goto free_header; 990 } 991 pdst = get_display_buffer(size); 992 993 } else { 994 pdst = get_display_buffer(size); 995 dst = pdst; 996 } 997 998 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 999 if (len != size) { 1000 printf("failed to load bmp %s\n", bmp_name); 1001 ret = -ENOENT; 1002 goto free_header; 1003 } 1004 1005 if (!can_direct_logo(logo->bpp)) { 1006 int dst_size; 1007 /* 1008 * TODO: force use 16bpp if bpp less than 16; 1009 */ 1010 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1011 dst_size = logo->width * logo->height * logo->bpp >> 3; 1012 1013 dst = get_display_buffer(dst_size); 1014 if (!dst) { 1015 ret = -ENOMEM; 1016 goto free_header; 1017 } 1018 if (bmpdecoder(pdst, dst, logo->bpp)) { 1019 printf("failed to decode bmp %s\n", bmp_name); 1020 ret = -EINVAL; 1021 goto free_header; 1022 } 1023 flush_dcache_range((ulong)dst, 1024 ALIGN((ulong)dst + dst_size, 1025 CONFIG_SYS_CACHELINE_SIZE)); 1026 1027 logo->offset = 0; 1028 logo->ymirror = 0; 1029 } else { 1030 logo->offset = get_unaligned_le32(&header->data_offset); 1031 if (reserved == BMP_PROCESSED_FLAG) 1032 logo->ymirror = 0; 1033 else 1034 logo->ymirror = 1; 1035 } 1036 logo->mem = dst; 1037 1038 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1039 1040 free_header: 1041 1042 free(header); 1043 1044 return ret; 1045 #else 1046 return -EINVAL; 1047 #endif 1048 } 1049 1050 void rockchip_show_fbbase(ulong fbbase) 1051 { 1052 struct display_state *s; 1053 1054 list_for_each_entry(s, &rockchip_display_list, head) { 1055 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1056 s->logo.mem = (char *)fbbase; 1057 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1058 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1059 s->logo.bpp = 32; 1060 s->logo.ymirror = 0; 1061 1062 display_logo(s); 1063 } 1064 } 1065 1066 int rockchip_show_bmp(const char *bmp) 1067 { 1068 struct display_state *s; 1069 int ret = 0; 1070 1071 if (!bmp) { 1072 list_for_each_entry(s, &rockchip_display_list, head) 1073 display_disable(s); 1074 return -ENOENT; 1075 } 1076 1077 list_for_each_entry(s, &rockchip_display_list, head) { 1078 s->logo.mode = s->charge_logo_mode; 1079 if (load_bmp_logo(&s->logo, bmp)) 1080 continue; 1081 ret = display_logo(s); 1082 } 1083 1084 return ret; 1085 } 1086 1087 int rockchip_show_logo(void) 1088 { 1089 struct display_state *s; 1090 int ret = 0; 1091 1092 list_for_each_entry(s, &rockchip_display_list, head) { 1093 s->logo.mode = s->logo_mode; 1094 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1095 printf("failed to display uboot logo\n"); 1096 else 1097 ret = display_logo(s); 1098 1099 /* Load kernel bmp in rockchip_display_fixup() later */ 1100 } 1101 1102 return ret; 1103 } 1104 1105 enum { 1106 PORT_DIR_IN, 1107 PORT_DIR_OUT, 1108 }; 1109 1110 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1111 { 1112 ofnode panel_node, ports, port, ep; 1113 struct udevice *panel_dev; 1114 int ret; 1115 1116 panel_node = dev_read_subnode(dev, "panel"); 1117 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1118 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1119 &panel_dev); 1120 if (!ret) 1121 goto found; 1122 } 1123 1124 ports = dev_read_subnode(dev, "ports"); 1125 if (!ofnode_valid(ports)) 1126 return NULL; 1127 1128 ofnode_for_each_subnode(port, ports) { 1129 u32 reg; 1130 1131 if (ofnode_read_u32(port, "reg", ®)) 1132 continue; 1133 1134 if (reg != PORT_DIR_OUT) 1135 continue; 1136 1137 ofnode_for_each_subnode(ep, port) { 1138 ofnode _ep, _port; 1139 uint phandle; 1140 1141 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1142 continue; 1143 1144 _ep = ofnode_get_by_phandle(phandle); 1145 if (!ofnode_valid(_ep)) 1146 continue; 1147 1148 _port = ofnode_get_parent(_ep); 1149 if (!ofnode_valid(_port)) 1150 continue; 1151 1152 panel_node = ofnode_get_parent(_port); 1153 if (!ofnode_valid(panel_node)) 1154 continue; 1155 1156 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1157 panel_node, 1158 &panel_dev); 1159 if (!ret) 1160 goto found; 1161 } 1162 } 1163 1164 return NULL; 1165 1166 found: 1167 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1168 } 1169 1170 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1171 { 1172 ofnode node, ports, port, ep; 1173 struct udevice *dev; 1174 int ret; 1175 1176 ports = dev_read_subnode(conn_dev, "ports"); 1177 if (!ofnode_valid(ports)) 1178 return NULL; 1179 1180 ofnode_for_each_subnode(port, ports) { 1181 u32 reg; 1182 1183 if (ofnode_read_u32(port, "reg", ®)) 1184 continue; 1185 1186 if (reg != PORT_DIR_OUT) 1187 continue; 1188 1189 ofnode_for_each_subnode(ep, port) { 1190 ofnode _ep, _port, _ports; 1191 uint phandle; 1192 1193 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1194 continue; 1195 1196 _ep = ofnode_get_by_phandle(phandle); 1197 if (!ofnode_valid(_ep)) 1198 continue; 1199 1200 _port = ofnode_get_parent(_ep); 1201 if (!ofnode_valid(_port)) 1202 continue; 1203 1204 _ports = ofnode_get_parent(_port); 1205 if (!ofnode_valid(_ports)) 1206 continue; 1207 1208 node = ofnode_get_parent(_ports); 1209 if (!ofnode_valid(node)) 1210 continue; 1211 1212 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1213 node, &dev); 1214 if (!ret) 1215 goto found; 1216 } 1217 } 1218 1219 return NULL; 1220 1221 found: 1222 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1223 } 1224 1225 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1226 { 1227 ofnode ep, port, ports, conn; 1228 uint phandle; 1229 struct udevice *dev; 1230 int ret; 1231 1232 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1233 return NULL; 1234 1235 ep = ofnode_get_by_phandle(phandle); 1236 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1237 return NULL; 1238 1239 port = ofnode_get_parent(ep); 1240 if (!ofnode_valid(port)) 1241 return NULL; 1242 1243 ports = ofnode_get_parent(port); 1244 if (!ofnode_valid(ports)) 1245 return NULL; 1246 1247 conn = ofnode_get_parent(ports); 1248 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1249 return NULL; 1250 1251 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1252 if (ret) 1253 return NULL; 1254 1255 return dev; 1256 } 1257 1258 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1259 { 1260 struct udevice *phy_dev; 1261 int ret; 1262 1263 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1264 if (ret) 1265 return NULL; 1266 1267 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1268 } 1269 1270 static int rockchip_display_probe(struct udevice *dev) 1271 { 1272 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1273 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1274 const void *blob = gd->fdt_blob; 1275 int phandle; 1276 struct udevice *crtc_dev, *conn_dev; 1277 struct rockchip_crtc *crtc; 1278 const struct rockchip_connector *conn; 1279 struct rockchip_panel *panel = NULL; 1280 struct rockchip_bridge *bridge = NULL; 1281 struct rockchip_phy *phy = NULL; 1282 struct display_state *s; 1283 const char *name; 1284 int ret; 1285 ofnode node, route_node; 1286 struct device_node *port_node, *vop_node, *ep_node; 1287 struct public_phy_data *data; 1288 1289 /* Before relocation we don't need to do anything */ 1290 if (!(gd->flags & GD_FLG_RELOC)) 1291 return 0; 1292 1293 data = malloc(sizeof(struct public_phy_data)); 1294 if (!data) { 1295 printf("failed to alloc phy data\n"); 1296 return -ENOMEM; 1297 } 1298 data->phy_init = false; 1299 1300 init_display_buffer(plat->base); 1301 1302 route_node = dev_read_subnode(dev, "route"); 1303 if (!ofnode_valid(route_node)) 1304 return -ENODEV; 1305 1306 ofnode_for_each_subnode(node, route_node) { 1307 if (!ofnode_is_available(node)) 1308 continue; 1309 phandle = ofnode_read_u32_default(node, "connect", -1); 1310 if (phandle < 0) { 1311 printf("Warn: can't find connect node's handle\n"); 1312 continue; 1313 } 1314 ep_node = of_find_node_by_phandle(phandle); 1315 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1316 printf("Warn: can't find endpoint node from phandle\n"); 1317 continue; 1318 } 1319 port_node = of_get_parent(ep_node); 1320 if (!ofnode_valid(np_to_ofnode(port_node))) { 1321 printf("Warn: can't find port node from phandle\n"); 1322 continue; 1323 } 1324 vop_node = of_get_parent(port_node); 1325 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1326 printf("Warn: can't find crtc node from phandle\n"); 1327 continue; 1328 } 1329 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1330 np_to_ofnode(vop_node), 1331 &crtc_dev); 1332 if (ret) { 1333 printf("Warn: can't find crtc driver %d\n", ret); 1334 continue; 1335 } 1336 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1337 1338 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1339 if (!conn_dev) { 1340 printf("Warn: can't find connect driver\n"); 1341 continue; 1342 } 1343 1344 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1345 1346 phy = rockchip_of_find_phy(conn_dev); 1347 1348 bridge = rockchip_of_find_bridge(conn_dev); 1349 if (bridge) 1350 panel = rockchip_of_find_panel(bridge->dev); 1351 else 1352 panel = rockchip_of_find_panel(conn_dev); 1353 1354 s = malloc(sizeof(*s)); 1355 if (!s) 1356 continue; 1357 1358 memset(s, 0, sizeof(*s)); 1359 1360 INIT_LIST_HEAD(&s->head); 1361 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1362 if (!ret) 1363 memcpy(s->ulogo_name, name, strlen(name)); 1364 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1365 if (!ret) 1366 memcpy(s->klogo_name, name, strlen(name)); 1367 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1368 if (!strcmp(name, "fullscreen")) 1369 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1370 else 1371 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1372 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1373 if (!strcmp(name, "fullscreen")) 1374 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1375 else 1376 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1377 1378 s->blob = blob; 1379 s->panel_state.panel = panel; 1380 s->conn_state.node = conn_dev->node; 1381 s->conn_state.dev = conn_dev; 1382 s->conn_state.connector = conn; 1383 s->conn_state.phy = phy; 1384 s->conn_state.bridge = bridge; 1385 s->conn_state.overscan.left_margin = 100; 1386 s->conn_state.overscan.right_margin = 100; 1387 s->conn_state.overscan.top_margin = 100; 1388 s->conn_state.overscan.bottom_margin = 100; 1389 s->crtc_state.node = np_to_ofnode(vop_node); 1390 s->crtc_state.dev = crtc_dev; 1391 s->crtc_state.crtc = crtc; 1392 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1393 s->node = node; 1394 1395 if (bridge) 1396 bridge->state = s; 1397 1398 if (panel) 1399 panel->state = s; 1400 1401 get_crtc_mcu_mode(&s->crtc_state); 1402 1403 ret = ofnode_read_u32_default(s->crtc_state.node, 1404 "rockchip,dual-channel-swap", 0); 1405 s->crtc_state.dual_channel_swap = ret; 1406 if (connector_panel_init(s)) { 1407 printf("Warn: Failed to init panel drivers\n"); 1408 free(s); 1409 continue; 1410 } 1411 1412 if (connector_phy_init(s, data)) { 1413 printf("Warn: Failed to init phy drivers\n"); 1414 free(s); 1415 continue; 1416 } 1417 list_add_tail(&s->head, &rockchip_display_list); 1418 } 1419 1420 if (list_empty(&rockchip_display_list)) { 1421 printf("Failed to found available display route\n"); 1422 return -ENODEV; 1423 } 1424 1425 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1426 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1427 uc_priv->bpix = VIDEO_BPP32; 1428 1429 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1430 rockchip_show_fbbase(plat->base); 1431 video_set_flush_dcache(dev, true); 1432 #endif 1433 1434 return 0; 1435 } 1436 1437 void rockchip_display_fixup(void *blob) 1438 { 1439 const struct rockchip_connector_funcs *conn_funcs; 1440 const struct rockchip_crtc_funcs *crtc_funcs; 1441 const struct rockchip_connector *conn; 1442 const struct rockchip_crtc *crtc; 1443 struct display_state *s; 1444 int offset; 1445 const struct device_node *np; 1446 const char *path; 1447 1448 if (!get_display_size()) 1449 return; 1450 1451 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1452 list_for_each_entry(s, &rockchip_display_list, head) 1453 load_bmp_logo(&s->logo, s->klogo_name); 1454 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1455 (u64)memory_start, 1456 (u64)get_display_size()); 1457 if (offset < 0) 1458 printf("failed to reserve drm-loader-logo memory\n"); 1459 } else { 1460 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1461 /* Compatible with rkfb display, only need reserve memory */ 1462 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1463 (u64)memory_start, 1464 MEMORY_POOL_SIZE); 1465 if (offset < 0) 1466 printf("failed to reserve fb-loader-logo memory\n"); 1467 else 1468 list_for_each_entry(s, &rockchip_display_list, head) 1469 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1470 return; 1471 } 1472 1473 list_for_each_entry(s, &rockchip_display_list, head) { 1474 conn = s->conn_state.connector; 1475 if (!conn) 1476 continue; 1477 conn_funcs = conn->funcs; 1478 if (!conn_funcs) { 1479 printf("failed to get exist connector\n"); 1480 continue; 1481 } 1482 1483 crtc = s->crtc_state.crtc; 1484 if (!crtc) 1485 continue; 1486 1487 crtc_funcs = crtc->funcs; 1488 if (!crtc_funcs) { 1489 printf("failed to get exist crtc\n"); 1490 continue; 1491 } 1492 1493 if (crtc_funcs->fixup_dts) 1494 crtc_funcs->fixup_dts(s, blob); 1495 1496 if (conn_funcs->fixup_dts) 1497 conn_funcs->fixup_dts(s, blob); 1498 1499 np = ofnode_to_np(s->node); 1500 path = np->full_name; 1501 fdt_increase_size(blob, 0x400); 1502 #define FDT_SET_U32(name, val) \ 1503 do_fixup_by_path_u32(blob, path, name, val, 1); 1504 1505 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1506 - memory_start; 1507 FDT_SET_U32("logo,offset", offset); 1508 FDT_SET_U32("logo,width", s->logo.width); 1509 FDT_SET_U32("logo,height", s->logo.height); 1510 FDT_SET_U32("logo,bpp", s->logo.bpp); 1511 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1512 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1513 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1514 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1515 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1516 FDT_SET_U32("video,vrefresh", 1517 drm_mode_vrefresh(&s->conn_state.mode)); 1518 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1519 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1520 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1521 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1522 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1523 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1524 #undef FDT_SET_U32 1525 } 1526 } 1527 1528 int rockchip_display_bind(struct udevice *dev) 1529 { 1530 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1531 1532 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1533 1534 return 0; 1535 } 1536 1537 static const struct udevice_id rockchip_display_ids[] = { 1538 { .compatible = "rockchip,display-subsystem" }, 1539 { } 1540 }; 1541 1542 U_BOOT_DRIVER(rockchip_display) = { 1543 .name = "rockchip_display", 1544 .id = UCLASS_VIDEO, 1545 .of_match = rockchip_display_ids, 1546 .bind = rockchip_display_bind, 1547 .probe = rockchip_display_probe, 1548 }; 1549 1550 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1551 char *const argv[]) 1552 { 1553 if (argc != 1) 1554 return CMD_RET_USAGE; 1555 1556 rockchip_show_logo(); 1557 1558 return 0; 1559 } 1560 1561 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1562 char *const argv[]) 1563 { 1564 if (argc != 2) 1565 return CMD_RET_USAGE; 1566 1567 rockchip_show_bmp(argv[1]); 1568 1569 return 0; 1570 } 1571 1572 U_BOOT_CMD( 1573 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1574 "load and display log from resource partition", 1575 NULL 1576 ); 1577 1578 U_BOOT_CMD( 1579 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1580 "load and display bmp from resource partition", 1581 " <bmp_name>" 1582 ); 1583