1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 343 * @edid_data: structure store mode list 344 * @max_output: vop max output resolution 345 */ 346 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 347 struct vop_rect *max_output) 348 { 349 int i; 350 351 for (i = 0; i < edid_data->modes; i++) { 352 if (edid_data->mode_buf[i].hdisplay > max_output->width || 353 edid_data->mode_buf[i].vdisplay > max_output->height) 354 edid_data->mode_buf[i].invalid = true; 355 } 356 } 357 358 /** 359 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 360 * @p: mode 361 * @adjust_flags: a combination of adjustment flags 362 * 363 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 364 * 365 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 366 * interlaced modes. 367 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 368 * buffers containing two eyes (only adjust the timings when needed, eg. for 369 * "frame packing" or "side by side full"). 370 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 371 * be performed for doublescan and vscan > 1 modes respectively. 372 */ 373 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 374 { 375 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 376 return; 377 378 if (p->flags & DRM_MODE_FLAG_DBLCLK) 379 p->crtc_clock = 2 * p->clock; 380 else 381 p->crtc_clock = p->clock; 382 p->crtc_hdisplay = p->hdisplay; 383 p->crtc_hsync_start = p->hsync_start; 384 p->crtc_hsync_end = p->hsync_end; 385 p->crtc_htotal = p->htotal; 386 p->crtc_hskew = p->hskew; 387 p->crtc_vdisplay = p->vdisplay; 388 p->crtc_vsync_start = p->vsync_start; 389 p->crtc_vsync_end = p->vsync_end; 390 p->crtc_vtotal = p->vtotal; 391 392 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 393 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 394 p->crtc_vdisplay /= 2; 395 p->crtc_vsync_start /= 2; 396 p->crtc_vsync_end /= 2; 397 p->crtc_vtotal /= 2; 398 } 399 } 400 401 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 402 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 403 p->crtc_vdisplay *= 2; 404 p->crtc_vsync_start *= 2; 405 p->crtc_vsync_end *= 2; 406 p->crtc_vtotal *= 2; 407 } 408 } 409 410 if (!(adjust_flags & CRTC_NO_VSCAN)) { 411 if (p->vscan > 1) { 412 p->crtc_vdisplay *= p->vscan; 413 p->crtc_vsync_start *= p->vscan; 414 p->crtc_vsync_end *= p->vscan; 415 p->crtc_vtotal *= p->vscan; 416 } 417 } 418 419 if (adjust_flags & CRTC_STEREO_DOUBLE) { 420 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 421 422 switch (layout) { 423 case DRM_MODE_FLAG_3D_FRAME_PACKING: 424 p->crtc_clock *= 2; 425 p->crtc_vdisplay += p->crtc_vtotal; 426 p->crtc_vsync_start += p->crtc_vtotal; 427 p->crtc_vsync_end += p->crtc_vtotal; 428 p->crtc_vtotal += p->crtc_vtotal; 429 break; 430 } 431 } 432 433 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 434 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 435 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 436 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 437 } 438 439 /** 440 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 441 * output format 442 * 443 * @connector: drm connector under action. 444 * @mode: video mode to be tested. 445 * 446 * Returns: 447 * true if the mode can be supported in YCBCR420 format 448 * false if not. 449 */ 450 bool drm_mode_is_420_only(const struct drm_display_info *display, 451 struct drm_display_mode *mode) 452 { 453 u8 vic = drm_match_cea_mode(mode); 454 455 return test_bit(vic, display->hdmi.y420_vdb_modes); 456 } 457 458 /** 459 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 460 * output format also (along with RGB/YCBCR444/422) 461 * 462 * @display: display under action. 463 * @mode: video mode to be tested. 464 * 465 * Returns: 466 * true if the mode can be support YCBCR420 format 467 * false if not. 468 */ 469 bool drm_mode_is_420_also(const struct drm_display_info *display, 470 struct drm_display_mode *mode) 471 { 472 u8 vic = drm_match_cea_mode(mode); 473 474 return test_bit(vic, display->hdmi.y420_cmdb_modes); 475 } 476 477 /** 478 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 479 * output format 480 * 481 * @display: display under action. 482 * @mode: video mode to be tested. 483 * 484 * Returns: 485 * true if the mode can be supported in YCBCR420 format 486 * false if not. 487 */ 488 bool drm_mode_is_420(const struct drm_display_info *display, 489 struct drm_display_mode *mode) 490 { 491 return drm_mode_is_420_only(display, mode) || 492 drm_mode_is_420_also(display, mode); 493 } 494 495 static int display_get_timing(struct display_state *state) 496 { 497 struct connector_state *conn_state = &state->conn_state; 498 struct drm_display_mode *mode = &conn_state->mode; 499 const struct drm_display_mode *m; 500 struct panel_state *panel_state = &state->panel_state; 501 const struct rockchip_panel *panel = panel_state->panel; 502 503 if (dev_of_valid(panel->dev) && 504 !display_get_timing_from_dts(panel_state, mode)) { 505 printf("Using display timing dts\n"); 506 return 0; 507 } 508 509 if (panel->data) { 510 m = (const struct drm_display_mode *)panel->data; 511 memcpy(mode, m, sizeof(*m)); 512 printf("Using display timing from compatible panel driver\n"); 513 return 0; 514 } 515 516 return -ENODEV; 517 } 518 519 static int display_init(struct display_state *state) 520 { 521 struct connector_state *conn_state = &state->conn_state; 522 struct panel_state *panel_state = &state->panel_state; 523 const struct rockchip_connector *conn = conn_state->connector; 524 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 525 struct crtc_state *crtc_state = &state->crtc_state; 526 struct rockchip_crtc *crtc = crtc_state->crtc; 527 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 528 struct drm_display_mode *mode = &conn_state->mode; 529 int ret = 0; 530 static bool __print_once = false; 531 #if defined(CONFIG_I2C_EDID) 532 int bpc; 533 #endif 534 if (!__print_once) { 535 __print_once = true; 536 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 537 } 538 539 if (state->is_init) 540 return 0; 541 542 if (!conn_funcs || !crtc_funcs) { 543 printf("failed to find connector or crtc functions\n"); 544 return -ENXIO; 545 } 546 547 if (crtc_state->crtc->active && 548 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 549 sizeof(struct drm_display_mode))) { 550 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 551 crtc_state->dev->name, 552 crtc_state->crtc->active_mode.type, 553 crtc_state->crtc->active_mode.hdisplay, 554 crtc_state->crtc->active_mode.vdisplay, 555 crtc_state->crtc->active_mode.vrefresh); 556 return -ENODEV; 557 } 558 559 if (crtc_funcs->preinit) { 560 ret = crtc_funcs->preinit(state); 561 if (ret) 562 return ret; 563 } 564 565 if (panel_state->panel) 566 rockchip_panel_init(panel_state->panel); 567 568 if (conn_funcs->init) { 569 ret = conn_funcs->init(state); 570 if (ret) 571 goto deinit; 572 } 573 574 if (conn_state->phy) 575 rockchip_phy_init(conn_state->phy); 576 577 /* 578 * support hotplug, but not connect; 579 */ 580 #ifdef CONFIG_ROCKCHIP_DRM_TVE 581 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 582 printf("hdmi plugin ,skip tve\n"); 583 goto deinit; 584 } 585 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 586 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 587 printf("hdmi plugin ,skip tve\n"); 588 goto deinit; 589 } 590 #endif 591 if (conn_funcs->detect) { 592 ret = conn_funcs->detect(state); 593 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 594 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 595 crtc->hdmi_hpd = ret; 596 #endif 597 if (!ret) 598 goto deinit; 599 } 600 601 if (panel_state->panel) { 602 ret = display_get_timing(state); 603 if (!ret) 604 conn_state->bpc = panel_state->panel->bpc; 605 #if defined(CONFIG_I2C_EDID) 606 if (ret < 0 && conn_funcs->get_edid) { 607 rockchip_panel_prepare(panel_state->panel); 608 609 ret = conn_funcs->get_edid(state); 610 if (!ret) { 611 ret = edid_get_drm_mode((void *)&conn_state->edid, 612 sizeof(conn_state->edid), 613 mode, &bpc); 614 if (!ret) { 615 conn_state->bpc = bpc; 616 edid_print_info((void *)&conn_state->edid); 617 } 618 } 619 } 620 #endif 621 } else if (conn_state->bridge) { 622 ret = video_bridge_read_edid(conn_state->bridge->dev, 623 conn_state->edid, EDID_SIZE); 624 if (ret > 0) { 625 #if defined(CONFIG_I2C_EDID) 626 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 627 &bpc); 628 if (!ret) { 629 conn_state->bpc = bpc; 630 edid_print_info((void *)&conn_state->edid); 631 } 632 #endif 633 } else { 634 ret = video_bridge_get_timing(conn_state->bridge->dev); 635 } 636 } else if (conn_funcs->get_timing) { 637 ret = conn_funcs->get_timing(state); 638 } else if (conn_funcs->get_edid) { 639 ret = conn_funcs->get_edid(state); 640 #if defined(CONFIG_I2C_EDID) 641 if (!ret) { 642 ret = edid_get_drm_mode((void *)&conn_state->edid, 643 sizeof(conn_state->edid), mode, 644 &bpc); 645 if (!ret) { 646 conn_state->bpc = bpc; 647 edid_print_info((void *)&conn_state->edid); 648 } 649 } 650 #endif 651 } 652 653 if (ret) 654 goto deinit; 655 656 printf("Detailed mode clock %u kHz, flags[%x]\n" 657 " H: %04d %04d %04d %04d\n" 658 " V: %04d %04d %04d %04d\n" 659 "bus_format: %x\n", 660 mode->clock, mode->flags, 661 mode->hdisplay, mode->hsync_start, 662 mode->hsync_end, mode->htotal, 663 mode->vdisplay, mode->vsync_start, 664 mode->vsync_end, mode->vtotal, 665 conn_state->bus_format); 666 667 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 668 669 if (crtc_funcs->init) { 670 ret = crtc_funcs->init(state); 671 if (ret) 672 goto deinit; 673 } 674 state->is_init = 1; 675 676 crtc_state->crtc->active = true; 677 memcpy(&crtc_state->crtc->active_mode, 678 &conn_state->mode, sizeof(struct drm_display_mode)); 679 680 return 0; 681 682 deinit: 683 if (conn_funcs->deinit) 684 conn_funcs->deinit(state); 685 return ret; 686 } 687 688 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 689 { 690 struct crtc_state *crtc_state = &state->crtc_state; 691 const struct rockchip_crtc *crtc = crtc_state->crtc; 692 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 693 int ret; 694 695 if (!state->is_init) 696 return -EINVAL; 697 698 if (crtc_funcs->send_mcu_cmd) { 699 ret = crtc_funcs->send_mcu_cmd(state, type, val); 700 if (ret) 701 return ret; 702 } 703 704 return 0; 705 } 706 707 static int display_set_plane(struct display_state *state) 708 { 709 struct crtc_state *crtc_state = &state->crtc_state; 710 const struct rockchip_crtc *crtc = crtc_state->crtc; 711 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 712 int ret; 713 714 if (!state->is_init) 715 return -EINVAL; 716 717 if (crtc_funcs->set_plane) { 718 ret = crtc_funcs->set_plane(state); 719 if (ret) 720 return ret; 721 } 722 723 return 0; 724 } 725 726 static int display_enable(struct display_state *state) 727 { 728 struct connector_state *conn_state = &state->conn_state; 729 const struct rockchip_connector *conn = conn_state->connector; 730 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 731 struct crtc_state *crtc_state = &state->crtc_state; 732 const struct rockchip_crtc *crtc = crtc_state->crtc; 733 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 734 struct panel_state *panel_state = &state->panel_state; 735 736 if (!state->is_init) 737 return -EINVAL; 738 739 if (state->is_enable) 740 return 0; 741 742 if (crtc_funcs->prepare) 743 crtc_funcs->prepare(state); 744 745 if (conn_funcs->prepare) 746 conn_funcs->prepare(state); 747 748 if (conn_state->bridge) 749 rockchip_bridge_pre_enable(conn_state->bridge); 750 751 if (panel_state->panel) 752 rockchip_panel_prepare(panel_state->panel); 753 754 if (crtc_funcs->enable) 755 crtc_funcs->enable(state); 756 757 if (conn_funcs->enable) 758 conn_funcs->enable(state); 759 760 if (conn_state->bridge) 761 rockchip_bridge_enable(conn_state->bridge); 762 763 if (panel_state->panel) 764 rockchip_panel_enable(panel_state->panel); 765 766 state->is_enable = true; 767 768 return 0; 769 } 770 771 static int display_disable(struct display_state *state) 772 { 773 struct connector_state *conn_state = &state->conn_state; 774 const struct rockchip_connector *conn = conn_state->connector; 775 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 776 struct crtc_state *crtc_state = &state->crtc_state; 777 const struct rockchip_crtc *crtc = crtc_state->crtc; 778 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 779 struct panel_state *panel_state = &state->panel_state; 780 781 if (!state->is_init) 782 return 0; 783 784 if (!state->is_enable) 785 return 0; 786 787 if (panel_state->panel) 788 rockchip_panel_disable(panel_state->panel); 789 790 if (conn_state->bridge) 791 rockchip_bridge_disable(conn_state->bridge); 792 793 if (conn_funcs->disable) 794 conn_funcs->disable(state); 795 796 if (crtc_funcs->disable) 797 crtc_funcs->disable(state); 798 799 if (panel_state->panel) 800 rockchip_panel_unprepare(panel_state->panel); 801 802 if (conn_state->bridge) 803 rockchip_bridge_post_disable(conn_state->bridge); 804 805 if (conn_funcs->unprepare) 806 conn_funcs->unprepare(state); 807 808 state->is_enable = 0; 809 state->is_init = 0; 810 811 return 0; 812 } 813 814 static int display_logo(struct display_state *state) 815 { 816 struct crtc_state *crtc_state = &state->crtc_state; 817 struct connector_state *conn_state = &state->conn_state; 818 struct logo_info *logo = &state->logo; 819 int hdisplay, vdisplay, ret; 820 821 ret = display_init(state); 822 if (!state->is_init || ret) 823 return -ENODEV; 824 825 switch (logo->bpp) { 826 case 16: 827 crtc_state->format = ROCKCHIP_FMT_RGB565; 828 break; 829 case 24: 830 crtc_state->format = ROCKCHIP_FMT_RGB888; 831 break; 832 case 32: 833 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 834 break; 835 default: 836 printf("can't support bmp bits[%d]\n", logo->bpp); 837 return -EINVAL; 838 } 839 hdisplay = conn_state->mode.hdisplay; 840 vdisplay = conn_state->mode.vdisplay; 841 crtc_state->src_w = logo->width; 842 crtc_state->src_h = logo->height; 843 crtc_state->src_x = 0; 844 crtc_state->src_y = 0; 845 crtc_state->ymirror = logo->ymirror; 846 847 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 848 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 849 850 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 851 crtc_state->crtc_x = 0; 852 crtc_state->crtc_y = 0; 853 crtc_state->crtc_w = hdisplay; 854 crtc_state->crtc_h = vdisplay; 855 } else { 856 if (crtc_state->src_w >= hdisplay) { 857 crtc_state->crtc_x = 0; 858 crtc_state->crtc_w = hdisplay; 859 } else { 860 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 861 crtc_state->crtc_w = crtc_state->src_w; 862 } 863 864 if (crtc_state->src_h >= vdisplay) { 865 crtc_state->crtc_y = 0; 866 crtc_state->crtc_h = vdisplay; 867 } else { 868 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 869 crtc_state->crtc_h = crtc_state->src_h; 870 } 871 } 872 873 display_set_plane(state); 874 display_enable(state); 875 876 return 0; 877 } 878 879 static int get_crtc_id(ofnode connect) 880 { 881 int phandle; 882 struct device_node *remote; 883 int val; 884 885 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 886 if (phandle < 0) 887 goto err; 888 remote = of_find_node_by_phandle(phandle); 889 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 890 if (val < 0) 891 goto err; 892 893 return val; 894 err: 895 printf("Can't get crtc id, default set to id = 0\n"); 896 return 0; 897 } 898 899 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 900 { 901 ofnode mcu_node; 902 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 903 904 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 905 if (!ofnode_valid(mcu_node)) 906 return -ENODEV; 907 908 #define FDT_GET_MCU_INT(val, name) \ 909 do { \ 910 val = ofnode_read_s32_default(mcu_node, name, -1); \ 911 if (val < 0) { \ 912 printf("Can't get %s\n", name); \ 913 return -ENXIO; \ 914 } \ 915 } while (0) 916 917 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 918 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 919 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 920 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 921 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 922 923 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 924 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 925 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 926 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 927 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 928 929 return 0; 930 } 931 932 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 933 { 934 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 935 936 list_for_each_entry(tmp, &logo_cache_list, head) { 937 if (!strcmp(tmp->name, bmp)) { 938 logo_cache = tmp; 939 break; 940 } 941 } 942 943 if (!logo_cache) { 944 logo_cache = malloc(sizeof(*logo_cache)); 945 if (!logo_cache) { 946 printf("failed to alloc memory for logo cache\n"); 947 return NULL; 948 } 949 memset(logo_cache, 0, sizeof(*logo_cache)); 950 strcpy(logo_cache->name, bmp); 951 INIT_LIST_HEAD(&logo_cache->head); 952 list_add_tail(&logo_cache->head, &logo_cache_list); 953 } 954 955 return logo_cache; 956 } 957 958 /* Note: used only for rkfb kernel driver */ 959 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 960 { 961 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 962 void *dst = NULL; 963 int len, size; 964 struct bmp_header *header; 965 966 if (!logo || !bmp_name) 967 return -EINVAL; 968 969 header = malloc(RK_BLK_SIZE); 970 if (!header) 971 return -ENOMEM; 972 973 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 974 if (len != RK_BLK_SIZE) { 975 free(header); 976 return -EINVAL; 977 } 978 size = get_unaligned_le32(&header->file_size); 979 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 980 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 981 if (len != size) { 982 printf("failed to load bmp %s\n", bmp_name); 983 free(header); 984 return -ENOENT; 985 } 986 987 logo->mem = dst; 988 #endif 989 990 return 0; 991 } 992 993 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 994 { 995 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 996 struct rockchip_logo_cache *logo_cache; 997 struct bmp_header *header; 998 void *dst = NULL, *pdst; 999 int size, len; 1000 int ret = 0; 1001 int reserved = 0; 1002 1003 if (!logo || !bmp_name) 1004 return -EINVAL; 1005 logo_cache = find_or_alloc_logo_cache(bmp_name); 1006 if (!logo_cache) 1007 return -ENOMEM; 1008 1009 if (logo_cache->logo.mem) { 1010 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1011 return 0; 1012 } 1013 1014 header = malloc(RK_BLK_SIZE); 1015 if (!header) 1016 return -ENOMEM; 1017 1018 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1019 if (len != RK_BLK_SIZE) { 1020 ret = -EINVAL; 1021 goto free_header; 1022 } 1023 1024 logo->bpp = get_unaligned_le16(&header->bit_count); 1025 logo->width = get_unaligned_le32(&header->width); 1026 logo->height = get_unaligned_le32(&header->height); 1027 reserved = get_unaligned_le32(&header->reserved); 1028 if (logo->height < 0) 1029 logo->height = -logo->height; 1030 size = get_unaligned_le32(&header->file_size); 1031 if (!can_direct_logo(logo->bpp)) { 1032 if (size > MEMORY_POOL_SIZE) { 1033 printf("failed to use boot buf as temp bmp buffer\n"); 1034 ret = -ENOMEM; 1035 goto free_header; 1036 } 1037 pdst = get_display_buffer(size); 1038 1039 } else { 1040 pdst = get_display_buffer(size); 1041 dst = pdst; 1042 } 1043 1044 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1045 if (len != size) { 1046 printf("failed to load bmp %s\n", bmp_name); 1047 ret = -ENOENT; 1048 goto free_header; 1049 } 1050 1051 if (!can_direct_logo(logo->bpp)) { 1052 int dst_size; 1053 /* 1054 * TODO: force use 16bpp if bpp less than 16; 1055 */ 1056 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1057 dst_size = logo->width * logo->height * logo->bpp >> 3; 1058 1059 dst = get_display_buffer(dst_size); 1060 if (!dst) { 1061 ret = -ENOMEM; 1062 goto free_header; 1063 } 1064 if (bmpdecoder(pdst, dst, logo->bpp)) { 1065 printf("failed to decode bmp %s\n", bmp_name); 1066 ret = -EINVAL; 1067 goto free_header; 1068 } 1069 flush_dcache_range((ulong)dst, 1070 ALIGN((ulong)dst + dst_size, 1071 CONFIG_SYS_CACHELINE_SIZE)); 1072 1073 logo->offset = 0; 1074 logo->ymirror = 0; 1075 } else { 1076 logo->offset = get_unaligned_le32(&header->data_offset); 1077 if (reserved == BMP_PROCESSED_FLAG) 1078 logo->ymirror = 0; 1079 else 1080 logo->ymirror = 1; 1081 } 1082 logo->mem = dst; 1083 1084 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1085 1086 free_header: 1087 1088 free(header); 1089 1090 return ret; 1091 #else 1092 return -EINVAL; 1093 #endif 1094 } 1095 1096 void rockchip_show_fbbase(ulong fbbase) 1097 { 1098 struct display_state *s; 1099 1100 list_for_each_entry(s, &rockchip_display_list, head) { 1101 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1102 s->logo.mem = (char *)fbbase; 1103 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1104 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1105 s->logo.bpp = 32; 1106 s->logo.ymirror = 0; 1107 1108 display_logo(s); 1109 } 1110 } 1111 1112 int rockchip_show_bmp(const char *bmp) 1113 { 1114 struct display_state *s; 1115 int ret = 0; 1116 1117 if (!bmp) { 1118 list_for_each_entry(s, &rockchip_display_list, head) 1119 display_disable(s); 1120 return -ENOENT; 1121 } 1122 1123 list_for_each_entry(s, &rockchip_display_list, head) { 1124 s->logo.mode = s->charge_logo_mode; 1125 if (load_bmp_logo(&s->logo, bmp)) 1126 continue; 1127 ret = display_logo(s); 1128 } 1129 1130 return ret; 1131 } 1132 1133 int rockchip_show_logo(void) 1134 { 1135 struct display_state *s; 1136 int ret = 0; 1137 1138 list_for_each_entry(s, &rockchip_display_list, head) { 1139 s->logo.mode = s->logo_mode; 1140 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1141 printf("failed to display uboot logo\n"); 1142 else 1143 ret = display_logo(s); 1144 1145 /* Load kernel bmp in rockchip_display_fixup() later */ 1146 } 1147 1148 return ret; 1149 } 1150 1151 enum { 1152 PORT_DIR_IN, 1153 PORT_DIR_OUT, 1154 }; 1155 1156 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1157 { 1158 ofnode panel_node, ports, port, ep; 1159 struct udevice *panel_dev; 1160 int ret; 1161 1162 panel_node = dev_read_subnode(dev, "panel"); 1163 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1164 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1165 &panel_dev); 1166 if (!ret) 1167 goto found; 1168 } 1169 1170 ports = dev_read_subnode(dev, "ports"); 1171 if (!ofnode_valid(ports)) 1172 return NULL; 1173 1174 ofnode_for_each_subnode(port, ports) { 1175 u32 reg; 1176 1177 if (ofnode_read_u32(port, "reg", ®)) 1178 continue; 1179 1180 if (reg != PORT_DIR_OUT) 1181 continue; 1182 1183 ofnode_for_each_subnode(ep, port) { 1184 ofnode _ep, _port; 1185 uint phandle; 1186 1187 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1188 continue; 1189 1190 _ep = ofnode_get_by_phandle(phandle); 1191 if (!ofnode_valid(_ep)) 1192 continue; 1193 1194 _port = ofnode_get_parent(_ep); 1195 if (!ofnode_valid(_port)) 1196 continue; 1197 1198 panel_node = ofnode_get_parent(_port); 1199 if (!ofnode_valid(panel_node)) 1200 continue; 1201 1202 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1203 panel_node, 1204 &panel_dev); 1205 if (!ret) 1206 goto found; 1207 } 1208 } 1209 1210 return NULL; 1211 1212 found: 1213 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1214 } 1215 1216 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1217 { 1218 ofnode node, ports, port, ep; 1219 struct udevice *dev; 1220 int ret; 1221 1222 ports = dev_read_subnode(conn_dev, "ports"); 1223 if (!ofnode_valid(ports)) 1224 return NULL; 1225 1226 ofnode_for_each_subnode(port, ports) { 1227 u32 reg; 1228 1229 if (ofnode_read_u32(port, "reg", ®)) 1230 continue; 1231 1232 if (reg != PORT_DIR_OUT) 1233 continue; 1234 1235 ofnode_for_each_subnode(ep, port) { 1236 ofnode _ep, _port, _ports; 1237 uint phandle; 1238 1239 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1240 continue; 1241 1242 _ep = ofnode_get_by_phandle(phandle); 1243 if (!ofnode_valid(_ep)) 1244 continue; 1245 1246 _port = ofnode_get_parent(_ep); 1247 if (!ofnode_valid(_port)) 1248 continue; 1249 1250 _ports = ofnode_get_parent(_port); 1251 if (!ofnode_valid(_ports)) 1252 continue; 1253 1254 node = ofnode_get_parent(_ports); 1255 if (!ofnode_valid(node)) 1256 continue; 1257 1258 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1259 node, &dev); 1260 if (!ret) 1261 goto found; 1262 } 1263 } 1264 1265 return NULL; 1266 1267 found: 1268 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1269 } 1270 1271 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1272 { 1273 ofnode ep, port, ports, conn; 1274 uint phandle; 1275 struct udevice *dev; 1276 int ret; 1277 1278 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1279 return NULL; 1280 1281 ep = ofnode_get_by_phandle(phandle); 1282 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1283 return NULL; 1284 1285 port = ofnode_get_parent(ep); 1286 if (!ofnode_valid(port)) 1287 return NULL; 1288 1289 ports = ofnode_get_parent(port); 1290 if (!ofnode_valid(ports)) 1291 return NULL; 1292 1293 conn = ofnode_get_parent(ports); 1294 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1295 return NULL; 1296 1297 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1298 if (ret) 1299 return NULL; 1300 1301 return dev; 1302 } 1303 1304 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1305 { 1306 struct udevice *phy_dev; 1307 int ret; 1308 1309 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1310 if (ret) 1311 return NULL; 1312 1313 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1314 } 1315 1316 static int rockchip_display_probe(struct udevice *dev) 1317 { 1318 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1319 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1320 const void *blob = gd->fdt_blob; 1321 int phandle; 1322 struct udevice *crtc_dev, *conn_dev; 1323 struct rockchip_crtc *crtc; 1324 const struct rockchip_connector *conn; 1325 struct rockchip_panel *panel = NULL; 1326 struct rockchip_bridge *bridge = NULL; 1327 struct rockchip_phy *phy = NULL; 1328 struct display_state *s; 1329 const char *name; 1330 int ret; 1331 ofnode node, route_node; 1332 struct device_node *port_node, *vop_node, *ep_node; 1333 struct public_phy_data *data; 1334 1335 /* Before relocation we don't need to do anything */ 1336 if (!(gd->flags & GD_FLG_RELOC)) 1337 return 0; 1338 1339 data = malloc(sizeof(struct public_phy_data)); 1340 if (!data) { 1341 printf("failed to alloc phy data\n"); 1342 return -ENOMEM; 1343 } 1344 data->phy_init = false; 1345 1346 init_display_buffer(plat->base); 1347 1348 route_node = dev_read_subnode(dev, "route"); 1349 if (!ofnode_valid(route_node)) 1350 return -ENODEV; 1351 1352 ofnode_for_each_subnode(node, route_node) { 1353 if (!ofnode_is_available(node)) 1354 continue; 1355 phandle = ofnode_read_u32_default(node, "connect", -1); 1356 if (phandle < 0) { 1357 printf("Warn: can't find connect node's handle\n"); 1358 continue; 1359 } 1360 ep_node = of_find_node_by_phandle(phandle); 1361 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1362 printf("Warn: can't find endpoint node from phandle\n"); 1363 continue; 1364 } 1365 port_node = of_get_parent(ep_node); 1366 if (!ofnode_valid(np_to_ofnode(port_node))) { 1367 printf("Warn: can't find port node from phandle\n"); 1368 continue; 1369 } 1370 vop_node = of_get_parent(port_node); 1371 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1372 printf("Warn: can't find crtc node from phandle\n"); 1373 continue; 1374 } 1375 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1376 np_to_ofnode(vop_node), 1377 &crtc_dev); 1378 if (ret) { 1379 printf("Warn: can't find crtc driver %d\n", ret); 1380 continue; 1381 } 1382 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1383 1384 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1385 if (!conn_dev) { 1386 printf("Warn: can't find connect driver\n"); 1387 continue; 1388 } 1389 1390 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1391 1392 phy = rockchip_of_find_phy(conn_dev); 1393 1394 bridge = rockchip_of_find_bridge(conn_dev); 1395 if (bridge) 1396 panel = rockchip_of_find_panel(bridge->dev); 1397 else 1398 panel = rockchip_of_find_panel(conn_dev); 1399 1400 s = malloc(sizeof(*s)); 1401 if (!s) 1402 continue; 1403 1404 memset(s, 0, sizeof(*s)); 1405 1406 INIT_LIST_HEAD(&s->head); 1407 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1408 if (!ret) 1409 memcpy(s->ulogo_name, name, strlen(name)); 1410 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1411 if (!ret) 1412 memcpy(s->klogo_name, name, strlen(name)); 1413 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1414 if (!strcmp(name, "fullscreen")) 1415 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1416 else 1417 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1418 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1419 if (!strcmp(name, "fullscreen")) 1420 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1421 else 1422 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1423 1424 s->blob = blob; 1425 s->panel_state.panel = panel; 1426 s->conn_state.node = conn_dev->node; 1427 s->conn_state.dev = conn_dev; 1428 s->conn_state.connector = conn; 1429 s->conn_state.phy = phy; 1430 s->conn_state.bridge = bridge; 1431 s->conn_state.overscan.left_margin = 100; 1432 s->conn_state.overscan.right_margin = 100; 1433 s->conn_state.overscan.top_margin = 100; 1434 s->conn_state.overscan.bottom_margin = 100; 1435 s->crtc_state.node = np_to_ofnode(vop_node); 1436 s->crtc_state.dev = crtc_dev; 1437 s->crtc_state.crtc = crtc; 1438 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1439 s->node = node; 1440 1441 if (bridge) 1442 bridge->state = s; 1443 1444 if (panel) 1445 panel->state = s; 1446 1447 get_crtc_mcu_mode(&s->crtc_state); 1448 1449 ret = ofnode_read_u32_default(s->crtc_state.node, 1450 "rockchip,dual-channel-swap", 0); 1451 s->crtc_state.dual_channel_swap = ret; 1452 if (connector_panel_init(s)) { 1453 printf("Warn: Failed to init panel drivers\n"); 1454 free(s); 1455 continue; 1456 } 1457 1458 if (connector_phy_init(s, data)) { 1459 printf("Warn: Failed to init phy drivers\n"); 1460 free(s); 1461 continue; 1462 } 1463 list_add_tail(&s->head, &rockchip_display_list); 1464 } 1465 1466 if (list_empty(&rockchip_display_list)) { 1467 debug("Failed to found available display route\n"); 1468 return -ENODEV; 1469 } 1470 1471 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1472 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1473 uc_priv->bpix = VIDEO_BPP32; 1474 1475 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1476 rockchip_show_fbbase(plat->base); 1477 video_set_flush_dcache(dev, true); 1478 #endif 1479 1480 return 0; 1481 } 1482 1483 void rockchip_display_fixup(void *blob) 1484 { 1485 const struct rockchip_connector_funcs *conn_funcs; 1486 const struct rockchip_crtc_funcs *crtc_funcs; 1487 const struct rockchip_connector *conn; 1488 const struct rockchip_crtc *crtc; 1489 struct display_state *s; 1490 int offset; 1491 const struct device_node *np; 1492 const char *path; 1493 1494 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1495 list_for_each_entry(s, &rockchip_display_list, head) 1496 load_bmp_logo(&s->logo, s->klogo_name); 1497 1498 if (!get_display_size()) 1499 return; 1500 1501 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1502 (u64)memory_start, 1503 (u64)get_display_size()); 1504 if (offset < 0) 1505 printf("failed to reserve drm-loader-logo memory\n"); 1506 } else { 1507 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1508 /* Compatible with rkfb display, only need reserve memory */ 1509 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1510 (u64)memory_start, 1511 MEMORY_POOL_SIZE); 1512 if (offset < 0) 1513 printf("failed to reserve fb-loader-logo memory\n"); 1514 else 1515 list_for_each_entry(s, &rockchip_display_list, head) 1516 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1517 return; 1518 } 1519 1520 list_for_each_entry(s, &rockchip_display_list, head) { 1521 conn = s->conn_state.connector; 1522 if (!conn) 1523 continue; 1524 conn_funcs = conn->funcs; 1525 if (!conn_funcs) { 1526 printf("failed to get exist connector\n"); 1527 continue; 1528 } 1529 1530 crtc = s->crtc_state.crtc; 1531 if (!crtc) 1532 continue; 1533 1534 crtc_funcs = crtc->funcs; 1535 if (!crtc_funcs) { 1536 printf("failed to get exist crtc\n"); 1537 continue; 1538 } 1539 1540 if (crtc_funcs->fixup_dts) 1541 crtc_funcs->fixup_dts(s, blob); 1542 1543 if (conn_funcs->fixup_dts) 1544 conn_funcs->fixup_dts(s, blob); 1545 1546 np = ofnode_to_np(s->node); 1547 path = np->full_name; 1548 fdt_increase_size(blob, 0x400); 1549 #define FDT_SET_U32(name, val) \ 1550 do_fixup_by_path_u32(blob, path, name, val, 1); 1551 1552 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1553 - memory_start; 1554 FDT_SET_U32("logo,offset", offset); 1555 FDT_SET_U32("logo,width", s->logo.width); 1556 FDT_SET_U32("logo,height", s->logo.height); 1557 FDT_SET_U32("logo,bpp", s->logo.bpp); 1558 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1559 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1560 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1561 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1562 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1563 FDT_SET_U32("video,vrefresh", 1564 drm_mode_vrefresh(&s->conn_state.mode)); 1565 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1566 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1567 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1568 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1569 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1570 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1571 #undef FDT_SET_U32 1572 } 1573 } 1574 1575 int rockchip_display_bind(struct udevice *dev) 1576 { 1577 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1578 1579 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1580 1581 return 0; 1582 } 1583 1584 static const struct udevice_id rockchip_display_ids[] = { 1585 { .compatible = "rockchip,display-subsystem" }, 1586 { } 1587 }; 1588 1589 U_BOOT_DRIVER(rockchip_display) = { 1590 .name = "rockchip_display", 1591 .id = UCLASS_VIDEO, 1592 .of_match = rockchip_display_ids, 1593 .bind = rockchip_display_bind, 1594 .probe = rockchip_display_probe, 1595 }; 1596 1597 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1598 char *const argv[]) 1599 { 1600 if (argc != 1) 1601 return CMD_RET_USAGE; 1602 1603 rockchip_show_logo(); 1604 1605 return 0; 1606 } 1607 1608 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1609 char *const argv[]) 1610 { 1611 if (argc != 2) 1612 return CMD_RET_USAGE; 1613 1614 rockchip_show_bmp(argv[1]); 1615 1616 return 0; 1617 } 1618 1619 U_BOOT_CMD( 1620 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1621 "load and display log from resource partition", 1622 NULL 1623 ); 1624 1625 U_BOOT_CMD( 1626 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1627 "load and display bmp from resource partition", 1628 " <bmp_name>" 1629 ); 1630