1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 void *base_parameter_addr = (void *)&base_parameter; 156 157 for (i = 0; i < 8; i++) { 158 disp_header = &base_parameter.disp_header[i]; 159 if (disp_header->connector_type == type && 160 disp_header->connector_id == id) { 161 printf("disp info %d, type:%d, id:%d\n", i, type, id); 162 offset = disp_header->offset; 163 break; 164 } 165 } 166 167 if (offset < 0) 168 return NULL; 169 disp_info = base_parameter_addr + offset; 170 if (disp_info->screen_info[0].type != type || 171 disp_info->screen_info[0].id != id) { 172 printf("connector type or id is error, type:%d, id:%d\n", 173 disp_info->screen_info[0].type, 174 disp_info->screen_info[0].id); 175 return NULL; 176 } 177 178 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 179 return NULL; 180 181 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 182 183 if (crc_val != disp_info->crc) { 184 printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 185 return NULL; 186 } 187 188 return disp_info; 189 } 190 191 /* check which kind of public phy does connector use */ 192 static int check_public_use_phy(struct display_state *state) 193 { 194 int ret = NONE; 195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 196 struct connector_state *conn_state = &state->conn_state; 197 198 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 199 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 200 ret = INNO_HDMI_PHY; 201 #endif 202 203 return ret; 204 } 205 206 /* 207 * get public phy driver and initialize it. 208 * The current version only has inno hdmi phy for hdmi and tve. 209 */ 210 static int get_public_phy(struct display_state *state, 211 struct public_phy_data *data) 212 { 213 struct connector_state *conn_state = &state->conn_state; 214 struct rockchip_phy *phy; 215 struct udevice *dev; 216 int ret = 0; 217 218 switch (data->public_phy_type) { 219 case INNO_HDMI_PHY: 220 #if defined(CONFIG_ROCKCHIP_RK3328) 221 ret = uclass_get_device_by_name(UCLASS_PHY, 222 "hdmiphy@ff430000", &dev); 223 #elif defined(CONFIG_ROCKCHIP_RK322X) 224 ret = uclass_get_device_by_name(UCLASS_PHY, 225 "hdmi-phy@12030000", &dev); 226 #else 227 ret = -EINVAL; 228 #endif 229 if (ret) { 230 printf("Warn: can't find phy driver\n"); 231 return 0; 232 } 233 234 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 235 if (!phy) { 236 printf("failed to get phy driver\n"); 237 return 0; 238 } 239 240 ret = rockchip_phy_init(phy); 241 if (ret) { 242 printf("failed to init phy driver\n"); 243 return ret; 244 } 245 conn_state->phy = phy; 246 247 debug("inno hdmi phy init success, save it\n"); 248 data->phy_drv = conn_state->phy; 249 data->phy_init = true; 250 return 0; 251 default: 252 return -EINVAL; 253 } 254 } 255 256 static void init_display_buffer(ulong base) 257 { 258 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 259 memory_end = memory_start; 260 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 261 } 262 263 void *get_display_buffer(int size) 264 { 265 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 266 void *buf; 267 268 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 269 printf("failed to alloc %dbyte memory to display\n", size); 270 return NULL; 271 } 272 buf = (void *)roundup_memory; 273 274 memory_end = roundup_memory + size; 275 276 return buf; 277 } 278 279 static unsigned long get_display_size(void) 280 { 281 return memory_end - memory_start; 282 } 283 284 static unsigned long get_single_cubic_lut_size(void) 285 { 286 ulong cubic_lut_size; 287 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 288 289 /* This is depend on IC designed */ 290 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 291 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 292 293 return cubic_lut_size; 294 } 295 296 static unsigned long get_cubic_lut_offset(int crtc_id) 297 { 298 return crtc_id * get_single_cubic_lut_size(); 299 } 300 301 unsigned long get_cubic_lut_buffer(int crtc_id) 302 { 303 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 304 } 305 306 static unsigned long get_cubic_memory_size(void) 307 { 308 /* Max support 4 cubic lut */ 309 return get_single_cubic_lut_size() * 4; 310 } 311 312 bool can_direct_logo(int bpp) 313 { 314 return bpp == 24 || bpp == 32; 315 } 316 317 static int connector_phy_init(struct display_state *state, 318 struct public_phy_data *data) 319 { 320 struct connector_state *conn_state = &state->conn_state; 321 int type; 322 323 /* does this connector use public phy with others */ 324 type = check_public_use_phy(state); 325 if (type == INNO_HDMI_PHY) { 326 /* there is no public phy was initialized */ 327 if (!data->phy_init) { 328 debug("start get public phy\n"); 329 data->public_phy_type = type; 330 if (get_public_phy(state, data)) { 331 printf("can't find correct public phy type\n"); 332 free(data); 333 return -EINVAL; 334 } 335 return 0; 336 } 337 338 /* if this phy has been initialized, get it directly */ 339 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 340 return 0; 341 } 342 343 return 0; 344 } 345 346 static int connector_panel_init(struct display_state *state) 347 { 348 struct connector_state *conn_state = &state->conn_state; 349 struct panel_state *panel_state = &state->panel_state; 350 const struct rockchip_panel *panel = panel_state->panel; 351 ofnode dsp_lut_node; 352 int ret, len; 353 354 if (!panel) 355 return 0; 356 357 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 358 if (!ofnode_valid(dsp_lut_node)) { 359 debug("%s can not find dsp-lut node\n", __func__); 360 return 0; 361 } 362 363 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 364 if (len > 0) { 365 conn_state->gamma.size = len / sizeof(u32); 366 conn_state->gamma.lut = malloc(len); 367 if (!conn_state->gamma.lut) { 368 printf("malloc gamma lut failed\n"); 369 return -ENOMEM; 370 } 371 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 372 conn_state->gamma.lut, 373 conn_state->gamma.size); 374 if (ret) { 375 printf("Cannot decode gamma_lut\n"); 376 conn_state->gamma.lut = NULL; 377 return -EINVAL; 378 } 379 panel_state->dsp_lut_node = dsp_lut_node; 380 } 381 382 return 0; 383 } 384 385 int drm_mode_vrefresh(const struct drm_display_mode *mode) 386 { 387 int refresh = 0; 388 unsigned int calc_val; 389 390 if (mode->vrefresh > 0) { 391 refresh = mode->vrefresh; 392 } else if (mode->htotal > 0 && mode->vtotal > 0) { 393 int vtotal; 394 395 vtotal = mode->vtotal; 396 /* work out vrefresh the value will be x1000 */ 397 calc_val = (mode->clock * 1000); 398 calc_val /= mode->htotal; 399 refresh = (calc_val + vtotal / 2) / vtotal; 400 401 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 402 refresh *= 2; 403 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 404 refresh /= 2; 405 if (mode->vscan > 1) 406 refresh /= mode->vscan; 407 } 408 return refresh; 409 } 410 411 static int display_get_detail_timing(ofnode node, struct drm_display_mode *mode) 412 { 413 int hactive, vactive, pixelclock; 414 int hfront_porch, hback_porch, hsync_len; 415 int vfront_porch, vback_porch, vsync_len; 416 int val, flags = 0; 417 418 #define FDT_GET_INT(val, name) \ 419 val = ofnode_read_s32_default(node, name, -1); \ 420 if (val < 0) { \ 421 printf("Can't get %s\n", name); \ 422 return -ENXIO; \ 423 } 424 425 #define FDT_GET_INT_DEFAULT(val, name, default) \ 426 val = ofnode_read_s32_default(node, name, default); 427 428 FDT_GET_INT(hactive, "hactive"); 429 FDT_GET_INT(vactive, "vactive"); 430 FDT_GET_INT(pixelclock, "clock-frequency"); 431 FDT_GET_INT(hsync_len, "hsync-len"); 432 FDT_GET_INT(hfront_porch, "hfront-porch"); 433 FDT_GET_INT(hback_porch, "hback-porch"); 434 FDT_GET_INT(vsync_len, "vsync-len"); 435 FDT_GET_INT(vfront_porch, "vfront-porch"); 436 FDT_GET_INT(vback_porch, "vback-porch"); 437 FDT_GET_INT(val, "hsync-active"); 438 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 439 FDT_GET_INT(val, "vsync-active"); 440 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 441 FDT_GET_INT(val, "pixelclk-active"); 442 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 443 444 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 445 if (val == DRM_MODE_FLAG_XMIRROR) { 446 flags |= DRM_MODE_FLAG_XMIRROR; 447 } else if (val == DRM_MODE_FLAG_YMIRROR) { 448 flags |= DRM_MODE_FLAG_YMIRROR; 449 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 450 flags |= DRM_MODE_FLAG_XMIRROR; 451 flags |= DRM_MODE_FLAG_YMIRROR; 452 } 453 mode->hdisplay = hactive; 454 mode->hsync_start = mode->hdisplay + hfront_porch; 455 mode->hsync_end = mode->hsync_start + hsync_len; 456 mode->htotal = mode->hsync_end + hback_porch; 457 458 mode->vdisplay = vactive; 459 mode->vsync_start = mode->vdisplay + vfront_porch; 460 mode->vsync_end = mode->vsync_start + vsync_len; 461 mode->vtotal = mode->vsync_end + vback_porch; 462 463 mode->clock = pixelclock / 1000; 464 mode->flags = flags; 465 466 return 0; 467 } 468 469 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 470 { 471 int ret = 0; 472 473 ret = display_get_detail_timing(node, mode); 474 475 if (ret) { 476 mode->clock = 74250; 477 mode->flags = 0x5; 478 mode->hdisplay = 1280; 479 mode->hsync_start = 1390; 480 mode->hsync_end = 1430; 481 mode->htotal = 1650; 482 mode->hskew = 0; 483 mode->vdisplay = 720; 484 mode->vsync_start = 725; 485 mode->vsync_end = 730; 486 mode->vtotal = 750; 487 mode->vrefresh = 60; 488 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 489 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 490 } 491 492 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 493 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 494 mode->vscan); 495 496 return 0; 497 } 498 499 static int display_get_timing_from_dts(struct panel_state *panel_state, 500 struct drm_display_mode *mode) 501 { 502 struct rockchip_panel *panel = panel_state->panel; 503 int phandle; 504 ofnode timing, native_mode; 505 506 timing = dev_read_subnode(panel->dev, "display-timings"); 507 if (!ofnode_valid(timing)) 508 return -ENODEV; 509 510 native_mode = ofnode_find_subnode(timing, "timing"); 511 if (!ofnode_valid(native_mode)) { 512 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 513 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 514 if (!ofnode_valid(native_mode)) { 515 printf("failed to get display timings from DT\n"); 516 return -ENXIO; 517 } 518 } 519 520 display_get_detail_timing(native_mode, mode); 521 522 return 0; 523 } 524 525 /** 526 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 527 * @edid_data: structure store mode list 528 * @max_output: vop max output resolution 529 */ 530 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 531 struct vop_rect *max_output) 532 { 533 int i; 534 535 for (i = 0; i < edid_data->modes; i++) { 536 if (edid_data->mode_buf[i].hdisplay > max_output->width || 537 edid_data->mode_buf[i].vdisplay > max_output->height) 538 edid_data->mode_buf[i].invalid = true; 539 } 540 } 541 542 /** 543 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 544 * @p: mode 545 * @adjust_flags: a combination of adjustment flags 546 * 547 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 548 * 549 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 550 * interlaced modes. 551 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 552 * buffers containing two eyes (only adjust the timings when needed, eg. for 553 * "frame packing" or "side by side full"). 554 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 555 * be performed for doublescan and vscan > 1 modes respectively. 556 */ 557 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 558 { 559 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 560 return; 561 562 if (p->flags & DRM_MODE_FLAG_DBLCLK) 563 p->crtc_clock = 2 * p->clock; 564 else 565 p->crtc_clock = p->clock; 566 p->crtc_hdisplay = p->hdisplay; 567 p->crtc_hsync_start = p->hsync_start; 568 p->crtc_hsync_end = p->hsync_end; 569 p->crtc_htotal = p->htotal; 570 p->crtc_hskew = p->hskew; 571 p->crtc_vdisplay = p->vdisplay; 572 p->crtc_vsync_start = p->vsync_start; 573 p->crtc_vsync_end = p->vsync_end; 574 p->crtc_vtotal = p->vtotal; 575 576 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 577 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 578 p->crtc_vdisplay /= 2; 579 p->crtc_vsync_start /= 2; 580 p->crtc_vsync_end /= 2; 581 p->crtc_vtotal /= 2; 582 } 583 } 584 585 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 586 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 587 p->crtc_vdisplay *= 2; 588 p->crtc_vsync_start *= 2; 589 p->crtc_vsync_end *= 2; 590 p->crtc_vtotal *= 2; 591 } 592 } 593 594 if (!(adjust_flags & CRTC_NO_VSCAN)) { 595 if (p->vscan > 1) { 596 p->crtc_vdisplay *= p->vscan; 597 p->crtc_vsync_start *= p->vscan; 598 p->crtc_vsync_end *= p->vscan; 599 p->crtc_vtotal *= p->vscan; 600 } 601 } 602 603 if (adjust_flags & CRTC_STEREO_DOUBLE) { 604 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 605 606 switch (layout) { 607 case DRM_MODE_FLAG_3D_FRAME_PACKING: 608 p->crtc_clock *= 2; 609 p->crtc_vdisplay += p->crtc_vtotal; 610 p->crtc_vsync_start += p->crtc_vtotal; 611 p->crtc_vsync_end += p->crtc_vtotal; 612 p->crtc_vtotal += p->crtc_vtotal; 613 break; 614 } 615 } 616 617 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 618 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 619 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 620 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 621 } 622 623 /** 624 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 625 * output format 626 * 627 * @connector: drm connector under action. 628 * @mode: video mode to be tested. 629 * 630 * Returns: 631 * true if the mode can be supported in YCBCR420 format 632 * false if not. 633 */ 634 bool drm_mode_is_420_only(const struct drm_display_info *display, 635 struct drm_display_mode *mode) 636 { 637 u8 vic = drm_match_cea_mode(mode); 638 639 return test_bit(vic, display->hdmi.y420_vdb_modes); 640 } 641 642 /** 643 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 644 * output format also (along with RGB/YCBCR444/422) 645 * 646 * @display: display under action. 647 * @mode: video mode to be tested. 648 * 649 * Returns: 650 * true if the mode can be support YCBCR420 format 651 * false if not. 652 */ 653 bool drm_mode_is_420_also(const struct drm_display_info *display, 654 struct drm_display_mode *mode) 655 { 656 u8 vic = drm_match_cea_mode(mode); 657 658 return test_bit(vic, display->hdmi.y420_cmdb_modes); 659 } 660 661 /** 662 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 663 * output format 664 * 665 * @display: display under action. 666 * @mode: video mode to be tested. 667 * 668 * Returns: 669 * true if the mode can be supported in YCBCR420 format 670 * false if not. 671 */ 672 bool drm_mode_is_420(const struct drm_display_info *display, 673 struct drm_display_mode *mode) 674 { 675 return drm_mode_is_420_only(display, mode) || 676 drm_mode_is_420_also(display, mode); 677 } 678 679 static int display_get_timing(struct display_state *state) 680 { 681 struct connector_state *conn_state = &state->conn_state; 682 struct drm_display_mode *mode = &conn_state->mode; 683 const struct drm_display_mode *m; 684 struct panel_state *panel_state = &state->panel_state; 685 const struct rockchip_panel *panel = panel_state->panel; 686 687 if (dev_of_valid(panel->dev) && 688 !display_get_timing_from_dts(panel_state, mode)) { 689 printf("Using display timing dts\n"); 690 return 0; 691 } 692 693 if (panel->data) { 694 m = (const struct drm_display_mode *)panel->data; 695 memcpy(mode, m, sizeof(*m)); 696 printf("Using display timing from compatible panel driver\n"); 697 return 0; 698 } 699 700 return -ENODEV; 701 } 702 703 static int display_pre_init(void) 704 { 705 struct display_state *state; 706 int ret = 0; 707 708 list_for_each_entry(state, &rockchip_display_list, head) { 709 struct connector_state *conn_state = &state->conn_state; 710 const struct rockchip_connector *conn = conn_state->connector; 711 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 712 struct crtc_state *crtc_state = &state->crtc_state; 713 struct rockchip_crtc *crtc = crtc_state->crtc; 714 715 if (conn_funcs->pre_init) { 716 ret = conn_funcs->pre_init(state); 717 if (ret) 718 printf("pre init conn error\n"); 719 } 720 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 721 } 722 return ret; 723 } 724 725 static int display_use_force_mode(struct display_state *state) 726 { 727 struct connector_state *conn_state = &state->conn_state; 728 struct drm_display_mode *mode = &conn_state->mode; 729 730 conn_state->bpc = 8; 731 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 732 conn_state->bus_format = state->force_bus_format; 733 734 return 0; 735 } 736 737 static int display_get_edid_mode(struct display_state *state) 738 { 739 int ret = 0; 740 struct connector_state *conn_state = &state->conn_state; 741 struct drm_display_mode *mode = &conn_state->mode; 742 int bpc; 743 744 ret = edid_get_drm_mode(conn_state->edid, ret, mode, &bpc); 745 if (!ret) { 746 conn_state->bpc = bpc; 747 edid_print_info((void *)&conn_state->edid); 748 } else { 749 conn_state->bpc = 8; 750 mode->clock = 74250; 751 mode->flags = 0x5; 752 mode->hdisplay = 1280; 753 mode->hsync_start = 1390; 754 mode->hsync_end = 1430; 755 mode->htotal = 1650; 756 mode->hskew = 0; 757 mode->vdisplay = 720; 758 mode->vsync_start = 725; 759 mode->vsync_end = 730; 760 mode->vtotal = 750; 761 mode->vrefresh = 60; 762 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 763 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 764 765 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name); 766 } 767 768 return ret; 769 } 770 771 static int display_init(struct display_state *state) 772 { 773 struct connector_state *conn_state = &state->conn_state; 774 struct panel_state *panel_state = &state->panel_state; 775 const struct rockchip_connector *conn = conn_state->connector; 776 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 777 struct crtc_state *crtc_state = &state->crtc_state; 778 struct rockchip_crtc *crtc = crtc_state->crtc; 779 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 780 struct drm_display_mode *mode = &conn_state->mode; 781 const char *compatible; 782 int ret = 0; 783 static bool __print_once = false; 784 785 if (!__print_once) { 786 __print_once = true; 787 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 788 } 789 790 if (state->is_init) 791 return 0; 792 793 if (!conn_funcs || !crtc_funcs) { 794 printf("failed to find connector or crtc functions\n"); 795 return -ENXIO; 796 } 797 798 if (crtc_state->crtc->active && !crtc_state->ports_node && 799 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 800 sizeof(struct drm_display_mode))) { 801 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 802 crtc_state->dev->name, 803 crtc_state->crtc->active_mode.type, 804 crtc_state->crtc->active_mode.hdisplay, 805 crtc_state->crtc->active_mode.vdisplay, 806 crtc_state->crtc->active_mode.vrefresh); 807 return -ENODEV; 808 } 809 810 if (crtc_funcs->preinit) { 811 ret = crtc_funcs->preinit(state); 812 if (ret) 813 return ret; 814 } 815 816 if (panel_state->panel) 817 rockchip_panel_init(panel_state->panel); 818 819 if (conn_funcs->init) { 820 ret = conn_funcs->init(state); 821 if (ret) 822 goto deinit; 823 } 824 825 if (conn_state->phy) 826 rockchip_phy_init(conn_state->phy); 827 828 /* 829 * support hotplug, but not connect; 830 */ 831 #ifdef CONFIG_ROCKCHIP_DRM_TVE 832 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 833 printf("hdmi plugin ,skip tve\n"); 834 goto deinit; 835 } 836 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 837 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 838 printf("hdmi plugin ,skip tve\n"); 839 goto deinit; 840 } 841 #endif 842 if (conn_funcs->detect) { 843 ret = conn_funcs->detect(state); 844 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 845 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 846 crtc->hdmi_hpd = ret; 847 #endif 848 if (!ret && !state->force_output) { 849 printf("%s disconnected\n", conn_state->dev->name); 850 goto deinit; 851 } 852 } 853 854 if (panel_state->panel) { 855 ret = display_get_timing(state); 856 if (!ret) 857 conn_state->bpc = panel_state->panel->bpc; 858 #if defined(CONFIG_I2C_EDID) 859 if (ret < 0 && conn_funcs->get_edid) { 860 rockchip_panel_prepare(panel_state->panel); 861 ret = conn_funcs->get_edid(state); 862 if (!ret) 863 display_get_edid_mode(state); 864 } 865 #endif 866 } else if (conn_state->bridge) { 867 ret = video_bridge_read_edid(conn_state->bridge->dev, 868 conn_state->edid, EDID_SIZE); 869 if (ret > 0) { 870 #if defined(CONFIG_I2C_EDID) 871 display_get_edid_mode(state); 872 #endif 873 } else { 874 ret = video_bridge_get_timing(conn_state->bridge->dev); 875 } 876 } else if (conn_funcs->get_timing) { 877 ret = conn_funcs->get_timing(state); 878 } else if (conn_funcs->get_edid) { 879 ret = conn_funcs->get_edid(state); 880 #if defined(CONFIG_I2C_EDID) 881 if (!ret) 882 display_get_edid_mode(state); 883 #endif 884 } 885 886 if (ret && !state->force_output) 887 goto deinit; 888 if (state->force_output) 889 display_use_force_mode(state); 890 891 /* rk356x series drive mipi pixdata on posedge */ 892 compatible = dev_read_string(conn_state->dev, "compatible"); 893 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 894 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 895 896 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 897 " H: %04d %04d %04d %04d\n" 898 " V: %04d %04d %04d %04d\n" 899 "bus_format: %x\n", 900 conn_state->dev->name, 901 state->force_output ? "use force output" : "", 902 mode->clock, mode->flags, 903 mode->hdisplay, mode->hsync_start, 904 mode->hsync_end, mode->htotal, 905 mode->vdisplay, mode->vsync_start, 906 mode->vsync_end, mode->vtotal, 907 conn_state->bus_format); 908 909 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 910 911 if (conn_state->bridge) 912 rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 913 914 if (crtc_funcs->init) { 915 ret = crtc_funcs->init(state); 916 if (ret) 917 goto deinit; 918 } 919 state->is_init = 1; 920 921 crtc_state->crtc->active = true; 922 memcpy(&crtc_state->crtc->active_mode, 923 &conn_state->mode, sizeof(struct drm_display_mode)); 924 925 return 0; 926 927 deinit: 928 if (conn_funcs->deinit) 929 conn_funcs->deinit(state); 930 return ret; 931 } 932 933 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 934 { 935 struct crtc_state *crtc_state = &state->crtc_state; 936 const struct rockchip_crtc *crtc = crtc_state->crtc; 937 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 938 int ret; 939 940 if (!state->is_init) 941 return -EINVAL; 942 943 if (crtc_funcs->send_mcu_cmd) { 944 ret = crtc_funcs->send_mcu_cmd(state, type, val); 945 if (ret) 946 return ret; 947 } 948 949 return 0; 950 } 951 952 static int display_set_plane(struct display_state *state) 953 { 954 struct crtc_state *crtc_state = &state->crtc_state; 955 const struct rockchip_crtc *crtc = crtc_state->crtc; 956 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 957 int ret; 958 959 if (!state->is_init) 960 return -EINVAL; 961 962 if (crtc_funcs->set_plane) { 963 ret = crtc_funcs->set_plane(state); 964 if (ret) 965 return ret; 966 } 967 968 return 0; 969 } 970 971 static int display_enable(struct display_state *state) 972 { 973 struct connector_state *conn_state = &state->conn_state; 974 const struct rockchip_connector *conn = conn_state->connector; 975 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 976 struct crtc_state *crtc_state = &state->crtc_state; 977 const struct rockchip_crtc *crtc = crtc_state->crtc; 978 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 979 struct panel_state *panel_state = &state->panel_state; 980 981 if (!state->is_init) 982 return -EINVAL; 983 984 if (state->is_enable) 985 return 0; 986 987 if (crtc_funcs->prepare) 988 crtc_funcs->prepare(state); 989 990 if (conn_funcs->prepare) 991 conn_funcs->prepare(state); 992 993 if (conn_state->bridge) 994 rockchip_bridge_pre_enable(conn_state->bridge); 995 996 if (panel_state->panel) 997 rockchip_panel_prepare(panel_state->panel); 998 999 if (crtc_funcs->enable) 1000 crtc_funcs->enable(state); 1001 1002 if (conn_funcs->enable) 1003 conn_funcs->enable(state); 1004 1005 if (conn_state->bridge) 1006 rockchip_bridge_enable(conn_state->bridge); 1007 1008 if (panel_state->panel) 1009 rockchip_panel_enable(panel_state->panel); 1010 1011 state->is_enable = true; 1012 1013 return 0; 1014 } 1015 1016 static int display_disable(struct display_state *state) 1017 { 1018 struct connector_state *conn_state = &state->conn_state; 1019 const struct rockchip_connector *conn = conn_state->connector; 1020 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1021 struct crtc_state *crtc_state = &state->crtc_state; 1022 const struct rockchip_crtc *crtc = crtc_state->crtc; 1023 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1024 struct panel_state *panel_state = &state->panel_state; 1025 1026 if (!state->is_init) 1027 return 0; 1028 1029 if (!state->is_enable) 1030 return 0; 1031 1032 if (panel_state->panel) 1033 rockchip_panel_disable(panel_state->panel); 1034 1035 if (conn_state->bridge) 1036 rockchip_bridge_disable(conn_state->bridge); 1037 1038 if (conn_funcs->disable) 1039 conn_funcs->disable(state); 1040 1041 if (crtc_funcs->disable) 1042 crtc_funcs->disable(state); 1043 1044 if (panel_state->panel) 1045 rockchip_panel_unprepare(panel_state->panel); 1046 1047 if (conn_state->bridge) 1048 rockchip_bridge_post_disable(conn_state->bridge); 1049 1050 if (conn_funcs->unprepare) 1051 conn_funcs->unprepare(state); 1052 1053 state->is_enable = 0; 1054 state->is_init = 0; 1055 1056 return 0; 1057 } 1058 1059 static int display_logo(struct display_state *state) 1060 { 1061 struct crtc_state *crtc_state = &state->crtc_state; 1062 struct connector_state *conn_state = &state->conn_state; 1063 struct logo_info *logo = &state->logo; 1064 int hdisplay, vdisplay, ret; 1065 1066 ret = display_init(state); 1067 if (!state->is_init || ret) 1068 return -ENODEV; 1069 1070 switch (logo->bpp) { 1071 case 16: 1072 crtc_state->format = ROCKCHIP_FMT_RGB565; 1073 break; 1074 case 24: 1075 crtc_state->format = ROCKCHIP_FMT_RGB888; 1076 break; 1077 case 32: 1078 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1079 break; 1080 default: 1081 printf("can't support bmp bits[%d]\n", logo->bpp); 1082 return -EINVAL; 1083 } 1084 hdisplay = conn_state->mode.hdisplay; 1085 vdisplay = conn_state->mode.vdisplay; 1086 crtc_state->src_w = logo->width; 1087 crtc_state->src_h = logo->height; 1088 crtc_state->src_x = 0; 1089 crtc_state->src_y = 0; 1090 crtc_state->ymirror = logo->ymirror; 1091 1092 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1093 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 1094 1095 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1096 crtc_state->crtc_x = 0; 1097 crtc_state->crtc_y = 0; 1098 crtc_state->crtc_w = hdisplay; 1099 crtc_state->crtc_h = vdisplay; 1100 } else { 1101 if (crtc_state->src_w >= hdisplay) { 1102 crtc_state->crtc_x = 0; 1103 crtc_state->crtc_w = hdisplay; 1104 } else { 1105 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 1106 crtc_state->crtc_w = crtc_state->src_w; 1107 } 1108 1109 if (crtc_state->src_h >= vdisplay) { 1110 crtc_state->crtc_y = 0; 1111 crtc_state->crtc_h = vdisplay; 1112 } else { 1113 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 1114 crtc_state->crtc_h = crtc_state->src_h; 1115 } 1116 } 1117 1118 display_set_plane(state); 1119 display_enable(state); 1120 1121 return 0; 1122 } 1123 1124 static int get_crtc_id(ofnode connect) 1125 { 1126 int phandle; 1127 struct device_node *remote; 1128 int val; 1129 1130 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1131 if (phandle < 0) 1132 goto err; 1133 remote = of_find_node_by_phandle(phandle); 1134 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1135 if (val < 0) 1136 goto err; 1137 1138 return val; 1139 err: 1140 printf("Can't get crtc id, default set to id = 0\n"); 1141 return 0; 1142 } 1143 1144 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1145 { 1146 ofnode mcu_node; 1147 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1148 1149 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1150 if (!ofnode_valid(mcu_node)) 1151 return -ENODEV; 1152 1153 #define FDT_GET_MCU_INT(val, name) \ 1154 do { \ 1155 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1156 if (val < 0) { \ 1157 printf("Can't get %s\n", name); \ 1158 return -ENXIO; \ 1159 } \ 1160 } while (0) 1161 1162 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1163 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1164 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1165 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1166 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1167 1168 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1169 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1170 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1171 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1172 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1173 1174 return 0; 1175 } 1176 1177 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1178 { 1179 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1180 1181 list_for_each_entry(tmp, &logo_cache_list, head) { 1182 if (!strcmp(tmp->name, bmp)) { 1183 logo_cache = tmp; 1184 break; 1185 } 1186 } 1187 1188 if (!logo_cache) { 1189 logo_cache = malloc(sizeof(*logo_cache)); 1190 if (!logo_cache) { 1191 printf("failed to alloc memory for logo cache\n"); 1192 return NULL; 1193 } 1194 memset(logo_cache, 0, sizeof(*logo_cache)); 1195 strcpy(logo_cache->name, bmp); 1196 INIT_LIST_HEAD(&logo_cache->head); 1197 list_add_tail(&logo_cache->head, &logo_cache_list); 1198 } 1199 1200 return logo_cache; 1201 } 1202 1203 /* Note: used only for rkfb kernel driver */ 1204 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1205 { 1206 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1207 void *dst = NULL; 1208 int len, size; 1209 struct bmp_header *header; 1210 1211 if (!logo || !bmp_name) 1212 return -EINVAL; 1213 1214 header = malloc(RK_BLK_SIZE); 1215 if (!header) 1216 return -ENOMEM; 1217 1218 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1219 if (len != RK_BLK_SIZE) { 1220 free(header); 1221 return -EINVAL; 1222 } 1223 size = get_unaligned_le32(&header->file_size); 1224 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1225 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1226 if (len != size) { 1227 printf("failed to load bmp %s\n", bmp_name); 1228 free(header); 1229 return -ENOENT; 1230 } 1231 1232 logo->mem = dst; 1233 #endif 1234 1235 return 0; 1236 } 1237 1238 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1239 { 1240 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1241 struct rockchip_logo_cache *logo_cache; 1242 struct bmp_header *header; 1243 void *dst = NULL, *pdst; 1244 int size, len; 1245 int ret = 0; 1246 int reserved = 0; 1247 1248 if (!logo || !bmp_name) 1249 return -EINVAL; 1250 logo_cache = find_or_alloc_logo_cache(bmp_name); 1251 if (!logo_cache) 1252 return -ENOMEM; 1253 1254 if (logo_cache->logo.mem) { 1255 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1256 return 0; 1257 } 1258 1259 header = malloc(RK_BLK_SIZE); 1260 if (!header) 1261 return -ENOMEM; 1262 1263 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1264 if (len != RK_BLK_SIZE) { 1265 ret = -EINVAL; 1266 goto free_header; 1267 } 1268 1269 logo->bpp = get_unaligned_le16(&header->bit_count); 1270 logo->width = get_unaligned_le32(&header->width); 1271 logo->height = get_unaligned_le32(&header->height); 1272 reserved = get_unaligned_le32(&header->reserved); 1273 if (logo->height < 0) 1274 logo->height = -logo->height; 1275 size = get_unaligned_le32(&header->file_size); 1276 if (!can_direct_logo(logo->bpp)) { 1277 if (size > MEMORY_POOL_SIZE) { 1278 printf("failed to use boot buf as temp bmp buffer\n"); 1279 ret = -ENOMEM; 1280 goto free_header; 1281 } 1282 pdst = get_display_buffer(size); 1283 1284 } else { 1285 pdst = get_display_buffer(size); 1286 dst = pdst; 1287 } 1288 1289 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1290 if (len != size) { 1291 printf("failed to load bmp %s\n", bmp_name); 1292 ret = -ENOENT; 1293 goto free_header; 1294 } 1295 1296 if (!can_direct_logo(logo->bpp)) { 1297 int dst_size; 1298 /* 1299 * TODO: force use 16bpp if bpp less than 16; 1300 */ 1301 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1302 dst_size = logo->width * logo->height * logo->bpp >> 3; 1303 1304 dst = get_display_buffer(dst_size); 1305 if (!dst) { 1306 ret = -ENOMEM; 1307 goto free_header; 1308 } 1309 if (bmpdecoder(pdst, dst, logo->bpp)) { 1310 printf("failed to decode bmp %s\n", bmp_name); 1311 ret = -EINVAL; 1312 goto free_header; 1313 } 1314 flush_dcache_range((ulong)dst, 1315 ALIGN((ulong)dst + dst_size, 1316 CONFIG_SYS_CACHELINE_SIZE)); 1317 1318 logo->offset = 0; 1319 logo->ymirror = 0; 1320 } else { 1321 logo->offset = get_unaligned_le32(&header->data_offset); 1322 if (reserved == BMP_PROCESSED_FLAG) 1323 logo->ymirror = 0; 1324 else 1325 logo->ymirror = 1; 1326 } 1327 logo->mem = dst; 1328 1329 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1330 1331 free_header: 1332 1333 free(header); 1334 1335 return ret; 1336 #else 1337 return -EINVAL; 1338 #endif 1339 } 1340 1341 void rockchip_show_fbbase(ulong fbbase) 1342 { 1343 struct display_state *s; 1344 1345 list_for_each_entry(s, &rockchip_display_list, head) { 1346 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1347 s->logo.mem = (char *)fbbase; 1348 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1349 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1350 s->logo.bpp = 32; 1351 s->logo.ymirror = 0; 1352 1353 display_logo(s); 1354 } 1355 } 1356 1357 int rockchip_show_bmp(const char *bmp) 1358 { 1359 struct display_state *s; 1360 int ret = 0; 1361 1362 if (!bmp) { 1363 list_for_each_entry(s, &rockchip_display_list, head) 1364 display_disable(s); 1365 return -ENOENT; 1366 } 1367 1368 list_for_each_entry(s, &rockchip_display_list, head) { 1369 s->logo.mode = s->charge_logo_mode; 1370 if (load_bmp_logo(&s->logo, bmp)) 1371 continue; 1372 ret = display_logo(s); 1373 } 1374 1375 return ret; 1376 } 1377 1378 int rockchip_show_logo(void) 1379 { 1380 struct display_state *s; 1381 int ret = 0; 1382 1383 list_for_each_entry(s, &rockchip_display_list, head) { 1384 s->logo.mode = s->logo_mode; 1385 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1386 printf("failed to display uboot logo\n"); 1387 else 1388 ret = display_logo(s); 1389 1390 /* Load kernel bmp in rockchip_display_fixup() later */ 1391 } 1392 1393 return ret; 1394 } 1395 1396 enum { 1397 PORT_DIR_IN, 1398 PORT_DIR_OUT, 1399 }; 1400 1401 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1402 { 1403 ofnode panel_node, ports, port, ep, port_parent_node; 1404 struct udevice *panel_dev; 1405 int ret; 1406 1407 panel_node = dev_read_subnode(dev, "panel"); 1408 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1409 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1410 &panel_dev); 1411 if (!ret) 1412 goto found; 1413 } 1414 1415 ports = dev_read_subnode(dev, "ports"); 1416 if (!ofnode_valid(ports)) 1417 return NULL; 1418 1419 ofnode_for_each_subnode(port, ports) { 1420 u32 reg; 1421 1422 if (ofnode_read_u32(port, "reg", ®)) 1423 continue; 1424 1425 if (reg != PORT_DIR_OUT) 1426 continue; 1427 1428 ofnode_for_each_subnode(ep, port) { 1429 ofnode _ep, _port; 1430 uint phandle; 1431 bool is_ports_node = false; 1432 1433 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1434 continue; 1435 1436 _ep = ofnode_get_by_phandle(phandle); 1437 if (!ofnode_valid(_ep)) 1438 continue; 1439 1440 _port = ofnode_get_parent(_ep); 1441 if (!ofnode_valid(_port)) 1442 continue; 1443 1444 port_parent_node = ofnode_get_parent(_port); 1445 is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0; 1446 if (is_ports_node) 1447 panel_node = ofnode_get_parent(port_parent_node); 1448 else 1449 panel_node = ofnode_get_parent(_port); 1450 if (!ofnode_valid(panel_node)) 1451 continue; 1452 1453 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1454 panel_node, 1455 &panel_dev); 1456 if (!ret) 1457 goto found; 1458 } 1459 } 1460 1461 return NULL; 1462 1463 found: 1464 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1465 } 1466 1467 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1468 { 1469 ofnode node, ports, port, ep; 1470 struct udevice *dev; 1471 int ret; 1472 1473 ports = dev_read_subnode(conn_dev, "ports"); 1474 if (!ofnode_valid(ports)) 1475 return NULL; 1476 1477 ofnode_for_each_subnode(port, ports) { 1478 u32 reg; 1479 1480 if (ofnode_read_u32(port, "reg", ®)) 1481 continue; 1482 1483 if (reg != PORT_DIR_OUT) 1484 continue; 1485 1486 ofnode_for_each_subnode(ep, port) { 1487 ofnode _ep, _port, _ports; 1488 uint phandle; 1489 1490 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1491 continue; 1492 1493 _ep = ofnode_get_by_phandle(phandle); 1494 if (!ofnode_valid(_ep)) 1495 continue; 1496 1497 _port = ofnode_get_parent(_ep); 1498 if (!ofnode_valid(_port)) 1499 continue; 1500 1501 _ports = ofnode_get_parent(_port); 1502 if (!ofnode_valid(_ports)) 1503 continue; 1504 1505 node = ofnode_get_parent(_ports); 1506 if (!ofnode_valid(node)) 1507 continue; 1508 1509 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1510 node, &dev); 1511 if (!ret) 1512 goto found; 1513 } 1514 } 1515 1516 return NULL; 1517 1518 found: 1519 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1520 } 1521 1522 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1523 { 1524 ofnode ep, port, ports, conn; 1525 uint phandle; 1526 struct udevice *dev; 1527 int ret; 1528 1529 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1530 return NULL; 1531 1532 ep = ofnode_get_by_phandle(phandle); 1533 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1534 return NULL; 1535 1536 port = ofnode_get_parent(ep); 1537 if (!ofnode_valid(port)) 1538 return NULL; 1539 1540 ports = ofnode_get_parent(port); 1541 if (!ofnode_valid(ports)) 1542 return NULL; 1543 1544 conn = ofnode_get_parent(ports); 1545 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1546 return NULL; 1547 1548 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1549 if (ret) 1550 return NULL; 1551 1552 return dev; 1553 } 1554 1555 static bool rockchip_get_display_path_status(ofnode endpoint) 1556 { 1557 ofnode ep; 1558 uint phandle; 1559 1560 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1561 return false; 1562 1563 ep = ofnode_get_by_phandle(phandle); 1564 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1565 return false; 1566 1567 return true; 1568 } 1569 1570 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1571 { 1572 struct udevice *phy_dev; 1573 int ret; 1574 1575 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1576 if (ret) 1577 return NULL; 1578 1579 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1580 } 1581 1582 #if defined(CONFIG_ROCKCHIP_RK3568) 1583 static int rockchip_display_fixup_dts(void *blob) 1584 { 1585 ofnode route_node, route_subnode, conn_ep, conn_port; 1586 const struct device_node *route_sub_devnode; 1587 const struct device_node *ep_node, *conn_ep_dev_node; 1588 u32 phandle; 1589 int conn_ep_offset; 1590 const char *route_sub_path, *path; 1591 1592 /* Don't go further if new variant after 1593 * reading PMUGRF_SOC_CON15 1594 */ 1595 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1596 return 0; 1597 1598 route_node = ofnode_path("/display-subsystem/route"); 1599 if (!ofnode_valid(route_node)) 1600 return -EINVAL; 1601 1602 ofnode_for_each_subnode(route_subnode, route_node) { 1603 if (!ofnode_is_available(route_subnode)) 1604 continue; 1605 1606 route_sub_devnode = ofnode_to_np(route_subnode); 1607 route_sub_path = route_sub_devnode->full_name; 1608 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1609 !strstr(ofnode_get_name(route_subnode), "edp")) 1610 return 0; 1611 1612 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1613 if (phandle < 0) { 1614 printf("Warn: can't find connect node's handle\n"); 1615 continue; 1616 } 1617 1618 ep_node = of_find_node_by_phandle(phandle); 1619 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1620 printf("Warn: can't find endpoint node from phandle\n"); 1621 continue; 1622 } 1623 1624 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1625 conn_ep = ofnode_get_by_phandle(phandle); 1626 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1627 return -ENODEV; 1628 1629 conn_port = ofnode_get_parent(conn_ep); 1630 if (!ofnode_valid(conn_port)) 1631 return -ENODEV; 1632 1633 ofnode_for_each_subnode(conn_ep, conn_port) { 1634 conn_ep_dev_node = ofnode_to_np(conn_ep); 1635 path = conn_ep_dev_node->full_name; 1636 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1637 conn_ep_offset = fdt_path_offset(blob, path); 1638 1639 if (!ofnode_is_available(conn_ep) && 1640 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1641 do_fixup_by_path_u32(blob, route_sub_path, 1642 "connect", phandle, 1); 1643 fdt_status_okay(blob, conn_ep_offset); 1644 1645 } else if (ofnode_is_available(conn_ep) && 1646 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1647 fdt_status_disabled(blob, conn_ep_offset); 1648 } 1649 } 1650 } 1651 1652 return 0; 1653 } 1654 #endif 1655 1656 static int rockchip_display_probe(struct udevice *dev) 1657 { 1658 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1659 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1660 const void *blob = gd->fdt_blob; 1661 int phandle; 1662 struct udevice *crtc_dev, *conn_dev; 1663 struct rockchip_crtc *crtc; 1664 const struct rockchip_connector *conn; 1665 struct rockchip_panel *panel = NULL; 1666 struct rockchip_bridge *bridge = NULL; 1667 struct rockchip_phy *phy = NULL; 1668 struct display_state *s; 1669 const char *name; 1670 int ret; 1671 ofnode node, route_node, timing_node; 1672 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1673 struct public_phy_data *data; 1674 bool is_ports_node = false; 1675 1676 #if defined(CONFIG_ROCKCHIP_RK3568) 1677 rockchip_display_fixup_dts((void *)blob); 1678 #endif 1679 1680 /* Before relocation we don't need to do anything */ 1681 if (!(gd->flags & GD_FLG_RELOC)) 1682 return 0; 1683 1684 data = malloc(sizeof(struct public_phy_data)); 1685 if (!data) { 1686 printf("failed to alloc phy data\n"); 1687 return -ENOMEM; 1688 } 1689 data->phy_init = false; 1690 1691 init_display_buffer(plat->base); 1692 1693 route_node = dev_read_subnode(dev, "route"); 1694 if (!ofnode_valid(route_node)) 1695 return -ENODEV; 1696 1697 ofnode_for_each_subnode(node, route_node) { 1698 if (!ofnode_is_available(node)) 1699 continue; 1700 phandle = ofnode_read_u32_default(node, "connect", -1); 1701 if (phandle < 0) { 1702 printf("Warn: can't find connect node's handle\n"); 1703 continue; 1704 } 1705 ep_node = of_find_node_by_phandle(phandle); 1706 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1707 printf("Warn: can't find endpoint node from phandle\n"); 1708 continue; 1709 } 1710 port_node = of_get_parent(ep_node); 1711 if (!ofnode_valid(np_to_ofnode(port_node))) { 1712 printf("Warn: can't find port node from phandle\n"); 1713 continue; 1714 } 1715 1716 port_parent_node = of_get_parent(port_node); 1717 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1718 printf("Warn: can't find port parent node from phandle\n"); 1719 continue; 1720 } 1721 1722 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1723 if (is_ports_node) { 1724 vop_node = of_get_parent(port_parent_node); 1725 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1726 printf("Warn: can't find crtc node from phandle\n"); 1727 continue; 1728 } 1729 } else { 1730 vop_node = port_parent_node; 1731 } 1732 1733 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1734 np_to_ofnode(vop_node), 1735 &crtc_dev); 1736 if (ret) { 1737 printf("Warn: can't find crtc driver %d\n", ret); 1738 continue; 1739 } 1740 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1741 1742 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1743 if (!conn_dev) { 1744 printf("Warn: can't find connect driver\n"); 1745 continue; 1746 } 1747 1748 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1749 1750 phy = rockchip_of_find_phy(conn_dev); 1751 1752 bridge = rockchip_of_find_bridge(conn_dev); 1753 if (bridge) 1754 panel = rockchip_of_find_panel(bridge->dev); 1755 else 1756 panel = rockchip_of_find_panel(conn_dev); 1757 1758 s = malloc(sizeof(*s)); 1759 if (!s) 1760 continue; 1761 1762 memset(s, 0, sizeof(*s)); 1763 1764 INIT_LIST_HEAD(&s->head); 1765 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1766 if (!ret) 1767 memcpy(s->ulogo_name, name, strlen(name)); 1768 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1769 if (!ret) 1770 memcpy(s->klogo_name, name, strlen(name)); 1771 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1772 if (!strcmp(name, "fullscreen")) 1773 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1774 else 1775 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1776 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1777 if (!strcmp(name, "fullscreen")) 1778 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1779 else 1780 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1781 1782 s->force_output = ofnode_read_bool(node, "force-output"); 1783 1784 if (s->force_output) { 1785 timing_node = ofnode_find_subnode(node, "force_timing"); 1786 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1787 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1788 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1789 } 1790 1791 s->blob = blob; 1792 s->panel_state.panel = panel; 1793 s->conn_state.node = conn_dev->node; 1794 s->conn_state.dev = conn_dev; 1795 s->conn_state.connector = conn; 1796 s->conn_state.phy = phy; 1797 s->conn_state.bridge = bridge; 1798 s->conn_state.overscan.left_margin = 100; 1799 s->conn_state.overscan.right_margin = 100; 1800 s->conn_state.overscan.top_margin = 100; 1801 s->conn_state.overscan.bottom_margin = 100; 1802 s->crtc_state.node = np_to_ofnode(vop_node); 1803 s->crtc_state.dev = crtc_dev; 1804 s->crtc_state.crtc = crtc; 1805 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1806 s->node = node; 1807 1808 if (is_ports_node) { /* only vop2 will get into here */ 1809 ofnode vp_node = np_to_ofnode(port_node); 1810 static bool get_plane_mask_from_dts; 1811 1812 s->crtc_state.ports_node = port_parent_node; 1813 if (!get_plane_mask_from_dts) { 1814 ofnode vp_sub_node; 1815 int vp_id = 0; 1816 bool vp_enable = false; 1817 1818 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1819 int cursor_plane = -1; 1820 1821 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 1822 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1823 1824 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 1825 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 1826 if (ret) { 1827 int primary_plane = 0; 1828 1829 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 1830 s->crtc_state.crtc->assign_plane |= true; 1831 primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0); 1832 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 1833 vp_id, 1834 s->crtc_state.crtc->vps[vp_id].plane_mask, 1835 primary_plane, 1836 cursor_plane); 1837 } 1838 1839 /* To check current vp status */ 1840 vp_enable = false; 1841 ofnode_for_each_subnode(vp_sub_node, vp_node) 1842 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 1843 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 1844 } 1845 get_plane_mask_from_dts = true; 1846 } 1847 } 1848 1849 if (bridge) 1850 bridge->state = s; 1851 1852 if (panel) 1853 panel->state = s; 1854 1855 get_crtc_mcu_mode(&s->crtc_state); 1856 1857 ret = ofnode_read_u32_default(s->crtc_state.node, 1858 "rockchip,dual-channel-swap", 0); 1859 s->crtc_state.dual_channel_swap = ret; 1860 if (connector_panel_init(s)) { 1861 printf("Warn: Failed to init panel drivers\n"); 1862 free(s); 1863 continue; 1864 } 1865 1866 if (connector_phy_init(s, data)) { 1867 printf("Warn: Failed to init phy drivers\n"); 1868 free(s); 1869 continue; 1870 } 1871 list_add_tail(&s->head, &rockchip_display_list); 1872 } 1873 1874 if (list_empty(&rockchip_display_list)) { 1875 debug("Failed to found available display route\n"); 1876 return -ENODEV; 1877 } 1878 rockchip_get_baseparameter(); 1879 display_pre_init(); 1880 1881 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1882 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1883 uc_priv->bpix = VIDEO_BPP32; 1884 1885 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1886 rockchip_show_fbbase(plat->base); 1887 video_set_flush_dcache(dev, true); 1888 #endif 1889 1890 return 0; 1891 } 1892 1893 void rockchip_display_fixup(void *blob) 1894 { 1895 const struct rockchip_connector_funcs *conn_funcs; 1896 const struct rockchip_crtc_funcs *crtc_funcs; 1897 const struct rockchip_connector *conn; 1898 const struct rockchip_crtc *crtc; 1899 struct display_state *s; 1900 int offset; 1901 const struct device_node *np; 1902 const char *path; 1903 1904 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1905 list_for_each_entry(s, &rockchip_display_list, head) 1906 load_bmp_logo(&s->logo, s->klogo_name); 1907 1908 if (!get_display_size()) 1909 return; 1910 1911 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1912 (u64)memory_start, 1913 (u64)get_display_size()); 1914 if (offset < 0) 1915 printf("failed to reserve drm-loader-logo memory\n"); 1916 1917 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 1918 (u64)cubic_lut_memory_start, 1919 (u64)get_cubic_memory_size()); 1920 if (offset < 0) 1921 printf("failed to reserve drm-cubic-lut memory\n"); 1922 } else { 1923 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1924 /* Compatible with rkfb display, only need reserve memory */ 1925 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1926 (u64)memory_start, 1927 MEMORY_POOL_SIZE); 1928 if (offset < 0) 1929 printf("failed to reserve fb-loader-logo memory\n"); 1930 else 1931 list_for_each_entry(s, &rockchip_display_list, head) 1932 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1933 return; 1934 } 1935 1936 list_for_each_entry(s, &rockchip_display_list, head) { 1937 conn = s->conn_state.connector; 1938 if (!conn) 1939 continue; 1940 conn_funcs = conn->funcs; 1941 if (!conn_funcs) { 1942 printf("failed to get exist connector\n"); 1943 continue; 1944 } 1945 1946 crtc = s->crtc_state.crtc; 1947 if (!crtc) 1948 continue; 1949 1950 crtc_funcs = crtc->funcs; 1951 if (!crtc_funcs) { 1952 printf("failed to get exist crtc\n"); 1953 continue; 1954 } 1955 1956 if (crtc_funcs->fixup_dts) 1957 crtc_funcs->fixup_dts(s, blob); 1958 1959 if (conn_funcs->fixup_dts) 1960 conn_funcs->fixup_dts(s, blob); 1961 1962 np = ofnode_to_np(s->node); 1963 path = np->full_name; 1964 fdt_increase_size(blob, 0x400); 1965 #define FDT_SET_U32(name, val) \ 1966 do_fixup_by_path_u32(blob, path, name, val, 1); 1967 1968 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1969 - memory_start; 1970 FDT_SET_U32("logo,offset", offset); 1971 FDT_SET_U32("logo,width", s->logo.width); 1972 FDT_SET_U32("logo,height", s->logo.height); 1973 FDT_SET_U32("logo,bpp", s->logo.bpp); 1974 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1975 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 1976 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1977 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1978 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1979 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1980 FDT_SET_U32("video,vrefresh", 1981 drm_mode_vrefresh(&s->conn_state.mode)); 1982 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1983 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1984 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1985 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1986 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1987 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1988 1989 if (s->conn_state.disp_info) { 1990 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 1991 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 1992 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 1993 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 1994 } 1995 1996 if (s->conn_state.disp_info->cubic_lut_data.size && 1997 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 1998 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 1999 2000 #undef FDT_SET_U32 2001 } 2002 } 2003 2004 int rockchip_display_bind(struct udevice *dev) 2005 { 2006 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2007 2008 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2009 2010 return 0; 2011 } 2012 2013 static const struct udevice_id rockchip_display_ids[] = { 2014 { .compatible = "rockchip,display-subsystem" }, 2015 { } 2016 }; 2017 2018 U_BOOT_DRIVER(rockchip_display) = { 2019 .name = "rockchip_display", 2020 .id = UCLASS_VIDEO, 2021 .of_match = rockchip_display_ids, 2022 .bind = rockchip_display_bind, 2023 .probe = rockchip_display_probe, 2024 }; 2025 2026 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2027 char *const argv[]) 2028 { 2029 if (argc != 1) 2030 return CMD_RET_USAGE; 2031 2032 rockchip_show_logo(); 2033 2034 return 0; 2035 } 2036 2037 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2038 char *const argv[]) 2039 { 2040 if (argc != 2) 2041 return CMD_RET_USAGE; 2042 2043 rockchip_show_bmp(argv[1]); 2044 2045 return 0; 2046 } 2047 2048 U_BOOT_CMD( 2049 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2050 "load and display log from resource partition", 2051 NULL 2052 ); 2053 2054 U_BOOT_CMD( 2055 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2056 "load and display bmp from resource partition", 2057 " <bmp_name>" 2058 ); 2059