1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 void *base_parameter_addr = (void *)&base_parameter; 156 157 for (i = 0; i < 8; i++) { 158 disp_header = &base_parameter.disp_header[i]; 159 if (disp_header->connector_type == type && 160 disp_header->connector_id == id) { 161 printf("disp info %d, type:%d, id:%d\n", i, type, id); 162 offset = disp_header->offset; 163 break; 164 } 165 } 166 167 if (offset < 0) 168 return NULL; 169 disp_info = base_parameter_addr + offset; 170 if (disp_info->screen_info[0].type != type || 171 disp_info->screen_info[0].id != id) { 172 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 173 disp_info->screen_info[0].type, 174 disp_info->screen_info[0].id); 175 return NULL; 176 } 177 178 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 179 return NULL; 180 181 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 182 183 if (crc_val != disp_info->crc) { 184 printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 185 return NULL; 186 } 187 188 return disp_info; 189 } 190 191 /* check which kind of public phy does connector use */ 192 static int check_public_use_phy(struct display_state *state) 193 { 194 int ret = NONE; 195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 196 struct connector_state *conn_state = &state->conn_state; 197 198 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 199 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 200 ret = INNO_HDMI_PHY; 201 #endif 202 203 return ret; 204 } 205 206 /* 207 * get public phy driver and initialize it. 208 * The current version only has inno hdmi phy for hdmi and tve. 209 */ 210 static int get_public_phy(struct display_state *state, 211 struct public_phy_data *data) 212 { 213 struct connector_state *conn_state = &state->conn_state; 214 struct rockchip_phy *phy; 215 struct udevice *dev; 216 int ret = 0; 217 218 switch (data->public_phy_type) { 219 case INNO_HDMI_PHY: 220 #if defined(CONFIG_ROCKCHIP_RK3328) 221 ret = uclass_get_device_by_name(UCLASS_PHY, 222 "hdmiphy@ff430000", &dev); 223 #elif defined(CONFIG_ROCKCHIP_RK322X) 224 ret = uclass_get_device_by_name(UCLASS_PHY, 225 "hdmi-phy@12030000", &dev); 226 #else 227 ret = -EINVAL; 228 #endif 229 if (ret) { 230 printf("Warn: can't find phy driver\n"); 231 return 0; 232 } 233 234 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 235 if (!phy) { 236 printf("failed to get phy driver\n"); 237 return 0; 238 } 239 240 ret = rockchip_phy_init(phy); 241 if (ret) { 242 printf("failed to init phy driver\n"); 243 return ret; 244 } 245 conn_state->phy = phy; 246 247 debug("inno hdmi phy init success, save it\n"); 248 data->phy_drv = conn_state->phy; 249 data->phy_init = true; 250 return 0; 251 default: 252 return -EINVAL; 253 } 254 } 255 256 static void init_display_buffer(ulong base) 257 { 258 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 259 memory_end = memory_start; 260 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 261 } 262 263 void *get_display_buffer(int size) 264 { 265 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 266 void *buf; 267 268 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 269 printf("failed to alloc %dbyte memory to display\n", size); 270 return NULL; 271 } 272 buf = (void *)roundup_memory; 273 274 memory_end = roundup_memory + size; 275 276 return buf; 277 } 278 279 static unsigned long get_display_size(void) 280 { 281 return memory_end - memory_start; 282 } 283 284 static unsigned long get_single_cubic_lut_size(void) 285 { 286 ulong cubic_lut_size; 287 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 288 289 /* This is depend on IC designed */ 290 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 291 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 292 293 return cubic_lut_size; 294 } 295 296 static unsigned long get_cubic_lut_offset(int crtc_id) 297 { 298 return crtc_id * get_single_cubic_lut_size(); 299 } 300 301 unsigned long get_cubic_lut_buffer(int crtc_id) 302 { 303 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 304 } 305 306 static unsigned long get_cubic_memory_size(void) 307 { 308 /* Max support 4 cubic lut */ 309 return get_single_cubic_lut_size() * 4; 310 } 311 312 bool can_direct_logo(int bpp) 313 { 314 return bpp == 16 || bpp == 32; 315 } 316 317 static int connector_phy_init(struct display_state *state, 318 struct public_phy_data *data) 319 { 320 struct connector_state *conn_state = &state->conn_state; 321 int type; 322 323 /* does this connector use public phy with others */ 324 type = check_public_use_phy(state); 325 if (type == INNO_HDMI_PHY) { 326 /* there is no public phy was initialized */ 327 if (!data->phy_init) { 328 debug("start get public phy\n"); 329 data->public_phy_type = type; 330 if (get_public_phy(state, data)) { 331 printf("can't find correct public phy type\n"); 332 free(data); 333 return -EINVAL; 334 } 335 return 0; 336 } 337 338 /* if this phy has been initialized, get it directly */ 339 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 340 return 0; 341 } 342 343 return 0; 344 } 345 346 static int connector_panel_init(struct display_state *state) 347 { 348 struct connector_state *conn_state = &state->conn_state; 349 struct panel_state *panel_state = &state->panel_state; 350 const struct rockchip_panel *panel = panel_state->panel; 351 ofnode dsp_lut_node; 352 int ret, len; 353 354 if (!panel) 355 return 0; 356 357 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 358 if (!ofnode_valid(dsp_lut_node)) { 359 debug("%s can not find dsp-lut node\n", __func__); 360 return 0; 361 } 362 363 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 364 if (len > 0) { 365 conn_state->gamma.size = len / sizeof(u32); 366 conn_state->gamma.lut = malloc(len); 367 if (!conn_state->gamma.lut) { 368 printf("malloc gamma lut failed\n"); 369 return -ENOMEM; 370 } 371 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 372 conn_state->gamma.lut, 373 conn_state->gamma.size); 374 if (ret) { 375 printf("Cannot decode gamma_lut\n"); 376 conn_state->gamma.lut = NULL; 377 return -EINVAL; 378 } 379 panel_state->dsp_lut_node = dsp_lut_node; 380 } 381 382 return 0; 383 } 384 385 int drm_mode_vrefresh(const struct drm_display_mode *mode) 386 { 387 int refresh = 0; 388 unsigned int calc_val; 389 390 if (mode->vrefresh > 0) { 391 refresh = mode->vrefresh; 392 } else if (mode->htotal > 0 && mode->vtotal > 0) { 393 int vtotal; 394 395 vtotal = mode->vtotal; 396 /* work out vrefresh the value will be x1000 */ 397 calc_val = (mode->clock * 1000); 398 calc_val /= mode->htotal; 399 refresh = (calc_val + vtotal / 2) / vtotal; 400 401 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 402 refresh *= 2; 403 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 404 refresh /= 2; 405 if (mode->vscan > 1) 406 refresh /= mode->vscan; 407 } 408 return refresh; 409 } 410 411 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode) 412 { 413 int hactive, vactive, pixelclock; 414 int hfront_porch, hback_porch, hsync_len; 415 int vfront_porch, vback_porch, vsync_len; 416 int val, flags = 0; 417 418 #define FDT_GET_INT(val, name) \ 419 val = ofnode_read_s32_default(node, name, -1); \ 420 if (val < 0) { \ 421 printf("Can't get %s\n", name); \ 422 return -ENXIO; \ 423 } 424 425 #define FDT_GET_INT_DEFAULT(val, name, default) \ 426 val = ofnode_read_s32_default(node, name, default); 427 428 FDT_GET_INT(hactive, "hactive"); 429 FDT_GET_INT(vactive, "vactive"); 430 FDT_GET_INT(pixelclock, "clock-frequency"); 431 FDT_GET_INT(hsync_len, "hsync-len"); 432 FDT_GET_INT(hfront_porch, "hfront-porch"); 433 FDT_GET_INT(hback_porch, "hback-porch"); 434 FDT_GET_INT(vsync_len, "vsync-len"); 435 FDT_GET_INT(vfront_porch, "vfront-porch"); 436 FDT_GET_INT(vback_porch, "vback-porch"); 437 FDT_GET_INT(val, "hsync-active"); 438 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 439 FDT_GET_INT(val, "vsync-active"); 440 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 441 FDT_GET_INT(val, "pixelclk-active"); 442 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 443 444 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 445 if (val == DRM_MODE_FLAG_XMIRROR) { 446 flags |= DRM_MODE_FLAG_XMIRROR; 447 } else if (val == DRM_MODE_FLAG_YMIRROR) { 448 flags |= DRM_MODE_FLAG_YMIRROR; 449 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 450 flags |= DRM_MODE_FLAG_XMIRROR; 451 flags |= DRM_MODE_FLAG_YMIRROR; 452 } 453 mode->hdisplay = hactive; 454 mode->hsync_start = mode->hdisplay + hfront_porch; 455 mode->hsync_end = mode->hsync_start + hsync_len; 456 mode->htotal = mode->hsync_end + hback_porch; 457 458 mode->vdisplay = vactive; 459 mode->vsync_start = mode->vdisplay + vfront_porch; 460 mode->vsync_end = mode->vsync_start + vsync_len; 461 mode->vtotal = mode->vsync_end + vback_porch; 462 463 mode->clock = pixelclock / 1000; 464 mode->flags = flags; 465 mode->vrefresh = drm_mode_vrefresh(mode); 466 467 return 0; 468 } 469 470 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 471 { 472 int ret = 0; 473 474 ret = rockchip_ofnode_get_display_mode(node, mode); 475 476 if (ret) { 477 mode->clock = 74250; 478 mode->flags = 0x5; 479 mode->hdisplay = 1280; 480 mode->hsync_start = 1390; 481 mode->hsync_end = 1430; 482 mode->htotal = 1650; 483 mode->hskew = 0; 484 mode->vdisplay = 720; 485 mode->vsync_start = 725; 486 mode->vsync_end = 730; 487 mode->vtotal = 750; 488 mode->vrefresh = 60; 489 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 490 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 491 } 492 493 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 494 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 495 mode->vscan); 496 497 return 0; 498 } 499 500 static int display_get_timing_from_dts(struct panel_state *panel_state, 501 struct drm_display_mode *mode) 502 { 503 struct rockchip_panel *panel = panel_state->panel; 504 struct ofnode_phandle_args args; 505 ofnode dt, timing; 506 int ret; 507 508 dt = dev_read_subnode(panel->dev, "display-timings"); 509 if (ofnode_valid(dt)) { 510 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 511 0, 0, &args); 512 if (ret) 513 return ret; 514 515 timing = args.node; 516 } else { 517 timing = dev_read_subnode(panel->dev, "panel-timing"); 518 } 519 520 if (!ofnode_valid(timing)) { 521 printf("failed to get display timings from DT\n"); 522 return -ENXIO; 523 } 524 525 rockchip_ofnode_get_display_mode(timing, mode); 526 527 return 0; 528 } 529 530 /** 531 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 532 * @edid_data: structure store mode list 533 * @max_output: vop max output resolution 534 */ 535 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 536 struct vop_rect *max_output) 537 { 538 int i; 539 540 for (i = 0; i < edid_data->modes; i++) { 541 if (edid_data->mode_buf[i].hdisplay > max_output->width || 542 edid_data->mode_buf[i].vdisplay > max_output->height) 543 edid_data->mode_buf[i].invalid = true; 544 } 545 } 546 547 /** 548 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 549 * @p: mode 550 * @adjust_flags: a combination of adjustment flags 551 * 552 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 553 * 554 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 555 * interlaced modes. 556 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 557 * buffers containing two eyes (only adjust the timings when needed, eg. for 558 * "frame packing" or "side by side full"). 559 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 560 * be performed for doublescan and vscan > 1 modes respectively. 561 */ 562 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 563 { 564 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 565 return; 566 567 if (p->flags & DRM_MODE_FLAG_DBLCLK) 568 p->crtc_clock = 2 * p->clock; 569 else 570 p->crtc_clock = p->clock; 571 p->crtc_hdisplay = p->hdisplay; 572 p->crtc_hsync_start = p->hsync_start; 573 p->crtc_hsync_end = p->hsync_end; 574 p->crtc_htotal = p->htotal; 575 p->crtc_hskew = p->hskew; 576 p->crtc_vdisplay = p->vdisplay; 577 p->crtc_vsync_start = p->vsync_start; 578 p->crtc_vsync_end = p->vsync_end; 579 p->crtc_vtotal = p->vtotal; 580 581 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 582 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 583 p->crtc_vdisplay /= 2; 584 p->crtc_vsync_start /= 2; 585 p->crtc_vsync_end /= 2; 586 p->crtc_vtotal /= 2; 587 } 588 } 589 590 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 591 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 592 p->crtc_vdisplay *= 2; 593 p->crtc_vsync_start *= 2; 594 p->crtc_vsync_end *= 2; 595 p->crtc_vtotal *= 2; 596 } 597 } 598 599 if (!(adjust_flags & CRTC_NO_VSCAN)) { 600 if (p->vscan > 1) { 601 p->crtc_vdisplay *= p->vscan; 602 p->crtc_vsync_start *= p->vscan; 603 p->crtc_vsync_end *= p->vscan; 604 p->crtc_vtotal *= p->vscan; 605 } 606 } 607 608 if (adjust_flags & CRTC_STEREO_DOUBLE) { 609 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 610 611 switch (layout) { 612 case DRM_MODE_FLAG_3D_FRAME_PACKING: 613 p->crtc_clock *= 2; 614 p->crtc_vdisplay += p->crtc_vtotal; 615 p->crtc_vsync_start += p->crtc_vtotal; 616 p->crtc_vsync_end += p->crtc_vtotal; 617 p->crtc_vtotal += p->crtc_vtotal; 618 break; 619 } 620 } 621 622 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 623 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 624 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 625 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 626 } 627 628 /** 629 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 630 * output format 631 * 632 * @connector: drm connector under action. 633 * @mode: video mode to be tested. 634 * 635 * Returns: 636 * true if the mode can be supported in YCBCR420 format 637 * false if not. 638 */ 639 bool drm_mode_is_420_only(const struct drm_display_info *display, 640 struct drm_display_mode *mode) 641 { 642 u8 vic = drm_match_cea_mode(mode); 643 644 return test_bit(vic, display->hdmi.y420_vdb_modes); 645 } 646 647 /** 648 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 649 * output format also (along with RGB/YCBCR444/422) 650 * 651 * @display: display under action. 652 * @mode: video mode to be tested. 653 * 654 * Returns: 655 * true if the mode can be support YCBCR420 format 656 * false if not. 657 */ 658 bool drm_mode_is_420_also(const struct drm_display_info *display, 659 struct drm_display_mode *mode) 660 { 661 u8 vic = drm_match_cea_mode(mode); 662 663 return test_bit(vic, display->hdmi.y420_cmdb_modes); 664 } 665 666 /** 667 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 668 * output format 669 * 670 * @display: display under action. 671 * @mode: video mode to be tested. 672 * 673 * Returns: 674 * true if the mode can be supported in YCBCR420 format 675 * false if not. 676 */ 677 bool drm_mode_is_420(const struct drm_display_info *display, 678 struct drm_display_mode *mode) 679 { 680 return drm_mode_is_420_only(display, mode) || 681 drm_mode_is_420_also(display, mode); 682 } 683 684 static int display_get_timing(struct display_state *state) 685 { 686 struct connector_state *conn_state = &state->conn_state; 687 struct drm_display_mode *mode = &conn_state->mode; 688 const struct drm_display_mode *m; 689 struct panel_state *panel_state = &state->panel_state; 690 const struct rockchip_panel *panel = panel_state->panel; 691 692 if (dev_of_valid(panel->dev) && 693 !display_get_timing_from_dts(panel_state, mode)) { 694 printf("Using display timing dts\n"); 695 return 0; 696 } 697 698 if (panel->data) { 699 m = (const struct drm_display_mode *)panel->data; 700 memcpy(mode, m, sizeof(*m)); 701 printf("Using display timing from compatible panel driver\n"); 702 return 0; 703 } 704 705 return -ENODEV; 706 } 707 708 static int display_pre_init(void) 709 { 710 struct display_state *state; 711 int ret = 0; 712 713 list_for_each_entry(state, &rockchip_display_list, head) { 714 struct connector_state *conn_state = &state->conn_state; 715 const struct rockchip_connector *conn = conn_state->connector; 716 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 717 struct crtc_state *crtc_state = &state->crtc_state; 718 struct rockchip_crtc *crtc = crtc_state->crtc; 719 720 if (conn_funcs->pre_init) { 721 ret = conn_funcs->pre_init(state); 722 if (ret) 723 printf("pre init conn error\n"); 724 } 725 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 726 } 727 return ret; 728 } 729 730 static int display_use_force_mode(struct display_state *state) 731 { 732 struct connector_state *conn_state = &state->conn_state; 733 struct drm_display_mode *mode = &conn_state->mode; 734 735 conn_state->bpc = 8; 736 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 737 conn_state->bus_format = state->force_bus_format; 738 739 return 0; 740 } 741 742 static int display_get_edid_mode(struct display_state *state) 743 { 744 int ret = 0; 745 struct connector_state *conn_state = &state->conn_state; 746 struct drm_display_mode *mode = &conn_state->mode; 747 int bpc; 748 749 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 750 if (!ret) { 751 conn_state->bpc = bpc; 752 edid_print_info((void *)&conn_state->edid); 753 } else { 754 conn_state->bpc = 8; 755 mode->clock = 74250; 756 mode->flags = 0x5; 757 mode->hdisplay = 1280; 758 mode->hsync_start = 1390; 759 mode->hsync_end = 1430; 760 mode->htotal = 1650; 761 mode->hskew = 0; 762 mode->vdisplay = 720; 763 mode->vsync_start = 725; 764 mode->vsync_end = 730; 765 mode->vtotal = 750; 766 mode->vrefresh = 60; 767 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 768 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 769 770 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name); 771 } 772 773 return ret; 774 } 775 776 static int display_init(struct display_state *state) 777 { 778 struct connector_state *conn_state = &state->conn_state; 779 struct panel_state *panel_state = &state->panel_state; 780 const struct rockchip_connector *conn = conn_state->connector; 781 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 782 struct crtc_state *crtc_state = &state->crtc_state; 783 struct rockchip_crtc *crtc = crtc_state->crtc; 784 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 785 struct drm_display_mode *mode = &conn_state->mode; 786 const char *compatible; 787 int ret = 0; 788 static bool __print_once = false; 789 790 if (!__print_once) { 791 __print_once = true; 792 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 793 } 794 795 if (state->is_init) 796 return 0; 797 798 if (!conn_funcs || !crtc_funcs) { 799 printf("failed to find connector or crtc functions\n"); 800 return -ENXIO; 801 } 802 803 if (crtc_state->crtc->active && !crtc_state->ports_node && 804 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 805 sizeof(struct drm_display_mode))) { 806 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 807 crtc_state->dev->name, 808 crtc_state->crtc->active_mode.type, 809 crtc_state->crtc->active_mode.hdisplay, 810 crtc_state->crtc->active_mode.vdisplay, 811 crtc_state->crtc->active_mode.vrefresh); 812 return -ENODEV; 813 } 814 815 if (crtc_funcs->preinit) { 816 ret = crtc_funcs->preinit(state); 817 if (ret) 818 return ret; 819 } 820 821 if (panel_state->panel) 822 rockchip_panel_init(panel_state->panel, state); 823 824 if (conn_state->bridge) 825 rockchip_bridge_init(conn_state->bridge, state); 826 827 if (conn_funcs->init) { 828 ret = conn_funcs->init(state); 829 if (ret) 830 goto deinit; 831 } 832 833 if (conn_state->phy) 834 rockchip_phy_init(conn_state->phy); 835 836 /* 837 * support hotplug, but not connect; 838 */ 839 #ifdef CONFIG_ROCKCHIP_DRM_TVE 840 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 841 printf("hdmi plugin ,skip tve\n"); 842 goto deinit; 843 } 844 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 845 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 846 printf("hdmi plugin ,skip tve\n"); 847 goto deinit; 848 } 849 #endif 850 if (conn_funcs->detect) { 851 ret = conn_funcs->detect(state); 852 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 853 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 854 crtc->hdmi_hpd = ret; 855 #endif 856 if (!ret && !state->force_output) { 857 printf("%s disconnected\n", conn_state->dev->name); 858 goto deinit; 859 } 860 } 861 862 if (panel_state->panel) { 863 ret = display_get_timing(state); 864 if (!ret) 865 conn_state->bpc = panel_state->panel->bpc; 866 #if defined(CONFIG_I2C_EDID) 867 if (ret < 0 && conn_funcs->get_edid) { 868 rockchip_panel_prepare(panel_state->panel); 869 ret = conn_funcs->get_edid(state); 870 if (!ret) 871 display_get_edid_mode(state); 872 } 873 #endif 874 } else if (conn_state->bridge) { 875 ret = video_bridge_read_edid(conn_state->bridge->dev, 876 conn_state->edid, EDID_SIZE); 877 if (ret > 0) { 878 #if defined(CONFIG_I2C_EDID) 879 display_get_edid_mode(state); 880 #endif 881 } else { 882 ret = video_bridge_get_timing(conn_state->bridge->dev); 883 } 884 } else if (conn_funcs->get_timing) { 885 ret = conn_funcs->get_timing(state); 886 } else if (conn_funcs->get_edid) { 887 ret = conn_funcs->get_edid(state); 888 #if defined(CONFIG_I2C_EDID) 889 if (!ret) 890 display_get_edid_mode(state); 891 #endif 892 } 893 894 if (ret && !state->force_output) 895 goto deinit; 896 if (state->force_output) 897 display_use_force_mode(state); 898 899 /* rk356x series drive mipi pixdata on posedge */ 900 compatible = dev_read_string(conn_state->dev, "compatible"); 901 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 902 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 903 904 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 905 " H: %04d %04d %04d %04d\n" 906 " V: %04d %04d %04d %04d\n" 907 "bus_format: %x\n", 908 conn_state->dev->name, 909 state->force_output ? "use force output" : "", 910 mode->clock, mode->flags, 911 mode->hdisplay, mode->hsync_start, 912 mode->hsync_end, mode->htotal, 913 mode->vdisplay, mode->vsync_start, 914 mode->vsync_end, mode->vtotal, 915 conn_state->bus_format); 916 917 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 918 919 if (conn_state->bridge) 920 rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 921 922 if (crtc_funcs->init) { 923 ret = crtc_funcs->init(state); 924 if (ret) 925 goto deinit; 926 } 927 state->is_init = 1; 928 929 crtc_state->crtc->active = true; 930 memcpy(&crtc_state->crtc->active_mode, 931 &conn_state->mode, sizeof(struct drm_display_mode)); 932 933 return 0; 934 935 deinit: 936 if (conn_funcs->deinit) 937 conn_funcs->deinit(state); 938 return ret; 939 } 940 941 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 942 { 943 struct crtc_state *crtc_state = &state->crtc_state; 944 const struct rockchip_crtc *crtc = crtc_state->crtc; 945 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 946 int ret; 947 948 if (!state->is_init) 949 return -EINVAL; 950 951 if (crtc_funcs->send_mcu_cmd) { 952 ret = crtc_funcs->send_mcu_cmd(state, type, val); 953 if (ret) 954 return ret; 955 } 956 957 return 0; 958 } 959 960 static int display_set_plane(struct display_state *state) 961 { 962 struct crtc_state *crtc_state = &state->crtc_state; 963 const struct rockchip_crtc *crtc = crtc_state->crtc; 964 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 965 int ret; 966 967 if (!state->is_init) 968 return -EINVAL; 969 970 if (crtc_funcs->set_plane) { 971 ret = crtc_funcs->set_plane(state); 972 if (ret) 973 return ret; 974 } 975 976 return 0; 977 } 978 979 static int display_enable(struct display_state *state) 980 { 981 struct connector_state *conn_state = &state->conn_state; 982 const struct rockchip_connector *conn = conn_state->connector; 983 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 984 struct crtc_state *crtc_state = &state->crtc_state; 985 const struct rockchip_crtc *crtc = crtc_state->crtc; 986 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 987 struct panel_state *panel_state = &state->panel_state; 988 989 if (!state->is_init) 990 return -EINVAL; 991 992 if (state->is_enable) 993 return 0; 994 995 if (crtc_funcs->prepare) 996 crtc_funcs->prepare(state); 997 998 if (conn_funcs->prepare) 999 conn_funcs->prepare(state); 1000 1001 if (conn_state->bridge) 1002 rockchip_bridge_pre_enable(conn_state->bridge); 1003 1004 if (panel_state->panel) 1005 rockchip_panel_prepare(panel_state->panel); 1006 1007 if (crtc_funcs->enable) 1008 crtc_funcs->enable(state); 1009 1010 if (conn_funcs->enable) 1011 conn_funcs->enable(state); 1012 1013 if (conn_state->bridge) 1014 rockchip_bridge_enable(conn_state->bridge); 1015 1016 if (panel_state->panel) 1017 rockchip_panel_enable(panel_state->panel); 1018 1019 state->is_enable = true; 1020 1021 return 0; 1022 } 1023 1024 static int display_disable(struct display_state *state) 1025 { 1026 struct connector_state *conn_state = &state->conn_state; 1027 const struct rockchip_connector *conn = conn_state->connector; 1028 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1029 struct crtc_state *crtc_state = &state->crtc_state; 1030 const struct rockchip_crtc *crtc = crtc_state->crtc; 1031 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1032 struct panel_state *panel_state = &state->panel_state; 1033 1034 if (!state->is_init) 1035 return 0; 1036 1037 if (!state->is_enable) 1038 return 0; 1039 1040 if (panel_state->panel) 1041 rockchip_panel_disable(panel_state->panel); 1042 1043 if (conn_state->bridge) 1044 rockchip_bridge_disable(conn_state->bridge); 1045 1046 if (conn_funcs->disable) 1047 conn_funcs->disable(state); 1048 1049 if (crtc_funcs->disable) 1050 crtc_funcs->disable(state); 1051 1052 if (panel_state->panel) 1053 rockchip_panel_unprepare(panel_state->panel); 1054 1055 if (conn_state->bridge) 1056 rockchip_bridge_post_disable(conn_state->bridge); 1057 1058 if (conn_funcs->unprepare) 1059 conn_funcs->unprepare(state); 1060 1061 state->is_enable = 0; 1062 state->is_init = 0; 1063 1064 return 0; 1065 } 1066 1067 static int display_logo(struct display_state *state) 1068 { 1069 struct crtc_state *crtc_state = &state->crtc_state; 1070 struct connector_state *conn_state = &state->conn_state; 1071 struct logo_info *logo = &state->logo; 1072 int hdisplay, vdisplay, ret; 1073 1074 ret = display_init(state); 1075 if (!state->is_init || ret) 1076 return -ENODEV; 1077 1078 switch (logo->bpp) { 1079 case 16: 1080 crtc_state->format = ROCKCHIP_FMT_RGB565; 1081 break; 1082 case 24: 1083 crtc_state->format = ROCKCHIP_FMT_RGB888; 1084 break; 1085 case 32: 1086 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1087 break; 1088 default: 1089 printf("can't support bmp bits[%d]\n", logo->bpp); 1090 return -EINVAL; 1091 } 1092 hdisplay = conn_state->mode.hdisplay; 1093 vdisplay = conn_state->mode.vdisplay; 1094 crtc_state->src_rect.w = logo->width; 1095 crtc_state->src_rect.h = logo->height; 1096 crtc_state->src_rect.x = 0; 1097 crtc_state->src_rect.y = 0; 1098 crtc_state->ymirror = logo->ymirror; 1099 crtc_state->rb_swap = 0; 1100 1101 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1102 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1103 1104 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1105 crtc_state->crtc_rect.x = 0; 1106 crtc_state->crtc_rect.y = 0; 1107 crtc_state->crtc_rect.w = hdisplay; 1108 crtc_state->crtc_rect.h = vdisplay; 1109 } else { 1110 if (crtc_state->src_rect.w >= hdisplay) { 1111 crtc_state->crtc_rect.x = 0; 1112 crtc_state->crtc_rect.w = hdisplay; 1113 } else { 1114 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1115 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1116 } 1117 1118 if (crtc_state->src_rect.h >= vdisplay) { 1119 crtc_state->crtc_rect.y = 0; 1120 crtc_state->crtc_rect.h = vdisplay; 1121 } else { 1122 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1123 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1124 } 1125 } 1126 1127 display_set_plane(state); 1128 display_enable(state); 1129 1130 return 0; 1131 } 1132 1133 static int get_crtc_id(ofnode connect, bool is_ports_node) 1134 { 1135 struct device_node *port_node; 1136 struct device_node *remote; 1137 int phandle; 1138 int val; 1139 1140 if (is_ports_node) { 1141 port_node = of_get_parent(connect.np); 1142 if (!port_node) 1143 goto err; 1144 1145 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1146 if (val < 0) 1147 goto err; 1148 } else { 1149 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1150 if (phandle < 0) 1151 goto err; 1152 1153 remote = of_find_node_by_phandle(phandle); 1154 if (!remote) 1155 goto err; 1156 1157 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1158 if (val < 0) 1159 goto err; 1160 } 1161 1162 return val; 1163 err: 1164 printf("Can't get crtc id, default set to id = 0\n"); 1165 return 0; 1166 } 1167 1168 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1169 { 1170 ofnode mcu_node; 1171 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1172 1173 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1174 if (!ofnode_valid(mcu_node)) 1175 return -ENODEV; 1176 1177 #define FDT_GET_MCU_INT(val, name) \ 1178 do { \ 1179 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1180 if (val < 0) { \ 1181 printf("Can't get %s\n", name); \ 1182 return -ENXIO; \ 1183 } \ 1184 } while (0) 1185 1186 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1187 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1188 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1189 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1190 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1191 1192 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1193 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1194 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1195 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1196 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1197 1198 return 0; 1199 } 1200 1201 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1202 { 1203 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1204 1205 list_for_each_entry(tmp, &logo_cache_list, head) { 1206 if (!strcmp(tmp->name, bmp)) { 1207 logo_cache = tmp; 1208 break; 1209 } 1210 } 1211 1212 if (!logo_cache) { 1213 logo_cache = malloc(sizeof(*logo_cache)); 1214 if (!logo_cache) { 1215 printf("failed to alloc memory for logo cache\n"); 1216 return NULL; 1217 } 1218 memset(logo_cache, 0, sizeof(*logo_cache)); 1219 strcpy(logo_cache->name, bmp); 1220 INIT_LIST_HEAD(&logo_cache->head); 1221 list_add_tail(&logo_cache->head, &logo_cache_list); 1222 } 1223 1224 return logo_cache; 1225 } 1226 1227 /* Note: used only for rkfb kernel driver */ 1228 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1229 { 1230 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1231 void *dst = NULL; 1232 int len, size; 1233 struct bmp_header *header; 1234 1235 if (!logo || !bmp_name) 1236 return -EINVAL; 1237 1238 header = malloc(RK_BLK_SIZE); 1239 if (!header) 1240 return -ENOMEM; 1241 1242 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1243 if (len != RK_BLK_SIZE) { 1244 free(header); 1245 return -EINVAL; 1246 } 1247 size = get_unaligned_le32(&header->file_size); 1248 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1249 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1250 if (len != size) { 1251 printf("failed to load bmp %s\n", bmp_name); 1252 free(header); 1253 return -ENOENT; 1254 } 1255 1256 logo->mem = dst; 1257 #endif 1258 1259 return 0; 1260 } 1261 1262 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1263 { 1264 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1265 struct rockchip_logo_cache *logo_cache; 1266 struct bmp_header *header; 1267 void *dst = NULL, *pdst; 1268 int size, len; 1269 int ret = 0; 1270 int reserved = 0; 1271 int dst_size; 1272 1273 if (!logo || !bmp_name) 1274 return -EINVAL; 1275 logo_cache = find_or_alloc_logo_cache(bmp_name); 1276 if (!logo_cache) 1277 return -ENOMEM; 1278 1279 if (logo_cache->logo.mem) { 1280 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1281 return 0; 1282 } 1283 1284 header = malloc(RK_BLK_SIZE); 1285 if (!header) 1286 return -ENOMEM; 1287 1288 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1289 if (len != RK_BLK_SIZE) { 1290 ret = -EINVAL; 1291 goto free_header; 1292 } 1293 1294 logo->bpp = get_unaligned_le16(&header->bit_count); 1295 logo->width = get_unaligned_le32(&header->width); 1296 logo->height = get_unaligned_le32(&header->height); 1297 dst_size = logo->width * logo->height * logo->bpp >> 3; 1298 reserved = get_unaligned_le32(&header->reserved); 1299 if (logo->height < 0) 1300 logo->height = -logo->height; 1301 size = get_unaligned_le32(&header->file_size); 1302 if (!can_direct_logo(logo->bpp)) { 1303 if (size > MEMORY_POOL_SIZE) { 1304 printf("failed to use boot buf as temp bmp buffer\n"); 1305 ret = -ENOMEM; 1306 goto free_header; 1307 } 1308 pdst = get_display_buffer(size); 1309 1310 } else { 1311 pdst = get_display_buffer(size); 1312 dst = pdst; 1313 } 1314 1315 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1316 if (len != size) { 1317 printf("failed to load bmp %s\n", bmp_name); 1318 ret = -ENOENT; 1319 goto free_header; 1320 } 1321 1322 if (!can_direct_logo(logo->bpp)) { 1323 /* 1324 * TODO: force use 16bpp if bpp less than 16; 1325 */ 1326 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1327 dst_size = logo->width * logo->height * logo->bpp >> 3; 1328 dst = get_display_buffer(dst_size); 1329 if (!dst) { 1330 ret = -ENOMEM; 1331 goto free_header; 1332 } 1333 if (bmpdecoder(pdst, dst, logo->bpp)) { 1334 printf("failed to decode bmp %s\n", bmp_name); 1335 ret = -EINVAL; 1336 goto free_header; 1337 } 1338 1339 logo->offset = 0; 1340 logo->ymirror = 0; 1341 } else { 1342 logo->offset = get_unaligned_le32(&header->data_offset); 1343 if (reserved == BMP_PROCESSED_FLAG) 1344 logo->ymirror = 0; 1345 else 1346 logo->ymirror = 1; 1347 } 1348 logo->mem = dst; 1349 1350 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1351 1352 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1353 1354 free_header: 1355 1356 free(header); 1357 1358 return ret; 1359 #else 1360 return -EINVAL; 1361 #endif 1362 } 1363 1364 void rockchip_show_fbbase(ulong fbbase) 1365 { 1366 struct display_state *s; 1367 1368 list_for_each_entry(s, &rockchip_display_list, head) { 1369 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1370 s->logo.mem = (char *)fbbase; 1371 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1372 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1373 s->logo.bpp = 32; 1374 s->logo.ymirror = 0; 1375 1376 display_logo(s); 1377 } 1378 } 1379 1380 int rockchip_show_bmp(const char *bmp) 1381 { 1382 struct display_state *s; 1383 int ret = 0; 1384 1385 if (!bmp) { 1386 list_for_each_entry(s, &rockchip_display_list, head) 1387 display_disable(s); 1388 return -ENOENT; 1389 } 1390 1391 list_for_each_entry(s, &rockchip_display_list, head) { 1392 s->logo.mode = s->charge_logo_mode; 1393 if (load_bmp_logo(&s->logo, bmp)) 1394 continue; 1395 ret = display_logo(s); 1396 } 1397 1398 return ret; 1399 } 1400 1401 int rockchip_show_logo(void) 1402 { 1403 struct display_state *s; 1404 int ret = 0; 1405 1406 list_for_each_entry(s, &rockchip_display_list, head) { 1407 s->logo.mode = s->logo_mode; 1408 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1409 printf("failed to display uboot logo\n"); 1410 else 1411 ret = display_logo(s); 1412 1413 /* Load kernel bmp in rockchip_display_fixup() later */ 1414 } 1415 1416 return ret; 1417 } 1418 1419 enum { 1420 PORT_DIR_IN, 1421 PORT_DIR_OUT, 1422 }; 1423 1424 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1425 { 1426 ofnode panel_node, ports, port, ep, port_parent_node; 1427 struct udevice *panel_dev; 1428 int ret; 1429 1430 panel_node = dev_read_subnode(dev, "panel"); 1431 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1432 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1433 &panel_dev); 1434 if (!ret) 1435 goto found; 1436 } 1437 1438 ports = dev_read_subnode(dev, "ports"); 1439 if (!ofnode_valid(ports)) 1440 return NULL; 1441 1442 ofnode_for_each_subnode(port, ports) { 1443 u32 reg; 1444 1445 if (ofnode_read_u32(port, "reg", ®)) 1446 continue; 1447 1448 if (reg != PORT_DIR_OUT) 1449 continue; 1450 1451 ofnode_for_each_subnode(ep, port) { 1452 ofnode _ep, _port; 1453 uint phandle; 1454 bool is_ports_node = false; 1455 1456 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1457 continue; 1458 1459 _ep = ofnode_get_by_phandle(phandle); 1460 if (!ofnode_valid(_ep)) 1461 continue; 1462 1463 _port = ofnode_get_parent(_ep); 1464 if (!ofnode_valid(_port)) 1465 continue; 1466 1467 port_parent_node = ofnode_get_parent(_port); 1468 is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0; 1469 if (is_ports_node) 1470 panel_node = ofnode_get_parent(port_parent_node); 1471 else 1472 panel_node = ofnode_get_parent(_port); 1473 if (!ofnode_valid(panel_node)) 1474 continue; 1475 1476 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1477 panel_node, 1478 &panel_dev); 1479 if (!ret) 1480 goto found; 1481 } 1482 } 1483 1484 return NULL; 1485 1486 found: 1487 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1488 } 1489 1490 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1491 { 1492 ofnode node, ports, port, ep; 1493 struct udevice *dev; 1494 int ret; 1495 1496 ports = dev_read_subnode(conn_dev, "ports"); 1497 if (!ofnode_valid(ports)) 1498 return NULL; 1499 1500 ofnode_for_each_subnode(port, ports) { 1501 u32 reg; 1502 1503 if (ofnode_read_u32(port, "reg", ®)) 1504 continue; 1505 1506 if (reg != PORT_DIR_OUT) 1507 continue; 1508 1509 ofnode_for_each_subnode(ep, port) { 1510 ofnode _ep, _port, _ports; 1511 uint phandle; 1512 1513 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1514 continue; 1515 1516 _ep = ofnode_get_by_phandle(phandle); 1517 if (!ofnode_valid(_ep)) 1518 continue; 1519 1520 _port = ofnode_get_parent(_ep); 1521 if (!ofnode_valid(_port)) 1522 continue; 1523 1524 _ports = ofnode_get_parent(_port); 1525 if (!ofnode_valid(_ports)) 1526 continue; 1527 1528 node = ofnode_get_parent(_ports); 1529 if (!ofnode_valid(node)) 1530 continue; 1531 1532 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1533 node, &dev); 1534 if (!ret) 1535 goto found; 1536 } 1537 } 1538 1539 return NULL; 1540 1541 found: 1542 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1543 } 1544 1545 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1546 { 1547 ofnode ep, port, ports, conn; 1548 uint phandle; 1549 struct udevice *dev; 1550 int ret; 1551 1552 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1553 return NULL; 1554 1555 ep = ofnode_get_by_phandle(phandle); 1556 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1557 return NULL; 1558 1559 port = ofnode_get_parent(ep); 1560 if (!ofnode_valid(port)) 1561 return NULL; 1562 1563 ports = ofnode_get_parent(port); 1564 if (!ofnode_valid(ports)) 1565 return NULL; 1566 1567 conn = ofnode_get_parent(ports); 1568 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1569 return NULL; 1570 1571 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1572 if (ret) 1573 return NULL; 1574 1575 return dev; 1576 } 1577 1578 static bool rockchip_get_display_path_status(ofnode endpoint) 1579 { 1580 ofnode ep; 1581 uint phandle; 1582 1583 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1584 return false; 1585 1586 ep = ofnode_get_by_phandle(phandle); 1587 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1588 return false; 1589 1590 return true; 1591 } 1592 1593 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1594 { 1595 struct udevice *phy_dev; 1596 int ret; 1597 1598 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1599 if (ret) 1600 return NULL; 1601 1602 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1603 } 1604 1605 #if defined(CONFIG_ROCKCHIP_RK3568) 1606 static int rockchip_display_fixup_dts(void *blob) 1607 { 1608 ofnode route_node, route_subnode, conn_ep, conn_port; 1609 const struct device_node *route_sub_devnode; 1610 const struct device_node *ep_node, *conn_ep_dev_node; 1611 u32 phandle; 1612 int conn_ep_offset; 1613 const char *route_sub_path, *path; 1614 1615 /* Don't go further if new variant after 1616 * reading PMUGRF_SOC_CON15 1617 */ 1618 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1619 return 0; 1620 1621 route_node = ofnode_path("/display-subsystem/route"); 1622 if (!ofnode_valid(route_node)) 1623 return -EINVAL; 1624 1625 ofnode_for_each_subnode(route_subnode, route_node) { 1626 if (!ofnode_is_available(route_subnode)) 1627 continue; 1628 1629 route_sub_devnode = ofnode_to_np(route_subnode); 1630 route_sub_path = route_sub_devnode->full_name; 1631 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1632 !strstr(ofnode_get_name(route_subnode), "edp")) 1633 return 0; 1634 1635 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1636 if (phandle < 0) { 1637 printf("Warn: can't find connect node's handle\n"); 1638 continue; 1639 } 1640 1641 ep_node = of_find_node_by_phandle(phandle); 1642 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1643 printf("Warn: can't find endpoint node from phandle\n"); 1644 continue; 1645 } 1646 1647 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1648 conn_ep = ofnode_get_by_phandle(phandle); 1649 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1650 return -ENODEV; 1651 1652 conn_port = ofnode_get_parent(conn_ep); 1653 if (!ofnode_valid(conn_port)) 1654 return -ENODEV; 1655 1656 ofnode_for_each_subnode(conn_ep, conn_port) { 1657 conn_ep_dev_node = ofnode_to_np(conn_ep); 1658 path = conn_ep_dev_node->full_name; 1659 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1660 conn_ep_offset = fdt_path_offset(blob, path); 1661 1662 if (!ofnode_is_available(conn_ep) && 1663 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1664 do_fixup_by_path_u32(blob, route_sub_path, 1665 "connect", phandle, 1); 1666 fdt_status_okay(blob, conn_ep_offset); 1667 1668 } else if (ofnode_is_available(conn_ep) && 1669 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1670 fdt_status_disabled(blob, conn_ep_offset); 1671 } 1672 } 1673 } 1674 1675 return 0; 1676 } 1677 #endif 1678 1679 static int rockchip_display_probe(struct udevice *dev) 1680 { 1681 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1682 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1683 const void *blob = gd->fdt_blob; 1684 int phandle; 1685 struct udevice *crtc_dev, *conn_dev; 1686 struct rockchip_crtc *crtc; 1687 const struct rockchip_connector *conn; 1688 struct rockchip_panel *panel = NULL; 1689 struct rockchip_bridge *bridge = NULL, *b = NULL; 1690 struct rockchip_phy *phy = NULL; 1691 struct display_state *s; 1692 const char *name; 1693 int ret; 1694 ofnode node, route_node, timing_node; 1695 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1696 struct public_phy_data *data; 1697 bool is_ports_node = false; 1698 1699 #if defined(CONFIG_ROCKCHIP_RK3568) 1700 rockchip_display_fixup_dts((void *)blob); 1701 #endif 1702 1703 /* Before relocation we don't need to do anything */ 1704 if (!(gd->flags & GD_FLG_RELOC)) 1705 return 0; 1706 1707 data = malloc(sizeof(struct public_phy_data)); 1708 if (!data) { 1709 printf("failed to alloc phy data\n"); 1710 return -ENOMEM; 1711 } 1712 data->phy_init = false; 1713 1714 init_display_buffer(plat->base); 1715 1716 route_node = dev_read_subnode(dev, "route"); 1717 if (!ofnode_valid(route_node)) 1718 return -ENODEV; 1719 1720 ofnode_for_each_subnode(node, route_node) { 1721 if (!ofnode_is_available(node)) 1722 continue; 1723 phandle = ofnode_read_u32_default(node, "connect", -1); 1724 if (phandle < 0) { 1725 printf("Warn: can't find connect node's handle\n"); 1726 continue; 1727 } 1728 ep_node = of_find_node_by_phandle(phandle); 1729 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1730 printf("Warn: can't find endpoint node from phandle\n"); 1731 continue; 1732 } 1733 port_node = of_get_parent(ep_node); 1734 if (!ofnode_valid(np_to_ofnode(port_node))) { 1735 printf("Warn: can't find port node from phandle\n"); 1736 continue; 1737 } 1738 1739 port_parent_node = of_get_parent(port_node); 1740 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1741 printf("Warn: can't find port parent node from phandle\n"); 1742 continue; 1743 } 1744 1745 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1746 if (is_ports_node) { 1747 vop_node = of_get_parent(port_parent_node); 1748 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1749 printf("Warn: can't find crtc node from phandle\n"); 1750 continue; 1751 } 1752 } else { 1753 vop_node = port_parent_node; 1754 } 1755 1756 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1757 np_to_ofnode(vop_node), 1758 &crtc_dev); 1759 if (ret) { 1760 printf("Warn: can't find crtc driver %d\n", ret); 1761 continue; 1762 } 1763 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1764 1765 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1766 if (!conn_dev) { 1767 printf("Warn: can't find connect driver\n"); 1768 continue; 1769 } 1770 1771 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1772 1773 phy = rockchip_of_find_phy(conn_dev); 1774 1775 bridge = rockchip_of_find_bridge(conn_dev); 1776 if (bridge) 1777 b = bridge; 1778 while (b) { 1779 struct rockchip_bridge *next_bridge = NULL; 1780 1781 next_bridge = rockchip_of_find_bridge(b->dev); 1782 if (!next_bridge) 1783 break; 1784 1785 b->next_bridge = next_bridge; 1786 b = next_bridge; 1787 } 1788 1789 if (b) 1790 panel = rockchip_of_find_panel(b->dev); 1791 else 1792 panel = rockchip_of_find_panel(conn_dev); 1793 1794 s = malloc(sizeof(*s)); 1795 if (!s) 1796 continue; 1797 1798 memset(s, 0, sizeof(*s)); 1799 1800 INIT_LIST_HEAD(&s->head); 1801 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1802 if (!ret) 1803 memcpy(s->ulogo_name, name, strlen(name)); 1804 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1805 if (!ret) 1806 memcpy(s->klogo_name, name, strlen(name)); 1807 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1808 if (!strcmp(name, "fullscreen")) 1809 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1810 else 1811 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1812 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1813 if (!strcmp(name, "fullscreen")) 1814 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1815 else 1816 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1817 1818 s->force_output = ofnode_read_bool(node, "force-output"); 1819 1820 if (s->force_output) { 1821 timing_node = ofnode_find_subnode(node, "force_timing"); 1822 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1823 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1824 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1825 } 1826 1827 s->blob = blob; 1828 s->panel_state.panel = panel; 1829 s->conn_state.node = conn_dev->node; 1830 s->conn_state.dev = conn_dev; 1831 s->conn_state.connector = conn; 1832 s->conn_state.phy = phy; 1833 s->conn_state.bridge = bridge; 1834 s->conn_state.overscan.left_margin = 100; 1835 s->conn_state.overscan.right_margin = 100; 1836 s->conn_state.overscan.top_margin = 100; 1837 s->conn_state.overscan.bottom_margin = 100; 1838 s->crtc_state.node = np_to_ofnode(vop_node); 1839 s->crtc_state.dev = crtc_dev; 1840 s->crtc_state.crtc = crtc; 1841 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 1842 s->node = node; 1843 1844 if (is_ports_node) { /* only vop2 will get into here */ 1845 ofnode vp_node = np_to_ofnode(port_node); 1846 static bool get_plane_mask_from_dts; 1847 1848 s->crtc_state.ports_node = port_parent_node; 1849 if (!get_plane_mask_from_dts) { 1850 ofnode vp_sub_node; 1851 int vp_id = 0; 1852 bool vp_enable = false; 1853 1854 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1855 int cursor_plane = -1; 1856 1857 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 1858 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1859 1860 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 1861 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 1862 if (ret) { 1863 int primary_plane = 0; 1864 1865 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 1866 s->crtc_state.crtc->assign_plane |= true; 1867 primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0); 1868 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 1869 vp_id, 1870 s->crtc_state.crtc->vps[vp_id].plane_mask, 1871 primary_plane, 1872 cursor_plane); 1873 } 1874 1875 /* To check current vp status */ 1876 vp_enable = false; 1877 ofnode_for_each_subnode(vp_sub_node, vp_node) 1878 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 1879 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 1880 } 1881 get_plane_mask_from_dts = true; 1882 } 1883 } 1884 1885 get_crtc_mcu_mode(&s->crtc_state); 1886 1887 ret = ofnode_read_u32_default(s->crtc_state.node, 1888 "rockchip,dual-channel-swap", 0); 1889 s->crtc_state.dual_channel_swap = ret; 1890 if (connector_panel_init(s)) { 1891 printf("Warn: Failed to init panel drivers\n"); 1892 free(s); 1893 continue; 1894 } 1895 1896 if (connector_phy_init(s, data)) { 1897 printf("Warn: Failed to init phy drivers\n"); 1898 free(s); 1899 continue; 1900 } 1901 list_add_tail(&s->head, &rockchip_display_list); 1902 } 1903 1904 if (list_empty(&rockchip_display_list)) { 1905 debug("Failed to found available display route\n"); 1906 return -ENODEV; 1907 } 1908 rockchip_get_baseparameter(); 1909 display_pre_init(); 1910 1911 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1912 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1913 uc_priv->bpix = VIDEO_BPP32; 1914 1915 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1916 rockchip_show_fbbase(plat->base); 1917 video_set_flush_dcache(dev, true); 1918 #endif 1919 1920 return 0; 1921 } 1922 1923 void rockchip_display_fixup(void *blob) 1924 { 1925 const struct rockchip_connector_funcs *conn_funcs; 1926 const struct rockchip_crtc_funcs *crtc_funcs; 1927 const struct rockchip_connector *conn; 1928 const struct rockchip_crtc *crtc; 1929 struct display_state *s; 1930 int offset; 1931 const struct device_node *np; 1932 const char *path; 1933 1934 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1935 list_for_each_entry(s, &rockchip_display_list, head) 1936 load_bmp_logo(&s->logo, s->klogo_name); 1937 1938 if (!get_display_size()) 1939 return; 1940 1941 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1942 (u64)memory_start, 1943 (u64)get_display_size()); 1944 if (offset < 0) 1945 printf("failed to reserve drm-loader-logo memory\n"); 1946 1947 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 1948 (u64)cubic_lut_memory_start, 1949 (u64)get_cubic_memory_size()); 1950 if (offset < 0) 1951 printf("failed to reserve drm-cubic-lut memory\n"); 1952 } else { 1953 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1954 /* Compatible with rkfb display, only need reserve memory */ 1955 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1956 (u64)memory_start, 1957 MEMORY_POOL_SIZE); 1958 if (offset < 0) 1959 printf("failed to reserve fb-loader-logo memory\n"); 1960 else 1961 list_for_each_entry(s, &rockchip_display_list, head) 1962 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1963 return; 1964 } 1965 1966 list_for_each_entry(s, &rockchip_display_list, head) { 1967 conn = s->conn_state.connector; 1968 if (!conn) 1969 continue; 1970 conn_funcs = conn->funcs; 1971 if (!conn_funcs) { 1972 printf("failed to get exist connector\n"); 1973 continue; 1974 } 1975 1976 crtc = s->crtc_state.crtc; 1977 if (!crtc) 1978 continue; 1979 1980 crtc_funcs = crtc->funcs; 1981 if (!crtc_funcs) { 1982 printf("failed to get exist crtc\n"); 1983 continue; 1984 } 1985 1986 if (crtc_funcs->fixup_dts) 1987 crtc_funcs->fixup_dts(s, blob); 1988 1989 if (conn_funcs->fixup_dts) 1990 conn_funcs->fixup_dts(s, blob); 1991 1992 np = ofnode_to_np(s->node); 1993 path = np->full_name; 1994 fdt_increase_size(blob, 0x400); 1995 #define FDT_SET_U32(name, val) \ 1996 do_fixup_by_path_u32(blob, path, name, val, 1); 1997 1998 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1999 - memory_start; 2000 FDT_SET_U32("logo,offset", offset); 2001 FDT_SET_U32("logo,width", s->logo.width); 2002 FDT_SET_U32("logo,height", s->logo.height); 2003 FDT_SET_U32("logo,bpp", s->logo.bpp); 2004 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2005 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2006 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2007 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2008 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2009 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2010 FDT_SET_U32("video,vrefresh", 2011 drm_mode_vrefresh(&s->conn_state.mode)); 2012 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2013 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2014 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2015 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2016 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2017 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2018 2019 if (s->conn_state.disp_info) { 2020 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2021 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2022 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2023 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2024 } 2025 2026 if (s->conn_state.disp_info->cubic_lut_data.size && 2027 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2028 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2029 2030 #undef FDT_SET_U32 2031 } 2032 } 2033 2034 int rockchip_display_bind(struct udevice *dev) 2035 { 2036 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2037 2038 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2039 2040 return 0; 2041 } 2042 2043 static const struct udevice_id rockchip_display_ids[] = { 2044 { .compatible = "rockchip,display-subsystem" }, 2045 { } 2046 }; 2047 2048 U_BOOT_DRIVER(rockchip_display) = { 2049 .name = "rockchip_display", 2050 .id = UCLASS_VIDEO, 2051 .of_match = rockchip_display_ids, 2052 .bind = rockchip_display_bind, 2053 .probe = rockchip_display_probe, 2054 }; 2055 2056 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2057 char *const argv[]) 2058 { 2059 if (argc != 1) 2060 return CMD_RET_USAGE; 2061 2062 rockchip_show_logo(); 2063 2064 return 0; 2065 } 2066 2067 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2068 char *const argv[]) 2069 { 2070 if (argc != 2) 2071 return CMD_RET_USAGE; 2072 2073 rockchip_show_bmp(argv[1]); 2074 2075 return 0; 2076 } 2077 2078 U_BOOT_CMD( 2079 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2080 "load and display log from resource partition", 2081 NULL 2082 ); 2083 2084 U_BOOT_CMD( 2085 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2086 "load and display bmp from resource partition", 2087 " <bmp_name>" 2088 ); 2089