1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 343 * @edid_data: structure store mode list 344 * @max_output: vop max output resolution 345 */ 346 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 347 struct vop_rect *max_output) 348 { 349 int i; 350 351 for (i = 0; i < edid_data->modes; i++) { 352 if (edid_data->mode_buf[i].hdisplay > max_output->width || 353 edid_data->mode_buf[i].vdisplay > max_output->height) 354 edid_data->mode_buf[i].invalid = true; 355 } 356 } 357 358 /** 359 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 360 * @p: mode 361 * @adjust_flags: a combination of adjustment flags 362 * 363 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 364 * 365 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 366 * interlaced modes. 367 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 368 * buffers containing two eyes (only adjust the timings when needed, eg. for 369 * "frame packing" or "side by side full"). 370 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 371 * be performed for doublescan and vscan > 1 modes respectively. 372 */ 373 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 374 { 375 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 376 return; 377 378 if (p->flags & DRM_MODE_FLAG_DBLCLK) 379 p->crtc_clock = 2 * p->clock; 380 else 381 p->crtc_clock = p->clock; 382 p->crtc_hdisplay = p->hdisplay; 383 p->crtc_hsync_start = p->hsync_start; 384 p->crtc_hsync_end = p->hsync_end; 385 p->crtc_htotal = p->htotal; 386 p->crtc_hskew = p->hskew; 387 p->crtc_vdisplay = p->vdisplay; 388 p->crtc_vsync_start = p->vsync_start; 389 p->crtc_vsync_end = p->vsync_end; 390 p->crtc_vtotal = p->vtotal; 391 392 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 393 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 394 p->crtc_vdisplay /= 2; 395 p->crtc_vsync_start /= 2; 396 p->crtc_vsync_end /= 2; 397 p->crtc_vtotal /= 2; 398 } 399 } 400 401 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 402 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 403 p->crtc_vdisplay *= 2; 404 p->crtc_vsync_start *= 2; 405 p->crtc_vsync_end *= 2; 406 p->crtc_vtotal *= 2; 407 } 408 } 409 410 if (!(adjust_flags & CRTC_NO_VSCAN)) { 411 if (p->vscan > 1) { 412 p->crtc_vdisplay *= p->vscan; 413 p->crtc_vsync_start *= p->vscan; 414 p->crtc_vsync_end *= p->vscan; 415 p->crtc_vtotal *= p->vscan; 416 } 417 } 418 419 if (adjust_flags & CRTC_STEREO_DOUBLE) { 420 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 421 422 switch (layout) { 423 case DRM_MODE_FLAG_3D_FRAME_PACKING: 424 p->crtc_clock *= 2; 425 p->crtc_vdisplay += p->crtc_vtotal; 426 p->crtc_vsync_start += p->crtc_vtotal; 427 p->crtc_vsync_end += p->crtc_vtotal; 428 p->crtc_vtotal += p->crtc_vtotal; 429 break; 430 } 431 } 432 433 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 434 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 435 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 436 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 437 } 438 439 /** 440 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 441 * output format 442 * 443 * @connector: drm connector under action. 444 * @mode: video mode to be tested. 445 * 446 * Returns: 447 * true if the mode can be supported in YCBCR420 format 448 * false if not. 449 */ 450 bool drm_mode_is_420_only(const struct drm_display_info *display, 451 struct drm_display_mode *mode) 452 { 453 u8 vic = drm_match_cea_mode(mode); 454 455 return test_bit(vic, display->hdmi.y420_vdb_modes); 456 } 457 458 /** 459 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 460 * output format also (along with RGB/YCBCR444/422) 461 * 462 * @display: display under action. 463 * @mode: video mode to be tested. 464 * 465 * Returns: 466 * true if the mode can be support YCBCR420 format 467 * false if not. 468 */ 469 bool drm_mode_is_420_also(const struct drm_display_info *display, 470 struct drm_display_mode *mode) 471 { 472 u8 vic = drm_match_cea_mode(mode); 473 474 return test_bit(vic, display->hdmi.y420_cmdb_modes); 475 } 476 477 /** 478 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 479 * output format 480 * 481 * @display: display under action. 482 * @mode: video mode to be tested. 483 * 484 * Returns: 485 * true if the mode can be supported in YCBCR420 format 486 * false if not. 487 */ 488 bool drm_mode_is_420(const struct drm_display_info *display, 489 struct drm_display_mode *mode) 490 { 491 return drm_mode_is_420_only(display, mode) || 492 drm_mode_is_420_also(display, mode); 493 } 494 495 static int display_get_timing(struct display_state *state) 496 { 497 struct connector_state *conn_state = &state->conn_state; 498 struct drm_display_mode *mode = &conn_state->mode; 499 const struct drm_display_mode *m; 500 struct panel_state *panel_state = &state->panel_state; 501 const struct rockchip_panel *panel = panel_state->panel; 502 503 if (dev_of_valid(panel->dev) && 504 !display_get_timing_from_dts(panel_state, mode)) { 505 printf("Using display timing dts\n"); 506 goto done; 507 } 508 509 if (panel->data) { 510 m = (const struct drm_display_mode *)panel->data; 511 memcpy(mode, m, sizeof(*m)); 512 printf("Using display timing from compatible panel driver\n"); 513 goto done; 514 } 515 516 printf("failed to find display timing\n"); 517 return -ENODEV; 518 done: 519 printf("Detailed mode clock %u kHz, flags[%x]\n" 520 " H: %04d %04d %04d %04d\n" 521 " V: %04d %04d %04d %04d\n" 522 "bus_format: %x\n", 523 mode->clock, mode->flags, 524 mode->hdisplay, mode->hsync_start, 525 mode->hsync_end, mode->htotal, 526 mode->vdisplay, mode->vsync_start, 527 mode->vsync_end, mode->vtotal, 528 conn_state->bus_format); 529 530 return 0; 531 } 532 533 static int display_init(struct display_state *state) 534 { 535 struct connector_state *conn_state = &state->conn_state; 536 struct panel_state *panel_state = &state->panel_state; 537 const struct rockchip_connector *conn = conn_state->connector; 538 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 539 struct crtc_state *crtc_state = &state->crtc_state; 540 struct rockchip_crtc *crtc = crtc_state->crtc; 541 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 542 struct drm_display_mode *mode = &conn_state->mode; 543 int ret = 0; 544 static bool __print_once = false; 545 #if defined(CONFIG_I2C_EDID) 546 int bpc; 547 #endif 548 if (!__print_once) { 549 __print_once = true; 550 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 551 } 552 553 if (state->is_init) 554 return 0; 555 556 if (!conn_funcs || !crtc_funcs) { 557 printf("failed to find connector or crtc functions\n"); 558 return -ENXIO; 559 } 560 561 if (crtc_state->crtc->active && 562 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 563 sizeof(struct drm_display_mode))) { 564 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 565 crtc_state->dev->name, 566 crtc_state->crtc->active_mode.type, 567 crtc_state->crtc->active_mode.hdisplay, 568 crtc_state->crtc->active_mode.vdisplay, 569 crtc_state->crtc->active_mode.vrefresh); 570 return -ENODEV; 571 } 572 573 if (crtc_funcs->preinit) { 574 ret = crtc_funcs->preinit(state); 575 if (ret) 576 return ret; 577 } 578 579 if (panel_state->panel) 580 rockchip_panel_init(panel_state->panel); 581 582 if (conn_funcs->init) { 583 ret = conn_funcs->init(state); 584 if (ret) 585 goto deinit; 586 } 587 588 if (conn_state->phy) 589 rockchip_phy_init(conn_state->phy); 590 591 /* 592 * support hotplug, but not connect; 593 */ 594 #ifdef CONFIG_ROCKCHIP_DRM_TVE 595 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 596 printf("hdmi plugin ,skip tve\n"); 597 goto deinit; 598 } 599 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 600 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 601 printf("hdmi plugin ,skip tve\n"); 602 goto deinit; 603 } 604 #endif 605 if (conn_funcs->detect) { 606 ret = conn_funcs->detect(state); 607 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 608 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 609 crtc->hdmi_hpd = ret; 610 #endif 611 if (!ret) 612 goto deinit; 613 } 614 615 if (panel_state->panel) { 616 ret = display_get_timing(state); 617 } else if (conn_state->bridge) { 618 ret = video_bridge_read_edid(conn_state->bridge->dev, 619 conn_state->edid, EDID_SIZE); 620 if (ret > 0) { 621 #if defined(CONFIG_I2C_EDID) 622 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 623 &bpc); 624 if (!ret) 625 edid_print_info((void *)&conn_state->edid); 626 #endif 627 } else { 628 ret = video_bridge_get_timing(conn_state->bridge->dev); 629 } 630 } else if (conn_funcs->get_timing) { 631 ret = conn_funcs->get_timing(state); 632 } else if (conn_funcs->get_edid) { 633 ret = conn_funcs->get_edid(state); 634 #if defined(CONFIG_I2C_EDID) 635 if (!ret) { 636 ret = edid_get_drm_mode((void *)&conn_state->edid, 637 sizeof(conn_state->edid), mode, 638 &bpc); 639 if (!ret) 640 edid_print_info((void *)&conn_state->edid); 641 } 642 #endif 643 } 644 645 if (ret) 646 goto deinit; 647 648 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 649 650 if (crtc_funcs->init) { 651 ret = crtc_funcs->init(state); 652 if (ret) 653 goto deinit; 654 } 655 state->is_init = 1; 656 657 crtc_state->crtc->active = true; 658 memcpy(&crtc_state->crtc->active_mode, 659 &conn_state->mode, sizeof(struct drm_display_mode)); 660 661 return 0; 662 663 deinit: 664 if (conn_funcs->deinit) 665 conn_funcs->deinit(state); 666 return ret; 667 } 668 669 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 670 { 671 struct crtc_state *crtc_state = &state->crtc_state; 672 const struct rockchip_crtc *crtc = crtc_state->crtc; 673 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 674 int ret; 675 676 if (!state->is_init) 677 return -EINVAL; 678 679 if (crtc_funcs->send_mcu_cmd) { 680 ret = crtc_funcs->send_mcu_cmd(state, type, val); 681 if (ret) 682 return ret; 683 } 684 685 return 0; 686 } 687 688 static int display_set_plane(struct display_state *state) 689 { 690 struct crtc_state *crtc_state = &state->crtc_state; 691 const struct rockchip_crtc *crtc = crtc_state->crtc; 692 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 693 int ret; 694 695 if (!state->is_init) 696 return -EINVAL; 697 698 if (crtc_funcs->set_plane) { 699 ret = crtc_funcs->set_plane(state); 700 if (ret) 701 return ret; 702 } 703 704 return 0; 705 } 706 707 static int display_enable(struct display_state *state) 708 { 709 struct connector_state *conn_state = &state->conn_state; 710 const struct rockchip_connector *conn = conn_state->connector; 711 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 712 struct crtc_state *crtc_state = &state->crtc_state; 713 const struct rockchip_crtc *crtc = crtc_state->crtc; 714 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 715 struct panel_state *panel_state = &state->panel_state; 716 717 if (!state->is_init) 718 return -EINVAL; 719 720 if (state->is_enable) 721 return 0; 722 723 if (crtc_funcs->prepare) 724 crtc_funcs->prepare(state); 725 726 if (conn_funcs->prepare) 727 conn_funcs->prepare(state); 728 729 if (conn_state->bridge) 730 rockchip_bridge_pre_enable(conn_state->bridge); 731 732 if (panel_state->panel) 733 rockchip_panel_prepare(panel_state->panel); 734 735 if (crtc_funcs->enable) 736 crtc_funcs->enable(state); 737 738 if (conn_funcs->enable) 739 conn_funcs->enable(state); 740 741 if (conn_state->bridge) 742 rockchip_bridge_enable(conn_state->bridge); 743 744 if (panel_state->panel) 745 rockchip_panel_enable(panel_state->panel); 746 747 state->is_enable = true; 748 749 return 0; 750 } 751 752 static int display_disable(struct display_state *state) 753 { 754 struct connector_state *conn_state = &state->conn_state; 755 const struct rockchip_connector *conn = conn_state->connector; 756 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 757 struct crtc_state *crtc_state = &state->crtc_state; 758 const struct rockchip_crtc *crtc = crtc_state->crtc; 759 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 760 struct panel_state *panel_state = &state->panel_state; 761 762 if (!state->is_init) 763 return 0; 764 765 if (!state->is_enable) 766 return 0; 767 768 if (panel_state->panel) 769 rockchip_panel_disable(panel_state->panel); 770 771 if (conn_state->bridge) 772 rockchip_bridge_disable(conn_state->bridge); 773 774 if (conn_funcs->disable) 775 conn_funcs->disable(state); 776 777 if (crtc_funcs->disable) 778 crtc_funcs->disable(state); 779 780 if (panel_state->panel) 781 rockchip_panel_unprepare(panel_state->panel); 782 783 if (conn_state->bridge) 784 rockchip_bridge_post_disable(conn_state->bridge); 785 786 if (conn_funcs->unprepare) 787 conn_funcs->unprepare(state); 788 789 state->is_enable = 0; 790 state->is_init = 0; 791 792 return 0; 793 } 794 795 static int display_logo(struct display_state *state) 796 { 797 struct crtc_state *crtc_state = &state->crtc_state; 798 struct connector_state *conn_state = &state->conn_state; 799 struct logo_info *logo = &state->logo; 800 int hdisplay, vdisplay, ret; 801 802 ret = display_init(state); 803 if (!state->is_init || ret) 804 return -ENODEV; 805 806 switch (logo->bpp) { 807 case 16: 808 crtc_state->format = ROCKCHIP_FMT_RGB565; 809 break; 810 case 24: 811 crtc_state->format = ROCKCHIP_FMT_RGB888; 812 break; 813 case 32: 814 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 815 break; 816 default: 817 printf("can't support bmp bits[%d]\n", logo->bpp); 818 return -EINVAL; 819 } 820 crtc_state->rb_swap = logo->bpp != 32; 821 hdisplay = conn_state->mode.hdisplay; 822 vdisplay = conn_state->mode.vdisplay; 823 crtc_state->src_w = logo->width; 824 crtc_state->src_h = logo->height; 825 crtc_state->src_x = 0; 826 crtc_state->src_y = 0; 827 crtc_state->ymirror = logo->ymirror; 828 829 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 830 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 831 832 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 833 crtc_state->crtc_x = 0; 834 crtc_state->crtc_y = 0; 835 crtc_state->crtc_w = hdisplay; 836 crtc_state->crtc_h = vdisplay; 837 } else { 838 if (crtc_state->src_w >= hdisplay) { 839 crtc_state->crtc_x = 0; 840 crtc_state->crtc_w = hdisplay; 841 } else { 842 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 843 crtc_state->crtc_w = crtc_state->src_w; 844 } 845 846 if (crtc_state->src_h >= vdisplay) { 847 crtc_state->crtc_y = 0; 848 crtc_state->crtc_h = vdisplay; 849 } else { 850 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 851 crtc_state->crtc_h = crtc_state->src_h; 852 } 853 } 854 855 display_set_plane(state); 856 display_enable(state); 857 858 return 0; 859 } 860 861 static int get_crtc_id(ofnode connect) 862 { 863 int phandle; 864 struct device_node *remote; 865 int val; 866 867 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 868 if (phandle < 0) 869 goto err; 870 remote = of_find_node_by_phandle(phandle); 871 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 872 if (val < 0) 873 goto err; 874 875 return val; 876 err: 877 printf("Can't get crtc id, default set to id = 0\n"); 878 return 0; 879 } 880 881 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 882 { 883 ofnode mcu_node; 884 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 885 886 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 887 if (!ofnode_valid(mcu_node)) 888 return -ENODEV; 889 890 #define FDT_GET_MCU_INT(val, name) \ 891 do { \ 892 val = ofnode_read_s32_default(mcu_node, name, -1); \ 893 if (val < 0) { \ 894 printf("Can't get %s\n", name); \ 895 return -ENXIO; \ 896 } \ 897 } while (0) 898 899 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 900 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 901 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 902 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 903 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 904 905 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 906 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 907 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 908 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 909 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 910 911 return 0; 912 } 913 914 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 915 { 916 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 917 918 list_for_each_entry(tmp, &logo_cache_list, head) { 919 if (!strcmp(tmp->name, bmp)) { 920 logo_cache = tmp; 921 break; 922 } 923 } 924 925 if (!logo_cache) { 926 logo_cache = malloc(sizeof(*logo_cache)); 927 if (!logo_cache) { 928 printf("failed to alloc memory for logo cache\n"); 929 return NULL; 930 } 931 memset(logo_cache, 0, sizeof(*logo_cache)); 932 strcpy(logo_cache->name, bmp); 933 INIT_LIST_HEAD(&logo_cache->head); 934 list_add_tail(&logo_cache->head, &logo_cache_list); 935 } 936 937 return logo_cache; 938 } 939 940 /* Note: used only for rkfb kernel driver */ 941 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 942 { 943 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 944 void *dst = NULL; 945 int len, size; 946 struct bmp_header *header; 947 948 if (!logo || !bmp_name) 949 return -EINVAL; 950 951 header = malloc(RK_BLK_SIZE); 952 if (!header) 953 return -ENOMEM; 954 955 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 956 if (len != RK_BLK_SIZE) { 957 free(header); 958 return -EINVAL; 959 } 960 size = get_unaligned_le32(&header->file_size); 961 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 962 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 963 if (len != size) { 964 printf("failed to load bmp %s\n", bmp_name); 965 free(header); 966 return -ENOENT; 967 } 968 969 logo->mem = dst; 970 #endif 971 972 return 0; 973 } 974 975 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 976 { 977 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 978 struct rockchip_logo_cache *logo_cache; 979 struct bmp_header *header; 980 void *dst = NULL, *pdst; 981 int size, len; 982 int ret = 0; 983 int reserved = 0; 984 985 if (!logo || !bmp_name) 986 return -EINVAL; 987 logo_cache = find_or_alloc_logo_cache(bmp_name); 988 if (!logo_cache) 989 return -ENOMEM; 990 991 if (logo_cache->logo.mem) { 992 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 993 return 0; 994 } 995 996 header = malloc(RK_BLK_SIZE); 997 if (!header) 998 return -ENOMEM; 999 1000 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1001 if (len != RK_BLK_SIZE) { 1002 ret = -EINVAL; 1003 goto free_header; 1004 } 1005 1006 logo->bpp = get_unaligned_le16(&header->bit_count); 1007 logo->width = get_unaligned_le32(&header->width); 1008 logo->height = get_unaligned_le32(&header->height); 1009 reserved = get_unaligned_le32(&header->reserved); 1010 if (logo->height < 0) 1011 logo->height = -logo->height; 1012 size = get_unaligned_le32(&header->file_size); 1013 if (!can_direct_logo(logo->bpp)) { 1014 if (size > MEMORY_POOL_SIZE) { 1015 printf("failed to use boot buf as temp bmp buffer\n"); 1016 ret = -ENOMEM; 1017 goto free_header; 1018 } 1019 pdst = get_display_buffer(size); 1020 1021 } else { 1022 pdst = get_display_buffer(size); 1023 dst = pdst; 1024 } 1025 1026 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1027 if (len != size) { 1028 printf("failed to load bmp %s\n", bmp_name); 1029 ret = -ENOENT; 1030 goto free_header; 1031 } 1032 1033 if (!can_direct_logo(logo->bpp)) { 1034 int dst_size; 1035 /* 1036 * TODO: force use 16bpp if bpp less than 16; 1037 */ 1038 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1039 dst_size = logo->width * logo->height * logo->bpp >> 3; 1040 1041 dst = get_display_buffer(dst_size); 1042 if (!dst) { 1043 ret = -ENOMEM; 1044 goto free_header; 1045 } 1046 if (bmpdecoder(pdst, dst, logo->bpp)) { 1047 printf("failed to decode bmp %s\n", bmp_name); 1048 ret = -EINVAL; 1049 goto free_header; 1050 } 1051 flush_dcache_range((ulong)dst, 1052 ALIGN((ulong)dst + dst_size, 1053 CONFIG_SYS_CACHELINE_SIZE)); 1054 1055 logo->offset = 0; 1056 logo->ymirror = 0; 1057 } else { 1058 logo->offset = get_unaligned_le32(&header->data_offset); 1059 if (reserved == BMP_PROCESSED_FLAG) 1060 logo->ymirror = 0; 1061 else 1062 logo->ymirror = 1; 1063 } 1064 logo->mem = dst; 1065 1066 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1067 1068 free_header: 1069 1070 free(header); 1071 1072 return ret; 1073 #else 1074 return -EINVAL; 1075 #endif 1076 } 1077 1078 void rockchip_show_fbbase(ulong fbbase) 1079 { 1080 struct display_state *s; 1081 1082 list_for_each_entry(s, &rockchip_display_list, head) { 1083 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1084 s->logo.mem = (char *)fbbase; 1085 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1086 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1087 s->logo.bpp = 32; 1088 s->logo.ymirror = 0; 1089 1090 display_logo(s); 1091 } 1092 } 1093 1094 int rockchip_show_bmp(const char *bmp) 1095 { 1096 struct display_state *s; 1097 int ret = 0; 1098 1099 if (!bmp) { 1100 list_for_each_entry(s, &rockchip_display_list, head) 1101 display_disable(s); 1102 return -ENOENT; 1103 } 1104 1105 list_for_each_entry(s, &rockchip_display_list, head) { 1106 s->logo.mode = s->charge_logo_mode; 1107 if (load_bmp_logo(&s->logo, bmp)) 1108 continue; 1109 ret = display_logo(s); 1110 } 1111 1112 return ret; 1113 } 1114 1115 int rockchip_show_logo(void) 1116 { 1117 struct display_state *s; 1118 int ret = 0; 1119 1120 list_for_each_entry(s, &rockchip_display_list, head) { 1121 s->logo.mode = s->logo_mode; 1122 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1123 printf("failed to display uboot logo\n"); 1124 else 1125 ret = display_logo(s); 1126 1127 /* Load kernel bmp in rockchip_display_fixup() later */ 1128 } 1129 1130 return ret; 1131 } 1132 1133 enum { 1134 PORT_DIR_IN, 1135 PORT_DIR_OUT, 1136 }; 1137 1138 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1139 { 1140 ofnode panel_node, ports, port, ep; 1141 struct udevice *panel_dev; 1142 int ret; 1143 1144 panel_node = dev_read_subnode(dev, "panel"); 1145 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1146 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1147 &panel_dev); 1148 if (!ret) 1149 goto found; 1150 } 1151 1152 ports = dev_read_subnode(dev, "ports"); 1153 if (!ofnode_valid(ports)) 1154 return NULL; 1155 1156 ofnode_for_each_subnode(port, ports) { 1157 u32 reg; 1158 1159 if (ofnode_read_u32(port, "reg", ®)) 1160 continue; 1161 1162 if (reg != PORT_DIR_OUT) 1163 continue; 1164 1165 ofnode_for_each_subnode(ep, port) { 1166 ofnode _ep, _port; 1167 uint phandle; 1168 1169 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1170 continue; 1171 1172 _ep = ofnode_get_by_phandle(phandle); 1173 if (!ofnode_valid(_ep)) 1174 continue; 1175 1176 _port = ofnode_get_parent(_ep); 1177 if (!ofnode_valid(_port)) 1178 continue; 1179 1180 panel_node = ofnode_get_parent(_port); 1181 if (!ofnode_valid(panel_node)) 1182 continue; 1183 1184 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1185 panel_node, 1186 &panel_dev); 1187 if (!ret) 1188 goto found; 1189 } 1190 } 1191 1192 return NULL; 1193 1194 found: 1195 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1196 } 1197 1198 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1199 { 1200 ofnode node, ports, port, ep; 1201 struct udevice *dev; 1202 int ret; 1203 1204 ports = dev_read_subnode(conn_dev, "ports"); 1205 if (!ofnode_valid(ports)) 1206 return NULL; 1207 1208 ofnode_for_each_subnode(port, ports) { 1209 u32 reg; 1210 1211 if (ofnode_read_u32(port, "reg", ®)) 1212 continue; 1213 1214 if (reg != PORT_DIR_OUT) 1215 continue; 1216 1217 ofnode_for_each_subnode(ep, port) { 1218 ofnode _ep, _port, _ports; 1219 uint phandle; 1220 1221 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1222 continue; 1223 1224 _ep = ofnode_get_by_phandle(phandle); 1225 if (!ofnode_valid(_ep)) 1226 continue; 1227 1228 _port = ofnode_get_parent(_ep); 1229 if (!ofnode_valid(_port)) 1230 continue; 1231 1232 _ports = ofnode_get_parent(_port); 1233 if (!ofnode_valid(_ports)) 1234 continue; 1235 1236 node = ofnode_get_parent(_ports); 1237 if (!ofnode_valid(node)) 1238 continue; 1239 1240 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1241 node, &dev); 1242 if (!ret) 1243 goto found; 1244 } 1245 } 1246 1247 return NULL; 1248 1249 found: 1250 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1251 } 1252 1253 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1254 { 1255 ofnode ep, port, ports, conn; 1256 uint phandle; 1257 struct udevice *dev; 1258 int ret; 1259 1260 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1261 return NULL; 1262 1263 ep = ofnode_get_by_phandle(phandle); 1264 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1265 return NULL; 1266 1267 port = ofnode_get_parent(ep); 1268 if (!ofnode_valid(port)) 1269 return NULL; 1270 1271 ports = ofnode_get_parent(port); 1272 if (!ofnode_valid(ports)) 1273 return NULL; 1274 1275 conn = ofnode_get_parent(ports); 1276 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1277 return NULL; 1278 1279 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1280 if (ret) 1281 return NULL; 1282 1283 return dev; 1284 } 1285 1286 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1287 { 1288 struct udevice *phy_dev; 1289 int ret; 1290 1291 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1292 if (ret) 1293 return NULL; 1294 1295 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1296 } 1297 1298 static int rockchip_display_probe(struct udevice *dev) 1299 { 1300 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1301 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1302 const void *blob = gd->fdt_blob; 1303 int phandle; 1304 struct udevice *crtc_dev, *conn_dev; 1305 struct rockchip_crtc *crtc; 1306 const struct rockchip_connector *conn; 1307 struct rockchip_panel *panel = NULL; 1308 struct rockchip_bridge *bridge = NULL; 1309 struct rockchip_phy *phy = NULL; 1310 struct display_state *s; 1311 const char *name; 1312 int ret; 1313 ofnode node, route_node; 1314 struct device_node *port_node, *vop_node, *ep_node; 1315 struct public_phy_data *data; 1316 1317 /* Before relocation we don't need to do anything */ 1318 if (!(gd->flags & GD_FLG_RELOC)) 1319 return 0; 1320 1321 data = malloc(sizeof(struct public_phy_data)); 1322 if (!data) { 1323 printf("failed to alloc phy data\n"); 1324 return -ENOMEM; 1325 } 1326 data->phy_init = false; 1327 1328 init_display_buffer(plat->base); 1329 1330 route_node = dev_read_subnode(dev, "route"); 1331 if (!ofnode_valid(route_node)) 1332 return -ENODEV; 1333 1334 ofnode_for_each_subnode(node, route_node) { 1335 if (!ofnode_is_available(node)) 1336 continue; 1337 phandle = ofnode_read_u32_default(node, "connect", -1); 1338 if (phandle < 0) { 1339 printf("Warn: can't find connect node's handle\n"); 1340 continue; 1341 } 1342 ep_node = of_find_node_by_phandle(phandle); 1343 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1344 printf("Warn: can't find endpoint node from phandle\n"); 1345 continue; 1346 } 1347 port_node = of_get_parent(ep_node); 1348 if (!ofnode_valid(np_to_ofnode(port_node))) { 1349 printf("Warn: can't find port node from phandle\n"); 1350 continue; 1351 } 1352 vop_node = of_get_parent(port_node); 1353 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1354 printf("Warn: can't find crtc node from phandle\n"); 1355 continue; 1356 } 1357 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1358 np_to_ofnode(vop_node), 1359 &crtc_dev); 1360 if (ret) { 1361 printf("Warn: can't find crtc driver %d\n", ret); 1362 continue; 1363 } 1364 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1365 1366 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1367 if (!conn_dev) { 1368 printf("Warn: can't find connect driver\n"); 1369 continue; 1370 } 1371 1372 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1373 1374 phy = rockchip_of_find_phy(conn_dev); 1375 1376 bridge = rockchip_of_find_bridge(conn_dev); 1377 if (bridge) 1378 panel = rockchip_of_find_panel(bridge->dev); 1379 else 1380 panel = rockchip_of_find_panel(conn_dev); 1381 1382 s = malloc(sizeof(*s)); 1383 if (!s) 1384 continue; 1385 1386 memset(s, 0, sizeof(*s)); 1387 1388 INIT_LIST_HEAD(&s->head); 1389 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1390 if (!ret) 1391 memcpy(s->ulogo_name, name, strlen(name)); 1392 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1393 if (!ret) 1394 memcpy(s->klogo_name, name, strlen(name)); 1395 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1396 if (!strcmp(name, "fullscreen")) 1397 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1398 else 1399 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1400 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1401 if (!strcmp(name, "fullscreen")) 1402 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1403 else 1404 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1405 1406 s->blob = blob; 1407 s->panel_state.panel = panel; 1408 s->conn_state.node = conn_dev->node; 1409 s->conn_state.dev = conn_dev; 1410 s->conn_state.connector = conn; 1411 s->conn_state.phy = phy; 1412 s->conn_state.bridge = bridge; 1413 s->conn_state.overscan.left_margin = 100; 1414 s->conn_state.overscan.right_margin = 100; 1415 s->conn_state.overscan.top_margin = 100; 1416 s->conn_state.overscan.bottom_margin = 100; 1417 s->crtc_state.node = np_to_ofnode(vop_node); 1418 s->crtc_state.dev = crtc_dev; 1419 s->crtc_state.crtc = crtc; 1420 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1421 s->node = node; 1422 1423 if (bridge) 1424 bridge->state = s; 1425 1426 if (panel) 1427 panel->state = s; 1428 1429 get_crtc_mcu_mode(&s->crtc_state); 1430 1431 ret = ofnode_read_u32_default(s->crtc_state.node, 1432 "rockchip,dual-channel-swap", 0); 1433 s->crtc_state.dual_channel_swap = ret; 1434 if (connector_panel_init(s)) { 1435 printf("Warn: Failed to init panel drivers\n"); 1436 free(s); 1437 continue; 1438 } 1439 1440 if (connector_phy_init(s, data)) { 1441 printf("Warn: Failed to init phy drivers\n"); 1442 free(s); 1443 continue; 1444 } 1445 list_add_tail(&s->head, &rockchip_display_list); 1446 } 1447 1448 if (list_empty(&rockchip_display_list)) { 1449 printf("Failed to found available display route\n"); 1450 return -ENODEV; 1451 } 1452 1453 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1454 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1455 uc_priv->bpix = VIDEO_BPP32; 1456 1457 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1458 rockchip_show_fbbase(plat->base); 1459 video_set_flush_dcache(dev, true); 1460 #endif 1461 1462 return 0; 1463 } 1464 1465 void rockchip_display_fixup(void *blob) 1466 { 1467 const struct rockchip_connector_funcs *conn_funcs; 1468 const struct rockchip_crtc_funcs *crtc_funcs; 1469 const struct rockchip_connector *conn; 1470 const struct rockchip_crtc *crtc; 1471 struct display_state *s; 1472 int offset; 1473 const struct device_node *np; 1474 const char *path; 1475 1476 if (!get_display_size()) 1477 return; 1478 1479 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1480 list_for_each_entry(s, &rockchip_display_list, head) 1481 load_bmp_logo(&s->logo, s->klogo_name); 1482 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1483 (u64)memory_start, 1484 (u64)get_display_size()); 1485 if (offset < 0) 1486 printf("failed to reserve drm-loader-logo memory\n"); 1487 } else { 1488 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1489 /* Compatible with rkfb display, only need reserve memory */ 1490 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1491 (u64)memory_start, 1492 MEMORY_POOL_SIZE); 1493 if (offset < 0) 1494 printf("failed to reserve fb-loader-logo memory\n"); 1495 else 1496 list_for_each_entry(s, &rockchip_display_list, head) 1497 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1498 return; 1499 } 1500 1501 list_for_each_entry(s, &rockchip_display_list, head) { 1502 conn = s->conn_state.connector; 1503 if (!conn) 1504 continue; 1505 conn_funcs = conn->funcs; 1506 if (!conn_funcs) { 1507 printf("failed to get exist connector\n"); 1508 continue; 1509 } 1510 1511 crtc = s->crtc_state.crtc; 1512 if (!crtc) 1513 continue; 1514 1515 crtc_funcs = crtc->funcs; 1516 if (!crtc_funcs) { 1517 printf("failed to get exist crtc\n"); 1518 continue; 1519 } 1520 1521 if (crtc_funcs->fixup_dts) 1522 crtc_funcs->fixup_dts(s, blob); 1523 1524 if (conn_funcs->fixup_dts) 1525 conn_funcs->fixup_dts(s, blob); 1526 1527 np = ofnode_to_np(s->node); 1528 path = np->full_name; 1529 fdt_increase_size(blob, 0x400); 1530 #define FDT_SET_U32(name, val) \ 1531 do_fixup_by_path_u32(blob, path, name, val, 1); 1532 1533 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1534 - memory_start; 1535 FDT_SET_U32("logo,offset", offset); 1536 FDT_SET_U32("logo,width", s->logo.width); 1537 FDT_SET_U32("logo,height", s->logo.height); 1538 FDT_SET_U32("logo,bpp", s->logo.bpp); 1539 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1540 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1541 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1542 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1543 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1544 FDT_SET_U32("video,vrefresh", 1545 drm_mode_vrefresh(&s->conn_state.mode)); 1546 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1547 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1548 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1549 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1550 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1551 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1552 #undef FDT_SET_U32 1553 } 1554 } 1555 1556 int rockchip_display_bind(struct udevice *dev) 1557 { 1558 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1559 1560 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1561 1562 return 0; 1563 } 1564 1565 static const struct udevice_id rockchip_display_ids[] = { 1566 { .compatible = "rockchip,display-subsystem" }, 1567 { } 1568 }; 1569 1570 U_BOOT_DRIVER(rockchip_display) = { 1571 .name = "rockchip_display", 1572 .id = UCLASS_VIDEO, 1573 .of_match = rockchip_display_ids, 1574 .bind = rockchip_display_bind, 1575 .probe = rockchip_display_probe, 1576 }; 1577 1578 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1579 char *const argv[]) 1580 { 1581 if (argc != 1) 1582 return CMD_RET_USAGE; 1583 1584 rockchip_show_logo(); 1585 1586 return 0; 1587 } 1588 1589 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1590 char *const argv[]) 1591 { 1592 if (argc != 2) 1593 return CMD_RET_USAGE; 1594 1595 rockchip_show_bmp(argv[1]); 1596 1597 return 0; 1598 } 1599 1600 U_BOOT_CMD( 1601 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1602 "load and display log from resource partition", 1603 NULL 1604 ); 1605 1606 U_BOOT_CMD( 1607 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1608 "load and display bmp from resource partition", 1609 " <bmp_name>" 1610 ); 1611