1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 void *base_parameter_addr = (void *)&base_parameter; 156 157 for (i = 0; i < 8; i++) { 158 disp_header = &base_parameter.disp_header[i]; 159 if (disp_header->connector_type == type && 160 disp_header->connector_id == id) { 161 printf("disp info %d, type:%d, id:%d\n", i, type, id); 162 offset = disp_header->offset; 163 break; 164 } 165 } 166 167 if (offset < 0) 168 return NULL; 169 disp_info = base_parameter_addr + offset; 170 if (disp_info->screen_info[0].type != type || 171 disp_info->screen_info[0].id != id) { 172 printf("connector type or id is error, type:%d, id:%d\n", 173 disp_info->screen_info[0].type, 174 disp_info->screen_info[0].id); 175 return NULL; 176 } 177 178 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 179 return NULL; 180 181 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 182 183 if (crc_val != disp_info->crc) { 184 printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 185 return NULL; 186 } 187 188 return disp_info; 189 } 190 191 /* check which kind of public phy does connector use */ 192 static int check_public_use_phy(struct display_state *state) 193 { 194 int ret = NONE; 195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 196 struct connector_state *conn_state = &state->conn_state; 197 198 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 199 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 200 ret = INNO_HDMI_PHY; 201 #endif 202 203 return ret; 204 } 205 206 /* 207 * get public phy driver and initialize it. 208 * The current version only has inno hdmi phy for hdmi and tve. 209 */ 210 static int get_public_phy(struct display_state *state, 211 struct public_phy_data *data) 212 { 213 struct connector_state *conn_state = &state->conn_state; 214 struct rockchip_phy *phy; 215 struct udevice *dev; 216 int ret = 0; 217 218 switch (data->public_phy_type) { 219 case INNO_HDMI_PHY: 220 #if defined(CONFIG_ROCKCHIP_RK3328) 221 ret = uclass_get_device_by_name(UCLASS_PHY, 222 "hdmiphy@ff430000", &dev); 223 #elif defined(CONFIG_ROCKCHIP_RK322X) 224 ret = uclass_get_device_by_name(UCLASS_PHY, 225 "hdmi-phy@12030000", &dev); 226 #else 227 ret = -EINVAL; 228 #endif 229 if (ret) { 230 printf("Warn: can't find phy driver\n"); 231 return 0; 232 } 233 234 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 235 if (!phy) { 236 printf("failed to get phy driver\n"); 237 return 0; 238 } 239 240 ret = rockchip_phy_init(phy); 241 if (ret) { 242 printf("failed to init phy driver\n"); 243 return ret; 244 } 245 conn_state->phy = phy; 246 247 debug("inno hdmi phy init success, save it\n"); 248 data->phy_drv = conn_state->phy; 249 data->phy_init = true; 250 return 0; 251 default: 252 return -EINVAL; 253 } 254 } 255 256 static void init_display_buffer(ulong base) 257 { 258 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 259 memory_end = memory_start; 260 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 261 } 262 263 void *get_display_buffer(int size) 264 { 265 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 266 void *buf; 267 268 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 269 printf("failed to alloc %dbyte memory to display\n", size); 270 return NULL; 271 } 272 buf = (void *)roundup_memory; 273 274 memory_end = roundup_memory + size; 275 276 return buf; 277 } 278 279 static unsigned long get_display_size(void) 280 { 281 return memory_end - memory_start; 282 } 283 284 static unsigned long get_single_cubic_lut_size(void) 285 { 286 ulong cubic_lut_size; 287 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 288 289 /* This is depend on IC designed */ 290 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 291 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 292 293 return cubic_lut_size; 294 } 295 296 static unsigned long get_cubic_lut_offset(int crtc_id) 297 { 298 return crtc_id * get_single_cubic_lut_size(); 299 } 300 301 unsigned long get_cubic_lut_buffer(int crtc_id) 302 { 303 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 304 } 305 306 static unsigned long get_cubic_memory_size(void) 307 { 308 /* Max support 4 cubic lut */ 309 return get_single_cubic_lut_size() * 4; 310 } 311 312 bool can_direct_logo(int bpp) 313 { 314 return bpp == 24 || bpp == 32; 315 } 316 317 static int connector_phy_init(struct display_state *state, 318 struct public_phy_data *data) 319 { 320 struct connector_state *conn_state = &state->conn_state; 321 int type; 322 323 /* does this connector use public phy with others */ 324 type = check_public_use_phy(state); 325 if (type == INNO_HDMI_PHY) { 326 /* there is no public phy was initialized */ 327 if (!data->phy_init) { 328 debug("start get public phy\n"); 329 data->public_phy_type = type; 330 if (get_public_phy(state, data)) { 331 printf("can't find correct public phy type\n"); 332 free(data); 333 return -EINVAL; 334 } 335 return 0; 336 } 337 338 /* if this phy has been initialized, get it directly */ 339 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 340 return 0; 341 } 342 343 return 0; 344 } 345 346 static int connector_panel_init(struct display_state *state) 347 { 348 struct connector_state *conn_state = &state->conn_state; 349 struct panel_state *panel_state = &state->panel_state; 350 const struct rockchip_panel *panel = panel_state->panel; 351 ofnode dsp_lut_node; 352 int ret, len; 353 354 if (!panel) 355 return 0; 356 357 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 358 if (!ofnode_valid(dsp_lut_node)) { 359 debug("%s can not find dsp-lut node\n", __func__); 360 return 0; 361 } 362 363 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 364 if (len > 0) { 365 conn_state->gamma.size = len / sizeof(u32); 366 conn_state->gamma.lut = malloc(len); 367 if (!conn_state->gamma.lut) { 368 printf("malloc gamma lut failed\n"); 369 return -ENOMEM; 370 } 371 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 372 conn_state->gamma.lut, 373 conn_state->gamma.size); 374 if (ret) { 375 printf("Cannot decode gamma_lut\n"); 376 conn_state->gamma.lut = NULL; 377 return -EINVAL; 378 } 379 panel_state->dsp_lut_node = dsp_lut_node; 380 } 381 382 return 0; 383 } 384 385 int drm_mode_vrefresh(const struct drm_display_mode *mode) 386 { 387 int refresh = 0; 388 unsigned int calc_val; 389 390 if (mode->vrefresh > 0) { 391 refresh = mode->vrefresh; 392 } else if (mode->htotal > 0 && mode->vtotal > 0) { 393 int vtotal; 394 395 vtotal = mode->vtotal; 396 /* work out vrefresh the value will be x1000 */ 397 calc_val = (mode->clock * 1000); 398 calc_val /= mode->htotal; 399 refresh = (calc_val + vtotal / 2) / vtotal; 400 401 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 402 refresh *= 2; 403 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 404 refresh /= 2; 405 if (mode->vscan > 1) 406 refresh /= mode->vscan; 407 } 408 return refresh; 409 } 410 411 static int display_get_timing_from_dts(struct panel_state *panel_state, 412 struct drm_display_mode *mode) 413 { 414 struct rockchip_panel *panel = panel_state->panel; 415 int phandle; 416 int hactive, vactive, pixelclock; 417 int hfront_porch, hback_porch, hsync_len; 418 int vfront_porch, vback_porch, vsync_len; 419 int val, flags = 0; 420 ofnode timing, native_mode; 421 422 timing = dev_read_subnode(panel->dev, "display-timings"); 423 if (!ofnode_valid(timing)) 424 return -ENODEV; 425 426 native_mode = ofnode_find_subnode(timing, "timing"); 427 if (!ofnode_valid(native_mode)) { 428 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 429 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 430 if (!ofnode_valid(native_mode)) { 431 printf("failed to get display timings from DT\n"); 432 return -ENXIO; 433 } 434 } 435 436 #define FDT_GET_INT(val, name) \ 437 val = ofnode_read_s32_default(native_mode, name, -1); \ 438 if (val < 0) { \ 439 printf("Can't get %s\n", name); \ 440 return -ENXIO; \ 441 } 442 443 #define FDT_GET_INT_DEFAULT(val, name, default) \ 444 val = ofnode_read_s32_default(native_mode, name, default); 445 446 FDT_GET_INT(hactive, "hactive"); 447 FDT_GET_INT(vactive, "vactive"); 448 FDT_GET_INT(pixelclock, "clock-frequency"); 449 FDT_GET_INT(hsync_len, "hsync-len"); 450 FDT_GET_INT(hfront_porch, "hfront-porch"); 451 FDT_GET_INT(hback_porch, "hback-porch"); 452 FDT_GET_INT(vsync_len, "vsync-len"); 453 FDT_GET_INT(vfront_porch, "vfront-porch"); 454 FDT_GET_INT(vback_porch, "vback-porch"); 455 FDT_GET_INT(val, "hsync-active"); 456 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 457 FDT_GET_INT(val, "vsync-active"); 458 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 459 FDT_GET_INT(val, "pixelclk-active"); 460 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 461 462 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 463 if (val == DRM_MODE_FLAG_XMIRROR) { 464 flags |= DRM_MODE_FLAG_XMIRROR; 465 } else if (val == DRM_MODE_FLAG_YMIRROR) { 466 flags |= DRM_MODE_FLAG_YMIRROR; 467 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 468 flags |= DRM_MODE_FLAG_XMIRROR; 469 flags |= DRM_MODE_FLAG_YMIRROR; 470 } 471 mode->hdisplay = hactive; 472 mode->hsync_start = mode->hdisplay + hfront_porch; 473 mode->hsync_end = mode->hsync_start + hsync_len; 474 mode->htotal = mode->hsync_end + hback_porch; 475 476 mode->vdisplay = vactive; 477 mode->vsync_start = mode->vdisplay + vfront_porch; 478 mode->vsync_end = mode->vsync_start + vsync_len; 479 mode->vtotal = mode->vsync_end + vback_porch; 480 481 mode->clock = pixelclock / 1000; 482 mode->flags = flags; 483 484 return 0; 485 } 486 487 /** 488 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 489 * @edid_data: structure store mode list 490 * @max_output: vop max output resolution 491 */ 492 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 493 struct vop_rect *max_output) 494 { 495 int i; 496 497 for (i = 0; i < edid_data->modes; i++) { 498 if (edid_data->mode_buf[i].hdisplay > max_output->width || 499 edid_data->mode_buf[i].vdisplay > max_output->height) 500 edid_data->mode_buf[i].invalid = true; 501 } 502 } 503 504 /** 505 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 506 * @p: mode 507 * @adjust_flags: a combination of adjustment flags 508 * 509 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 510 * 511 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 512 * interlaced modes. 513 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 514 * buffers containing two eyes (only adjust the timings when needed, eg. for 515 * "frame packing" or "side by side full"). 516 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 517 * be performed for doublescan and vscan > 1 modes respectively. 518 */ 519 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 520 { 521 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 522 return; 523 524 if (p->flags & DRM_MODE_FLAG_DBLCLK) 525 p->crtc_clock = 2 * p->clock; 526 else 527 p->crtc_clock = p->clock; 528 p->crtc_hdisplay = p->hdisplay; 529 p->crtc_hsync_start = p->hsync_start; 530 p->crtc_hsync_end = p->hsync_end; 531 p->crtc_htotal = p->htotal; 532 p->crtc_hskew = p->hskew; 533 p->crtc_vdisplay = p->vdisplay; 534 p->crtc_vsync_start = p->vsync_start; 535 p->crtc_vsync_end = p->vsync_end; 536 p->crtc_vtotal = p->vtotal; 537 538 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 539 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 540 p->crtc_vdisplay /= 2; 541 p->crtc_vsync_start /= 2; 542 p->crtc_vsync_end /= 2; 543 p->crtc_vtotal /= 2; 544 } 545 } 546 547 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 548 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 549 p->crtc_vdisplay *= 2; 550 p->crtc_vsync_start *= 2; 551 p->crtc_vsync_end *= 2; 552 p->crtc_vtotal *= 2; 553 } 554 } 555 556 if (!(adjust_flags & CRTC_NO_VSCAN)) { 557 if (p->vscan > 1) { 558 p->crtc_vdisplay *= p->vscan; 559 p->crtc_vsync_start *= p->vscan; 560 p->crtc_vsync_end *= p->vscan; 561 p->crtc_vtotal *= p->vscan; 562 } 563 } 564 565 if (adjust_flags & CRTC_STEREO_DOUBLE) { 566 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 567 568 switch (layout) { 569 case DRM_MODE_FLAG_3D_FRAME_PACKING: 570 p->crtc_clock *= 2; 571 p->crtc_vdisplay += p->crtc_vtotal; 572 p->crtc_vsync_start += p->crtc_vtotal; 573 p->crtc_vsync_end += p->crtc_vtotal; 574 p->crtc_vtotal += p->crtc_vtotal; 575 break; 576 } 577 } 578 579 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 580 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 581 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 582 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 583 } 584 585 /** 586 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 587 * output format 588 * 589 * @connector: drm connector under action. 590 * @mode: video mode to be tested. 591 * 592 * Returns: 593 * true if the mode can be supported in YCBCR420 format 594 * false if not. 595 */ 596 bool drm_mode_is_420_only(const struct drm_display_info *display, 597 struct drm_display_mode *mode) 598 { 599 u8 vic = drm_match_cea_mode(mode); 600 601 return test_bit(vic, display->hdmi.y420_vdb_modes); 602 } 603 604 /** 605 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 606 * output format also (along with RGB/YCBCR444/422) 607 * 608 * @display: display under action. 609 * @mode: video mode to be tested. 610 * 611 * Returns: 612 * true if the mode can be support YCBCR420 format 613 * false if not. 614 */ 615 bool drm_mode_is_420_also(const struct drm_display_info *display, 616 struct drm_display_mode *mode) 617 { 618 u8 vic = drm_match_cea_mode(mode); 619 620 return test_bit(vic, display->hdmi.y420_cmdb_modes); 621 } 622 623 /** 624 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 625 * output format 626 * 627 * @display: display under action. 628 * @mode: video mode to be tested. 629 * 630 * Returns: 631 * true if the mode can be supported in YCBCR420 format 632 * false if not. 633 */ 634 bool drm_mode_is_420(const struct drm_display_info *display, 635 struct drm_display_mode *mode) 636 { 637 return drm_mode_is_420_only(display, mode) || 638 drm_mode_is_420_also(display, mode); 639 } 640 641 static int display_get_timing(struct display_state *state) 642 { 643 struct connector_state *conn_state = &state->conn_state; 644 struct drm_display_mode *mode = &conn_state->mode; 645 const struct drm_display_mode *m; 646 struct panel_state *panel_state = &state->panel_state; 647 const struct rockchip_panel *panel = panel_state->panel; 648 649 if (dev_of_valid(panel->dev) && 650 !display_get_timing_from_dts(panel_state, mode)) { 651 printf("Using display timing dts\n"); 652 return 0; 653 } 654 655 if (panel->data) { 656 m = (const struct drm_display_mode *)panel->data; 657 memcpy(mode, m, sizeof(*m)); 658 printf("Using display timing from compatible panel driver\n"); 659 return 0; 660 } 661 662 return -ENODEV; 663 } 664 665 static int display_pre_init(void) 666 { 667 struct display_state *state; 668 int ret = 0; 669 670 list_for_each_entry(state, &rockchip_display_list, head) { 671 struct connector_state *conn_state = &state->conn_state; 672 const struct rockchip_connector *conn = conn_state->connector; 673 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 674 struct crtc_state *crtc_state = &state->crtc_state; 675 struct rockchip_crtc *crtc = crtc_state->crtc; 676 677 if (conn_funcs->pre_init) { 678 ret = conn_funcs->pre_init(state); 679 if (ret) 680 printf("pre init conn error\n"); 681 } 682 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 683 } 684 return ret; 685 } 686 687 static int display_init(struct display_state *state) 688 { 689 struct connector_state *conn_state = &state->conn_state; 690 struct panel_state *panel_state = &state->panel_state; 691 const struct rockchip_connector *conn = conn_state->connector; 692 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 693 struct crtc_state *crtc_state = &state->crtc_state; 694 struct rockchip_crtc *crtc = crtc_state->crtc; 695 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 696 struct drm_display_mode *mode = &conn_state->mode; 697 const char *compatible; 698 int ret = 0; 699 static bool __print_once = false; 700 #if defined(CONFIG_I2C_EDID) 701 int bpc; 702 #endif 703 if (!__print_once) { 704 __print_once = true; 705 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 706 } 707 708 if (state->is_init) 709 return 0; 710 711 if (!conn_funcs || !crtc_funcs) { 712 printf("failed to find connector or crtc functions\n"); 713 return -ENXIO; 714 } 715 716 if (crtc_state->crtc->active && !crtc_state->ports_node && 717 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 718 sizeof(struct drm_display_mode))) { 719 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 720 crtc_state->dev->name, 721 crtc_state->crtc->active_mode.type, 722 crtc_state->crtc->active_mode.hdisplay, 723 crtc_state->crtc->active_mode.vdisplay, 724 crtc_state->crtc->active_mode.vrefresh); 725 return -ENODEV; 726 } 727 728 if (crtc_funcs->preinit) { 729 ret = crtc_funcs->preinit(state); 730 if (ret) 731 return ret; 732 } 733 734 if (panel_state->panel) 735 rockchip_panel_init(panel_state->panel); 736 737 if (conn_funcs->init) { 738 ret = conn_funcs->init(state); 739 if (ret) 740 goto deinit; 741 } 742 743 if (conn_state->phy) 744 rockchip_phy_init(conn_state->phy); 745 746 /* 747 * support hotplug, but not connect; 748 */ 749 #ifdef CONFIG_ROCKCHIP_DRM_TVE 750 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 751 printf("hdmi plugin ,skip tve\n"); 752 goto deinit; 753 } 754 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 755 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 756 printf("hdmi plugin ,skip tve\n"); 757 goto deinit; 758 } 759 #endif 760 if (conn_funcs->detect) { 761 ret = conn_funcs->detect(state); 762 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 763 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 764 crtc->hdmi_hpd = ret; 765 #endif 766 if (!ret) 767 goto deinit; 768 } 769 770 if (panel_state->panel) { 771 ret = display_get_timing(state); 772 if (!ret) 773 conn_state->bpc = panel_state->panel->bpc; 774 #if defined(CONFIG_I2C_EDID) 775 if (ret < 0 && conn_funcs->get_edid) { 776 rockchip_panel_prepare(panel_state->panel); 777 778 ret = conn_funcs->get_edid(state); 779 if (!ret) { 780 ret = edid_get_drm_mode((void *)&conn_state->edid, 781 sizeof(conn_state->edid), 782 mode, &bpc); 783 if (!ret) { 784 conn_state->bpc = bpc; 785 edid_print_info((void *)&conn_state->edid); 786 } 787 } 788 } 789 #endif 790 } else if (conn_state->bridge) { 791 ret = video_bridge_read_edid(conn_state->bridge->dev, 792 conn_state->edid, EDID_SIZE); 793 if (ret > 0) { 794 #if defined(CONFIG_I2C_EDID) 795 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 796 &bpc); 797 if (!ret) { 798 conn_state->bpc = bpc; 799 edid_print_info((void *)&conn_state->edid); 800 } 801 #endif 802 } else { 803 ret = video_bridge_get_timing(conn_state->bridge->dev); 804 } 805 } else if (conn_funcs->get_timing) { 806 ret = conn_funcs->get_timing(state); 807 } else if (conn_funcs->get_edid) { 808 ret = conn_funcs->get_edid(state); 809 #if defined(CONFIG_I2C_EDID) 810 if (!ret) { 811 ret = edid_get_drm_mode((void *)&conn_state->edid, 812 sizeof(conn_state->edid), mode, 813 &bpc); 814 if (!ret) { 815 conn_state->bpc = bpc; 816 edid_print_info((void *)&conn_state->edid); 817 } 818 } 819 #endif 820 } 821 822 if (ret) 823 goto deinit; 824 825 /* rk356x series drive mipi pixdata on posedge */ 826 compatible = dev_read_string(conn_state->dev, "compatible"); 827 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 828 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 829 830 printf("Detailed mode clock %u kHz, flags[%x]\n" 831 " H: %04d %04d %04d %04d\n" 832 " V: %04d %04d %04d %04d\n" 833 "bus_format: %x\n", 834 mode->clock, mode->flags, 835 mode->hdisplay, mode->hsync_start, 836 mode->hsync_end, mode->htotal, 837 mode->vdisplay, mode->vsync_start, 838 mode->vsync_end, mode->vtotal, 839 conn_state->bus_format); 840 841 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 842 843 if (conn_state->bridge) 844 rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 845 846 if (crtc_funcs->init) { 847 ret = crtc_funcs->init(state); 848 if (ret) 849 goto deinit; 850 } 851 state->is_init = 1; 852 853 crtc_state->crtc->active = true; 854 memcpy(&crtc_state->crtc->active_mode, 855 &conn_state->mode, sizeof(struct drm_display_mode)); 856 857 return 0; 858 859 deinit: 860 if (conn_funcs->deinit) 861 conn_funcs->deinit(state); 862 return ret; 863 } 864 865 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 866 { 867 struct crtc_state *crtc_state = &state->crtc_state; 868 const struct rockchip_crtc *crtc = crtc_state->crtc; 869 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 870 int ret; 871 872 if (!state->is_init) 873 return -EINVAL; 874 875 if (crtc_funcs->send_mcu_cmd) { 876 ret = crtc_funcs->send_mcu_cmd(state, type, val); 877 if (ret) 878 return ret; 879 } 880 881 return 0; 882 } 883 884 static int display_set_plane(struct display_state *state) 885 { 886 struct crtc_state *crtc_state = &state->crtc_state; 887 const struct rockchip_crtc *crtc = crtc_state->crtc; 888 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 889 int ret; 890 891 if (!state->is_init) 892 return -EINVAL; 893 894 if (crtc_funcs->set_plane) { 895 ret = crtc_funcs->set_plane(state); 896 if (ret) 897 return ret; 898 } 899 900 return 0; 901 } 902 903 static int display_enable(struct display_state *state) 904 { 905 struct connector_state *conn_state = &state->conn_state; 906 const struct rockchip_connector *conn = conn_state->connector; 907 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 908 struct crtc_state *crtc_state = &state->crtc_state; 909 const struct rockchip_crtc *crtc = crtc_state->crtc; 910 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 911 struct panel_state *panel_state = &state->panel_state; 912 913 if (!state->is_init) 914 return -EINVAL; 915 916 if (state->is_enable) 917 return 0; 918 919 if (crtc_funcs->prepare) 920 crtc_funcs->prepare(state); 921 922 if (conn_funcs->prepare) 923 conn_funcs->prepare(state); 924 925 if (conn_state->bridge) 926 rockchip_bridge_pre_enable(conn_state->bridge); 927 928 if (panel_state->panel) 929 rockchip_panel_prepare(panel_state->panel); 930 931 if (crtc_funcs->enable) 932 crtc_funcs->enable(state); 933 934 if (conn_funcs->enable) 935 conn_funcs->enable(state); 936 937 if (conn_state->bridge) 938 rockchip_bridge_enable(conn_state->bridge); 939 940 if (panel_state->panel) 941 rockchip_panel_enable(panel_state->panel); 942 943 state->is_enable = true; 944 945 return 0; 946 } 947 948 static int display_disable(struct display_state *state) 949 { 950 struct connector_state *conn_state = &state->conn_state; 951 const struct rockchip_connector *conn = conn_state->connector; 952 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 953 struct crtc_state *crtc_state = &state->crtc_state; 954 const struct rockchip_crtc *crtc = crtc_state->crtc; 955 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 956 struct panel_state *panel_state = &state->panel_state; 957 958 if (!state->is_init) 959 return 0; 960 961 if (!state->is_enable) 962 return 0; 963 964 if (panel_state->panel) 965 rockchip_panel_disable(panel_state->panel); 966 967 if (conn_state->bridge) 968 rockchip_bridge_disable(conn_state->bridge); 969 970 if (conn_funcs->disable) 971 conn_funcs->disable(state); 972 973 if (crtc_funcs->disable) 974 crtc_funcs->disable(state); 975 976 if (panel_state->panel) 977 rockchip_panel_unprepare(panel_state->panel); 978 979 if (conn_state->bridge) 980 rockchip_bridge_post_disable(conn_state->bridge); 981 982 if (conn_funcs->unprepare) 983 conn_funcs->unprepare(state); 984 985 state->is_enable = 0; 986 state->is_init = 0; 987 988 return 0; 989 } 990 991 static int display_logo(struct display_state *state) 992 { 993 struct crtc_state *crtc_state = &state->crtc_state; 994 struct connector_state *conn_state = &state->conn_state; 995 struct logo_info *logo = &state->logo; 996 int hdisplay, vdisplay, ret; 997 998 ret = display_init(state); 999 if (!state->is_init || ret) 1000 return -ENODEV; 1001 1002 switch (logo->bpp) { 1003 case 16: 1004 crtc_state->format = ROCKCHIP_FMT_RGB565; 1005 break; 1006 case 24: 1007 crtc_state->format = ROCKCHIP_FMT_RGB888; 1008 break; 1009 case 32: 1010 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1011 break; 1012 default: 1013 printf("can't support bmp bits[%d]\n", logo->bpp); 1014 return -EINVAL; 1015 } 1016 hdisplay = conn_state->mode.hdisplay; 1017 vdisplay = conn_state->mode.vdisplay; 1018 crtc_state->src_w = logo->width; 1019 crtc_state->src_h = logo->height; 1020 crtc_state->src_x = 0; 1021 crtc_state->src_y = 0; 1022 crtc_state->ymirror = logo->ymirror; 1023 1024 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1025 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 1026 1027 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1028 crtc_state->crtc_x = 0; 1029 crtc_state->crtc_y = 0; 1030 crtc_state->crtc_w = hdisplay; 1031 crtc_state->crtc_h = vdisplay; 1032 } else { 1033 if (crtc_state->src_w >= hdisplay) { 1034 crtc_state->crtc_x = 0; 1035 crtc_state->crtc_w = hdisplay; 1036 } else { 1037 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 1038 crtc_state->crtc_w = crtc_state->src_w; 1039 } 1040 1041 if (crtc_state->src_h >= vdisplay) { 1042 crtc_state->crtc_y = 0; 1043 crtc_state->crtc_h = vdisplay; 1044 } else { 1045 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 1046 crtc_state->crtc_h = crtc_state->src_h; 1047 } 1048 } 1049 1050 display_set_plane(state); 1051 display_enable(state); 1052 1053 return 0; 1054 } 1055 1056 static int get_crtc_id(ofnode connect) 1057 { 1058 int phandle; 1059 struct device_node *remote; 1060 int val; 1061 1062 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1063 if (phandle < 0) 1064 goto err; 1065 remote = of_find_node_by_phandle(phandle); 1066 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1067 if (val < 0) 1068 goto err; 1069 1070 return val; 1071 err: 1072 printf("Can't get crtc id, default set to id = 0\n"); 1073 return 0; 1074 } 1075 1076 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1077 { 1078 ofnode mcu_node; 1079 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1080 1081 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1082 if (!ofnode_valid(mcu_node)) 1083 return -ENODEV; 1084 1085 #define FDT_GET_MCU_INT(val, name) \ 1086 do { \ 1087 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1088 if (val < 0) { \ 1089 printf("Can't get %s\n", name); \ 1090 return -ENXIO; \ 1091 } \ 1092 } while (0) 1093 1094 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1095 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1096 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1097 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1098 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1099 1100 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1101 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1102 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1103 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1104 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1105 1106 return 0; 1107 } 1108 1109 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1110 { 1111 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1112 1113 list_for_each_entry(tmp, &logo_cache_list, head) { 1114 if (!strcmp(tmp->name, bmp)) { 1115 logo_cache = tmp; 1116 break; 1117 } 1118 } 1119 1120 if (!logo_cache) { 1121 logo_cache = malloc(sizeof(*logo_cache)); 1122 if (!logo_cache) { 1123 printf("failed to alloc memory for logo cache\n"); 1124 return NULL; 1125 } 1126 memset(logo_cache, 0, sizeof(*logo_cache)); 1127 strcpy(logo_cache->name, bmp); 1128 INIT_LIST_HEAD(&logo_cache->head); 1129 list_add_tail(&logo_cache->head, &logo_cache_list); 1130 } 1131 1132 return logo_cache; 1133 } 1134 1135 /* Note: used only for rkfb kernel driver */ 1136 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1137 { 1138 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1139 void *dst = NULL; 1140 int len, size; 1141 struct bmp_header *header; 1142 1143 if (!logo || !bmp_name) 1144 return -EINVAL; 1145 1146 header = malloc(RK_BLK_SIZE); 1147 if (!header) 1148 return -ENOMEM; 1149 1150 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1151 if (len != RK_BLK_SIZE) { 1152 free(header); 1153 return -EINVAL; 1154 } 1155 size = get_unaligned_le32(&header->file_size); 1156 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1157 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1158 if (len != size) { 1159 printf("failed to load bmp %s\n", bmp_name); 1160 free(header); 1161 return -ENOENT; 1162 } 1163 1164 logo->mem = dst; 1165 #endif 1166 1167 return 0; 1168 } 1169 1170 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1171 { 1172 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1173 struct rockchip_logo_cache *logo_cache; 1174 struct bmp_header *header; 1175 void *dst = NULL, *pdst; 1176 int size, len; 1177 int ret = 0; 1178 int reserved = 0; 1179 1180 if (!logo || !bmp_name) 1181 return -EINVAL; 1182 logo_cache = find_or_alloc_logo_cache(bmp_name); 1183 if (!logo_cache) 1184 return -ENOMEM; 1185 1186 if (logo_cache->logo.mem) { 1187 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1188 return 0; 1189 } 1190 1191 header = malloc(RK_BLK_SIZE); 1192 if (!header) 1193 return -ENOMEM; 1194 1195 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1196 if (len != RK_BLK_SIZE) { 1197 ret = -EINVAL; 1198 goto free_header; 1199 } 1200 1201 logo->bpp = get_unaligned_le16(&header->bit_count); 1202 logo->width = get_unaligned_le32(&header->width); 1203 logo->height = get_unaligned_le32(&header->height); 1204 reserved = get_unaligned_le32(&header->reserved); 1205 if (logo->height < 0) 1206 logo->height = -logo->height; 1207 size = get_unaligned_le32(&header->file_size); 1208 if (!can_direct_logo(logo->bpp)) { 1209 if (size > MEMORY_POOL_SIZE) { 1210 printf("failed to use boot buf as temp bmp buffer\n"); 1211 ret = -ENOMEM; 1212 goto free_header; 1213 } 1214 pdst = get_display_buffer(size); 1215 1216 } else { 1217 pdst = get_display_buffer(size); 1218 dst = pdst; 1219 } 1220 1221 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1222 if (len != size) { 1223 printf("failed to load bmp %s\n", bmp_name); 1224 ret = -ENOENT; 1225 goto free_header; 1226 } 1227 1228 if (!can_direct_logo(logo->bpp)) { 1229 int dst_size; 1230 /* 1231 * TODO: force use 16bpp if bpp less than 16; 1232 */ 1233 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1234 dst_size = logo->width * logo->height * logo->bpp >> 3; 1235 1236 dst = get_display_buffer(dst_size); 1237 if (!dst) { 1238 ret = -ENOMEM; 1239 goto free_header; 1240 } 1241 if (bmpdecoder(pdst, dst, logo->bpp)) { 1242 printf("failed to decode bmp %s\n", bmp_name); 1243 ret = -EINVAL; 1244 goto free_header; 1245 } 1246 flush_dcache_range((ulong)dst, 1247 ALIGN((ulong)dst + dst_size, 1248 CONFIG_SYS_CACHELINE_SIZE)); 1249 1250 logo->offset = 0; 1251 logo->ymirror = 0; 1252 } else { 1253 logo->offset = get_unaligned_le32(&header->data_offset); 1254 if (reserved == BMP_PROCESSED_FLAG) 1255 logo->ymirror = 0; 1256 else 1257 logo->ymirror = 1; 1258 } 1259 logo->mem = dst; 1260 1261 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1262 1263 free_header: 1264 1265 free(header); 1266 1267 return ret; 1268 #else 1269 return -EINVAL; 1270 #endif 1271 } 1272 1273 void rockchip_show_fbbase(ulong fbbase) 1274 { 1275 struct display_state *s; 1276 1277 list_for_each_entry(s, &rockchip_display_list, head) { 1278 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1279 s->logo.mem = (char *)fbbase; 1280 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1281 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1282 s->logo.bpp = 32; 1283 s->logo.ymirror = 0; 1284 1285 display_logo(s); 1286 } 1287 } 1288 1289 int rockchip_show_bmp(const char *bmp) 1290 { 1291 struct display_state *s; 1292 int ret = 0; 1293 1294 if (!bmp) { 1295 list_for_each_entry(s, &rockchip_display_list, head) 1296 display_disable(s); 1297 return -ENOENT; 1298 } 1299 1300 list_for_each_entry(s, &rockchip_display_list, head) { 1301 s->logo.mode = s->charge_logo_mode; 1302 if (load_bmp_logo(&s->logo, bmp)) 1303 continue; 1304 ret = display_logo(s); 1305 } 1306 1307 return ret; 1308 } 1309 1310 int rockchip_show_logo(void) 1311 { 1312 struct display_state *s; 1313 int ret = 0; 1314 1315 list_for_each_entry(s, &rockchip_display_list, head) { 1316 s->logo.mode = s->logo_mode; 1317 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1318 printf("failed to display uboot logo\n"); 1319 else 1320 ret = display_logo(s); 1321 1322 /* Load kernel bmp in rockchip_display_fixup() later */ 1323 } 1324 1325 return ret; 1326 } 1327 1328 enum { 1329 PORT_DIR_IN, 1330 PORT_DIR_OUT, 1331 }; 1332 1333 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1334 { 1335 ofnode panel_node, ports, port, ep, port_parent_node; 1336 struct udevice *panel_dev; 1337 int ret; 1338 1339 panel_node = dev_read_subnode(dev, "panel"); 1340 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1341 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1342 &panel_dev); 1343 if (!ret) 1344 goto found; 1345 } 1346 1347 ports = dev_read_subnode(dev, "ports"); 1348 if (!ofnode_valid(ports)) 1349 return NULL; 1350 1351 ofnode_for_each_subnode(port, ports) { 1352 u32 reg; 1353 1354 if (ofnode_read_u32(port, "reg", ®)) 1355 continue; 1356 1357 if (reg != PORT_DIR_OUT) 1358 continue; 1359 1360 ofnode_for_each_subnode(ep, port) { 1361 ofnode _ep, _port; 1362 uint phandle; 1363 bool is_ports_node = false; 1364 1365 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1366 continue; 1367 1368 _ep = ofnode_get_by_phandle(phandle); 1369 if (!ofnode_valid(_ep)) 1370 continue; 1371 1372 _port = ofnode_get_parent(_ep); 1373 if (!ofnode_valid(_port)) 1374 continue; 1375 1376 port_parent_node = ofnode_get_parent(_port); 1377 is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0; 1378 if (is_ports_node) 1379 panel_node = ofnode_get_parent(port_parent_node); 1380 else 1381 panel_node = ofnode_get_parent(_port); 1382 if (!ofnode_valid(panel_node)) 1383 continue; 1384 1385 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1386 panel_node, 1387 &panel_dev); 1388 if (!ret) 1389 goto found; 1390 } 1391 } 1392 1393 return NULL; 1394 1395 found: 1396 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1397 } 1398 1399 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1400 { 1401 ofnode node, ports, port, ep; 1402 struct udevice *dev; 1403 int ret; 1404 1405 ports = dev_read_subnode(conn_dev, "ports"); 1406 if (!ofnode_valid(ports)) 1407 return NULL; 1408 1409 ofnode_for_each_subnode(port, ports) { 1410 u32 reg; 1411 1412 if (ofnode_read_u32(port, "reg", ®)) 1413 continue; 1414 1415 if (reg != PORT_DIR_OUT) 1416 continue; 1417 1418 ofnode_for_each_subnode(ep, port) { 1419 ofnode _ep, _port, _ports; 1420 uint phandle; 1421 1422 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1423 continue; 1424 1425 _ep = ofnode_get_by_phandle(phandle); 1426 if (!ofnode_valid(_ep)) 1427 continue; 1428 1429 _port = ofnode_get_parent(_ep); 1430 if (!ofnode_valid(_port)) 1431 continue; 1432 1433 _ports = ofnode_get_parent(_port); 1434 if (!ofnode_valid(_ports)) 1435 continue; 1436 1437 node = ofnode_get_parent(_ports); 1438 if (!ofnode_valid(node)) 1439 continue; 1440 1441 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1442 node, &dev); 1443 if (!ret) 1444 goto found; 1445 } 1446 } 1447 1448 return NULL; 1449 1450 found: 1451 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1452 } 1453 1454 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1455 { 1456 ofnode ep, port, ports, conn; 1457 uint phandle; 1458 struct udevice *dev; 1459 int ret; 1460 1461 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1462 return NULL; 1463 1464 ep = ofnode_get_by_phandle(phandle); 1465 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1466 return NULL; 1467 1468 port = ofnode_get_parent(ep); 1469 if (!ofnode_valid(port)) 1470 return NULL; 1471 1472 ports = ofnode_get_parent(port); 1473 if (!ofnode_valid(ports)) 1474 return NULL; 1475 1476 conn = ofnode_get_parent(ports); 1477 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1478 return NULL; 1479 1480 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1481 if (ret) 1482 return NULL; 1483 1484 return dev; 1485 } 1486 1487 static bool rockchip_get_display_path_status(ofnode endpoint) 1488 { 1489 ofnode ep; 1490 uint phandle; 1491 1492 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1493 return false; 1494 1495 ep = ofnode_get_by_phandle(phandle); 1496 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1497 return false; 1498 1499 return true; 1500 } 1501 1502 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1503 { 1504 struct udevice *phy_dev; 1505 int ret; 1506 1507 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1508 if (ret) 1509 return NULL; 1510 1511 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1512 } 1513 1514 #if defined(CONFIG_ROCKCHIP_RK3568) 1515 static int rockchip_display_fixup_dts(void *blob) 1516 { 1517 ofnode route_node, route_subnode, conn_ep, conn_port; 1518 const struct device_node *route_sub_devnode; 1519 const struct device_node *ep_node, *conn_ep_dev_node; 1520 u32 phandle; 1521 int conn_ep_offset; 1522 const char *route_sub_path, *path; 1523 1524 /* Don't go further if new variant after 1525 * reading PMUGRF_SOC_CON15 1526 */ 1527 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1528 return 0; 1529 1530 route_node = ofnode_path("/display-subsystem/route"); 1531 if (!ofnode_valid(route_node)) 1532 return -EINVAL; 1533 1534 ofnode_for_each_subnode(route_subnode, route_node) { 1535 if (!ofnode_is_available(route_subnode)) 1536 continue; 1537 1538 route_sub_devnode = ofnode_to_np(route_subnode); 1539 route_sub_path = route_sub_devnode->full_name; 1540 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1541 !strstr(ofnode_get_name(route_subnode), "edp")) 1542 return 0; 1543 1544 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1545 if (phandle < 0) { 1546 printf("Warn: can't find connect node's handle\n"); 1547 continue; 1548 } 1549 1550 ep_node = of_find_node_by_phandle(phandle); 1551 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1552 printf("Warn: can't find endpoint node from phandle\n"); 1553 continue; 1554 } 1555 1556 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1557 conn_ep = ofnode_get_by_phandle(phandle); 1558 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1559 return -ENODEV; 1560 1561 conn_port = ofnode_get_parent(conn_ep); 1562 if (!ofnode_valid(conn_port)) 1563 return -ENODEV; 1564 1565 ofnode_for_each_subnode(conn_ep, conn_port) { 1566 conn_ep_dev_node = ofnode_to_np(conn_ep); 1567 path = conn_ep_dev_node->full_name; 1568 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1569 conn_ep_offset = fdt_path_offset(blob, path); 1570 1571 if (!ofnode_is_available(conn_ep) && 1572 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1573 do_fixup_by_path_u32(blob, route_sub_path, 1574 "connect", phandle, 1); 1575 fdt_status_okay(blob, conn_ep_offset); 1576 1577 } else if (ofnode_is_available(conn_ep) && 1578 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1579 fdt_status_disabled(blob, conn_ep_offset); 1580 } 1581 } 1582 } 1583 1584 return 0; 1585 } 1586 #endif 1587 1588 static int rockchip_display_probe(struct udevice *dev) 1589 { 1590 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1591 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1592 const void *blob = gd->fdt_blob; 1593 int phandle; 1594 struct udevice *crtc_dev, *conn_dev; 1595 struct rockchip_crtc *crtc; 1596 const struct rockchip_connector *conn; 1597 struct rockchip_panel *panel = NULL; 1598 struct rockchip_bridge *bridge = NULL; 1599 struct rockchip_phy *phy = NULL; 1600 struct display_state *s; 1601 const char *name; 1602 int ret; 1603 ofnode node, route_node; 1604 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1605 struct public_phy_data *data; 1606 bool is_ports_node = false; 1607 1608 #if defined(CONFIG_ROCKCHIP_RK3568) 1609 rockchip_display_fixup_dts((void *)blob); 1610 #endif 1611 1612 /* Before relocation we don't need to do anything */ 1613 if (!(gd->flags & GD_FLG_RELOC)) 1614 return 0; 1615 1616 data = malloc(sizeof(struct public_phy_data)); 1617 if (!data) { 1618 printf("failed to alloc phy data\n"); 1619 return -ENOMEM; 1620 } 1621 data->phy_init = false; 1622 1623 init_display_buffer(plat->base); 1624 1625 route_node = dev_read_subnode(dev, "route"); 1626 if (!ofnode_valid(route_node)) 1627 return -ENODEV; 1628 1629 ofnode_for_each_subnode(node, route_node) { 1630 if (!ofnode_is_available(node)) 1631 continue; 1632 phandle = ofnode_read_u32_default(node, "connect", -1); 1633 if (phandle < 0) { 1634 printf("Warn: can't find connect node's handle\n"); 1635 continue; 1636 } 1637 ep_node = of_find_node_by_phandle(phandle); 1638 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1639 printf("Warn: can't find endpoint node from phandle\n"); 1640 continue; 1641 } 1642 port_node = of_get_parent(ep_node); 1643 if (!ofnode_valid(np_to_ofnode(port_node))) { 1644 printf("Warn: can't find port node from phandle\n"); 1645 continue; 1646 } 1647 1648 port_parent_node = of_get_parent(port_node); 1649 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1650 printf("Warn: can't find port parent node from phandle\n"); 1651 continue; 1652 } 1653 1654 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1655 if (is_ports_node) { 1656 vop_node = of_get_parent(port_parent_node); 1657 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1658 printf("Warn: can't find crtc node from phandle\n"); 1659 continue; 1660 } 1661 } else { 1662 vop_node = port_parent_node; 1663 } 1664 1665 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1666 np_to_ofnode(vop_node), 1667 &crtc_dev); 1668 if (ret) { 1669 printf("Warn: can't find crtc driver %d\n", ret); 1670 continue; 1671 } 1672 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1673 1674 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1675 if (!conn_dev) { 1676 printf("Warn: can't find connect driver\n"); 1677 continue; 1678 } 1679 1680 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1681 1682 phy = rockchip_of_find_phy(conn_dev); 1683 1684 bridge = rockchip_of_find_bridge(conn_dev); 1685 if (bridge) 1686 panel = rockchip_of_find_panel(bridge->dev); 1687 else 1688 panel = rockchip_of_find_panel(conn_dev); 1689 1690 s = malloc(sizeof(*s)); 1691 if (!s) 1692 continue; 1693 1694 memset(s, 0, sizeof(*s)); 1695 1696 INIT_LIST_HEAD(&s->head); 1697 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1698 if (!ret) 1699 memcpy(s->ulogo_name, name, strlen(name)); 1700 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1701 if (!ret) 1702 memcpy(s->klogo_name, name, strlen(name)); 1703 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1704 if (!strcmp(name, "fullscreen")) 1705 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1706 else 1707 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1708 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1709 if (!strcmp(name, "fullscreen")) 1710 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1711 else 1712 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1713 1714 s->blob = blob; 1715 s->panel_state.panel = panel; 1716 s->conn_state.node = conn_dev->node; 1717 s->conn_state.dev = conn_dev; 1718 s->conn_state.connector = conn; 1719 s->conn_state.phy = phy; 1720 s->conn_state.bridge = bridge; 1721 s->conn_state.overscan.left_margin = 100; 1722 s->conn_state.overscan.right_margin = 100; 1723 s->conn_state.overscan.top_margin = 100; 1724 s->conn_state.overscan.bottom_margin = 100; 1725 s->crtc_state.node = np_to_ofnode(vop_node); 1726 s->crtc_state.dev = crtc_dev; 1727 s->crtc_state.crtc = crtc; 1728 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1729 s->node = node; 1730 1731 if (is_ports_node) { /* only vop2 will get into here */ 1732 ofnode vp_node = np_to_ofnode(port_node); 1733 static bool get_plane_mask_from_dts; 1734 1735 s->crtc_state.ports_node = port_parent_node; 1736 if (!get_plane_mask_from_dts) { 1737 ofnode vp_sub_node; 1738 int vp_id = 0; 1739 bool vp_enable = false; 1740 1741 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1742 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 1743 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1744 if (ret) { 1745 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 1746 s->crtc_state.crtc->assign_plane |= true; 1747 printf("get vp%d plane mask:0x%x from dts\n", vp_id, ret); 1748 } 1749 1750 /* To check current vp status */ 1751 vp_enable = false; 1752 ofnode_for_each_subnode(vp_sub_node, vp_node) 1753 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 1754 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 1755 } 1756 get_plane_mask_from_dts = true; 1757 } 1758 } 1759 1760 if (bridge) 1761 bridge->state = s; 1762 1763 if (panel) 1764 panel->state = s; 1765 1766 get_crtc_mcu_mode(&s->crtc_state); 1767 1768 ret = ofnode_read_u32_default(s->crtc_state.node, 1769 "rockchip,dual-channel-swap", 0); 1770 s->crtc_state.dual_channel_swap = ret; 1771 if (connector_panel_init(s)) { 1772 printf("Warn: Failed to init panel drivers\n"); 1773 free(s); 1774 continue; 1775 } 1776 1777 if (connector_phy_init(s, data)) { 1778 printf("Warn: Failed to init phy drivers\n"); 1779 free(s); 1780 continue; 1781 } 1782 list_add_tail(&s->head, &rockchip_display_list); 1783 } 1784 1785 if (list_empty(&rockchip_display_list)) { 1786 debug("Failed to found available display route\n"); 1787 return -ENODEV; 1788 } 1789 rockchip_get_baseparameter(); 1790 display_pre_init(); 1791 1792 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1793 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1794 uc_priv->bpix = VIDEO_BPP32; 1795 1796 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1797 rockchip_show_fbbase(plat->base); 1798 video_set_flush_dcache(dev, true); 1799 #endif 1800 1801 return 0; 1802 } 1803 1804 void rockchip_display_fixup(void *blob) 1805 { 1806 const struct rockchip_connector_funcs *conn_funcs; 1807 const struct rockchip_crtc_funcs *crtc_funcs; 1808 const struct rockchip_connector *conn; 1809 const struct rockchip_crtc *crtc; 1810 struct display_state *s; 1811 int offset; 1812 const struct device_node *np; 1813 const char *path; 1814 1815 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1816 list_for_each_entry(s, &rockchip_display_list, head) 1817 load_bmp_logo(&s->logo, s->klogo_name); 1818 1819 if (!get_display_size()) 1820 return; 1821 1822 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1823 (u64)memory_start, 1824 (u64)get_display_size()); 1825 if (offset < 0) 1826 printf("failed to reserve drm-loader-logo memory\n"); 1827 1828 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 1829 (u64)cubic_lut_memory_start, 1830 (u64)get_cubic_memory_size()); 1831 if (offset < 0) 1832 printf("failed to reserve drm-cubic-lut memory\n"); 1833 } else { 1834 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1835 /* Compatible with rkfb display, only need reserve memory */ 1836 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1837 (u64)memory_start, 1838 MEMORY_POOL_SIZE); 1839 if (offset < 0) 1840 printf("failed to reserve fb-loader-logo memory\n"); 1841 else 1842 list_for_each_entry(s, &rockchip_display_list, head) 1843 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1844 return; 1845 } 1846 1847 list_for_each_entry(s, &rockchip_display_list, head) { 1848 conn = s->conn_state.connector; 1849 if (!conn) 1850 continue; 1851 conn_funcs = conn->funcs; 1852 if (!conn_funcs) { 1853 printf("failed to get exist connector\n"); 1854 continue; 1855 } 1856 1857 crtc = s->crtc_state.crtc; 1858 if (!crtc) 1859 continue; 1860 1861 crtc_funcs = crtc->funcs; 1862 if (!crtc_funcs) { 1863 printf("failed to get exist crtc\n"); 1864 continue; 1865 } 1866 1867 if (crtc_funcs->fixup_dts) 1868 crtc_funcs->fixup_dts(s, blob); 1869 1870 if (conn_funcs->fixup_dts) 1871 conn_funcs->fixup_dts(s, blob); 1872 1873 np = ofnode_to_np(s->node); 1874 path = np->full_name; 1875 fdt_increase_size(blob, 0x400); 1876 #define FDT_SET_U32(name, val) \ 1877 do_fixup_by_path_u32(blob, path, name, val, 1); 1878 1879 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1880 - memory_start; 1881 FDT_SET_U32("logo,offset", offset); 1882 FDT_SET_U32("logo,width", s->logo.width); 1883 FDT_SET_U32("logo,height", s->logo.height); 1884 FDT_SET_U32("logo,bpp", s->logo.bpp); 1885 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1886 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 1887 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1888 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1889 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1890 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1891 FDT_SET_U32("video,vrefresh", 1892 drm_mode_vrefresh(&s->conn_state.mode)); 1893 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1894 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1895 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1896 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1897 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1898 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1899 1900 if (s->conn_state.disp_info) { 1901 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 1902 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 1903 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 1904 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 1905 } 1906 1907 if (s->conn_state.disp_info->cubic_lut_data.size && 1908 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 1909 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 1910 1911 #undef FDT_SET_U32 1912 } 1913 } 1914 1915 int rockchip_display_bind(struct udevice *dev) 1916 { 1917 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1918 1919 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1920 1921 return 0; 1922 } 1923 1924 static const struct udevice_id rockchip_display_ids[] = { 1925 { .compatible = "rockchip,display-subsystem" }, 1926 { } 1927 }; 1928 1929 U_BOOT_DRIVER(rockchip_display) = { 1930 .name = "rockchip_display", 1931 .id = UCLASS_VIDEO, 1932 .of_match = rockchip_display_ids, 1933 .bind = rockchip_display_bind, 1934 .probe = rockchip_display_probe, 1935 }; 1936 1937 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1938 char *const argv[]) 1939 { 1940 if (argc != 1) 1941 return CMD_RET_USAGE; 1942 1943 rockchip_show_logo(); 1944 1945 return 0; 1946 } 1947 1948 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1949 char *const argv[]) 1950 { 1951 if (argc != 2) 1952 return CMD_RET_USAGE; 1953 1954 rockchip_show_bmp(argv[1]); 1955 1956 return 0; 1957 } 1958 1959 U_BOOT_CMD( 1960 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1961 "load and display log from resource partition", 1962 NULL 1963 ); 1964 1965 U_BOOT_CMD( 1966 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1967 "load and display bmp from resource partition", 1968 " <bmp_name>" 1969 ); 1970