1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 343 * @edid_data: structure store mode list 344 * @max_output: vop max output resolution 345 */ 346 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 347 struct vop_rect *max_output) 348 { 349 int i; 350 351 for (i = 0; i < edid_data->modes; i++) { 352 if (edid_data->mode_buf[i].hdisplay > max_output->width || 353 edid_data->mode_buf[i].vdisplay > max_output->height) 354 edid_data->mode_buf[i].invalid = true; 355 } 356 } 357 358 /** 359 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 360 * @p: mode 361 * @adjust_flags: a combination of adjustment flags 362 * 363 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 364 * 365 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 366 * interlaced modes. 367 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 368 * buffers containing two eyes (only adjust the timings when needed, eg. for 369 * "frame packing" or "side by side full"). 370 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 371 * be performed for doublescan and vscan > 1 modes respectively. 372 */ 373 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 374 { 375 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 376 return; 377 378 if (p->flags & DRM_MODE_FLAG_DBLCLK) 379 p->crtc_clock = 2 * p->clock; 380 else 381 p->crtc_clock = p->clock; 382 p->crtc_hdisplay = p->hdisplay; 383 p->crtc_hsync_start = p->hsync_start; 384 p->crtc_hsync_end = p->hsync_end; 385 p->crtc_htotal = p->htotal; 386 p->crtc_hskew = p->hskew; 387 p->crtc_vdisplay = p->vdisplay; 388 p->crtc_vsync_start = p->vsync_start; 389 p->crtc_vsync_end = p->vsync_end; 390 p->crtc_vtotal = p->vtotal; 391 392 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 393 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 394 p->crtc_vdisplay /= 2; 395 p->crtc_vsync_start /= 2; 396 p->crtc_vsync_end /= 2; 397 p->crtc_vtotal /= 2; 398 } 399 } 400 401 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 402 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 403 p->crtc_vdisplay *= 2; 404 p->crtc_vsync_start *= 2; 405 p->crtc_vsync_end *= 2; 406 p->crtc_vtotal *= 2; 407 } 408 } 409 410 if (!(adjust_flags & CRTC_NO_VSCAN)) { 411 if (p->vscan > 1) { 412 p->crtc_vdisplay *= p->vscan; 413 p->crtc_vsync_start *= p->vscan; 414 p->crtc_vsync_end *= p->vscan; 415 p->crtc_vtotal *= p->vscan; 416 } 417 } 418 419 if (adjust_flags & CRTC_STEREO_DOUBLE) { 420 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 421 422 switch (layout) { 423 case DRM_MODE_FLAG_3D_FRAME_PACKING: 424 p->crtc_clock *= 2; 425 p->crtc_vdisplay += p->crtc_vtotal; 426 p->crtc_vsync_start += p->crtc_vtotal; 427 p->crtc_vsync_end += p->crtc_vtotal; 428 p->crtc_vtotal += p->crtc_vtotal; 429 break; 430 } 431 } 432 433 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 434 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 435 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 436 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 437 } 438 439 /** 440 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 441 * output format 442 * 443 * @connector: drm connector under action. 444 * @mode: video mode to be tested. 445 * 446 * Returns: 447 * true if the mode can be supported in YCBCR420 format 448 * false if not. 449 */ 450 bool drm_mode_is_420_only(const struct drm_display_info *display, 451 struct drm_display_mode *mode) 452 { 453 u8 vic = drm_match_cea_mode(mode); 454 455 return test_bit(vic, display->hdmi.y420_vdb_modes); 456 } 457 458 /** 459 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 460 * output format also (along with RGB/YCBCR444/422) 461 * 462 * @display: display under action. 463 * @mode: video mode to be tested. 464 * 465 * Returns: 466 * true if the mode can be support YCBCR420 format 467 * false if not. 468 */ 469 bool drm_mode_is_420_also(const struct drm_display_info *display, 470 struct drm_display_mode *mode) 471 { 472 u8 vic = drm_match_cea_mode(mode); 473 474 return test_bit(vic, display->hdmi.y420_cmdb_modes); 475 } 476 477 /** 478 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 479 * output format 480 * 481 * @display: display under action. 482 * @mode: video mode to be tested. 483 * 484 * Returns: 485 * true if the mode can be supported in YCBCR420 format 486 * false if not. 487 */ 488 bool drm_mode_is_420(const struct drm_display_info *display, 489 struct drm_display_mode *mode) 490 { 491 return drm_mode_is_420_only(display, mode) || 492 drm_mode_is_420_also(display, mode); 493 } 494 495 static int display_get_timing(struct display_state *state) 496 { 497 struct connector_state *conn_state = &state->conn_state; 498 struct drm_display_mode *mode = &conn_state->mode; 499 const struct drm_display_mode *m; 500 struct panel_state *panel_state = &state->panel_state; 501 const struct rockchip_panel *panel = panel_state->panel; 502 503 if (dev_of_valid(panel->dev) && 504 !display_get_timing_from_dts(panel_state, mode)) { 505 printf("Using display timing dts\n"); 506 return 0; 507 } 508 509 if (panel->data) { 510 m = (const struct drm_display_mode *)panel->data; 511 memcpy(mode, m, sizeof(*m)); 512 printf("Using display timing from compatible panel driver\n"); 513 return 0; 514 } 515 516 return -ENODEV; 517 } 518 519 static int display_init(struct display_state *state) 520 { 521 struct connector_state *conn_state = &state->conn_state; 522 struct panel_state *panel_state = &state->panel_state; 523 const struct rockchip_connector *conn = conn_state->connector; 524 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 525 struct crtc_state *crtc_state = &state->crtc_state; 526 struct rockchip_crtc *crtc = crtc_state->crtc; 527 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 528 struct drm_display_mode *mode = &conn_state->mode; 529 int ret = 0; 530 static bool __print_once = false; 531 #if defined(CONFIG_I2C_EDID) 532 int bpc; 533 #endif 534 if (!__print_once) { 535 __print_once = true; 536 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 537 } 538 539 if (state->is_init) 540 return 0; 541 542 if (!conn_funcs || !crtc_funcs) { 543 printf("failed to find connector or crtc functions\n"); 544 return -ENXIO; 545 } 546 547 if (crtc_state->crtc->active && 548 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 549 sizeof(struct drm_display_mode))) { 550 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 551 crtc_state->dev->name, 552 crtc_state->crtc->active_mode.type, 553 crtc_state->crtc->active_mode.hdisplay, 554 crtc_state->crtc->active_mode.vdisplay, 555 crtc_state->crtc->active_mode.vrefresh); 556 return -ENODEV; 557 } 558 559 if (crtc_funcs->preinit) { 560 ret = crtc_funcs->preinit(state); 561 if (ret) 562 return ret; 563 } 564 565 if (panel_state->panel) 566 rockchip_panel_init(panel_state->panel); 567 568 if (conn_funcs->init) { 569 ret = conn_funcs->init(state); 570 if (ret) 571 goto deinit; 572 } 573 574 if (conn_state->phy) 575 rockchip_phy_init(conn_state->phy); 576 577 /* 578 * support hotplug, but not connect; 579 */ 580 #ifdef CONFIG_ROCKCHIP_DRM_TVE 581 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 582 printf("hdmi plugin ,skip tve\n"); 583 goto deinit; 584 } 585 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 586 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 587 printf("hdmi plugin ,skip tve\n"); 588 goto deinit; 589 } 590 #endif 591 if (conn_funcs->detect) { 592 ret = conn_funcs->detect(state); 593 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 594 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 595 crtc->hdmi_hpd = ret; 596 #endif 597 if (!ret) 598 goto deinit; 599 } 600 601 if (panel_state->panel) { 602 ret = display_get_timing(state); 603 #if defined(CONFIG_I2C_EDID) 604 if (ret < 0 && conn_funcs->get_edid) { 605 rockchip_panel_prepare(panel_state->panel); 606 607 ret = conn_funcs->get_edid(state); 608 if (!ret) { 609 ret = edid_get_drm_mode((void *)&conn_state->edid, 610 sizeof(conn_state->edid), 611 mode, &bpc); 612 if (!ret) 613 edid_print_info((void *)&conn_state->edid); 614 } 615 } 616 #endif 617 } else if (conn_state->bridge) { 618 ret = video_bridge_read_edid(conn_state->bridge->dev, 619 conn_state->edid, EDID_SIZE); 620 if (ret > 0) { 621 #if defined(CONFIG_I2C_EDID) 622 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 623 &bpc); 624 if (!ret) 625 edid_print_info((void *)&conn_state->edid); 626 #endif 627 } else { 628 ret = video_bridge_get_timing(conn_state->bridge->dev); 629 } 630 } else if (conn_funcs->get_timing) { 631 ret = conn_funcs->get_timing(state); 632 } else if (conn_funcs->get_edid) { 633 ret = conn_funcs->get_edid(state); 634 #if defined(CONFIG_I2C_EDID) 635 if (!ret) { 636 ret = edid_get_drm_mode((void *)&conn_state->edid, 637 sizeof(conn_state->edid), mode, 638 &bpc); 639 if (!ret) 640 edid_print_info((void *)&conn_state->edid); 641 } 642 #endif 643 } 644 645 if (ret) 646 goto deinit; 647 648 printf("Detailed mode clock %u kHz, flags[%x]\n" 649 " H: %04d %04d %04d %04d\n" 650 " V: %04d %04d %04d %04d\n" 651 "bus_format: %x\n", 652 mode->clock, mode->flags, 653 mode->hdisplay, mode->hsync_start, 654 mode->hsync_end, mode->htotal, 655 mode->vdisplay, mode->vsync_start, 656 mode->vsync_end, mode->vtotal, 657 conn_state->bus_format); 658 659 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 660 661 if (crtc_funcs->init) { 662 ret = crtc_funcs->init(state); 663 if (ret) 664 goto deinit; 665 } 666 state->is_init = 1; 667 668 crtc_state->crtc->active = true; 669 memcpy(&crtc_state->crtc->active_mode, 670 &conn_state->mode, sizeof(struct drm_display_mode)); 671 672 return 0; 673 674 deinit: 675 if (conn_funcs->deinit) 676 conn_funcs->deinit(state); 677 return ret; 678 } 679 680 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 681 { 682 struct crtc_state *crtc_state = &state->crtc_state; 683 const struct rockchip_crtc *crtc = crtc_state->crtc; 684 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 685 int ret; 686 687 if (!state->is_init) 688 return -EINVAL; 689 690 if (crtc_funcs->send_mcu_cmd) { 691 ret = crtc_funcs->send_mcu_cmd(state, type, val); 692 if (ret) 693 return ret; 694 } 695 696 return 0; 697 } 698 699 static int display_set_plane(struct display_state *state) 700 { 701 struct crtc_state *crtc_state = &state->crtc_state; 702 const struct rockchip_crtc *crtc = crtc_state->crtc; 703 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 704 int ret; 705 706 if (!state->is_init) 707 return -EINVAL; 708 709 if (crtc_funcs->set_plane) { 710 ret = crtc_funcs->set_plane(state); 711 if (ret) 712 return ret; 713 } 714 715 return 0; 716 } 717 718 static int display_enable(struct display_state *state) 719 { 720 struct connector_state *conn_state = &state->conn_state; 721 const struct rockchip_connector *conn = conn_state->connector; 722 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 723 struct crtc_state *crtc_state = &state->crtc_state; 724 const struct rockchip_crtc *crtc = crtc_state->crtc; 725 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 726 struct panel_state *panel_state = &state->panel_state; 727 728 if (!state->is_init) 729 return -EINVAL; 730 731 if (state->is_enable) 732 return 0; 733 734 if (crtc_funcs->prepare) 735 crtc_funcs->prepare(state); 736 737 if (conn_funcs->prepare) 738 conn_funcs->prepare(state); 739 740 if (conn_state->bridge) 741 rockchip_bridge_pre_enable(conn_state->bridge); 742 743 if (panel_state->panel) 744 rockchip_panel_prepare(panel_state->panel); 745 746 if (crtc_funcs->enable) 747 crtc_funcs->enable(state); 748 749 if (conn_funcs->enable) 750 conn_funcs->enable(state); 751 752 if (conn_state->bridge) 753 rockchip_bridge_enable(conn_state->bridge); 754 755 if (panel_state->panel) 756 rockchip_panel_enable(panel_state->panel); 757 758 state->is_enable = true; 759 760 return 0; 761 } 762 763 static int display_disable(struct display_state *state) 764 { 765 struct connector_state *conn_state = &state->conn_state; 766 const struct rockchip_connector *conn = conn_state->connector; 767 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 768 struct crtc_state *crtc_state = &state->crtc_state; 769 const struct rockchip_crtc *crtc = crtc_state->crtc; 770 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 771 struct panel_state *panel_state = &state->panel_state; 772 773 if (!state->is_init) 774 return 0; 775 776 if (!state->is_enable) 777 return 0; 778 779 if (panel_state->panel) 780 rockchip_panel_disable(panel_state->panel); 781 782 if (conn_state->bridge) 783 rockchip_bridge_disable(conn_state->bridge); 784 785 if (conn_funcs->disable) 786 conn_funcs->disable(state); 787 788 if (crtc_funcs->disable) 789 crtc_funcs->disable(state); 790 791 if (panel_state->panel) 792 rockchip_panel_unprepare(panel_state->panel); 793 794 if (conn_state->bridge) 795 rockchip_bridge_post_disable(conn_state->bridge); 796 797 if (conn_funcs->unprepare) 798 conn_funcs->unprepare(state); 799 800 state->is_enable = 0; 801 state->is_init = 0; 802 803 return 0; 804 } 805 806 static int display_logo(struct display_state *state) 807 { 808 struct crtc_state *crtc_state = &state->crtc_state; 809 struct connector_state *conn_state = &state->conn_state; 810 struct logo_info *logo = &state->logo; 811 int hdisplay, vdisplay, ret; 812 813 ret = display_init(state); 814 if (!state->is_init || ret) 815 return -ENODEV; 816 817 switch (logo->bpp) { 818 case 16: 819 crtc_state->format = ROCKCHIP_FMT_RGB565; 820 break; 821 case 24: 822 crtc_state->format = ROCKCHIP_FMT_RGB888; 823 break; 824 case 32: 825 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 826 break; 827 default: 828 printf("can't support bmp bits[%d]\n", logo->bpp); 829 return -EINVAL; 830 } 831 hdisplay = conn_state->mode.hdisplay; 832 vdisplay = conn_state->mode.vdisplay; 833 crtc_state->src_w = logo->width; 834 crtc_state->src_h = logo->height; 835 crtc_state->src_x = 0; 836 crtc_state->src_y = 0; 837 crtc_state->ymirror = logo->ymirror; 838 839 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 840 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 841 842 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 843 crtc_state->crtc_x = 0; 844 crtc_state->crtc_y = 0; 845 crtc_state->crtc_w = hdisplay; 846 crtc_state->crtc_h = vdisplay; 847 } else { 848 if (crtc_state->src_w >= hdisplay) { 849 crtc_state->crtc_x = 0; 850 crtc_state->crtc_w = hdisplay; 851 } else { 852 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 853 crtc_state->crtc_w = crtc_state->src_w; 854 } 855 856 if (crtc_state->src_h >= vdisplay) { 857 crtc_state->crtc_y = 0; 858 crtc_state->crtc_h = vdisplay; 859 } else { 860 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 861 crtc_state->crtc_h = crtc_state->src_h; 862 } 863 } 864 865 display_set_plane(state); 866 display_enable(state); 867 868 return 0; 869 } 870 871 static int get_crtc_id(ofnode connect) 872 { 873 int phandle; 874 struct device_node *remote; 875 int val; 876 877 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 878 if (phandle < 0) 879 goto err; 880 remote = of_find_node_by_phandle(phandle); 881 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 882 if (val < 0) 883 goto err; 884 885 return val; 886 err: 887 printf("Can't get crtc id, default set to id = 0\n"); 888 return 0; 889 } 890 891 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 892 { 893 ofnode mcu_node; 894 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 895 896 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 897 if (!ofnode_valid(mcu_node)) 898 return -ENODEV; 899 900 #define FDT_GET_MCU_INT(val, name) \ 901 do { \ 902 val = ofnode_read_s32_default(mcu_node, name, -1); \ 903 if (val < 0) { \ 904 printf("Can't get %s\n", name); \ 905 return -ENXIO; \ 906 } \ 907 } while (0) 908 909 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 910 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 911 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 912 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 913 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 914 915 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 916 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 917 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 918 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 919 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 920 921 return 0; 922 } 923 924 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 925 { 926 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 927 928 list_for_each_entry(tmp, &logo_cache_list, head) { 929 if (!strcmp(tmp->name, bmp)) { 930 logo_cache = tmp; 931 break; 932 } 933 } 934 935 if (!logo_cache) { 936 logo_cache = malloc(sizeof(*logo_cache)); 937 if (!logo_cache) { 938 printf("failed to alloc memory for logo cache\n"); 939 return NULL; 940 } 941 memset(logo_cache, 0, sizeof(*logo_cache)); 942 strcpy(logo_cache->name, bmp); 943 INIT_LIST_HEAD(&logo_cache->head); 944 list_add_tail(&logo_cache->head, &logo_cache_list); 945 } 946 947 return logo_cache; 948 } 949 950 /* Note: used only for rkfb kernel driver */ 951 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 952 { 953 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 954 void *dst = NULL; 955 int len, size; 956 struct bmp_header *header; 957 958 if (!logo || !bmp_name) 959 return -EINVAL; 960 961 header = malloc(RK_BLK_SIZE); 962 if (!header) 963 return -ENOMEM; 964 965 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 966 if (len != RK_BLK_SIZE) { 967 free(header); 968 return -EINVAL; 969 } 970 size = get_unaligned_le32(&header->file_size); 971 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 972 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 973 if (len != size) { 974 printf("failed to load bmp %s\n", bmp_name); 975 free(header); 976 return -ENOENT; 977 } 978 979 logo->mem = dst; 980 #endif 981 982 return 0; 983 } 984 985 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 986 { 987 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 988 struct rockchip_logo_cache *logo_cache; 989 struct bmp_header *header; 990 void *dst = NULL, *pdst; 991 int size, len; 992 int ret = 0; 993 int reserved = 0; 994 995 if (!logo || !bmp_name) 996 return -EINVAL; 997 logo_cache = find_or_alloc_logo_cache(bmp_name); 998 if (!logo_cache) 999 return -ENOMEM; 1000 1001 if (logo_cache->logo.mem) { 1002 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1003 return 0; 1004 } 1005 1006 header = malloc(RK_BLK_SIZE); 1007 if (!header) 1008 return -ENOMEM; 1009 1010 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1011 if (len != RK_BLK_SIZE) { 1012 ret = -EINVAL; 1013 goto free_header; 1014 } 1015 1016 logo->bpp = get_unaligned_le16(&header->bit_count); 1017 logo->width = get_unaligned_le32(&header->width); 1018 logo->height = get_unaligned_le32(&header->height); 1019 reserved = get_unaligned_le32(&header->reserved); 1020 if (logo->height < 0) 1021 logo->height = -logo->height; 1022 size = get_unaligned_le32(&header->file_size); 1023 if (!can_direct_logo(logo->bpp)) { 1024 if (size > MEMORY_POOL_SIZE) { 1025 printf("failed to use boot buf as temp bmp buffer\n"); 1026 ret = -ENOMEM; 1027 goto free_header; 1028 } 1029 pdst = get_display_buffer(size); 1030 1031 } else { 1032 pdst = get_display_buffer(size); 1033 dst = pdst; 1034 } 1035 1036 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1037 if (len != size) { 1038 printf("failed to load bmp %s\n", bmp_name); 1039 ret = -ENOENT; 1040 goto free_header; 1041 } 1042 1043 if (!can_direct_logo(logo->bpp)) { 1044 int dst_size; 1045 /* 1046 * TODO: force use 16bpp if bpp less than 16; 1047 */ 1048 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1049 dst_size = logo->width * logo->height * logo->bpp >> 3; 1050 1051 dst = get_display_buffer(dst_size); 1052 if (!dst) { 1053 ret = -ENOMEM; 1054 goto free_header; 1055 } 1056 if (bmpdecoder(pdst, dst, logo->bpp)) { 1057 printf("failed to decode bmp %s\n", bmp_name); 1058 ret = -EINVAL; 1059 goto free_header; 1060 } 1061 flush_dcache_range((ulong)dst, 1062 ALIGN((ulong)dst + dst_size, 1063 CONFIG_SYS_CACHELINE_SIZE)); 1064 1065 logo->offset = 0; 1066 logo->ymirror = 0; 1067 } else { 1068 logo->offset = get_unaligned_le32(&header->data_offset); 1069 if (reserved == BMP_PROCESSED_FLAG) 1070 logo->ymirror = 0; 1071 else 1072 logo->ymirror = 1; 1073 } 1074 logo->mem = dst; 1075 1076 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1077 1078 free_header: 1079 1080 free(header); 1081 1082 return ret; 1083 #else 1084 return -EINVAL; 1085 #endif 1086 } 1087 1088 void rockchip_show_fbbase(ulong fbbase) 1089 { 1090 struct display_state *s; 1091 1092 list_for_each_entry(s, &rockchip_display_list, head) { 1093 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1094 s->logo.mem = (char *)fbbase; 1095 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1096 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1097 s->logo.bpp = 32; 1098 s->logo.ymirror = 0; 1099 1100 display_logo(s); 1101 } 1102 } 1103 1104 int rockchip_show_bmp(const char *bmp) 1105 { 1106 struct display_state *s; 1107 int ret = 0; 1108 1109 if (!bmp) { 1110 list_for_each_entry(s, &rockchip_display_list, head) 1111 display_disable(s); 1112 return -ENOENT; 1113 } 1114 1115 list_for_each_entry(s, &rockchip_display_list, head) { 1116 s->logo.mode = s->charge_logo_mode; 1117 if (load_bmp_logo(&s->logo, bmp)) 1118 continue; 1119 ret = display_logo(s); 1120 } 1121 1122 return ret; 1123 } 1124 1125 int rockchip_show_logo(void) 1126 { 1127 struct display_state *s; 1128 int ret = 0; 1129 1130 list_for_each_entry(s, &rockchip_display_list, head) { 1131 s->logo.mode = s->logo_mode; 1132 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1133 printf("failed to display uboot logo\n"); 1134 else 1135 ret = display_logo(s); 1136 1137 /* Load kernel bmp in rockchip_display_fixup() later */ 1138 } 1139 1140 return ret; 1141 } 1142 1143 enum { 1144 PORT_DIR_IN, 1145 PORT_DIR_OUT, 1146 }; 1147 1148 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1149 { 1150 ofnode panel_node, ports, port, ep; 1151 struct udevice *panel_dev; 1152 int ret; 1153 1154 panel_node = dev_read_subnode(dev, "panel"); 1155 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1156 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1157 &panel_dev); 1158 if (!ret) 1159 goto found; 1160 } 1161 1162 ports = dev_read_subnode(dev, "ports"); 1163 if (!ofnode_valid(ports)) 1164 return NULL; 1165 1166 ofnode_for_each_subnode(port, ports) { 1167 u32 reg; 1168 1169 if (ofnode_read_u32(port, "reg", ®)) 1170 continue; 1171 1172 if (reg != PORT_DIR_OUT) 1173 continue; 1174 1175 ofnode_for_each_subnode(ep, port) { 1176 ofnode _ep, _port; 1177 uint phandle; 1178 1179 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1180 continue; 1181 1182 _ep = ofnode_get_by_phandle(phandle); 1183 if (!ofnode_valid(_ep)) 1184 continue; 1185 1186 _port = ofnode_get_parent(_ep); 1187 if (!ofnode_valid(_port)) 1188 continue; 1189 1190 panel_node = ofnode_get_parent(_port); 1191 if (!ofnode_valid(panel_node)) 1192 continue; 1193 1194 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1195 panel_node, 1196 &panel_dev); 1197 if (!ret) 1198 goto found; 1199 } 1200 } 1201 1202 return NULL; 1203 1204 found: 1205 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1206 } 1207 1208 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1209 { 1210 ofnode node, ports, port, ep; 1211 struct udevice *dev; 1212 int ret; 1213 1214 ports = dev_read_subnode(conn_dev, "ports"); 1215 if (!ofnode_valid(ports)) 1216 return NULL; 1217 1218 ofnode_for_each_subnode(port, ports) { 1219 u32 reg; 1220 1221 if (ofnode_read_u32(port, "reg", ®)) 1222 continue; 1223 1224 if (reg != PORT_DIR_OUT) 1225 continue; 1226 1227 ofnode_for_each_subnode(ep, port) { 1228 ofnode _ep, _port, _ports; 1229 uint phandle; 1230 1231 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1232 continue; 1233 1234 _ep = ofnode_get_by_phandle(phandle); 1235 if (!ofnode_valid(_ep)) 1236 continue; 1237 1238 _port = ofnode_get_parent(_ep); 1239 if (!ofnode_valid(_port)) 1240 continue; 1241 1242 _ports = ofnode_get_parent(_port); 1243 if (!ofnode_valid(_ports)) 1244 continue; 1245 1246 node = ofnode_get_parent(_ports); 1247 if (!ofnode_valid(node)) 1248 continue; 1249 1250 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1251 node, &dev); 1252 if (!ret) 1253 goto found; 1254 } 1255 } 1256 1257 return NULL; 1258 1259 found: 1260 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1261 } 1262 1263 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1264 { 1265 ofnode ep, port, ports, conn; 1266 uint phandle; 1267 struct udevice *dev; 1268 int ret; 1269 1270 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1271 return NULL; 1272 1273 ep = ofnode_get_by_phandle(phandle); 1274 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1275 return NULL; 1276 1277 port = ofnode_get_parent(ep); 1278 if (!ofnode_valid(port)) 1279 return NULL; 1280 1281 ports = ofnode_get_parent(port); 1282 if (!ofnode_valid(ports)) 1283 return NULL; 1284 1285 conn = ofnode_get_parent(ports); 1286 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1287 return NULL; 1288 1289 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1290 if (ret) 1291 return NULL; 1292 1293 return dev; 1294 } 1295 1296 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1297 { 1298 struct udevice *phy_dev; 1299 int ret; 1300 1301 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1302 if (ret) 1303 return NULL; 1304 1305 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1306 } 1307 1308 static int rockchip_display_probe(struct udevice *dev) 1309 { 1310 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1311 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1312 const void *blob = gd->fdt_blob; 1313 int phandle; 1314 struct udevice *crtc_dev, *conn_dev; 1315 struct rockchip_crtc *crtc; 1316 const struct rockchip_connector *conn; 1317 struct rockchip_panel *panel = NULL; 1318 struct rockchip_bridge *bridge = NULL; 1319 struct rockchip_phy *phy = NULL; 1320 struct display_state *s; 1321 const char *name; 1322 int ret; 1323 ofnode node, route_node; 1324 struct device_node *port_node, *vop_node, *ep_node; 1325 struct public_phy_data *data; 1326 1327 /* Before relocation we don't need to do anything */ 1328 if (!(gd->flags & GD_FLG_RELOC)) 1329 return 0; 1330 1331 data = malloc(sizeof(struct public_phy_data)); 1332 if (!data) { 1333 printf("failed to alloc phy data\n"); 1334 return -ENOMEM; 1335 } 1336 data->phy_init = false; 1337 1338 init_display_buffer(plat->base); 1339 1340 route_node = dev_read_subnode(dev, "route"); 1341 if (!ofnode_valid(route_node)) 1342 return -ENODEV; 1343 1344 ofnode_for_each_subnode(node, route_node) { 1345 if (!ofnode_is_available(node)) 1346 continue; 1347 phandle = ofnode_read_u32_default(node, "connect", -1); 1348 if (phandle < 0) { 1349 printf("Warn: can't find connect node's handle\n"); 1350 continue; 1351 } 1352 ep_node = of_find_node_by_phandle(phandle); 1353 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1354 printf("Warn: can't find endpoint node from phandle\n"); 1355 continue; 1356 } 1357 port_node = of_get_parent(ep_node); 1358 if (!ofnode_valid(np_to_ofnode(port_node))) { 1359 printf("Warn: can't find port node from phandle\n"); 1360 continue; 1361 } 1362 vop_node = of_get_parent(port_node); 1363 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1364 printf("Warn: can't find crtc node from phandle\n"); 1365 continue; 1366 } 1367 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1368 np_to_ofnode(vop_node), 1369 &crtc_dev); 1370 if (ret) { 1371 printf("Warn: can't find crtc driver %d\n", ret); 1372 continue; 1373 } 1374 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1375 1376 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1377 if (!conn_dev) { 1378 printf("Warn: can't find connect driver\n"); 1379 continue; 1380 } 1381 1382 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1383 1384 phy = rockchip_of_find_phy(conn_dev); 1385 1386 bridge = rockchip_of_find_bridge(conn_dev); 1387 if (bridge) 1388 panel = rockchip_of_find_panel(bridge->dev); 1389 else 1390 panel = rockchip_of_find_panel(conn_dev); 1391 1392 s = malloc(sizeof(*s)); 1393 if (!s) 1394 continue; 1395 1396 memset(s, 0, sizeof(*s)); 1397 1398 INIT_LIST_HEAD(&s->head); 1399 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1400 if (!ret) 1401 memcpy(s->ulogo_name, name, strlen(name)); 1402 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1403 if (!ret) 1404 memcpy(s->klogo_name, name, strlen(name)); 1405 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1406 if (!strcmp(name, "fullscreen")) 1407 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1408 else 1409 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1410 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1411 if (!strcmp(name, "fullscreen")) 1412 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1413 else 1414 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1415 1416 s->blob = blob; 1417 s->panel_state.panel = panel; 1418 s->conn_state.node = conn_dev->node; 1419 s->conn_state.dev = conn_dev; 1420 s->conn_state.connector = conn; 1421 s->conn_state.phy = phy; 1422 s->conn_state.bridge = bridge; 1423 s->conn_state.overscan.left_margin = 100; 1424 s->conn_state.overscan.right_margin = 100; 1425 s->conn_state.overscan.top_margin = 100; 1426 s->conn_state.overscan.bottom_margin = 100; 1427 s->crtc_state.node = np_to_ofnode(vop_node); 1428 s->crtc_state.dev = crtc_dev; 1429 s->crtc_state.crtc = crtc; 1430 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1431 s->node = node; 1432 1433 if (bridge) 1434 bridge->state = s; 1435 1436 if (panel) 1437 panel->state = s; 1438 1439 get_crtc_mcu_mode(&s->crtc_state); 1440 1441 ret = ofnode_read_u32_default(s->crtc_state.node, 1442 "rockchip,dual-channel-swap", 0); 1443 s->crtc_state.dual_channel_swap = ret; 1444 if (connector_panel_init(s)) { 1445 printf("Warn: Failed to init panel drivers\n"); 1446 free(s); 1447 continue; 1448 } 1449 1450 if (connector_phy_init(s, data)) { 1451 printf("Warn: Failed to init phy drivers\n"); 1452 free(s); 1453 continue; 1454 } 1455 list_add_tail(&s->head, &rockchip_display_list); 1456 } 1457 1458 if (list_empty(&rockchip_display_list)) { 1459 debug("Failed to found available display route\n"); 1460 return -ENODEV; 1461 } 1462 1463 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1464 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1465 uc_priv->bpix = VIDEO_BPP32; 1466 1467 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1468 rockchip_show_fbbase(plat->base); 1469 video_set_flush_dcache(dev, true); 1470 #endif 1471 1472 return 0; 1473 } 1474 1475 void rockchip_display_fixup(void *blob) 1476 { 1477 const struct rockchip_connector_funcs *conn_funcs; 1478 const struct rockchip_crtc_funcs *crtc_funcs; 1479 const struct rockchip_connector *conn; 1480 const struct rockchip_crtc *crtc; 1481 struct display_state *s; 1482 int offset; 1483 const struct device_node *np; 1484 const char *path; 1485 1486 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1487 list_for_each_entry(s, &rockchip_display_list, head) 1488 load_bmp_logo(&s->logo, s->klogo_name); 1489 1490 if (!get_display_size()) 1491 return; 1492 1493 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1494 (u64)memory_start, 1495 (u64)get_display_size()); 1496 if (offset < 0) 1497 printf("failed to reserve drm-loader-logo memory\n"); 1498 } else { 1499 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1500 /* Compatible with rkfb display, only need reserve memory */ 1501 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1502 (u64)memory_start, 1503 MEMORY_POOL_SIZE); 1504 if (offset < 0) 1505 printf("failed to reserve fb-loader-logo memory\n"); 1506 else 1507 list_for_each_entry(s, &rockchip_display_list, head) 1508 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1509 return; 1510 } 1511 1512 list_for_each_entry(s, &rockchip_display_list, head) { 1513 conn = s->conn_state.connector; 1514 if (!conn) 1515 continue; 1516 conn_funcs = conn->funcs; 1517 if (!conn_funcs) { 1518 printf("failed to get exist connector\n"); 1519 continue; 1520 } 1521 1522 crtc = s->crtc_state.crtc; 1523 if (!crtc) 1524 continue; 1525 1526 crtc_funcs = crtc->funcs; 1527 if (!crtc_funcs) { 1528 printf("failed to get exist crtc\n"); 1529 continue; 1530 } 1531 1532 if (crtc_funcs->fixup_dts) 1533 crtc_funcs->fixup_dts(s, blob); 1534 1535 if (conn_funcs->fixup_dts) 1536 conn_funcs->fixup_dts(s, blob); 1537 1538 np = ofnode_to_np(s->node); 1539 path = np->full_name; 1540 fdt_increase_size(blob, 0x400); 1541 #define FDT_SET_U32(name, val) \ 1542 do_fixup_by_path_u32(blob, path, name, val, 1); 1543 1544 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1545 - memory_start; 1546 FDT_SET_U32("logo,offset", offset); 1547 FDT_SET_U32("logo,width", s->logo.width); 1548 FDT_SET_U32("logo,height", s->logo.height); 1549 FDT_SET_U32("logo,bpp", s->logo.bpp); 1550 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1551 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1552 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1553 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1554 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1555 FDT_SET_U32("video,vrefresh", 1556 drm_mode_vrefresh(&s->conn_state.mode)); 1557 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1558 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1559 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1560 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1561 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1562 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1563 #undef FDT_SET_U32 1564 } 1565 } 1566 1567 int rockchip_display_bind(struct udevice *dev) 1568 { 1569 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1570 1571 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1572 1573 return 0; 1574 } 1575 1576 static const struct udevice_id rockchip_display_ids[] = { 1577 { .compatible = "rockchip,display-subsystem" }, 1578 { } 1579 }; 1580 1581 U_BOOT_DRIVER(rockchip_display) = { 1582 .name = "rockchip_display", 1583 .id = UCLASS_VIDEO, 1584 .of_match = rockchip_display_ids, 1585 .bind = rockchip_display_bind, 1586 .probe = rockchip_display_probe, 1587 }; 1588 1589 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1590 char *const argv[]) 1591 { 1592 if (argc != 1) 1593 return CMD_RET_USAGE; 1594 1595 rockchip_show_logo(); 1596 1597 return 0; 1598 } 1599 1600 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1601 char *const argv[]) 1602 { 1603 if (argc != 2) 1604 return CMD_RET_USAGE; 1605 1606 rockchip_show_bmp(argv[1]); 1607 1608 return 0; 1609 } 1610 1611 U_BOOT_CMD( 1612 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1613 "load and display log from resource partition", 1614 NULL 1615 ); 1616 1617 U_BOOT_CMD( 1618 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1619 "load and display bmp from resource partition", 1620 " <bmp_name>" 1621 ); 1622