1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <linux/libfdt.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/hdmi.h> 15 #include <linux/list.h> 16 #include <linux/compat.h> 17 #include <linux/media-bus-format.h> 18 #include <malloc.h> 19 #include <video.h> 20 #include <video_rockchip.h> 21 #include <video_bridge.h> 22 #include <dm/device.h> 23 #include <dm/uclass-internal.h> 24 #include <asm/arch-rockchip/resource_img.h> 25 26 #include "bmp_helper.h" 27 #include "rockchip_display.h" 28 #include "rockchip_crtc.h" 29 #include "rockchip_connector.h" 30 #include "rockchip_bridge.h" 31 #include "rockchip_phy.h" 32 #include "rockchip_panel.h" 33 #include <dm.h> 34 #include <dm/of_access.h> 35 #include <dm/ofnode.h> 36 37 #define DRIVER_VERSION "v1.0.1" 38 39 /*********************************************************************** 40 * Rockchip UBOOT DRM driver version 41 * 42 * v1.0.0 : add basic version for rockchip drm driver(hjc) 43 * v1.0.1 : add much dsi update(hjc) 44 * 45 **********************************************************************/ 46 47 #define RK_BLK_SIZE 512 48 #define BMP_PROCESSED_FLAG 8399 49 50 DECLARE_GLOBAL_DATA_PTR; 51 static LIST_HEAD(rockchip_display_list); 52 static LIST_HEAD(logo_cache_list); 53 54 static unsigned long memory_start; 55 static unsigned long memory_end; 56 57 /* 58 * the phy types are used by different connectors in public. 59 * The current version only has inno hdmi phy for hdmi and tve. 60 */ 61 enum public_use_phy { 62 NONE, 63 INNO_HDMI_PHY 64 }; 65 66 /* save public phy data */ 67 struct public_phy_data { 68 const struct rockchip_phy *phy_drv; 69 int phy_node; 70 int public_phy_type; 71 bool phy_init; 72 }; 73 74 /* check which kind of public phy does connector use */ 75 static int check_public_use_phy(struct display_state *state) 76 { 77 int ret = NONE; 78 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 79 struct connector_state *conn_state = &state->conn_state; 80 81 if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 82 !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 83 ret = INNO_HDMI_PHY; 84 #endif 85 86 return ret; 87 } 88 89 /* 90 * get public phy driver and initialize it. 91 * The current version only has inno hdmi phy for hdmi and tve. 92 */ 93 static int get_public_phy(struct display_state *state, 94 struct public_phy_data *data) 95 { 96 struct connector_state *conn_state = &state->conn_state; 97 struct rockchip_phy *phy; 98 struct udevice *dev; 99 int ret = 0; 100 101 switch (data->public_phy_type) { 102 case INNO_HDMI_PHY: 103 #if defined(CONFIG_ROCKCHIP_RK3328) 104 ret = uclass_get_device_by_name(UCLASS_PHY, 105 "hdmiphy@ff430000", &dev); 106 #elif defined(CONFIG_ROCKCHIP_RK322X) 107 ret = uclass_get_device_by_name(UCLASS_PHY, 108 "hdmi-phy@12030000", &dev); 109 #else 110 ret = -EINVAL; 111 #endif 112 if (ret) { 113 printf("Warn: can't find phy driver\n"); 114 return 0; 115 } 116 117 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 118 if (!phy) { 119 printf("failed to get phy driver\n"); 120 return 0; 121 } 122 123 ret = rockchip_phy_init(phy); 124 if (ret) { 125 printf("failed to init phy driver\n"); 126 return ret; 127 } 128 conn_state->phy = phy; 129 130 debug("inno hdmi phy init success, save it\n"); 131 data->phy_drv = conn_state->phy; 132 data->phy_init = true; 133 return 0; 134 default: 135 return -EINVAL; 136 } 137 } 138 139 static void init_display_buffer(ulong base) 140 { 141 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 142 memory_end = memory_start; 143 } 144 145 static void *get_display_buffer(int size) 146 { 147 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 148 void *buf; 149 150 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 151 printf("failed to alloc %dbyte memory to display\n", size); 152 return NULL; 153 } 154 buf = (void *)roundup_memory; 155 156 memory_end = roundup_memory + size; 157 158 return buf; 159 } 160 161 static unsigned long get_display_size(void) 162 { 163 return memory_end - memory_start; 164 } 165 166 static bool can_direct_logo(int bpp) 167 { 168 return bpp == 24 || bpp == 32; 169 } 170 171 static int connector_phy_init(struct display_state *state, 172 struct public_phy_data *data) 173 { 174 struct connector_state *conn_state = &state->conn_state; 175 int type; 176 177 /* does this connector use public phy with others */ 178 type = check_public_use_phy(state); 179 if (type == INNO_HDMI_PHY) { 180 /* there is no public phy was initialized */ 181 if (!data->phy_init) { 182 debug("start get public phy\n"); 183 data->public_phy_type = type; 184 if (get_public_phy(state, data)) { 185 printf("can't find correct public phy type\n"); 186 free(data); 187 return -EINVAL; 188 } 189 return 0; 190 } 191 192 /* if this phy has been initialized, get it directly */ 193 conn_state->phy = (struct rockchip_phy *)data->phy_drv; 194 return 0; 195 } 196 197 return 0; 198 } 199 200 static int connector_panel_init(struct display_state *state) 201 { 202 struct connector_state *conn_state = &state->conn_state; 203 struct panel_state *panel_state = &state->panel_state; 204 const struct rockchip_panel *panel = panel_state->panel; 205 ofnode dsp_lut_node; 206 int ret, len; 207 208 if (!panel) 209 return 0; 210 211 dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 212 if (!ofnode_valid(dsp_lut_node)) { 213 debug("%s can not find dsp-lut node\n", __func__); 214 return 0; 215 } 216 217 ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 218 if (len > 0) { 219 conn_state->gamma.size = len / sizeof(u32); 220 conn_state->gamma.lut = malloc(len); 221 if (!conn_state->gamma.lut) { 222 printf("malloc gamma lut failed\n"); 223 return -ENOMEM; 224 } 225 ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 226 conn_state->gamma.lut, 227 conn_state->gamma.size); 228 if (ret) { 229 printf("Cannot decode gamma_lut\n"); 230 conn_state->gamma.lut = NULL; 231 return -EINVAL; 232 } 233 panel_state->dsp_lut_node = dsp_lut_node; 234 } 235 236 return 0; 237 } 238 239 int drm_mode_vrefresh(const struct drm_display_mode *mode) 240 { 241 int refresh = 0; 242 unsigned int calc_val; 243 244 if (mode->vrefresh > 0) { 245 refresh = mode->vrefresh; 246 } else if (mode->htotal > 0 && mode->vtotal > 0) { 247 int vtotal; 248 249 vtotal = mode->vtotal; 250 /* work out vrefresh the value will be x1000 */ 251 calc_val = (mode->clock * 1000); 252 calc_val /= mode->htotal; 253 refresh = (calc_val + vtotal / 2) / vtotal; 254 255 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 256 refresh *= 2; 257 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 258 refresh /= 2; 259 if (mode->vscan > 1) 260 refresh /= mode->vscan; 261 } 262 return refresh; 263 } 264 265 static int display_get_timing_from_dts(struct panel_state *panel_state, 266 struct drm_display_mode *mode) 267 { 268 struct rockchip_panel *panel = panel_state->panel; 269 int phandle; 270 int hactive, vactive, pixelclock; 271 int hfront_porch, hback_porch, hsync_len; 272 int vfront_porch, vback_porch, vsync_len; 273 int val, flags = 0; 274 ofnode timing, native_mode; 275 276 timing = dev_read_subnode(panel->dev, "display-timings"); 277 if (!ofnode_valid(timing)) 278 return -ENODEV; 279 280 native_mode = ofnode_find_subnode(timing, "timing"); 281 if (!ofnode_valid(native_mode)) { 282 phandle = ofnode_read_u32_default(timing, "native-mode", -1); 283 native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 284 if (!ofnode_valid(native_mode)) { 285 printf("failed to get display timings from DT\n"); 286 return -ENXIO; 287 } 288 } 289 290 #define FDT_GET_INT(val, name) \ 291 val = ofnode_read_s32_default(native_mode, name, -1); \ 292 if (val < 0) { \ 293 printf("Can't get %s\n", name); \ 294 return -ENXIO; \ 295 } 296 297 #define FDT_GET_INT_DEFAULT(val, name, default) \ 298 val = ofnode_read_s32_default(native_mode, name, default); 299 300 FDT_GET_INT(hactive, "hactive"); 301 FDT_GET_INT(vactive, "vactive"); 302 FDT_GET_INT(pixelclock, "clock-frequency"); 303 FDT_GET_INT(hsync_len, "hsync-len"); 304 FDT_GET_INT(hfront_porch, "hfront-porch"); 305 FDT_GET_INT(hback_porch, "hback-porch"); 306 FDT_GET_INT(vsync_len, "vsync-len"); 307 FDT_GET_INT(vfront_porch, "vfront-porch"); 308 FDT_GET_INT(vback_porch, "vback-porch"); 309 FDT_GET_INT(val, "hsync-active"); 310 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 311 FDT_GET_INT(val, "vsync-active"); 312 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 313 FDT_GET_INT(val, "pixelclk-active"); 314 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 315 316 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 317 if (val == DRM_MODE_FLAG_XMIRROR) { 318 flags |= DRM_MODE_FLAG_XMIRROR; 319 } else if (val == DRM_MODE_FLAG_YMIRROR) { 320 flags |= DRM_MODE_FLAG_YMIRROR; 321 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 322 flags |= DRM_MODE_FLAG_XMIRROR; 323 flags |= DRM_MODE_FLAG_YMIRROR; 324 } 325 mode->hdisplay = hactive; 326 mode->hsync_start = mode->hdisplay + hfront_porch; 327 mode->hsync_end = mode->hsync_start + hsync_len; 328 mode->htotal = mode->hsync_end + hback_porch; 329 330 mode->vdisplay = vactive; 331 mode->vsync_start = mode->vdisplay + vfront_porch; 332 mode->vsync_end = mode->vsync_start + vsync_len; 333 mode->vtotal = mode->vsync_end + vback_porch; 334 335 mode->clock = pixelclock / 1000; 336 mode->flags = flags; 337 338 return 0; 339 } 340 341 /** 342 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 343 * @p: mode 344 * @adjust_flags: a combination of adjustment flags 345 * 346 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 347 * 348 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 349 * interlaced modes. 350 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 351 * buffers containing two eyes (only adjust the timings when needed, eg. for 352 * "frame packing" or "side by side full"). 353 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 354 * be performed for doublescan and vscan > 1 modes respectively. 355 */ 356 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 357 { 358 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 359 return; 360 361 if (p->flags & DRM_MODE_FLAG_DBLCLK) 362 p->crtc_clock = 2 * p->clock; 363 else 364 p->crtc_clock = p->clock; 365 p->crtc_hdisplay = p->hdisplay; 366 p->crtc_hsync_start = p->hsync_start; 367 p->crtc_hsync_end = p->hsync_end; 368 p->crtc_htotal = p->htotal; 369 p->crtc_hskew = p->hskew; 370 p->crtc_vdisplay = p->vdisplay; 371 p->crtc_vsync_start = p->vsync_start; 372 p->crtc_vsync_end = p->vsync_end; 373 p->crtc_vtotal = p->vtotal; 374 375 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 376 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 377 p->crtc_vdisplay /= 2; 378 p->crtc_vsync_start /= 2; 379 p->crtc_vsync_end /= 2; 380 p->crtc_vtotal /= 2; 381 } 382 } 383 384 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 385 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 386 p->crtc_vdisplay *= 2; 387 p->crtc_vsync_start *= 2; 388 p->crtc_vsync_end *= 2; 389 p->crtc_vtotal *= 2; 390 } 391 } 392 393 if (!(adjust_flags & CRTC_NO_VSCAN)) { 394 if (p->vscan > 1) { 395 p->crtc_vdisplay *= p->vscan; 396 p->crtc_vsync_start *= p->vscan; 397 p->crtc_vsync_end *= p->vscan; 398 p->crtc_vtotal *= p->vscan; 399 } 400 } 401 402 if (adjust_flags & CRTC_STEREO_DOUBLE) { 403 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 404 405 switch (layout) { 406 case DRM_MODE_FLAG_3D_FRAME_PACKING: 407 p->crtc_clock *= 2; 408 p->crtc_vdisplay += p->crtc_vtotal; 409 p->crtc_vsync_start += p->crtc_vtotal; 410 p->crtc_vsync_end += p->crtc_vtotal; 411 p->crtc_vtotal += p->crtc_vtotal; 412 break; 413 } 414 } 415 416 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 417 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 418 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 419 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 420 } 421 422 /** 423 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 424 * output format 425 * 426 * @connector: drm connector under action. 427 * @mode: video mode to be tested. 428 * 429 * Returns: 430 * true if the mode can be supported in YCBCR420 format 431 * false if not. 432 */ 433 bool drm_mode_is_420_only(const struct drm_display_info *display, 434 struct drm_display_mode *mode) 435 { 436 u8 vic = drm_match_cea_mode(mode); 437 438 return test_bit(vic, display->hdmi.y420_vdb_modes); 439 } 440 441 /** 442 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 443 * output format also (along with RGB/YCBCR444/422) 444 * 445 * @display: display under action. 446 * @mode: video mode to be tested. 447 * 448 * Returns: 449 * true if the mode can be support YCBCR420 format 450 * false if not. 451 */ 452 bool drm_mode_is_420_also(const struct drm_display_info *display, 453 struct drm_display_mode *mode) 454 { 455 u8 vic = drm_match_cea_mode(mode); 456 457 return test_bit(vic, display->hdmi.y420_cmdb_modes); 458 } 459 460 /** 461 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 462 * output format 463 * 464 * @display: display under action. 465 * @mode: video mode to be tested. 466 * 467 * Returns: 468 * true if the mode can be supported in YCBCR420 format 469 * false if not. 470 */ 471 bool drm_mode_is_420(const struct drm_display_info *display, 472 struct drm_display_mode *mode) 473 { 474 return drm_mode_is_420_only(display, mode) || 475 drm_mode_is_420_also(display, mode); 476 } 477 478 static int display_get_timing(struct display_state *state) 479 { 480 struct connector_state *conn_state = &state->conn_state; 481 struct drm_display_mode *mode = &conn_state->mode; 482 const struct drm_display_mode *m; 483 struct panel_state *panel_state = &state->panel_state; 484 const struct rockchip_panel *panel = panel_state->panel; 485 486 if (dev_of_valid(panel->dev) && 487 !display_get_timing_from_dts(panel_state, mode)) { 488 printf("Using display timing dts\n"); 489 goto done; 490 } 491 492 if (panel->data) { 493 m = (const struct drm_display_mode *)panel->data; 494 memcpy(mode, m, sizeof(*m)); 495 printf("Using display timing from compatible panel driver\n"); 496 goto done; 497 } 498 499 printf("failed to find display timing\n"); 500 return -ENODEV; 501 done: 502 printf("Detailed mode clock %u kHz, flags[%x]\n" 503 " H: %04d %04d %04d %04d\n" 504 " V: %04d %04d %04d %04d\n" 505 "bus_format: %x\n", 506 mode->clock, mode->flags, 507 mode->hdisplay, mode->hsync_start, 508 mode->hsync_end, mode->htotal, 509 mode->vdisplay, mode->vsync_start, 510 mode->vsync_end, mode->vtotal, 511 conn_state->bus_format); 512 513 return 0; 514 } 515 516 static int display_init(struct display_state *state) 517 { 518 struct connector_state *conn_state = &state->conn_state; 519 struct panel_state *panel_state = &state->panel_state; 520 const struct rockchip_connector *conn = conn_state->connector; 521 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 522 struct crtc_state *crtc_state = &state->crtc_state; 523 struct rockchip_crtc *crtc = crtc_state->crtc; 524 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 525 struct drm_display_mode *mode = &conn_state->mode; 526 int bpc; 527 int ret = 0; 528 static bool __print_once = false; 529 530 if (!__print_once) { 531 __print_once = true; 532 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 533 } 534 535 if (state->is_init) 536 return 0; 537 538 if (!conn_funcs || !crtc_funcs) { 539 printf("failed to find connector or crtc functions\n"); 540 return -ENXIO; 541 } 542 543 if (panel_state->panel) 544 rockchip_panel_init(panel_state->panel); 545 546 if (conn_funcs->init) { 547 ret = conn_funcs->init(state); 548 if (ret) 549 goto deinit; 550 } 551 552 if (conn_state->phy) 553 rockchip_phy_init(conn_state->phy); 554 555 /* 556 * support hotplug, but not connect; 557 */ 558 #ifdef CONFIG_ROCKCHIP_DRM_TVE 559 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 560 printf("hdmi plugin ,skip tve\n"); 561 goto deinit; 562 } 563 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 564 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 565 printf("hdmi plugin ,skip tve\n"); 566 goto deinit; 567 } 568 #endif 569 if (conn_funcs->detect) { 570 ret = conn_funcs->detect(state); 571 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 572 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 573 crtc->hdmi_hpd = ret; 574 #endif 575 if (!ret) 576 goto deinit; 577 } 578 579 if (panel_state->panel) { 580 ret = display_get_timing(state); 581 } else if (conn_state->bridge) { 582 ret = video_bridge_read_edid(conn_state->bridge->dev, 583 conn_state->edid, EDID_SIZE); 584 if (ret > 0) { 585 ret = edid_get_drm_mode(conn_state->edid, ret, mode, 586 &bpc); 587 if (!ret) 588 edid_print_info((void *)&conn_state->edid); 589 } else { 590 ret = video_bridge_get_timing(conn_state->bridge->dev); 591 } 592 } else if (conn_funcs->get_timing) { 593 ret = conn_funcs->get_timing(state); 594 } else if (conn_funcs->get_edid) { 595 ret = conn_funcs->get_edid(state); 596 if (!ret) { 597 ret = edid_get_drm_mode((void *)&conn_state->edid, 598 sizeof(conn_state->edid), mode, 599 &bpc); 600 if (!ret) 601 edid_print_info((void *)&conn_state->edid); 602 } 603 } 604 605 if (ret) 606 goto deinit; 607 608 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 609 610 if (crtc_funcs->init) { 611 ret = crtc_funcs->init(state); 612 if (ret) 613 goto deinit; 614 } 615 state->is_init = 1; 616 617 return 0; 618 619 deinit: 620 if (conn_funcs->deinit) 621 conn_funcs->deinit(state); 622 return ret; 623 } 624 625 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 626 { 627 struct crtc_state *crtc_state = &state->crtc_state; 628 const struct rockchip_crtc *crtc = crtc_state->crtc; 629 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 630 int ret; 631 632 if (!state->is_init) 633 return -EINVAL; 634 635 if (crtc_funcs->send_mcu_cmd) { 636 ret = crtc_funcs->send_mcu_cmd(state, type, val); 637 if (ret) 638 return ret; 639 } 640 641 return 0; 642 } 643 644 static int display_set_plane(struct display_state *state) 645 { 646 struct crtc_state *crtc_state = &state->crtc_state; 647 const struct rockchip_crtc *crtc = crtc_state->crtc; 648 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 649 int ret; 650 651 if (!state->is_init) 652 return -EINVAL; 653 654 if (crtc_funcs->set_plane) { 655 ret = crtc_funcs->set_plane(state); 656 if (ret) 657 return ret; 658 } 659 660 return 0; 661 } 662 663 static int display_enable(struct display_state *state) 664 { 665 struct connector_state *conn_state = &state->conn_state; 666 const struct rockchip_connector *conn = conn_state->connector; 667 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 668 struct crtc_state *crtc_state = &state->crtc_state; 669 const struct rockchip_crtc *crtc = crtc_state->crtc; 670 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 671 struct panel_state *panel_state = &state->panel_state; 672 673 display_init(state); 674 675 if (!state->is_init) 676 return -EINVAL; 677 678 if (state->is_enable) 679 return 0; 680 681 if (crtc_funcs->prepare) 682 crtc_funcs->prepare(state); 683 684 if (conn_funcs->prepare) 685 conn_funcs->prepare(state); 686 687 if (conn_state->bridge) 688 rockchip_bridge_pre_enable(conn_state->bridge); 689 690 if (panel_state->panel) 691 rockchip_panel_prepare(panel_state->panel); 692 693 if (crtc_funcs->enable) 694 crtc_funcs->enable(state); 695 696 if (conn_funcs->enable) 697 conn_funcs->enable(state); 698 699 if (conn_state->bridge) 700 rockchip_bridge_enable(conn_state->bridge); 701 702 if (panel_state->panel) 703 rockchip_panel_enable(panel_state->panel); 704 705 state->is_enable = true; 706 707 return 0; 708 } 709 710 static int display_disable(struct display_state *state) 711 { 712 struct connector_state *conn_state = &state->conn_state; 713 const struct rockchip_connector *conn = conn_state->connector; 714 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 715 struct crtc_state *crtc_state = &state->crtc_state; 716 const struct rockchip_crtc *crtc = crtc_state->crtc; 717 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 718 struct panel_state *panel_state = &state->panel_state; 719 720 if (!state->is_init) 721 return 0; 722 723 if (!state->is_enable) 724 return 0; 725 726 if (panel_state->panel) 727 rockchip_panel_disable(panel_state->panel); 728 729 if (conn_state->bridge) 730 rockchip_bridge_disable(conn_state->bridge); 731 732 if (conn_funcs->disable) 733 conn_funcs->disable(state); 734 735 if (crtc_funcs->disable) 736 crtc_funcs->disable(state); 737 738 if (panel_state->panel) 739 rockchip_panel_unprepare(panel_state->panel); 740 741 if (conn_state->bridge) 742 rockchip_bridge_post_disable(conn_state->bridge); 743 744 if (conn_funcs->unprepare) 745 conn_funcs->unprepare(state); 746 747 state->is_enable = 0; 748 state->is_init = 0; 749 750 return 0; 751 } 752 753 static int display_logo(struct display_state *state) 754 { 755 struct crtc_state *crtc_state = &state->crtc_state; 756 struct connector_state *conn_state = &state->conn_state; 757 struct logo_info *logo = &state->logo; 758 int hdisplay, vdisplay; 759 760 display_init(state); 761 if (!state->is_init) 762 return -ENODEV; 763 764 switch (logo->bpp) { 765 case 16: 766 crtc_state->format = ROCKCHIP_FMT_RGB565; 767 break; 768 case 24: 769 crtc_state->format = ROCKCHIP_FMT_RGB888; 770 break; 771 case 32: 772 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 773 break; 774 default: 775 printf("can't support bmp bits[%d]\n", logo->bpp); 776 return -EINVAL; 777 } 778 crtc_state->rb_swap = logo->bpp != 32; 779 hdisplay = conn_state->mode.hdisplay; 780 vdisplay = conn_state->mode.vdisplay; 781 crtc_state->src_w = logo->width; 782 crtc_state->src_h = logo->height; 783 crtc_state->src_x = 0; 784 crtc_state->src_y = 0; 785 crtc_state->ymirror = logo->ymirror; 786 787 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 788 crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 789 790 if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 791 crtc_state->crtc_x = 0; 792 crtc_state->crtc_y = 0; 793 crtc_state->crtc_w = hdisplay; 794 crtc_state->crtc_h = vdisplay; 795 } else { 796 if (crtc_state->src_w >= hdisplay) { 797 crtc_state->crtc_x = 0; 798 crtc_state->crtc_w = hdisplay; 799 } else { 800 crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 801 crtc_state->crtc_w = crtc_state->src_w; 802 } 803 804 if (crtc_state->src_h >= vdisplay) { 805 crtc_state->crtc_y = 0; 806 crtc_state->crtc_h = vdisplay; 807 } else { 808 crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 809 crtc_state->crtc_h = crtc_state->src_h; 810 } 811 } 812 813 display_set_plane(state); 814 display_enable(state); 815 816 return 0; 817 } 818 819 static int get_crtc_id(ofnode connect) 820 { 821 int phandle; 822 struct device_node *remote; 823 int val; 824 825 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 826 if (phandle < 0) 827 goto err; 828 remote = of_find_node_by_phandle(phandle); 829 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 830 if (val < 0) 831 goto err; 832 833 return val; 834 err: 835 printf("Can't get crtc id, default set to id = 0\n"); 836 return 0; 837 } 838 839 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 840 { 841 ofnode mcu_node; 842 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 843 844 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 845 if (!ofnode_valid(mcu_node)) 846 return -ENODEV; 847 848 #define FDT_GET_MCU_INT(val, name) \ 849 do { \ 850 val = ofnode_read_s32_default(mcu_node, name, -1); \ 851 if (val < 0) { \ 852 printf("Can't get %s\n", name); \ 853 return -ENXIO; \ 854 } \ 855 } while (0) 856 857 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 858 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 859 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 860 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 861 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 862 863 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 864 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 865 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 866 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 867 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 868 869 return 0; 870 } 871 872 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 873 { 874 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 875 876 list_for_each_entry(tmp, &logo_cache_list, head) { 877 if (!strcmp(tmp->name, bmp)) { 878 logo_cache = tmp; 879 break; 880 } 881 } 882 883 if (!logo_cache) { 884 logo_cache = malloc(sizeof(*logo_cache)); 885 if (!logo_cache) { 886 printf("failed to alloc memory for logo cache\n"); 887 return NULL; 888 } 889 memset(logo_cache, 0, sizeof(*logo_cache)); 890 strcpy(logo_cache->name, bmp); 891 INIT_LIST_HEAD(&logo_cache->head); 892 list_add_tail(&logo_cache->head, &logo_cache_list); 893 } 894 895 return logo_cache; 896 } 897 898 /* Note: used only for rkfb kernel driver */ 899 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 900 { 901 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 902 void *dst = NULL; 903 int len, size; 904 struct bmp_header *header; 905 906 if (!logo || !bmp_name) 907 return -EINVAL; 908 909 header = malloc(RK_BLK_SIZE); 910 if (!header) 911 return -ENOMEM; 912 913 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 914 if (len != RK_BLK_SIZE) { 915 free(header); 916 return -EINVAL; 917 } 918 size = get_unaligned_le32(&header->file_size); 919 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 920 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 921 if (len != size) { 922 printf("failed to load bmp %s\n", bmp_name); 923 free(header); 924 return -ENOENT; 925 } 926 927 logo->mem = dst; 928 929 return 0; 930 #endif 931 } 932 933 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 934 { 935 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 936 struct rockchip_logo_cache *logo_cache; 937 struct bmp_header *header; 938 void *dst = NULL, *pdst; 939 int size, len; 940 int ret = 0; 941 int reserved = 0; 942 943 if (!logo || !bmp_name) 944 return -EINVAL; 945 logo_cache = find_or_alloc_logo_cache(bmp_name); 946 if (!logo_cache) 947 return -ENOMEM; 948 949 if (logo_cache->logo.mem) { 950 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 951 return 0; 952 } 953 954 header = malloc(RK_BLK_SIZE); 955 if (!header) 956 return -ENOMEM; 957 958 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 959 if (len != RK_BLK_SIZE) { 960 ret = -EINVAL; 961 goto free_header; 962 } 963 964 logo->bpp = get_unaligned_le16(&header->bit_count); 965 logo->width = get_unaligned_le32(&header->width); 966 logo->height = get_unaligned_le32(&header->height); 967 reserved = get_unaligned_le32(&header->reserved); 968 if (logo->height < 0) 969 logo->height = -logo->height; 970 size = get_unaligned_le32(&header->file_size); 971 if (!can_direct_logo(logo->bpp)) { 972 if (size > MEMORY_POOL_SIZE) { 973 printf("failed to use boot buf as temp bmp buffer\n"); 974 ret = -ENOMEM; 975 goto free_header; 976 } 977 pdst = get_display_buffer(size); 978 979 } else { 980 pdst = get_display_buffer(size); 981 dst = pdst; 982 } 983 984 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 985 if (len != size) { 986 printf("failed to load bmp %s\n", bmp_name); 987 ret = -ENOENT; 988 goto free_header; 989 } 990 991 if (!can_direct_logo(logo->bpp)) { 992 int dst_size; 993 /* 994 * TODO: force use 16bpp if bpp less than 16; 995 */ 996 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 997 dst_size = logo->width * logo->height * logo->bpp >> 3; 998 999 dst = get_display_buffer(dst_size); 1000 if (!dst) { 1001 ret = -ENOMEM; 1002 goto free_header; 1003 } 1004 if (bmpdecoder(pdst, dst, logo->bpp)) { 1005 printf("failed to decode bmp %s\n", bmp_name); 1006 ret = -EINVAL; 1007 goto free_header; 1008 } 1009 flush_dcache_range((ulong)dst, 1010 ALIGN((ulong)dst + dst_size, 1011 CONFIG_SYS_CACHELINE_SIZE)); 1012 1013 logo->offset = 0; 1014 logo->ymirror = 0; 1015 } else { 1016 logo->offset = get_unaligned_le32(&header->data_offset); 1017 if (reserved == BMP_PROCESSED_FLAG) 1018 logo->ymirror = 0; 1019 else 1020 logo->ymirror = 1; 1021 } 1022 logo->mem = dst; 1023 1024 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1025 1026 free_header: 1027 1028 free(header); 1029 1030 return ret; 1031 #else 1032 return -EINVAL; 1033 #endif 1034 } 1035 1036 void rockchip_show_fbbase(ulong fbbase) 1037 { 1038 struct display_state *s; 1039 1040 list_for_each_entry(s, &rockchip_display_list, head) { 1041 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1042 s->logo.mem = (char *)fbbase; 1043 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1044 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1045 s->logo.bpp = 32; 1046 s->logo.ymirror = 0; 1047 1048 display_logo(s); 1049 } 1050 } 1051 1052 int rockchip_show_bmp(const char *bmp) 1053 { 1054 struct display_state *s; 1055 int ret = 0; 1056 1057 if (!bmp) { 1058 list_for_each_entry(s, &rockchip_display_list, head) 1059 display_disable(s); 1060 return -ENOENT; 1061 } 1062 1063 list_for_each_entry(s, &rockchip_display_list, head) { 1064 s->logo.mode = s->charge_logo_mode; 1065 if (load_bmp_logo(&s->logo, bmp)) 1066 continue; 1067 ret = display_logo(s); 1068 } 1069 1070 return ret; 1071 } 1072 1073 int rockchip_show_logo(void) 1074 { 1075 struct display_state *s; 1076 int ret = 0; 1077 1078 list_for_each_entry(s, &rockchip_display_list, head) { 1079 s->logo.mode = s->logo_mode; 1080 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1081 printf("failed to display uboot logo\n"); 1082 else 1083 ret = display_logo(s); 1084 1085 /* Load kernel bmp in rockchip_display_fixup() later */ 1086 } 1087 1088 return ret; 1089 } 1090 1091 enum { 1092 PORT_DIR_IN, 1093 PORT_DIR_OUT, 1094 }; 1095 1096 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 1097 { 1098 ofnode panel_node, ports, port, ep; 1099 struct udevice *panel_dev; 1100 int ret; 1101 1102 panel_node = dev_read_subnode(dev, "panel"); 1103 if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 1104 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 1105 &panel_dev); 1106 if (!ret) 1107 goto found; 1108 } 1109 1110 ports = dev_read_subnode(dev, "ports"); 1111 if (!ofnode_valid(ports)) 1112 return NULL; 1113 1114 ofnode_for_each_subnode(port, ports) { 1115 u32 reg; 1116 1117 if (ofnode_read_u32(port, "reg", ®)) 1118 continue; 1119 1120 if (reg != PORT_DIR_OUT) 1121 continue; 1122 1123 ofnode_for_each_subnode(ep, port) { 1124 ofnode _ep, _port; 1125 uint phandle; 1126 1127 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1128 continue; 1129 1130 _ep = ofnode_get_by_phandle(phandle); 1131 if (!ofnode_valid(_ep)) 1132 continue; 1133 1134 _port = ofnode_get_parent(_ep); 1135 if (!ofnode_valid(_port)) 1136 continue; 1137 1138 panel_node = ofnode_get_parent(_port); 1139 if (!ofnode_valid(panel_node)) 1140 continue; 1141 1142 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 1143 panel_node, 1144 &panel_dev); 1145 if (!ret) 1146 goto found; 1147 } 1148 } 1149 1150 return NULL; 1151 1152 found: 1153 return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1154 } 1155 1156 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 1157 { 1158 ofnode node, ports, port, ep; 1159 struct udevice *dev; 1160 int ret; 1161 1162 ports = dev_read_subnode(conn_dev, "ports"); 1163 if (!ofnode_valid(ports)) 1164 return NULL; 1165 1166 ofnode_for_each_subnode(port, ports) { 1167 u32 reg; 1168 1169 if (ofnode_read_u32(port, "reg", ®)) 1170 continue; 1171 1172 if (reg != PORT_DIR_OUT) 1173 continue; 1174 1175 ofnode_for_each_subnode(ep, port) { 1176 ofnode _ep, _port, _ports; 1177 uint phandle; 1178 1179 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1180 continue; 1181 1182 _ep = ofnode_get_by_phandle(phandle); 1183 if (!ofnode_valid(_ep)) 1184 continue; 1185 1186 _port = ofnode_get_parent(_ep); 1187 if (!ofnode_valid(_port)) 1188 continue; 1189 1190 _ports = ofnode_get_parent(_port); 1191 if (!ofnode_valid(_ports)) 1192 continue; 1193 1194 node = ofnode_get_parent(_ports); 1195 if (!ofnode_valid(node)) 1196 continue; 1197 1198 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 1199 node, &dev); 1200 if (!ret) 1201 goto found; 1202 } 1203 } 1204 1205 return NULL; 1206 1207 found: 1208 return (struct rockchip_bridge *)dev_get_driver_data(dev); 1209 } 1210 1211 static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1212 { 1213 ofnode ep, port, ports, conn; 1214 uint phandle; 1215 struct udevice *dev; 1216 int ret; 1217 1218 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1219 return NULL; 1220 1221 ep = ofnode_get_by_phandle(phandle); 1222 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1223 return NULL; 1224 1225 port = ofnode_get_parent(ep); 1226 if (!ofnode_valid(port)) 1227 return NULL; 1228 1229 ports = ofnode_get_parent(port); 1230 if (!ofnode_valid(ports)) 1231 return NULL; 1232 1233 conn = ofnode_get_parent(ports); 1234 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1235 return NULL; 1236 1237 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1238 if (ret) 1239 return NULL; 1240 1241 return dev; 1242 } 1243 1244 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1245 { 1246 struct udevice *phy_dev; 1247 int ret; 1248 1249 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1250 if (ret) 1251 return NULL; 1252 1253 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1254 } 1255 1256 static int rockchip_display_probe(struct udevice *dev) 1257 { 1258 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1259 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1260 const void *blob = gd->fdt_blob; 1261 int phandle; 1262 struct udevice *crtc_dev, *conn_dev; 1263 struct rockchip_crtc *crtc; 1264 const struct rockchip_connector *conn; 1265 struct rockchip_panel *panel = NULL; 1266 struct rockchip_bridge *bridge = NULL; 1267 struct rockchip_phy *phy = NULL; 1268 struct display_state *s; 1269 const char *name; 1270 int ret; 1271 ofnode node, route_node; 1272 struct device_node *port_node, *vop_node, *ep_node; 1273 struct public_phy_data *data; 1274 1275 /* Before relocation we don't need to do anything */ 1276 if (!(gd->flags & GD_FLG_RELOC)) 1277 return 0; 1278 1279 data = malloc(sizeof(struct public_phy_data)); 1280 if (!data) { 1281 printf("failed to alloc phy data\n"); 1282 return -ENOMEM; 1283 } 1284 data->phy_init = false; 1285 1286 init_display_buffer(plat->base); 1287 1288 route_node = dev_read_subnode(dev, "route"); 1289 if (!ofnode_valid(route_node)) 1290 return -ENODEV; 1291 1292 ofnode_for_each_subnode(node, route_node) { 1293 if (!ofnode_is_available(node)) 1294 continue; 1295 phandle = ofnode_read_u32_default(node, "connect", -1); 1296 if (phandle < 0) { 1297 printf("Warn: can't find connect node's handle\n"); 1298 continue; 1299 } 1300 ep_node = of_find_node_by_phandle(phandle); 1301 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1302 printf("Warn: can't find endpoint node from phandle\n"); 1303 continue; 1304 } 1305 port_node = of_get_parent(ep_node); 1306 if (!ofnode_valid(np_to_ofnode(port_node))) { 1307 printf("Warn: can't find port node from phandle\n"); 1308 continue; 1309 } 1310 vop_node = of_get_parent(port_node); 1311 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1312 printf("Warn: can't find crtc node from phandle\n"); 1313 continue; 1314 } 1315 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1316 np_to_ofnode(vop_node), 1317 &crtc_dev); 1318 if (ret) { 1319 printf("Warn: can't find crtc driver %d\n", ret); 1320 continue; 1321 } 1322 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1323 1324 conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1325 if (!conn_dev) { 1326 printf("Warn: can't find connect driver\n"); 1327 continue; 1328 } 1329 1330 conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1331 1332 phy = rockchip_of_find_phy(conn_dev); 1333 1334 bridge = rockchip_of_find_bridge(conn_dev); 1335 if (bridge) 1336 panel = rockchip_of_find_panel(bridge->dev); 1337 else 1338 panel = rockchip_of_find_panel(conn_dev); 1339 1340 s = malloc(sizeof(*s)); 1341 if (!s) 1342 continue; 1343 1344 memset(s, 0, sizeof(*s)); 1345 1346 INIT_LIST_HEAD(&s->head); 1347 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1348 if (!ret) 1349 memcpy(s->ulogo_name, name, strlen(name)); 1350 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1351 if (!ret) 1352 memcpy(s->klogo_name, name, strlen(name)); 1353 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1354 if (!strcmp(name, "fullscreen")) 1355 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1356 else 1357 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1358 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1359 if (!strcmp(name, "fullscreen")) 1360 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1361 else 1362 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1363 1364 s->blob = blob; 1365 s->panel_state.panel = panel; 1366 s->conn_state.node = conn_dev->node; 1367 s->conn_state.dev = conn_dev; 1368 s->conn_state.connector = conn; 1369 s->conn_state.phy = phy; 1370 s->conn_state.bridge = bridge; 1371 s->conn_state.overscan.left_margin = 100; 1372 s->conn_state.overscan.right_margin = 100; 1373 s->conn_state.overscan.top_margin = 100; 1374 s->conn_state.overscan.bottom_margin = 100; 1375 s->crtc_state.node = np_to_ofnode(vop_node); 1376 s->crtc_state.dev = crtc_dev; 1377 s->crtc_state.crtc = crtc; 1378 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1379 s->node = node; 1380 1381 if (bridge) 1382 bridge->state = s; 1383 1384 if (panel) 1385 panel->state = s; 1386 1387 get_crtc_mcu_mode(&s->crtc_state); 1388 1389 ret = ofnode_read_u32_default(s->crtc_state.node, 1390 "rockchip,dual-channel-swap", 0); 1391 s->crtc_state.dual_channel_swap = ret; 1392 if (connector_panel_init(s)) { 1393 printf("Warn: Failed to init panel drivers\n"); 1394 free(s); 1395 continue; 1396 } 1397 1398 if (connector_phy_init(s, data)) { 1399 printf("Warn: Failed to init phy drivers\n"); 1400 free(s); 1401 continue; 1402 } 1403 list_add_tail(&s->head, &rockchip_display_list); 1404 } 1405 1406 if (list_empty(&rockchip_display_list)) { 1407 printf("Failed to found available display route\n"); 1408 return -ENODEV; 1409 } 1410 1411 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1412 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1413 uc_priv->bpix = VIDEO_BPP32; 1414 1415 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1416 rockchip_show_fbbase(plat->base); 1417 video_set_flush_dcache(dev, true); 1418 #endif 1419 1420 return 0; 1421 } 1422 1423 void rockchip_display_fixup(void *blob) 1424 { 1425 const struct rockchip_connector_funcs *conn_funcs; 1426 const struct rockchip_crtc_funcs *crtc_funcs; 1427 const struct rockchip_connector *conn; 1428 const struct rockchip_crtc *crtc; 1429 struct display_state *s; 1430 int offset; 1431 const struct device_node *np; 1432 const char *path; 1433 1434 if (!get_display_size()) 1435 return; 1436 1437 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1438 list_for_each_entry(s, &rockchip_display_list, head) 1439 load_bmp_logo(&s->logo, s->klogo_name); 1440 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1441 (u64)memory_start, 1442 (u64)get_display_size()); 1443 if (offset < 0) 1444 printf("failed to reserve drm-loader-logo memory\n"); 1445 } else { 1446 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1447 /* Compatible with rkfb display, only need reserve memory */ 1448 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1449 (u64)memory_start, 1450 MEMORY_POOL_SIZE); 1451 if (offset < 0) 1452 printf("failed to reserve fb-loader-logo memory\n"); 1453 else 1454 list_for_each_entry(s, &rockchip_display_list, head) 1455 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1456 return; 1457 } 1458 1459 list_for_each_entry(s, &rockchip_display_list, head) { 1460 conn = s->conn_state.connector; 1461 if (!conn) 1462 continue; 1463 conn_funcs = conn->funcs; 1464 if (!conn_funcs) { 1465 printf("failed to get exist connector\n"); 1466 continue; 1467 } 1468 1469 crtc = s->crtc_state.crtc; 1470 if (!crtc) 1471 continue; 1472 1473 crtc_funcs = crtc->funcs; 1474 if (!crtc_funcs) { 1475 printf("failed to get exist crtc\n"); 1476 continue; 1477 } 1478 1479 if (crtc_funcs->fixup_dts) 1480 crtc_funcs->fixup_dts(s, blob); 1481 1482 if (conn_funcs->fixup_dts) 1483 conn_funcs->fixup_dts(s, blob); 1484 1485 np = ofnode_to_np(s->node); 1486 path = np->full_name; 1487 fdt_increase_size(blob, 0x400); 1488 #define FDT_SET_U32(name, val) \ 1489 do_fixup_by_path_u32(blob, path, name, val, 1); 1490 1491 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 1492 - memory_start; 1493 FDT_SET_U32("logo,offset", offset); 1494 FDT_SET_U32("logo,width", s->logo.width); 1495 FDT_SET_U32("logo,height", s->logo.height); 1496 FDT_SET_U32("logo,bpp", s->logo.bpp); 1497 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 1498 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1499 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1500 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1501 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1502 FDT_SET_U32("video,vrefresh", 1503 drm_mode_vrefresh(&s->conn_state.mode)); 1504 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 1505 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 1506 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 1507 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 1508 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 1509 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1510 #undef FDT_SET_U32 1511 } 1512 } 1513 1514 int rockchip_display_bind(struct udevice *dev) 1515 { 1516 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1517 1518 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1519 1520 return 0; 1521 } 1522 1523 static const struct udevice_id rockchip_display_ids[] = { 1524 { .compatible = "rockchip,display-subsystem" }, 1525 { } 1526 }; 1527 1528 U_BOOT_DRIVER(rockchip_display) = { 1529 .name = "rockchip_display", 1530 .id = UCLASS_VIDEO, 1531 .of_match = rockchip_display_ids, 1532 .bind = rockchip_display_bind, 1533 .probe = rockchip_display_probe, 1534 }; 1535 1536 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 1537 char *const argv[]) 1538 { 1539 if (argc != 1) 1540 return CMD_RET_USAGE; 1541 1542 rockchip_show_logo(); 1543 1544 return 0; 1545 } 1546 1547 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 1548 char *const argv[]) 1549 { 1550 if (argc != 2) 1551 return CMD_RET_USAGE; 1552 1553 rockchip_show_bmp(argv[1]); 1554 1555 return 0; 1556 } 1557 1558 U_BOOT_CMD( 1559 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 1560 "load and display log from resource partition", 1561 NULL 1562 ); 1563 1564 U_BOOT_CMD( 1565 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 1566 "load and display bmp from resource partition", 1567 " <bmp_name>" 1568 ); 1569