1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 void *base_parameter_addr = (void *)&base_parameter; 156 157 for (i = 0; i < 8; i++) { 158 disp_header = &base_parameter.disp_header[i]; 159 if (disp_header->connector_type == type && 160 disp_header->connector_id == id) { 161 printf("disp info %d, type:%d, id:%d\n", i, type, id); 162 offset = disp_header->offset; 163 break; 164 } 165 } 166 167 if (offset < 0) 168 return NULL; 169 disp_info = base_parameter_addr + offset; 170 if (disp_info->screen_info[0].type != type || 171 disp_info->screen_info[0].id != id) { 172 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 173 disp_info->screen_info[0].type, 174 disp_info->screen_info[0].id); 175 return NULL; 176 } 177 178 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 179 return NULL; 180 181 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 182 183 if (crc_val != disp_info->crc) { 184 printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 185 return NULL; 186 } 187 188 return disp_info; 189 } 190 191 /* check which kind of public phy does connector use */ 192 static int check_public_use_phy(struct rockchip_connector *conn) 193 { 194 int ret = NONE; 195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 196 197 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 198 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 199 ret = INNO_HDMI_PHY; 200 #endif 201 202 return ret; 203 } 204 205 /* 206 * get public phy driver and initialize it. 207 * The current version only has inno hdmi phy for hdmi and tve. 208 */ 209 static int get_public_phy(struct rockchip_connector *conn, 210 struct public_phy_data *data) 211 { 212 struct rockchip_phy *phy; 213 struct udevice *dev; 214 int ret = 0; 215 216 switch (data->public_phy_type) { 217 case INNO_HDMI_PHY: 218 #if defined(CONFIG_ROCKCHIP_RK3328) 219 ret = uclass_get_device_by_name(UCLASS_PHY, 220 "hdmiphy@ff430000", &dev); 221 #elif defined(CONFIG_ROCKCHIP_RK322X) 222 ret = uclass_get_device_by_name(UCLASS_PHY, 223 "hdmi-phy@12030000", &dev); 224 #else 225 ret = -EINVAL; 226 #endif 227 if (ret) { 228 printf("Warn: can't find phy driver\n"); 229 return 0; 230 } 231 232 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 233 if (!phy) { 234 printf("failed to get phy driver\n"); 235 return 0; 236 } 237 238 ret = rockchip_phy_init(phy); 239 if (ret) { 240 printf("failed to init phy driver\n"); 241 return ret; 242 } 243 conn->phy = phy; 244 245 debug("inno hdmi phy init success, save it\n"); 246 data->phy_drv = conn->phy; 247 data->phy_init = true; 248 return 0; 249 default: 250 return -EINVAL; 251 } 252 } 253 254 static void init_display_buffer(ulong base) 255 { 256 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 257 memory_end = memory_start; 258 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 259 } 260 261 void *get_display_buffer(int size) 262 { 263 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 264 void *buf; 265 266 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 267 printf("failed to alloc %dbyte memory to display\n", size); 268 return NULL; 269 } 270 buf = (void *)roundup_memory; 271 272 memory_end = roundup_memory + size; 273 274 return buf; 275 } 276 277 static unsigned long get_display_size(void) 278 { 279 return memory_end - memory_start; 280 } 281 282 static unsigned long get_single_cubic_lut_size(void) 283 { 284 ulong cubic_lut_size; 285 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 286 287 /* This is depend on IC designed */ 288 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 289 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 290 291 return cubic_lut_size; 292 } 293 294 static unsigned long get_cubic_lut_offset(int crtc_id) 295 { 296 return crtc_id * get_single_cubic_lut_size(); 297 } 298 299 unsigned long get_cubic_lut_buffer(int crtc_id) 300 { 301 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 302 } 303 304 static unsigned long get_cubic_memory_size(void) 305 { 306 /* Max support 4 cubic lut */ 307 return get_single_cubic_lut_size() * 4; 308 } 309 310 bool can_direct_logo(int bpp) 311 { 312 return bpp == 16 || bpp == 32; 313 } 314 315 static int connector_phy_init(struct rockchip_connector *conn, 316 struct public_phy_data *data) 317 { 318 int type; 319 320 /* does this connector use public phy with others */ 321 type = check_public_use_phy(conn); 322 if (type == INNO_HDMI_PHY) { 323 /* there is no public phy was initialized */ 324 if (!data->phy_init) { 325 debug("start get public phy\n"); 326 data->public_phy_type = type; 327 if (get_public_phy(conn, data)) { 328 printf("can't find correct public phy type\n"); 329 free(data); 330 return -EINVAL; 331 } 332 return 0; 333 } 334 335 /* if this phy has been initialized, get it directly */ 336 conn->phy = (struct rockchip_phy *)data->phy_drv; 337 return 0; 338 } 339 340 return 0; 341 } 342 343 int drm_mode_vrefresh(const struct drm_display_mode *mode) 344 { 345 int refresh = 0; 346 unsigned int calc_val; 347 348 if (mode->vrefresh > 0) { 349 refresh = mode->vrefresh; 350 } else if (mode->htotal > 0 && mode->vtotal > 0) { 351 int vtotal; 352 353 vtotal = mode->vtotal; 354 /* work out vrefresh the value will be x1000 */ 355 calc_val = (mode->clock * 1000); 356 calc_val /= mode->htotal; 357 refresh = (calc_val + vtotal / 2) / vtotal; 358 359 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 360 refresh *= 2; 361 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 362 refresh /= 2; 363 if (mode->vscan > 1) 364 refresh /= mode->vscan; 365 } 366 return refresh; 367 } 368 369 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode) 370 { 371 int hactive, vactive, pixelclock; 372 int hfront_porch, hback_porch, hsync_len; 373 int vfront_porch, vback_porch, vsync_len; 374 int val, flags = 0; 375 376 #define FDT_GET_INT(val, name) \ 377 val = ofnode_read_s32_default(node, name, -1); \ 378 if (val < 0) { \ 379 printf("Can't get %s\n", name); \ 380 return -ENXIO; \ 381 } 382 383 #define FDT_GET_INT_DEFAULT(val, name, default) \ 384 val = ofnode_read_s32_default(node, name, default); 385 386 FDT_GET_INT(hactive, "hactive"); 387 FDT_GET_INT(vactive, "vactive"); 388 FDT_GET_INT(pixelclock, "clock-frequency"); 389 FDT_GET_INT(hsync_len, "hsync-len"); 390 FDT_GET_INT(hfront_porch, "hfront-porch"); 391 FDT_GET_INT(hback_porch, "hback-porch"); 392 FDT_GET_INT(vsync_len, "vsync-len"); 393 FDT_GET_INT(vfront_porch, "vfront-porch"); 394 FDT_GET_INT(vback_porch, "vback-porch"); 395 FDT_GET_INT(val, "hsync-active"); 396 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 397 FDT_GET_INT(val, "vsync-active"); 398 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 399 FDT_GET_INT(val, "pixelclk-active"); 400 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 401 402 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 403 if (val == DRM_MODE_FLAG_XMIRROR) { 404 flags |= DRM_MODE_FLAG_XMIRROR; 405 } else if (val == DRM_MODE_FLAG_YMIRROR) { 406 flags |= DRM_MODE_FLAG_YMIRROR; 407 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 408 flags |= DRM_MODE_FLAG_XMIRROR; 409 flags |= DRM_MODE_FLAG_YMIRROR; 410 } 411 mode->hdisplay = hactive; 412 mode->hsync_start = mode->hdisplay + hfront_porch; 413 mode->hsync_end = mode->hsync_start + hsync_len; 414 mode->htotal = mode->hsync_end + hback_porch; 415 416 mode->vdisplay = vactive; 417 mode->vsync_start = mode->vdisplay + vfront_porch; 418 mode->vsync_end = mode->vsync_start + vsync_len; 419 mode->vtotal = mode->vsync_end + vback_porch; 420 421 mode->clock = pixelclock / 1000; 422 mode->flags = flags; 423 mode->vrefresh = drm_mode_vrefresh(mode); 424 425 return 0; 426 } 427 428 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 429 { 430 int ret = 0; 431 432 ret = rockchip_ofnode_get_display_mode(node, mode); 433 434 if (ret) { 435 mode->clock = 74250; 436 mode->flags = 0x5; 437 mode->hdisplay = 1280; 438 mode->hsync_start = 1390; 439 mode->hsync_end = 1430; 440 mode->htotal = 1650; 441 mode->hskew = 0; 442 mode->vdisplay = 720; 443 mode->vsync_start = 725; 444 mode->vsync_end = 730; 445 mode->vtotal = 750; 446 mode->vrefresh = 60; 447 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 448 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 449 } 450 451 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 452 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 453 mode->vscan); 454 455 return 0; 456 } 457 458 static int display_get_timing_from_dts(struct rockchip_panel *panel, 459 struct drm_display_mode *mode) 460 { 461 struct ofnode_phandle_args args; 462 ofnode dt, timing; 463 int ret; 464 465 dt = dev_read_subnode(panel->dev, "display-timings"); 466 if (ofnode_valid(dt)) { 467 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 468 0, 0, &args); 469 if (ret) 470 return ret; 471 472 timing = args.node; 473 } else { 474 timing = dev_read_subnode(panel->dev, "panel-timing"); 475 } 476 477 if (!ofnode_valid(timing)) { 478 printf("failed to get display timings from DT\n"); 479 return -ENXIO; 480 } 481 482 rockchip_ofnode_get_display_mode(timing, mode); 483 484 return 0; 485 } 486 487 /** 488 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 489 * @edid_data: structure store mode list 490 * @max_output: vop max output resolution 491 */ 492 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 493 struct vop_rect *max_output) 494 { 495 int i; 496 497 for (i = 0; i < edid_data->modes; i++) { 498 if (edid_data->mode_buf[i].hdisplay > max_output->width || 499 edid_data->mode_buf[i].vdisplay > max_output->height) 500 edid_data->mode_buf[i].invalid = true; 501 } 502 } 503 504 /** 505 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 506 * @p: mode 507 * @adjust_flags: a combination of adjustment flags 508 * 509 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 510 * 511 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 512 * interlaced modes. 513 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 514 * buffers containing two eyes (only adjust the timings when needed, eg. for 515 * "frame packing" or "side by side full"). 516 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 517 * be performed for doublescan and vscan > 1 modes respectively. 518 */ 519 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 520 { 521 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 522 return; 523 524 if (p->flags & DRM_MODE_FLAG_DBLCLK) 525 p->crtc_clock = 2 * p->clock; 526 else 527 p->crtc_clock = p->clock; 528 p->crtc_hdisplay = p->hdisplay; 529 p->crtc_hsync_start = p->hsync_start; 530 p->crtc_hsync_end = p->hsync_end; 531 p->crtc_htotal = p->htotal; 532 p->crtc_hskew = p->hskew; 533 p->crtc_vdisplay = p->vdisplay; 534 p->crtc_vsync_start = p->vsync_start; 535 p->crtc_vsync_end = p->vsync_end; 536 p->crtc_vtotal = p->vtotal; 537 538 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 539 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 540 p->crtc_vdisplay /= 2; 541 p->crtc_vsync_start /= 2; 542 p->crtc_vsync_end /= 2; 543 p->crtc_vtotal /= 2; 544 } 545 } 546 547 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 548 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 549 p->crtc_vdisplay *= 2; 550 p->crtc_vsync_start *= 2; 551 p->crtc_vsync_end *= 2; 552 p->crtc_vtotal *= 2; 553 } 554 } 555 556 if (!(adjust_flags & CRTC_NO_VSCAN)) { 557 if (p->vscan > 1) { 558 p->crtc_vdisplay *= p->vscan; 559 p->crtc_vsync_start *= p->vscan; 560 p->crtc_vsync_end *= p->vscan; 561 p->crtc_vtotal *= p->vscan; 562 } 563 } 564 565 if (adjust_flags & CRTC_STEREO_DOUBLE) { 566 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 567 568 switch (layout) { 569 case DRM_MODE_FLAG_3D_FRAME_PACKING: 570 p->crtc_clock *= 2; 571 p->crtc_vdisplay += p->crtc_vtotal; 572 p->crtc_vsync_start += p->crtc_vtotal; 573 p->crtc_vsync_end += p->crtc_vtotal; 574 p->crtc_vtotal += p->crtc_vtotal; 575 break; 576 } 577 } 578 579 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 580 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 581 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 582 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 583 } 584 585 /** 586 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 587 * output format 588 * 589 * @connector: drm connector under action. 590 * @mode: video mode to be tested. 591 * 592 * Returns: 593 * true if the mode can be supported in YCBCR420 format 594 * false if not. 595 */ 596 bool drm_mode_is_420_only(const struct drm_display_info *display, 597 struct drm_display_mode *mode) 598 { 599 u8 vic = drm_match_cea_mode(mode); 600 601 return test_bit(vic, display->hdmi.y420_vdb_modes); 602 } 603 604 /** 605 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 606 * output format also (along with RGB/YCBCR444/422) 607 * 608 * @display: display under action. 609 * @mode: video mode to be tested. 610 * 611 * Returns: 612 * true if the mode can be support YCBCR420 format 613 * false if not. 614 */ 615 bool drm_mode_is_420_also(const struct drm_display_info *display, 616 struct drm_display_mode *mode) 617 { 618 u8 vic = drm_match_cea_mode(mode); 619 620 return test_bit(vic, display->hdmi.y420_cmdb_modes); 621 } 622 623 /** 624 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 625 * output format 626 * 627 * @display: display under action. 628 * @mode: video mode to be tested. 629 * 630 * Returns: 631 * true if the mode can be supported in YCBCR420 format 632 * false if not. 633 */ 634 bool drm_mode_is_420(const struct drm_display_info *display, 635 struct drm_display_mode *mode) 636 { 637 return drm_mode_is_420_only(display, mode) || 638 drm_mode_is_420_also(display, mode); 639 } 640 641 static int display_get_timing(struct display_state *state) 642 { 643 struct connector_state *conn_state = &state->conn_state; 644 struct drm_display_mode *mode = &conn_state->mode; 645 const struct drm_display_mode *m; 646 struct rockchip_panel *panel = conn_state->connector->panel; 647 648 if (panel->funcs->get_mode) 649 return panel->funcs->get_mode(panel, mode); 650 651 if (dev_of_valid(panel->dev) && 652 !display_get_timing_from_dts(panel, mode)) { 653 printf("Using display timing dts\n"); 654 return 0; 655 } 656 657 if (panel->data) { 658 m = (const struct drm_display_mode *)panel->data; 659 memcpy(mode, m, sizeof(*m)); 660 printf("Using display timing from compatible panel driver\n"); 661 return 0; 662 } 663 664 return -ENODEV; 665 } 666 667 static int display_pre_init(void) 668 { 669 struct display_state *state; 670 int ret = 0; 671 672 list_for_each_entry(state, &rockchip_display_list, head) { 673 struct connector_state *conn_state = &state->conn_state; 674 struct crtc_state *crtc_state = &state->crtc_state; 675 struct rockchip_crtc *crtc = crtc_state->crtc; 676 677 ret = rockchip_connector_pre_init(state); 678 if (ret) 679 printf("pre init conn error\n"); 680 681 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 682 } 683 return ret; 684 } 685 686 static int display_use_force_mode(struct display_state *state) 687 { 688 struct connector_state *conn_state = &state->conn_state; 689 struct drm_display_mode *mode = &conn_state->mode; 690 691 conn_state->bpc = 8; 692 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 693 conn_state->bus_format = state->force_bus_format; 694 695 return 0; 696 } 697 698 static int display_get_edid_mode(struct display_state *state) 699 { 700 int ret = 0; 701 struct connector_state *conn_state = &state->conn_state; 702 struct drm_display_mode *mode = &conn_state->mode; 703 int bpc; 704 705 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 706 if (!ret) { 707 conn_state->bpc = bpc; 708 edid_print_info((void *)&conn_state->edid); 709 } else { 710 conn_state->bpc = 8; 711 mode->clock = 74250; 712 mode->flags = 0x5; 713 mode->hdisplay = 1280; 714 mode->hsync_start = 1390; 715 mode->hsync_end = 1430; 716 mode->htotal = 1650; 717 mode->hskew = 0; 718 mode->vdisplay = 720; 719 mode->vsync_start = 725; 720 mode->vsync_end = 730; 721 mode->vtotal = 750; 722 mode->vrefresh = 60; 723 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 724 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 725 726 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 727 state->conn_state.connector->dev->name); 728 } 729 730 return ret; 731 } 732 733 static int display_init(struct display_state *state) 734 { 735 struct connector_state *conn_state = &state->conn_state; 736 struct rockchip_connector *conn = conn_state->connector; 737 struct crtc_state *crtc_state = &state->crtc_state; 738 struct rockchip_crtc *crtc = crtc_state->crtc; 739 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 740 struct drm_display_mode *mode = &conn_state->mode; 741 const char *compatible; 742 int ret = 0; 743 static bool __print_once = false; 744 745 if (!__print_once) { 746 __print_once = true; 747 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 748 } 749 750 if (state->is_init) 751 return 0; 752 753 if (!crtc_funcs) { 754 printf("failed to find crtc functions\n"); 755 return -ENXIO; 756 } 757 758 if (crtc_state->crtc->active && !crtc_state->ports_node && 759 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 760 sizeof(struct drm_display_mode))) { 761 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 762 crtc_state->dev->name, 763 crtc_state->crtc->active_mode.type, 764 crtc_state->crtc->active_mode.hdisplay, 765 crtc_state->crtc->active_mode.vdisplay, 766 crtc_state->crtc->active_mode.vrefresh); 767 return -ENODEV; 768 } 769 770 if (crtc_funcs->preinit) { 771 ret = crtc_funcs->preinit(state); 772 if (ret) 773 return ret; 774 } 775 776 ret = rockchip_connector_init(state); 777 if (ret) 778 goto deinit; 779 780 /* 781 * support hotplug, but not connect; 782 */ 783 #ifdef CONFIG_ROCKCHIP_DRM_TVE 784 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 785 printf("hdmi plugin ,skip tve\n"); 786 goto deinit; 787 } 788 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 789 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 790 printf("hdmi plugin ,skip tve\n"); 791 goto deinit; 792 } 793 #endif 794 795 ret = rockchip_connector_detect(state); 796 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 797 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 798 crtc->hdmi_hpd = ret; 799 #endif 800 if (!ret && !state->force_output) 801 goto deinit; 802 803 if (conn->panel) { 804 ret = display_get_timing(state); 805 if (!ret) 806 conn_state->bpc = conn->panel->bpc; 807 #if defined(CONFIG_I2C_EDID) 808 if (ret < 0 && conn->funcs->get_edid) { 809 rockchip_panel_prepare(conn->panel); 810 ret = conn->funcs->get_edid(conn, state); 811 if (!ret) 812 display_get_edid_mode(state); 813 } 814 #endif 815 } else if (conn->bridge) { 816 ret = video_bridge_read_edid(conn->bridge->dev, 817 conn_state->edid, EDID_SIZE); 818 if (ret > 0) { 819 #if defined(CONFIG_I2C_EDID) 820 display_get_edid_mode(state); 821 #endif 822 } else { 823 ret = video_bridge_get_timing(conn->bridge->dev); 824 } 825 } else if (conn->funcs->get_timing) { 826 ret = conn->funcs->get_timing(conn, state); 827 } else if (conn->funcs->get_edid) { 828 ret = conn->funcs->get_edid(conn, state); 829 #if defined(CONFIG_I2C_EDID) 830 if (!ret) 831 display_get_edid_mode(state); 832 #endif 833 } 834 835 if (!ret && conn_state->secondary) { 836 struct rockchip_connector *connector = conn_state->secondary; 837 838 if (connector->panel) { 839 if (connector->panel->funcs->get_mode) { 840 struct drm_display_mode *_mode = drm_mode_create(); 841 842 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 843 if (!ret && !drm_mode_equal(_mode, mode)) 844 ret = -EINVAL; 845 846 drm_mode_destroy(_mode); 847 } 848 } 849 } 850 851 if (ret && !state->force_output) 852 goto deinit; 853 if (state->force_output) 854 display_use_force_mode(state); 855 856 /* rk356x series drive mipi pixdata on posedge */ 857 compatible = dev_read_string(conn->dev, "compatible"); 858 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 859 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 860 861 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 862 " H: %04d %04d %04d %04d\n" 863 " V: %04d %04d %04d %04d\n" 864 "bus_format: %x\n", 865 conn->dev->name, 866 state->force_output ? "use force output" : "", 867 mode->clock, mode->flags, 868 mode->hdisplay, mode->hsync_start, 869 mode->hsync_end, mode->htotal, 870 mode->vdisplay, mode->vsync_start, 871 mode->vsync_end, mode->vtotal, 872 conn_state->bus_format); 873 874 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 875 876 if (conn_state->secondary) { 877 mode->crtc_clock *= 2; 878 mode->crtc_hdisplay *= 2; 879 mode->crtc_hsync_start *= 2; 880 mode->crtc_hsync_end *= 2; 881 mode->crtc_htotal *= 2; 882 } 883 884 if (conn->bridge) 885 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 886 887 if (crtc_funcs->init) { 888 ret = crtc_funcs->init(state); 889 if (ret) 890 goto deinit; 891 } 892 state->is_init = 1; 893 894 crtc_state->crtc->active = true; 895 memcpy(&crtc_state->crtc->active_mode, 896 &conn_state->mode, sizeof(struct drm_display_mode)); 897 898 return 0; 899 900 deinit: 901 rockchip_connector_deinit(state); 902 return ret; 903 } 904 905 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 906 { 907 struct crtc_state *crtc_state = &state->crtc_state; 908 const struct rockchip_crtc *crtc = crtc_state->crtc; 909 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 910 int ret; 911 912 if (!state->is_init) 913 return -EINVAL; 914 915 if (crtc_funcs->send_mcu_cmd) { 916 ret = crtc_funcs->send_mcu_cmd(state, type, val); 917 if (ret) 918 return ret; 919 } 920 921 return 0; 922 } 923 924 static int display_set_plane(struct display_state *state) 925 { 926 struct crtc_state *crtc_state = &state->crtc_state; 927 const struct rockchip_crtc *crtc = crtc_state->crtc; 928 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 929 int ret; 930 931 if (!state->is_init) 932 return -EINVAL; 933 934 if (crtc_funcs->set_plane) { 935 ret = crtc_funcs->set_plane(state); 936 if (ret) 937 return ret; 938 } 939 940 return 0; 941 } 942 943 static int display_enable(struct display_state *state) 944 { 945 struct crtc_state *crtc_state = &state->crtc_state; 946 const struct rockchip_crtc *crtc = crtc_state->crtc; 947 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 948 949 if (!state->is_init) 950 return -EINVAL; 951 952 if (state->is_enable) 953 return 0; 954 955 if (crtc_funcs->prepare) 956 crtc_funcs->prepare(state); 957 958 rockchip_connector_pre_enable(state); 959 960 if (crtc_funcs->enable) 961 crtc_funcs->enable(state); 962 963 rockchip_connector_enable(state); 964 965 state->is_enable = true; 966 967 return 0; 968 } 969 970 static int display_disable(struct display_state *state) 971 { 972 struct crtc_state *crtc_state = &state->crtc_state; 973 const struct rockchip_crtc *crtc = crtc_state->crtc; 974 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 975 976 if (!state->is_init) 977 return 0; 978 979 if (!state->is_enable) 980 return 0; 981 982 rockchip_connector_disable(state); 983 984 if (crtc_funcs->disable) 985 crtc_funcs->disable(state); 986 987 rockchip_connector_post_disable(state); 988 989 state->is_enable = 0; 990 state->is_init = 0; 991 992 return 0; 993 } 994 995 static int display_logo(struct display_state *state) 996 { 997 struct crtc_state *crtc_state = &state->crtc_state; 998 struct connector_state *conn_state = &state->conn_state; 999 struct logo_info *logo = &state->logo; 1000 int hdisplay, vdisplay, ret; 1001 1002 ret = display_init(state); 1003 if (!state->is_init || ret) 1004 return -ENODEV; 1005 1006 switch (logo->bpp) { 1007 case 16: 1008 crtc_state->format = ROCKCHIP_FMT_RGB565; 1009 break; 1010 case 24: 1011 crtc_state->format = ROCKCHIP_FMT_RGB888; 1012 break; 1013 case 32: 1014 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1015 break; 1016 default: 1017 printf("can't support bmp bits[%d]\n", logo->bpp); 1018 return -EINVAL; 1019 } 1020 hdisplay = conn_state->mode.crtc_hdisplay; 1021 vdisplay = conn_state->mode.crtc_vdisplay; 1022 crtc_state->src_rect.w = logo->width; 1023 crtc_state->src_rect.h = logo->height; 1024 crtc_state->src_rect.x = 0; 1025 crtc_state->src_rect.y = 0; 1026 crtc_state->ymirror = logo->ymirror; 1027 crtc_state->rb_swap = 0; 1028 1029 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1030 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1031 1032 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1033 crtc_state->crtc_rect.x = 0; 1034 crtc_state->crtc_rect.y = 0; 1035 crtc_state->crtc_rect.w = hdisplay; 1036 crtc_state->crtc_rect.h = vdisplay; 1037 } else { 1038 if (crtc_state->src_rect.w >= hdisplay) { 1039 crtc_state->crtc_rect.x = 0; 1040 crtc_state->crtc_rect.w = hdisplay; 1041 } else { 1042 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1043 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1044 } 1045 1046 if (crtc_state->src_rect.h >= vdisplay) { 1047 crtc_state->crtc_rect.y = 0; 1048 crtc_state->crtc_rect.h = vdisplay; 1049 } else { 1050 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1051 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1052 } 1053 } 1054 1055 display_set_plane(state); 1056 display_enable(state); 1057 1058 return 0; 1059 } 1060 1061 static int get_crtc_id(ofnode connect, bool is_ports_node) 1062 { 1063 struct device_node *port_node; 1064 struct device_node *remote; 1065 int phandle; 1066 int val; 1067 1068 if (is_ports_node) { 1069 port_node = of_get_parent(connect.np); 1070 if (!port_node) 1071 goto err; 1072 1073 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1074 if (val < 0) 1075 goto err; 1076 } else { 1077 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1078 if (phandle < 0) 1079 goto err; 1080 1081 remote = of_find_node_by_phandle(phandle); 1082 if (!remote) 1083 goto err; 1084 1085 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1086 if (val < 0) 1087 goto err; 1088 } 1089 1090 return val; 1091 err: 1092 printf("Can't get crtc id, default set to id = 0\n"); 1093 return 0; 1094 } 1095 1096 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1097 { 1098 ofnode mcu_node; 1099 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1100 1101 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1102 if (!ofnode_valid(mcu_node)) 1103 return -ENODEV; 1104 1105 #define FDT_GET_MCU_INT(val, name) \ 1106 do { \ 1107 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1108 if (val < 0) { \ 1109 printf("Can't get %s\n", name); \ 1110 return -ENXIO; \ 1111 } \ 1112 } while (0) 1113 1114 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1115 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1116 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1117 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1118 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1119 1120 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1121 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1122 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1123 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1124 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1125 1126 return 0; 1127 } 1128 1129 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1130 { 1131 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1132 1133 list_for_each_entry(tmp, &logo_cache_list, head) { 1134 if (!strcmp(tmp->name, bmp)) { 1135 logo_cache = tmp; 1136 break; 1137 } 1138 } 1139 1140 if (!logo_cache) { 1141 logo_cache = malloc(sizeof(*logo_cache)); 1142 if (!logo_cache) { 1143 printf("failed to alloc memory for logo cache\n"); 1144 return NULL; 1145 } 1146 memset(logo_cache, 0, sizeof(*logo_cache)); 1147 strcpy(logo_cache->name, bmp); 1148 INIT_LIST_HEAD(&logo_cache->head); 1149 list_add_tail(&logo_cache->head, &logo_cache_list); 1150 } 1151 1152 return logo_cache; 1153 } 1154 1155 /* Note: used only for rkfb kernel driver */ 1156 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1157 { 1158 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1159 void *dst = NULL; 1160 int len, size; 1161 struct bmp_header *header; 1162 1163 if (!logo || !bmp_name) 1164 return -EINVAL; 1165 1166 header = malloc(RK_BLK_SIZE); 1167 if (!header) 1168 return -ENOMEM; 1169 1170 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1171 if (len != RK_BLK_SIZE) { 1172 free(header); 1173 return -EINVAL; 1174 } 1175 size = get_unaligned_le32(&header->file_size); 1176 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1177 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1178 if (len != size) { 1179 printf("failed to load bmp %s\n", bmp_name); 1180 free(header); 1181 return -ENOENT; 1182 } 1183 1184 logo->mem = dst; 1185 #endif 1186 1187 return 0; 1188 } 1189 1190 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1191 { 1192 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1193 struct rockchip_logo_cache *logo_cache; 1194 struct bmp_header *header; 1195 void *dst = NULL, *pdst; 1196 int size, len; 1197 int ret = 0; 1198 int reserved = 0; 1199 int dst_size; 1200 1201 if (!logo || !bmp_name) 1202 return -EINVAL; 1203 logo_cache = find_or_alloc_logo_cache(bmp_name); 1204 if (!logo_cache) 1205 return -ENOMEM; 1206 1207 if (logo_cache->logo.mem) { 1208 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1209 return 0; 1210 } 1211 1212 header = malloc(RK_BLK_SIZE); 1213 if (!header) 1214 return -ENOMEM; 1215 1216 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1217 if (len != RK_BLK_SIZE) { 1218 ret = -EINVAL; 1219 goto free_header; 1220 } 1221 1222 logo->bpp = get_unaligned_le16(&header->bit_count); 1223 logo->width = get_unaligned_le32(&header->width); 1224 logo->height = get_unaligned_le32(&header->height); 1225 dst_size = logo->width * logo->height * logo->bpp >> 3; 1226 reserved = get_unaligned_le32(&header->reserved); 1227 if (logo->height < 0) 1228 logo->height = -logo->height; 1229 size = get_unaligned_le32(&header->file_size); 1230 if (!can_direct_logo(logo->bpp)) { 1231 if (size > MEMORY_POOL_SIZE) { 1232 printf("failed to use boot buf as temp bmp buffer\n"); 1233 ret = -ENOMEM; 1234 goto free_header; 1235 } 1236 pdst = get_display_buffer(size); 1237 1238 } else { 1239 pdst = get_display_buffer(size); 1240 dst = pdst; 1241 } 1242 1243 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1244 if (len != size) { 1245 printf("failed to load bmp %s\n", bmp_name); 1246 ret = -ENOENT; 1247 goto free_header; 1248 } 1249 1250 if (!can_direct_logo(logo->bpp)) { 1251 /* 1252 * TODO: force use 16bpp if bpp less than 16; 1253 */ 1254 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1255 dst_size = logo->width * logo->height * logo->bpp >> 3; 1256 dst = get_display_buffer(dst_size); 1257 if (!dst) { 1258 ret = -ENOMEM; 1259 goto free_header; 1260 } 1261 if (bmpdecoder(pdst, dst, logo->bpp)) { 1262 printf("failed to decode bmp %s\n", bmp_name); 1263 ret = -EINVAL; 1264 goto free_header; 1265 } 1266 1267 logo->offset = 0; 1268 logo->ymirror = 0; 1269 } else { 1270 logo->offset = get_unaligned_le32(&header->data_offset); 1271 if (reserved == BMP_PROCESSED_FLAG) 1272 logo->ymirror = 0; 1273 else 1274 logo->ymirror = 1; 1275 } 1276 logo->mem = dst; 1277 1278 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1279 1280 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1281 1282 free_header: 1283 1284 free(header); 1285 1286 return ret; 1287 #else 1288 return -EINVAL; 1289 #endif 1290 } 1291 1292 void rockchip_show_fbbase(ulong fbbase) 1293 { 1294 struct display_state *s; 1295 1296 list_for_each_entry(s, &rockchip_display_list, head) { 1297 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1298 s->logo.mem = (char *)fbbase; 1299 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1300 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1301 s->logo.bpp = 32; 1302 s->logo.ymirror = 0; 1303 1304 display_logo(s); 1305 } 1306 } 1307 1308 int rockchip_show_bmp(const char *bmp) 1309 { 1310 struct display_state *s; 1311 int ret = 0; 1312 1313 if (!bmp) { 1314 list_for_each_entry(s, &rockchip_display_list, head) 1315 display_disable(s); 1316 return -ENOENT; 1317 } 1318 1319 list_for_each_entry(s, &rockchip_display_list, head) { 1320 s->logo.mode = s->charge_logo_mode; 1321 if (load_bmp_logo(&s->logo, bmp)) 1322 continue; 1323 ret = display_logo(s); 1324 } 1325 1326 return ret; 1327 } 1328 1329 int rockchip_show_logo(void) 1330 { 1331 struct display_state *s; 1332 int ret = 0; 1333 1334 list_for_each_entry(s, &rockchip_display_list, head) { 1335 s->logo.mode = s->logo_mode; 1336 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1337 printf("failed to display uboot logo\n"); 1338 else 1339 ret = display_logo(s); 1340 1341 /* Load kernel bmp in rockchip_display_fixup() later */ 1342 } 1343 1344 return ret; 1345 } 1346 1347 enum { 1348 PORT_DIR_IN, 1349 PORT_DIR_OUT, 1350 }; 1351 1352 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1353 { 1354 ofnode ports, port; 1355 u32 reg; 1356 1357 ports = ofnode_find_subnode(node, "ports"); 1358 if (!ofnode_valid(ports)) 1359 return NULL; 1360 1361 ofnode_for_each_subnode(port, ports) { 1362 if (ofnode_read_u32(port, "reg", ®)) 1363 continue; 1364 1365 if (reg == id) 1366 break; 1367 } 1368 1369 if (reg == id) 1370 return ofnode_to_np(port); 1371 1372 return NULL; 1373 } 1374 1375 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1376 { 1377 ofnode parent; 1378 int is_ports_node; 1379 1380 parent = ofnode_get_parent(port); 1381 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1382 if (is_ports_node) 1383 parent = ofnode_get_parent(parent); 1384 1385 return ofnode_to_np(parent); 1386 } 1387 1388 static const struct device_node *rockchip_of_graph_get_remote_node(ofnode node, int port, 1389 int endpoint) 1390 { 1391 const struct device_node *port_node; 1392 ofnode ep; 1393 u32 reg; 1394 uint phandle; 1395 1396 port_node = rockchip_of_graph_get_port_by_id(node, port); 1397 if (!port_node) 1398 return NULL; 1399 1400 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1401 if (ofnode_read_u32(ep, "reg", ®)) 1402 break; 1403 if (reg == endpoint) 1404 break; 1405 } 1406 1407 if (!ofnode_valid(ep)) 1408 return NULL; 1409 1410 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1411 return NULL; 1412 1413 ep = ofnode_get_by_phandle(phandle); 1414 if (!ofnode_valid(ep)) 1415 return NULL; 1416 1417 return ofnode_to_np(ep); 1418 } 1419 1420 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1421 { 1422 const struct device_node *ep_node, *panel_node; 1423 ofnode panel_ofnode, port; 1424 struct udevice *panel_dev; 1425 int ret = 0; 1426 1427 *panel = NULL; 1428 panel_ofnode = dev_read_subnode(dev, "panel"); 1429 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1430 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1431 &panel_dev); 1432 if (!ret) 1433 goto found; 1434 } 1435 1436 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1437 if (!ep_node) 1438 return -ENODEV; 1439 1440 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1441 if (!ofnode_valid(port)) 1442 return -ENODEV; 1443 1444 panel_node = rockchip_of_graph_get_port_parent(port); 1445 if (!panel_node) 1446 return -ENODEV; 1447 1448 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1449 if (!ret) 1450 goto found; 1451 1452 return -ENODEV; 1453 1454 found: 1455 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1456 return 0; 1457 } 1458 1459 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1460 { 1461 const struct device_node *ep_node, *bridge_node; 1462 ofnode port; 1463 struct udevice *bridge_dev; 1464 int ret = 0; 1465 1466 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1467 if (!ep_node) 1468 return -ENODEV; 1469 1470 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1471 if (!ofnode_valid(port)) 1472 return -ENODEV; 1473 1474 bridge_node = rockchip_of_graph_get_port_parent(port); 1475 if (!bridge_node) 1476 return -ENODEV; 1477 1478 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1479 &bridge_dev); 1480 if (!ret) 1481 goto found; 1482 1483 return -ENODEV; 1484 1485 found: 1486 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1487 return 0; 1488 } 1489 1490 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1491 struct rockchip_bridge **bridge) 1492 { 1493 int ret = 0; 1494 *panel = NULL; 1495 *bridge = NULL; 1496 1497 if (panel) { 1498 ret = rockchip_of_find_panel(dev, panel); 1499 if (!ret) 1500 return 0; 1501 } 1502 1503 if (ret) { 1504 ret = rockchip_of_find_bridge(dev, bridge); 1505 if (!ret) 1506 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1507 &(*bridge)->next_bridge); 1508 } 1509 1510 return ret; 1511 } 1512 1513 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1514 { 1515 struct udevice *phy_dev; 1516 int ret; 1517 1518 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1519 if (ret) 1520 return NULL; 1521 1522 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1523 } 1524 1525 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1526 { 1527 ofnode ep, port, ports, conn; 1528 uint phandle; 1529 struct udevice *dev; 1530 int ret; 1531 1532 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1533 return NULL; 1534 1535 ep = ofnode_get_by_phandle(phandle); 1536 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1537 return NULL; 1538 1539 port = ofnode_get_parent(ep); 1540 if (!ofnode_valid(port)) 1541 return NULL; 1542 1543 ports = ofnode_get_parent(port); 1544 if (!ofnode_valid(ports)) 1545 return NULL; 1546 1547 conn = ofnode_get_parent(ports); 1548 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1549 return NULL; 1550 1551 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1552 if (ret) 1553 return NULL; 1554 1555 return dev; 1556 } 1557 1558 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1559 { 1560 struct rockchip_connector *conn; 1561 struct udevice *dev; 1562 int ret; 1563 1564 dev = rockchip_of_find_connector_device(endpoint); 1565 if (!dev) { 1566 printf("Warn: can't find connect driver\n"); 1567 return NULL; 1568 } 1569 1570 conn = get_rockchip_connector_by_device(dev); 1571 if (!conn) 1572 return NULL; 1573 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1574 if (ret) 1575 debug("Warn: no find panel or bridge\n"); 1576 1577 conn->phy = rockchip_of_find_phy(dev); 1578 1579 return conn; 1580 } 1581 1582 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1583 { 1584 char *conn_name; 1585 struct device_node *split_node; 1586 struct udevice *split_dev; 1587 struct rockchip_connector *split_conn; 1588 bool split_mode; 1589 int ret; 1590 1591 split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1592 if (!split_mode) 1593 return NULL; 1594 1595 switch (conn->type) { 1596 case DRM_MODE_CONNECTOR_DisplayPort: 1597 conn_name = "dp"; 1598 break; 1599 case DRM_MODE_CONNECTOR_eDP: 1600 conn_name = "edp"; 1601 break; 1602 case DRM_MODE_CONNECTOR_HDMIA: 1603 conn_name = "hdmi"; 1604 break; 1605 default: 1606 return NULL; 1607 } 1608 1609 split_node = of_alias_get_dev(conn_name, !conn->id); 1610 if (!split_node || !of_device_is_available(split_node)) 1611 return NULL; 1612 1613 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1614 if (ret) 1615 return NULL; 1616 1617 split_conn = get_rockchip_connector_by_device(split_dev); 1618 if (!split_conn) 1619 return NULL; 1620 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1621 if (ret) 1622 debug("Warn: no find panel or bridge\n"); 1623 1624 split_conn->phy = rockchip_of_find_phy(split_dev); 1625 1626 return split_conn; 1627 } 1628 1629 static bool rockchip_get_display_path_status(ofnode endpoint) 1630 { 1631 ofnode ep; 1632 uint phandle; 1633 1634 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1635 return false; 1636 1637 ep = ofnode_get_by_phandle(phandle); 1638 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1639 return false; 1640 1641 return true; 1642 } 1643 1644 #if defined(CONFIG_ROCKCHIP_RK3568) 1645 static int rockchip_display_fixup_dts(void *blob) 1646 { 1647 ofnode route_node, route_subnode, conn_ep, conn_port; 1648 const struct device_node *route_sub_devnode; 1649 const struct device_node *ep_node, *conn_ep_dev_node; 1650 u32 phandle; 1651 int conn_ep_offset; 1652 const char *route_sub_path, *path; 1653 1654 /* Don't go further if new variant after 1655 * reading PMUGRF_SOC_CON15 1656 */ 1657 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1658 return 0; 1659 1660 route_node = ofnode_path("/display-subsystem/route"); 1661 if (!ofnode_valid(route_node)) 1662 return -EINVAL; 1663 1664 ofnode_for_each_subnode(route_subnode, route_node) { 1665 if (!ofnode_is_available(route_subnode)) 1666 continue; 1667 1668 route_sub_devnode = ofnode_to_np(route_subnode); 1669 route_sub_path = route_sub_devnode->full_name; 1670 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1671 !strstr(ofnode_get_name(route_subnode), "edp")) 1672 return 0; 1673 1674 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1675 if (phandle < 0) { 1676 printf("Warn: can't find connect node's handle\n"); 1677 continue; 1678 } 1679 1680 ep_node = of_find_node_by_phandle(phandle); 1681 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1682 printf("Warn: can't find endpoint node from phandle\n"); 1683 continue; 1684 } 1685 1686 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1687 conn_ep = ofnode_get_by_phandle(phandle); 1688 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1689 return -ENODEV; 1690 1691 conn_port = ofnode_get_parent(conn_ep); 1692 if (!ofnode_valid(conn_port)) 1693 return -ENODEV; 1694 1695 ofnode_for_each_subnode(conn_ep, conn_port) { 1696 conn_ep_dev_node = ofnode_to_np(conn_ep); 1697 path = conn_ep_dev_node->full_name; 1698 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1699 conn_ep_offset = fdt_path_offset(blob, path); 1700 1701 if (!ofnode_is_available(conn_ep) && 1702 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1703 do_fixup_by_path_u32(blob, route_sub_path, 1704 "connect", phandle, 1); 1705 fdt_status_okay(blob, conn_ep_offset); 1706 1707 } else if (ofnode_is_available(conn_ep) && 1708 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1709 fdt_status_disabled(blob, conn_ep_offset); 1710 } 1711 } 1712 } 1713 1714 return 0; 1715 } 1716 #endif 1717 1718 static int rockchip_display_probe(struct udevice *dev) 1719 { 1720 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1721 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1722 const void *blob = gd->fdt_blob; 1723 int phandle; 1724 struct udevice *crtc_dev; 1725 struct rockchip_crtc *crtc; 1726 struct rockchip_connector *conn, *split_conn; 1727 struct display_state *s; 1728 const char *name; 1729 int ret; 1730 ofnode node, route_node, timing_node; 1731 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1732 struct public_phy_data *data; 1733 bool is_ports_node = false; 1734 1735 #if defined(CONFIG_ROCKCHIP_RK3568) 1736 rockchip_display_fixup_dts((void *)blob); 1737 #endif 1738 /* Before relocation we don't need to do anything */ 1739 if (!(gd->flags & GD_FLG_RELOC)) 1740 return 0; 1741 1742 data = malloc(sizeof(struct public_phy_data)); 1743 if (!data) { 1744 printf("failed to alloc phy data\n"); 1745 return -ENOMEM; 1746 } 1747 data->phy_init = false; 1748 1749 init_display_buffer(plat->base); 1750 1751 route_node = dev_read_subnode(dev, "route"); 1752 if (!ofnode_valid(route_node)) 1753 return -ENODEV; 1754 1755 ofnode_for_each_subnode(node, route_node) { 1756 if (!ofnode_is_available(node)) 1757 continue; 1758 phandle = ofnode_read_u32_default(node, "connect", -1); 1759 if (phandle < 0) { 1760 printf("Warn: can't find connect node's handle\n"); 1761 continue; 1762 } 1763 ep_node = of_find_node_by_phandle(phandle); 1764 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1765 printf("Warn: can't find endpoint node from phandle\n"); 1766 continue; 1767 } 1768 port_node = of_get_parent(ep_node); 1769 if (!ofnode_valid(np_to_ofnode(port_node))) { 1770 printf("Warn: can't find port node from phandle\n"); 1771 continue; 1772 } 1773 1774 port_parent_node = of_get_parent(port_node); 1775 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1776 printf("Warn: can't find port parent node from phandle\n"); 1777 continue; 1778 } 1779 1780 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1781 if (is_ports_node) { 1782 vop_node = of_get_parent(port_parent_node); 1783 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1784 printf("Warn: can't find crtc node from phandle\n"); 1785 continue; 1786 } 1787 } else { 1788 vop_node = port_parent_node; 1789 } 1790 1791 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1792 np_to_ofnode(vop_node), 1793 &crtc_dev); 1794 if (ret) { 1795 printf("Warn: can't find crtc driver %d\n", ret); 1796 continue; 1797 } 1798 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1799 1800 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 1801 if (!conn) { 1802 printf("Warn: can't get connect driver\n"); 1803 continue; 1804 } 1805 split_conn = rockchip_get_split_connector(conn); 1806 1807 s = malloc(sizeof(*s)); 1808 if (!s) 1809 continue; 1810 1811 memset(s, 0, sizeof(*s)); 1812 1813 INIT_LIST_HEAD(&s->head); 1814 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1815 if (!ret) 1816 memcpy(s->ulogo_name, name, strlen(name)); 1817 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1818 if (!ret) 1819 memcpy(s->klogo_name, name, strlen(name)); 1820 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1821 if (!strcmp(name, "fullscreen")) 1822 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1823 else 1824 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1825 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1826 if (!strcmp(name, "fullscreen")) 1827 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1828 else 1829 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1830 1831 s->force_output = ofnode_read_bool(node, "force-output"); 1832 1833 if (s->force_output) { 1834 timing_node = ofnode_find_subnode(node, "force_timing"); 1835 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1836 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1837 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1838 } 1839 1840 s->blob = blob; 1841 s->conn_state.connector = conn; 1842 s->conn_state.secondary = NULL; 1843 s->conn_state.type = conn->type; 1844 if (split_conn) { 1845 s->conn_state.secondary = split_conn; 1846 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 1847 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 1848 } 1849 s->conn_state.overscan.left_margin = 100; 1850 s->conn_state.overscan.right_margin = 100; 1851 s->conn_state.overscan.top_margin = 100; 1852 s->conn_state.overscan.bottom_margin = 100; 1853 s->crtc_state.node = np_to_ofnode(vop_node); 1854 s->crtc_state.dev = crtc_dev; 1855 s->crtc_state.crtc = crtc; 1856 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 1857 s->node = node; 1858 1859 if (is_ports_node) { /* only vop2 will get into here */ 1860 ofnode vp_node = np_to_ofnode(port_node); 1861 static bool get_plane_mask_from_dts; 1862 1863 s->crtc_state.ports_node = port_parent_node; 1864 if (!get_plane_mask_from_dts) { 1865 ofnode vp_sub_node; 1866 int vp_id = 0; 1867 bool vp_enable = false; 1868 1869 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1870 int cursor_plane = -1; 1871 1872 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 1873 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1874 1875 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 1876 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 1877 if (ret) { 1878 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 1879 s->crtc_state.crtc->assign_plane |= true; 1880 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 1881 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", -1); 1882 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 1883 vp_id, 1884 s->crtc_state.crtc->vps[vp_id].plane_mask, 1885 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 1886 cursor_plane); 1887 } 1888 1889 /* To check current vp status */ 1890 vp_enable = false; 1891 ofnode_for_each_subnode(vp_sub_node, vp_node) 1892 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 1893 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 1894 } 1895 get_plane_mask_from_dts = true; 1896 } 1897 } 1898 1899 get_crtc_mcu_mode(&s->crtc_state); 1900 1901 ret = ofnode_read_u32_default(s->crtc_state.node, 1902 "rockchip,dual-channel-swap", 0); 1903 s->crtc_state.dual_channel_swap = ret; 1904 1905 if (connector_phy_init(conn, data)) { 1906 printf("Warn: Failed to init phy drivers\n"); 1907 free(s); 1908 continue; 1909 } 1910 list_add_tail(&s->head, &rockchip_display_list); 1911 } 1912 1913 if (list_empty(&rockchip_display_list)) { 1914 debug("Failed to found available display route\n"); 1915 return -ENODEV; 1916 } 1917 rockchip_get_baseparameter(); 1918 display_pre_init(); 1919 1920 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1921 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1922 uc_priv->bpix = VIDEO_BPP32; 1923 1924 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1925 rockchip_show_fbbase(plat->base); 1926 video_set_flush_dcache(dev, true); 1927 #endif 1928 1929 return 0; 1930 } 1931 1932 void rockchip_display_fixup(void *blob) 1933 { 1934 const struct rockchip_connector_funcs *conn_funcs; 1935 const struct rockchip_crtc_funcs *crtc_funcs; 1936 struct rockchip_connector *conn; 1937 const struct rockchip_crtc *crtc; 1938 struct display_state *s; 1939 int offset; 1940 const struct device_node *np; 1941 const char *path; 1942 1943 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 1944 list_for_each_entry(s, &rockchip_display_list, head) 1945 load_bmp_logo(&s->logo, s->klogo_name); 1946 1947 if (!get_display_size()) 1948 return; 1949 1950 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1951 (u64)memory_start, 1952 (u64)get_display_size()); 1953 if (offset < 0) 1954 printf("failed to reserve drm-loader-logo memory\n"); 1955 1956 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 1957 (u64)cubic_lut_memory_start, 1958 (u64)get_cubic_memory_size()); 1959 if (offset < 0) 1960 printf("failed to reserve drm-cubic-lut memory\n"); 1961 } else { 1962 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1963 /* Compatible with rkfb display, only need reserve memory */ 1964 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1965 (u64)memory_start, 1966 MEMORY_POOL_SIZE); 1967 if (offset < 0) 1968 printf("failed to reserve fb-loader-logo memory\n"); 1969 else 1970 list_for_each_entry(s, &rockchip_display_list, head) 1971 load_kernel_bmp_logo(&s->logo, s->klogo_name); 1972 return; 1973 } 1974 1975 list_for_each_entry(s, &rockchip_display_list, head) { 1976 conn = s->conn_state.connector; 1977 if (!conn) 1978 continue; 1979 conn_funcs = conn->funcs; 1980 if (!conn_funcs) { 1981 printf("failed to get exist connector\n"); 1982 continue; 1983 } 1984 1985 if (s->conn_state.secondary) { 1986 s->conn_state.mode.clock *= 2; 1987 s->conn_state.mode.hdisplay *= 2; 1988 } 1989 1990 crtc = s->crtc_state.crtc; 1991 if (!crtc) 1992 continue; 1993 1994 crtc_funcs = crtc->funcs; 1995 if (!crtc_funcs) { 1996 printf("failed to get exist crtc\n"); 1997 continue; 1998 } 1999 2000 if (crtc_funcs->fixup_dts) 2001 crtc_funcs->fixup_dts(s, blob); 2002 2003 np = ofnode_to_np(s->node); 2004 path = np->full_name; 2005 fdt_increase_size(blob, 0x400); 2006 #define FDT_SET_U32(name, val) \ 2007 do_fixup_by_path_u32(blob, path, name, val, 1); 2008 2009 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2010 - memory_start; 2011 FDT_SET_U32("logo,offset", offset); 2012 FDT_SET_U32("logo,width", s->logo.width); 2013 FDT_SET_U32("logo,height", s->logo.height); 2014 FDT_SET_U32("logo,bpp", s->logo.bpp); 2015 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2016 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2017 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2018 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2019 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2020 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2021 FDT_SET_U32("video,vrefresh", 2022 drm_mode_vrefresh(&s->conn_state.mode)); 2023 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2024 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2025 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2026 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2027 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2028 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2029 2030 if (s->conn_state.disp_info) { 2031 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2032 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2033 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2034 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2035 } 2036 2037 if (s->conn_state.disp_info->cubic_lut_data.size && 2038 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2039 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2040 2041 #undef FDT_SET_U32 2042 } 2043 } 2044 2045 int rockchip_display_bind(struct udevice *dev) 2046 { 2047 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2048 2049 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2050 2051 return 0; 2052 } 2053 2054 static const struct udevice_id rockchip_display_ids[] = { 2055 { .compatible = "rockchip,display-subsystem" }, 2056 { } 2057 }; 2058 2059 U_BOOT_DRIVER(rockchip_display) = { 2060 .name = "rockchip_display", 2061 .id = UCLASS_VIDEO, 2062 .of_match = rockchip_display_ids, 2063 .bind = rockchip_display_bind, 2064 .probe = rockchip_display_probe, 2065 }; 2066 2067 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2068 char *const argv[]) 2069 { 2070 if (argc != 1) 2071 return CMD_RET_USAGE; 2072 2073 rockchip_show_logo(); 2074 2075 return 0; 2076 } 2077 2078 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2079 char *const argv[]) 2080 { 2081 if (argc != 2) 2082 return CMD_RET_USAGE; 2083 2084 rockchip_show_bmp(argv[1]); 2085 2086 return 0; 2087 } 2088 2089 U_BOOT_CMD( 2090 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2091 "load and display log from resource partition", 2092 NULL 2093 ); 2094 2095 U_BOOT_CMD( 2096 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2097 "load and display bmp from resource partition", 2098 " <bmp_name>" 2099 ); 2100