xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 6eff7620979a06c8c7afdc87d3f6aae1b0814cd0)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <config.h>
9 #include <common.h>
10 #include <errno.h>
11 #include <linux/libfdt.h>
12 #include <fdtdec.h>
13 #include <fdt_support.h>
14 #include <linux/hdmi.h>
15 #include <linux/list.h>
16 #include <linux/compat.h>
17 #include <linux/media-bus-format.h>
18 #include <malloc.h>
19 #include <video.h>
20 #include <video_rockchip.h>
21 #include <video_bridge.h>
22 #include <dm/device.h>
23 #include <dm/uclass-internal.h>
24 #include <asm/arch-rockchip/resource_img.h>
25 
26 #include "bmp_helper.h"
27 #include "rockchip_display.h"
28 #include "rockchip_crtc.h"
29 #include "rockchip_connector.h"
30 #include "rockchip_bridge.h"
31 #include "rockchip_phy.h"
32 #include "rockchip_panel.h"
33 #include <dm.h>
34 #include <dm/of_access.h>
35 #include <dm/ofnode.h>
36 #include <asm/io.h>
37 
38 #define DRIVER_VERSION	"v1.0.1"
39 
40 /***********************************************************************
41  *  Rockchip UBOOT DRM driver version
42  *
43  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
44  *  v1.0.1	: add much dsi update(hjc)
45  *
46  **********************************************************************/
47 
48 #define RK_BLK_SIZE 512
49 #define BMP_PROCESSED_FLAG 8399
50 
51 DECLARE_GLOBAL_DATA_PTR;
52 static LIST_HEAD(rockchip_display_list);
53 static LIST_HEAD(logo_cache_list);
54 
55 static unsigned long memory_start;
56 static unsigned long memory_end;
57 
58 /*
59  * the phy types are used by different connectors in public.
60  * The current version only has inno hdmi phy for hdmi and tve.
61  */
62 enum public_use_phy {
63 	NONE,
64 	INNO_HDMI_PHY
65 };
66 
67 /* save public phy data */
68 struct public_phy_data {
69 	const struct rockchip_phy *phy_drv;
70 	int phy_node;
71 	int public_phy_type;
72 	bool phy_init;
73 };
74 
75 /* check which kind of public phy does connector use */
76 static int check_public_use_phy(struct display_state *state)
77 {
78 	int ret = NONE;
79 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
80 	struct connector_state *conn_state = &state->conn_state;
81 
82 	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
83 	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
84 		ret = INNO_HDMI_PHY;
85 #endif
86 
87 	return ret;
88 }
89 
90 /*
91  * get public phy driver and initialize it.
92  * The current version only has inno hdmi phy for hdmi and tve.
93  */
94 static int get_public_phy(struct display_state *state,
95 			  struct public_phy_data *data)
96 {
97 	struct connector_state *conn_state = &state->conn_state;
98 	struct rockchip_phy *phy;
99 	struct udevice *dev;
100 	int ret = 0;
101 
102 	switch (data->public_phy_type) {
103 	case INNO_HDMI_PHY:
104 #if defined(CONFIG_ROCKCHIP_RK3328)
105 		ret = uclass_get_device_by_name(UCLASS_PHY,
106 						"hdmiphy@ff430000", &dev);
107 #elif defined(CONFIG_ROCKCHIP_RK322X)
108 		ret = uclass_get_device_by_name(UCLASS_PHY,
109 						"hdmi-phy@12030000", &dev);
110 #else
111 		ret = -EINVAL;
112 #endif
113 		if (ret) {
114 			printf("Warn: can't find phy driver\n");
115 			return 0;
116 		}
117 
118 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
119 		if (!phy) {
120 			printf("failed to get phy driver\n");
121 			return 0;
122 		}
123 
124 		ret = rockchip_phy_init(phy);
125 		if (ret) {
126 			printf("failed to init phy driver\n");
127 			return ret;
128 		}
129 		conn_state->phy = phy;
130 
131 		debug("inno hdmi phy init success, save it\n");
132 		data->phy_drv = conn_state->phy;
133 		data->phy_init = true;
134 		return 0;
135 	default:
136 		return -EINVAL;
137 	}
138 }
139 
140 static void init_display_buffer(ulong base)
141 {
142 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
143 	memory_end = memory_start;
144 }
145 
146 void *get_display_buffer(int size)
147 {
148 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
149 	void *buf;
150 
151 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
152 		printf("failed to alloc %dbyte memory to display\n", size);
153 		return NULL;
154 	}
155 	buf = (void *)roundup_memory;
156 
157 	memory_end = roundup_memory + size;
158 
159 	return buf;
160 }
161 
162 static unsigned long get_display_size(void)
163 {
164 	return memory_end - memory_start;
165 }
166 
167 bool can_direct_logo(int bpp)
168 {
169 	return bpp == 24 || bpp == 32;
170 }
171 
172 static int connector_phy_init(struct display_state *state,
173 			      struct public_phy_data *data)
174 {
175 	struct connector_state *conn_state = &state->conn_state;
176 	int type;
177 
178 	/* does this connector use public phy with others */
179 	type = check_public_use_phy(state);
180 	if (type == INNO_HDMI_PHY) {
181 		/* there is no public phy was initialized */
182 		if (!data->phy_init) {
183 			debug("start get public phy\n");
184 			data->public_phy_type = type;
185 			if (get_public_phy(state, data)) {
186 				printf("can't find correct public phy type\n");
187 				free(data);
188 				return -EINVAL;
189 			}
190 			return 0;
191 		}
192 
193 		/* if this phy has been initialized, get it directly */
194 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
195 		return 0;
196 	}
197 
198 	return 0;
199 }
200 
201 static int connector_panel_init(struct display_state *state)
202 {
203 	struct connector_state *conn_state = &state->conn_state;
204 	struct panel_state *panel_state = &state->panel_state;
205 	const struct rockchip_panel *panel = panel_state->panel;
206 	ofnode dsp_lut_node;
207 	int ret, len;
208 
209 	if (!panel)
210 		return 0;
211 
212 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
213 	if (!ofnode_valid(dsp_lut_node)) {
214 		debug("%s can not find dsp-lut node\n", __func__);
215 		return 0;
216 	}
217 
218 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
219 	if (len > 0) {
220 		conn_state->gamma.size = len / sizeof(u32);
221 		conn_state->gamma.lut = malloc(len);
222 		if (!conn_state->gamma.lut) {
223 			printf("malloc gamma lut failed\n");
224 			return -ENOMEM;
225 		}
226 		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
227 					    conn_state->gamma.lut,
228 					    conn_state->gamma.size);
229 		if (ret) {
230 			printf("Cannot decode gamma_lut\n");
231 			conn_state->gamma.lut = NULL;
232 			return -EINVAL;
233 		}
234 		panel_state->dsp_lut_node = dsp_lut_node;
235 	}
236 
237 	return 0;
238 }
239 
240 int drm_mode_vrefresh(const struct drm_display_mode *mode)
241 {
242 	int refresh = 0;
243 	unsigned int calc_val;
244 
245 	if (mode->vrefresh > 0) {
246 		refresh = mode->vrefresh;
247 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
248 		int vtotal;
249 
250 		vtotal = mode->vtotal;
251 		/* work out vrefresh the value will be x1000 */
252 		calc_val = (mode->clock * 1000);
253 		calc_val /= mode->htotal;
254 		refresh = (calc_val + vtotal / 2) / vtotal;
255 
256 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
257 			refresh *= 2;
258 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
259 			refresh /= 2;
260 		if (mode->vscan > 1)
261 			refresh /= mode->vscan;
262 	}
263 	return refresh;
264 }
265 
266 static int display_get_timing_from_dts(struct panel_state *panel_state,
267 				       struct drm_display_mode *mode)
268 {
269 	struct rockchip_panel *panel = panel_state->panel;
270 	int phandle;
271 	int hactive, vactive, pixelclock;
272 	int hfront_porch, hback_porch, hsync_len;
273 	int vfront_porch, vback_porch, vsync_len;
274 	int val, flags = 0;
275 	ofnode timing, native_mode;
276 
277 	timing = dev_read_subnode(panel->dev, "display-timings");
278 	if (!ofnode_valid(timing))
279 		return -ENODEV;
280 
281 	native_mode = ofnode_find_subnode(timing, "timing");
282 	if (!ofnode_valid(native_mode)) {
283 		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
284 		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
285 		if (!ofnode_valid(native_mode)) {
286 			printf("failed to get display timings from DT\n");
287 			return -ENXIO;
288 		}
289 	}
290 
291 #define FDT_GET_INT(val, name) \
292 	val = ofnode_read_s32_default(native_mode, name, -1); \
293 	if (val < 0) { \
294 		printf("Can't get %s\n", name); \
295 		return -ENXIO; \
296 	}
297 
298 #define FDT_GET_INT_DEFAULT(val, name, default) \
299 	val = ofnode_read_s32_default(native_mode, name, default);
300 
301 	FDT_GET_INT(hactive, "hactive");
302 	FDT_GET_INT(vactive, "vactive");
303 	FDT_GET_INT(pixelclock, "clock-frequency");
304 	FDT_GET_INT(hsync_len, "hsync-len");
305 	FDT_GET_INT(hfront_porch, "hfront-porch");
306 	FDT_GET_INT(hback_porch, "hback-porch");
307 	FDT_GET_INT(vsync_len, "vsync-len");
308 	FDT_GET_INT(vfront_porch, "vfront-porch");
309 	FDT_GET_INT(vback_porch, "vback-porch");
310 	FDT_GET_INT(val, "hsync-active");
311 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
312 	FDT_GET_INT(val, "vsync-active");
313 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
314 	FDT_GET_INT(val, "pixelclk-active");
315 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
316 
317 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
318 	if (val == DRM_MODE_FLAG_XMIRROR) {
319 		flags |= DRM_MODE_FLAG_XMIRROR;
320 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
321 		flags |= DRM_MODE_FLAG_YMIRROR;
322 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
323 		flags |= DRM_MODE_FLAG_XMIRROR;
324 		flags |= DRM_MODE_FLAG_YMIRROR;
325 	}
326 	mode->hdisplay = hactive;
327 	mode->hsync_start = mode->hdisplay + hfront_porch;
328 	mode->hsync_end = mode->hsync_start + hsync_len;
329 	mode->htotal = mode->hsync_end + hback_porch;
330 
331 	mode->vdisplay = vactive;
332 	mode->vsync_start = mode->vdisplay + vfront_porch;
333 	mode->vsync_end = mode->vsync_start + vsync_len;
334 	mode->vtotal = mode->vsync_end + vback_porch;
335 
336 	mode->clock = pixelclock / 1000;
337 	mode->flags = flags;
338 
339 	return 0;
340 }
341 
342 /**
343  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
344  * @edid_data: structure store mode list
345  * @max_output: vop max output resolution
346  */
347 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
348 				    struct vop_rect *max_output)
349 {
350 	int i;
351 
352 	for (i = 0; i < edid_data->modes; i++) {
353 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
354 		    edid_data->mode_buf[i].vdisplay > max_output->height)
355 			edid_data->mode_buf[i].invalid = true;
356 	}
357 }
358 
359 /**
360  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
361  * @p: mode
362  * @adjust_flags: a combination of adjustment flags
363  *
364  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
365  *
366  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
367  *   interlaced modes.
368  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
369  *   buffers containing two eyes (only adjust the timings when needed, eg. for
370  *   "frame packing" or "side by side full").
371  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
372  *   be performed for doublescan and vscan > 1 modes respectively.
373  */
374 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
375 {
376 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
377 		return;
378 
379 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
380 		p->crtc_clock = 2 * p->clock;
381 	else
382 		p->crtc_clock = p->clock;
383 	p->crtc_hdisplay = p->hdisplay;
384 	p->crtc_hsync_start = p->hsync_start;
385 	p->crtc_hsync_end = p->hsync_end;
386 	p->crtc_htotal = p->htotal;
387 	p->crtc_hskew = p->hskew;
388 	p->crtc_vdisplay = p->vdisplay;
389 	p->crtc_vsync_start = p->vsync_start;
390 	p->crtc_vsync_end = p->vsync_end;
391 	p->crtc_vtotal = p->vtotal;
392 
393 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
394 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
395 			p->crtc_vdisplay /= 2;
396 			p->crtc_vsync_start /= 2;
397 			p->crtc_vsync_end /= 2;
398 			p->crtc_vtotal /= 2;
399 		}
400 	}
401 
402 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
403 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
404 			p->crtc_vdisplay *= 2;
405 			p->crtc_vsync_start *= 2;
406 			p->crtc_vsync_end *= 2;
407 			p->crtc_vtotal *= 2;
408 		}
409 	}
410 
411 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
412 		if (p->vscan > 1) {
413 			p->crtc_vdisplay *= p->vscan;
414 			p->crtc_vsync_start *= p->vscan;
415 			p->crtc_vsync_end *= p->vscan;
416 			p->crtc_vtotal *= p->vscan;
417 		}
418 	}
419 
420 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
421 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
422 
423 		switch (layout) {
424 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
425 			p->crtc_clock *= 2;
426 			p->crtc_vdisplay += p->crtc_vtotal;
427 			p->crtc_vsync_start += p->crtc_vtotal;
428 			p->crtc_vsync_end += p->crtc_vtotal;
429 			p->crtc_vtotal += p->crtc_vtotal;
430 			break;
431 		}
432 	}
433 
434 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
435 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
436 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
437 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
438 }
439 
440 /**
441  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
442  * output format
443  *
444  * @connector: drm connector under action.
445  * @mode: video mode to be tested.
446  *
447  * Returns:
448  * true if the mode can be supported in YCBCR420 format
449  * false if not.
450  */
451 bool drm_mode_is_420_only(const struct drm_display_info *display,
452 			  struct drm_display_mode *mode)
453 {
454 	u8 vic = drm_match_cea_mode(mode);
455 
456 	return test_bit(vic, display->hdmi.y420_vdb_modes);
457 }
458 
459 /**
460  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
461  * output format also (along with RGB/YCBCR444/422)
462  *
463  * @display: display under action.
464  * @mode: video mode to be tested.
465  *
466  * Returns:
467  * true if the mode can be support YCBCR420 format
468  * false if not.
469  */
470 bool drm_mode_is_420_also(const struct drm_display_info *display,
471 			  struct drm_display_mode *mode)
472 {
473 	u8 vic = drm_match_cea_mode(mode);
474 
475 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
476 }
477 
478 /**
479  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
480  * output format
481  *
482  * @display: display under action.
483  * @mode: video mode to be tested.
484  *
485  * Returns:
486  * true if the mode can be supported in YCBCR420 format
487  * false if not.
488  */
489 bool drm_mode_is_420(const struct drm_display_info *display,
490 		     struct drm_display_mode *mode)
491 {
492 	return drm_mode_is_420_only(display, mode) ||
493 		drm_mode_is_420_also(display, mode);
494 }
495 
496 static int display_get_timing(struct display_state *state)
497 {
498 	struct connector_state *conn_state = &state->conn_state;
499 	struct drm_display_mode *mode = &conn_state->mode;
500 	const struct drm_display_mode *m;
501 	struct panel_state *panel_state = &state->panel_state;
502 	const struct rockchip_panel *panel = panel_state->panel;
503 
504 	if (dev_of_valid(panel->dev) &&
505 	    !display_get_timing_from_dts(panel_state, mode)) {
506 		printf("Using display timing dts\n");
507 		return 0;
508 	}
509 
510 	if (panel->data) {
511 		m = (const struct drm_display_mode *)panel->data;
512 		memcpy(mode, m, sizeof(*m));
513 		printf("Using display timing from compatible panel driver\n");
514 		return 0;
515 	}
516 
517 	return -ENODEV;
518 }
519 
520 static int display_pre_init(void)
521 {
522 	struct display_state *state;
523 	int ret = 0;
524 
525 	list_for_each_entry(state, &rockchip_display_list, head) {
526 		struct connector_state *conn_state = &state->conn_state;
527 		const struct rockchip_connector *conn = conn_state->connector;
528 		const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
529 		struct crtc_state *crtc_state = &state->crtc_state;
530 		struct rockchip_crtc *crtc = crtc_state->crtc;
531 
532 		if (conn_funcs->pre_init) {
533 			ret = conn_funcs->pre_init(state);
534 			if (ret)
535 				printf("pre init conn error\n");
536 		}
537 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
538 	}
539 	return ret;
540 }
541 
542 static int display_init(struct display_state *state)
543 {
544 	struct connector_state *conn_state = &state->conn_state;
545 	struct panel_state *panel_state = &state->panel_state;
546 	const struct rockchip_connector *conn = conn_state->connector;
547 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
548 	struct crtc_state *crtc_state = &state->crtc_state;
549 	struct rockchip_crtc *crtc = crtc_state->crtc;
550 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
551 	struct drm_display_mode *mode = &conn_state->mode;
552 	const char *compatible;
553 	int ret = 0;
554 	static bool __print_once = false;
555 #if defined(CONFIG_I2C_EDID)
556 	int bpc;
557 #endif
558 	if (!__print_once) {
559 		__print_once = true;
560 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
561 	}
562 
563 	if (state->is_init)
564 		return 0;
565 
566 	if (!conn_funcs || !crtc_funcs) {
567 		printf("failed to find connector or crtc functions\n");
568 		return -ENXIO;
569 	}
570 
571 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
572 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
573 		   sizeof(struct drm_display_mode))) {
574 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
575 			crtc_state->dev->name,
576 			crtc_state->crtc->active_mode.type,
577 			crtc_state->crtc->active_mode.hdisplay,
578 			crtc_state->crtc->active_mode.vdisplay,
579 			crtc_state->crtc->active_mode.vrefresh);
580 		return -ENODEV;
581 	}
582 
583 	if (crtc_funcs->preinit) {
584 		ret = crtc_funcs->preinit(state);
585 		if (ret)
586 			return ret;
587 	}
588 
589 	if (panel_state->panel)
590 		rockchip_panel_init(panel_state->panel);
591 
592 	if (conn_funcs->init) {
593 		ret = conn_funcs->init(state);
594 		if (ret)
595 			goto deinit;
596 	}
597 
598 	if (conn_state->phy)
599 		rockchip_phy_init(conn_state->phy);
600 
601 	/*
602 	 * support hotplug, but not connect;
603 	 */
604 #ifdef CONFIG_ROCKCHIP_DRM_TVE
605 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
606 		printf("hdmi plugin ,skip tve\n");
607 		goto deinit;
608 	}
609 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
610 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
611 		printf("hdmi plugin ,skip tve\n");
612 		goto deinit;
613 	}
614 #endif
615 	if (conn_funcs->detect) {
616 		ret = conn_funcs->detect(state);
617 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
618 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
619 			crtc->hdmi_hpd = ret;
620 #endif
621 		if (!ret)
622 			goto deinit;
623 	}
624 
625 	if (panel_state->panel) {
626 		ret = display_get_timing(state);
627 		if (!ret)
628 			conn_state->bpc = panel_state->panel->bpc;
629 #if defined(CONFIG_I2C_EDID)
630 		if (ret < 0 && conn_funcs->get_edid) {
631 			rockchip_panel_prepare(panel_state->panel);
632 
633 			ret = conn_funcs->get_edid(state);
634 			if (!ret) {
635 				ret = edid_get_drm_mode((void *)&conn_state->edid,
636 							sizeof(conn_state->edid),
637 							mode, &bpc);
638 				if (!ret) {
639 					conn_state->bpc = bpc;
640 					edid_print_info((void *)&conn_state->edid);
641 				}
642 			}
643 		}
644 #endif
645 	} else if (conn_state->bridge) {
646 		ret = video_bridge_read_edid(conn_state->bridge->dev,
647 					     conn_state->edid, EDID_SIZE);
648 		if (ret > 0) {
649 #if defined(CONFIG_I2C_EDID)
650 			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
651 						&bpc);
652 			if (!ret) {
653 				conn_state->bpc = bpc;
654 				edid_print_info((void *)&conn_state->edid);
655 			}
656 #endif
657 		} else {
658 			ret = video_bridge_get_timing(conn_state->bridge->dev);
659 		}
660 	} else if (conn_funcs->get_timing) {
661 		ret = conn_funcs->get_timing(state);
662 	} else if (conn_funcs->get_edid) {
663 		ret = conn_funcs->get_edid(state);
664 #if defined(CONFIG_I2C_EDID)
665 		if (!ret) {
666 			ret = edid_get_drm_mode((void *)&conn_state->edid,
667 						sizeof(conn_state->edid), mode,
668 						&bpc);
669 			if (!ret) {
670 				conn_state->bpc = bpc;
671 				edid_print_info((void *)&conn_state->edid);
672 			}
673 		}
674 #endif
675 	}
676 
677 	if (ret)
678 		goto deinit;
679 
680 	/* rk356x series drive mipi pixdata on posedge */
681 	compatible = dev_read_string(conn_state->dev, "compatible");
682 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
683 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
684 
685 	printf("Detailed mode clock %u kHz, flags[%x]\n"
686 	       "    H: %04d %04d %04d %04d\n"
687 	       "    V: %04d %04d %04d %04d\n"
688 	       "bus_format: %x\n",
689 	       mode->clock, mode->flags,
690 	       mode->hdisplay, mode->hsync_start,
691 	       mode->hsync_end, mode->htotal,
692 	       mode->vdisplay, mode->vsync_start,
693 	       mode->vsync_end, mode->vtotal,
694 	       conn_state->bus_format);
695 
696 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
697 
698 	if (conn_state->bridge)
699 		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
700 
701 	if (crtc_funcs->init) {
702 		ret = crtc_funcs->init(state);
703 		if (ret)
704 			goto deinit;
705 	}
706 	state->is_init = 1;
707 
708 	crtc_state->crtc->active = true;
709 	memcpy(&crtc_state->crtc->active_mode,
710 	       &conn_state->mode, sizeof(struct drm_display_mode));
711 
712 	return 0;
713 
714 deinit:
715 	if (conn_funcs->deinit)
716 		conn_funcs->deinit(state);
717 	return ret;
718 }
719 
720 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
721 {
722 	struct crtc_state *crtc_state = &state->crtc_state;
723 	const struct rockchip_crtc *crtc = crtc_state->crtc;
724 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
725 	int ret;
726 
727 	if (!state->is_init)
728 		return -EINVAL;
729 
730 	if (crtc_funcs->send_mcu_cmd) {
731 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
732 		if (ret)
733 			return ret;
734 	}
735 
736 	return 0;
737 }
738 
739 static int display_set_plane(struct display_state *state)
740 {
741 	struct crtc_state *crtc_state = &state->crtc_state;
742 	const struct rockchip_crtc *crtc = crtc_state->crtc;
743 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
744 	int ret;
745 
746 	if (!state->is_init)
747 		return -EINVAL;
748 
749 	if (crtc_funcs->set_plane) {
750 		ret = crtc_funcs->set_plane(state);
751 		if (ret)
752 			return ret;
753 	}
754 
755 	return 0;
756 }
757 
758 static int display_enable(struct display_state *state)
759 {
760 	struct connector_state *conn_state = &state->conn_state;
761 	const struct rockchip_connector *conn = conn_state->connector;
762 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
763 	struct crtc_state *crtc_state = &state->crtc_state;
764 	const struct rockchip_crtc *crtc = crtc_state->crtc;
765 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
766 	struct panel_state *panel_state = &state->panel_state;
767 
768 	if (!state->is_init)
769 		return -EINVAL;
770 
771 	if (state->is_enable)
772 		return 0;
773 
774 	if (crtc_funcs->prepare)
775 		crtc_funcs->prepare(state);
776 
777 	if (conn_funcs->prepare)
778 		conn_funcs->prepare(state);
779 
780 	if (conn_state->bridge)
781 		rockchip_bridge_pre_enable(conn_state->bridge);
782 
783 	if (panel_state->panel)
784 		rockchip_panel_prepare(panel_state->panel);
785 
786 	if (crtc_funcs->enable)
787 		crtc_funcs->enable(state);
788 
789 	if (conn_funcs->enable)
790 		conn_funcs->enable(state);
791 
792 	if (conn_state->bridge)
793 		rockchip_bridge_enable(conn_state->bridge);
794 
795 	if (panel_state->panel)
796 		rockchip_panel_enable(panel_state->panel);
797 
798 	state->is_enable = true;
799 
800 	return 0;
801 }
802 
803 static int display_disable(struct display_state *state)
804 {
805 	struct connector_state *conn_state = &state->conn_state;
806 	const struct rockchip_connector *conn = conn_state->connector;
807 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
808 	struct crtc_state *crtc_state = &state->crtc_state;
809 	const struct rockchip_crtc *crtc = crtc_state->crtc;
810 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
811 	struct panel_state *panel_state = &state->panel_state;
812 
813 	if (!state->is_init)
814 		return 0;
815 
816 	if (!state->is_enable)
817 		return 0;
818 
819 	if (panel_state->panel)
820 		rockchip_panel_disable(panel_state->panel);
821 
822 	if (conn_state->bridge)
823 		rockchip_bridge_disable(conn_state->bridge);
824 
825 	if (conn_funcs->disable)
826 		conn_funcs->disable(state);
827 
828 	if (crtc_funcs->disable)
829 		crtc_funcs->disable(state);
830 
831 	if (panel_state->panel)
832 		rockchip_panel_unprepare(panel_state->panel);
833 
834 	if (conn_state->bridge)
835 		rockchip_bridge_post_disable(conn_state->bridge);
836 
837 	if (conn_funcs->unprepare)
838 		conn_funcs->unprepare(state);
839 
840 	state->is_enable = 0;
841 	state->is_init = 0;
842 
843 	return 0;
844 }
845 
846 static int display_logo(struct display_state *state)
847 {
848 	struct crtc_state *crtc_state = &state->crtc_state;
849 	struct connector_state *conn_state = &state->conn_state;
850 	struct logo_info *logo = &state->logo;
851 	int hdisplay, vdisplay, ret;
852 
853 	ret = display_init(state);
854 	if (!state->is_init || ret)
855 		return -ENODEV;
856 
857 	switch (logo->bpp) {
858 	case 16:
859 		crtc_state->format = ROCKCHIP_FMT_RGB565;
860 		break;
861 	case 24:
862 		crtc_state->format = ROCKCHIP_FMT_RGB888;
863 		break;
864 	case 32:
865 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
866 		break;
867 	default:
868 		printf("can't support bmp bits[%d]\n", logo->bpp);
869 		return -EINVAL;
870 	}
871 	hdisplay = conn_state->mode.hdisplay;
872 	vdisplay = conn_state->mode.vdisplay;
873 	crtc_state->src_w = logo->width;
874 	crtc_state->src_h = logo->height;
875 	crtc_state->src_x = 0;
876 	crtc_state->src_y = 0;
877 	crtc_state->ymirror = logo->ymirror;
878 
879 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
880 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
881 
882 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
883 		crtc_state->crtc_x = 0;
884 		crtc_state->crtc_y = 0;
885 		crtc_state->crtc_w = hdisplay;
886 		crtc_state->crtc_h = vdisplay;
887 	} else {
888 		if (crtc_state->src_w >= hdisplay) {
889 			crtc_state->crtc_x = 0;
890 			crtc_state->crtc_w = hdisplay;
891 		} else {
892 			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
893 			crtc_state->crtc_w = crtc_state->src_w;
894 		}
895 
896 		if (crtc_state->src_h >= vdisplay) {
897 			crtc_state->crtc_y = 0;
898 			crtc_state->crtc_h = vdisplay;
899 		} else {
900 			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
901 			crtc_state->crtc_h = crtc_state->src_h;
902 		}
903 	}
904 
905 	display_set_plane(state);
906 	display_enable(state);
907 
908 	return 0;
909 }
910 
911 static int get_crtc_id(ofnode connect)
912 {
913 	int phandle;
914 	struct device_node *remote;
915 	int val;
916 
917 	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
918 	if (phandle < 0)
919 		goto err;
920 	remote = of_find_node_by_phandle(phandle);
921 	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
922 	if (val < 0)
923 		goto err;
924 
925 	return val;
926 err:
927 	printf("Can't get crtc id, default set to id = 0\n");
928 	return 0;
929 }
930 
931 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
932 {
933 	ofnode mcu_node;
934 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
935 
936 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
937 	if (!ofnode_valid(mcu_node))
938 		return -ENODEV;
939 
940 #define FDT_GET_MCU_INT(val, name) \
941 	do { \
942 		val = ofnode_read_s32_default(mcu_node, name, -1); \
943 		if (val < 0) { \
944 			printf("Can't get %s\n", name); \
945 			return -ENXIO; \
946 		} \
947 	} while (0)
948 
949 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
950 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
951 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
952 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
953 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
954 
955 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
956 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
957 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
958 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
959 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
960 
961 	return 0;
962 }
963 
964 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
965 {
966 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
967 
968 	list_for_each_entry(tmp, &logo_cache_list, head) {
969 		if (!strcmp(tmp->name, bmp)) {
970 			logo_cache = tmp;
971 			break;
972 		}
973 	}
974 
975 	if (!logo_cache) {
976 		logo_cache = malloc(sizeof(*logo_cache));
977 		if (!logo_cache) {
978 			printf("failed to alloc memory for logo cache\n");
979 			return NULL;
980 		}
981 		memset(logo_cache, 0, sizeof(*logo_cache));
982 		strcpy(logo_cache->name, bmp);
983 		INIT_LIST_HEAD(&logo_cache->head);
984 		list_add_tail(&logo_cache->head, &logo_cache_list);
985 	}
986 
987 	return logo_cache;
988 }
989 
990 /* Note: used only for rkfb kernel driver */
991 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
992 {
993 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
994 	void *dst = NULL;
995 	int len, size;
996 	struct bmp_header *header;
997 
998 	if (!logo || !bmp_name)
999 		return -EINVAL;
1000 
1001 	header = malloc(RK_BLK_SIZE);
1002 	if (!header)
1003 		return -ENOMEM;
1004 
1005 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1006 	if (len != RK_BLK_SIZE) {
1007 		free(header);
1008 		return -EINVAL;
1009 	}
1010 	size = get_unaligned_le32(&header->file_size);
1011 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1012 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1013 	if (len != size) {
1014 		printf("failed to load bmp %s\n", bmp_name);
1015 		free(header);
1016 		return -ENOENT;
1017 	}
1018 
1019 	logo->mem = dst;
1020 #endif
1021 
1022 	return 0;
1023 }
1024 
1025 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1026 {
1027 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1028 	struct rockchip_logo_cache *logo_cache;
1029 	struct bmp_header *header;
1030 	void *dst = NULL, *pdst;
1031 	int size, len;
1032 	int ret = 0;
1033 	int reserved = 0;
1034 
1035 	if (!logo || !bmp_name)
1036 		return -EINVAL;
1037 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1038 	if (!logo_cache)
1039 		return -ENOMEM;
1040 
1041 	if (logo_cache->logo.mem) {
1042 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1043 		return 0;
1044 	}
1045 
1046 	header = malloc(RK_BLK_SIZE);
1047 	if (!header)
1048 		return -ENOMEM;
1049 
1050 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1051 	if (len != RK_BLK_SIZE) {
1052 		ret = -EINVAL;
1053 		goto free_header;
1054 	}
1055 
1056 	logo->bpp = get_unaligned_le16(&header->bit_count);
1057 	logo->width = get_unaligned_le32(&header->width);
1058 	logo->height = get_unaligned_le32(&header->height);
1059 	reserved = get_unaligned_le32(&header->reserved);
1060 	if (logo->height < 0)
1061 	    logo->height = -logo->height;
1062 	size = get_unaligned_le32(&header->file_size);
1063 	if (!can_direct_logo(logo->bpp)) {
1064 		if (size > MEMORY_POOL_SIZE) {
1065 			printf("failed to use boot buf as temp bmp buffer\n");
1066 			ret = -ENOMEM;
1067 			goto free_header;
1068 		}
1069 		pdst = get_display_buffer(size);
1070 
1071 	} else {
1072 		pdst = get_display_buffer(size);
1073 		dst = pdst;
1074 	}
1075 
1076 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1077 	if (len != size) {
1078 		printf("failed to load bmp %s\n", bmp_name);
1079 		ret = -ENOENT;
1080 		goto free_header;
1081 	}
1082 
1083 	if (!can_direct_logo(logo->bpp)) {
1084 		int dst_size;
1085 		/*
1086 		 * TODO: force use 16bpp if bpp less than 16;
1087 		 */
1088 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1089 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1090 
1091 		dst = get_display_buffer(dst_size);
1092 		if (!dst) {
1093 			ret = -ENOMEM;
1094 			goto free_header;
1095 		}
1096 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1097 			printf("failed to decode bmp %s\n", bmp_name);
1098 			ret = -EINVAL;
1099 			goto free_header;
1100 		}
1101 		flush_dcache_range((ulong)dst,
1102 				   ALIGN((ulong)dst + dst_size,
1103 					 CONFIG_SYS_CACHELINE_SIZE));
1104 
1105 		logo->offset = 0;
1106 		logo->ymirror = 0;
1107 	} else {
1108 		logo->offset = get_unaligned_le32(&header->data_offset);
1109 		if (reserved == BMP_PROCESSED_FLAG)
1110 			logo->ymirror = 0;
1111 		else
1112 			logo->ymirror = 1;
1113 	}
1114 	logo->mem = dst;
1115 
1116 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1117 
1118 free_header:
1119 
1120 	free(header);
1121 
1122 	return ret;
1123 #else
1124 	return -EINVAL;
1125 #endif
1126 }
1127 
1128 void rockchip_show_fbbase(ulong fbbase)
1129 {
1130 	struct display_state *s;
1131 
1132 	list_for_each_entry(s, &rockchip_display_list, head) {
1133 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1134 		s->logo.mem = (char *)fbbase;
1135 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1136 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1137 		s->logo.bpp = 32;
1138 		s->logo.ymirror = 0;
1139 
1140 		display_logo(s);
1141 	}
1142 }
1143 
1144 int rockchip_show_bmp(const char *bmp)
1145 {
1146 	struct display_state *s;
1147 	int ret = 0;
1148 
1149 	if (!bmp) {
1150 		list_for_each_entry(s, &rockchip_display_list, head)
1151 			display_disable(s);
1152 		return -ENOENT;
1153 	}
1154 
1155 	list_for_each_entry(s, &rockchip_display_list, head) {
1156 		s->logo.mode = s->charge_logo_mode;
1157 		if (load_bmp_logo(&s->logo, bmp))
1158 			continue;
1159 		ret = display_logo(s);
1160 	}
1161 
1162 	return ret;
1163 }
1164 
1165 int rockchip_show_logo(void)
1166 {
1167 	struct display_state *s;
1168 	int ret = 0;
1169 
1170 	list_for_each_entry(s, &rockchip_display_list, head) {
1171 		s->logo.mode = s->logo_mode;
1172 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1173 			printf("failed to display uboot logo\n");
1174 		else
1175 			ret = display_logo(s);
1176 
1177 		/* Load kernel bmp in rockchip_display_fixup() later */
1178 	}
1179 
1180 	return ret;
1181 }
1182 
1183 enum {
1184 	PORT_DIR_IN,
1185 	PORT_DIR_OUT,
1186 };
1187 
1188 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
1189 {
1190 	ofnode panel_node, ports, port, ep, port_parent_node;
1191 	struct udevice *panel_dev;
1192 	int ret;
1193 
1194 	panel_node = dev_read_subnode(dev, "panel");
1195 	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
1196 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
1197 						  &panel_dev);
1198 		if (!ret)
1199 			goto found;
1200 	}
1201 
1202 	ports = dev_read_subnode(dev, "ports");
1203 	if (!ofnode_valid(ports))
1204 		return NULL;
1205 
1206 	ofnode_for_each_subnode(port, ports) {
1207 		u32 reg;
1208 
1209 		if (ofnode_read_u32(port, "reg", &reg))
1210 			continue;
1211 
1212 		if (reg != PORT_DIR_OUT)
1213 			continue;
1214 
1215 		ofnode_for_each_subnode(ep, port) {
1216 			ofnode _ep, _port;
1217 			uint phandle;
1218 			bool is_ports_node = false;
1219 
1220 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1221 				continue;
1222 
1223 			_ep = ofnode_get_by_phandle(phandle);
1224 			if (!ofnode_valid(_ep))
1225 				continue;
1226 
1227 			_port = ofnode_get_parent(_ep);
1228 			if (!ofnode_valid(_port))
1229 				continue;
1230 
1231 			port_parent_node = ofnode_get_parent(_port);
1232 			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
1233 			if (is_ports_node)
1234 				panel_node = ofnode_get_parent(port_parent_node);
1235 			else
1236 				panel_node = ofnode_get_parent(_port);
1237 			if (!ofnode_valid(panel_node))
1238 				continue;
1239 
1240 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
1241 							  panel_node,
1242 							  &panel_dev);
1243 			if (!ret)
1244 				goto found;
1245 		}
1246 	}
1247 
1248 	return NULL;
1249 
1250 found:
1251 	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1252 }
1253 
1254 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
1255 {
1256 	ofnode node, ports, port, ep;
1257 	struct udevice *dev;
1258 	int ret;
1259 
1260 	ports = dev_read_subnode(conn_dev, "ports");
1261 	if (!ofnode_valid(ports))
1262 		return NULL;
1263 
1264 	ofnode_for_each_subnode(port, ports) {
1265 		u32 reg;
1266 
1267 		if (ofnode_read_u32(port, "reg", &reg))
1268 			continue;
1269 
1270 		if (reg != PORT_DIR_OUT)
1271 			continue;
1272 
1273 		ofnode_for_each_subnode(ep, port) {
1274 			ofnode _ep, _port, _ports;
1275 			uint phandle;
1276 
1277 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1278 				continue;
1279 
1280 			_ep = ofnode_get_by_phandle(phandle);
1281 			if (!ofnode_valid(_ep))
1282 				continue;
1283 
1284 			_port = ofnode_get_parent(_ep);
1285 			if (!ofnode_valid(_port))
1286 				continue;
1287 
1288 			_ports = ofnode_get_parent(_port);
1289 			if (!ofnode_valid(_ports))
1290 				continue;
1291 
1292 			node = ofnode_get_parent(_ports);
1293 			if (!ofnode_valid(node))
1294 				continue;
1295 
1296 			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
1297 							  node, &dev);
1298 			if (!ret)
1299 				goto found;
1300 		}
1301 	}
1302 
1303 	return NULL;
1304 
1305 found:
1306 	return (struct rockchip_bridge *)dev_get_driver_data(dev);
1307 }
1308 
1309 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
1310 {
1311 	ofnode ep, port, ports, conn;
1312 	uint phandle;
1313 	struct udevice *dev;
1314 	int ret;
1315 
1316 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1317 		return NULL;
1318 
1319 	ep = ofnode_get_by_phandle(phandle);
1320 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1321 		return NULL;
1322 
1323 	port = ofnode_get_parent(ep);
1324 	if (!ofnode_valid(port))
1325 		return NULL;
1326 
1327 	ports = ofnode_get_parent(port);
1328 	if (!ofnode_valid(ports))
1329 		return NULL;
1330 
1331 	conn = ofnode_get_parent(ports);
1332 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1333 		return NULL;
1334 
1335 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1336 	if (ret)
1337 		return NULL;
1338 
1339 	return dev;
1340 }
1341 
1342 static bool rockchip_get_display_path_status(ofnode endpoint)
1343 {
1344 	ofnode ep;
1345 	uint phandle;
1346 
1347 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1348 		return false;
1349 
1350 	ep = ofnode_get_by_phandle(phandle);
1351 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1352 		return false;
1353 
1354 	return true;
1355 }
1356 
1357 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1358 {
1359 	struct udevice *phy_dev;
1360 	int ret;
1361 
1362 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1363 	if (ret)
1364 		return NULL;
1365 
1366 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1367 }
1368 
1369 #if defined(CONFIG_ROCKCHIP_RK3568)
1370 static int rockchip_display_fixup_dts(void *blob)
1371 {
1372 	ofnode route_node, route_subnode, conn_ep, conn_port;
1373 	const struct device_node *route_sub_devnode;
1374 	const struct device_node *ep_node, *conn_ep_dev_node;
1375 	u32 phandle;
1376 	int conn_ep_offset;
1377 	const char *route_sub_path, *path;
1378 
1379 	/* Don't go further if new variant after
1380 	 * reading PMUGRF_SOC_CON15
1381 	 */
1382 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1383 		return 0;
1384 
1385 	route_node = ofnode_path("/display-subsystem/route");
1386 	if (!ofnode_valid(route_node))
1387 		return -EINVAL;
1388 
1389 	ofnode_for_each_subnode(route_subnode, route_node) {
1390 		if (!ofnode_is_available(route_subnode))
1391 			continue;
1392 
1393 		route_sub_devnode = ofnode_to_np(route_subnode);
1394 		route_sub_path = route_sub_devnode->full_name;
1395 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1396 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1397 			return 0;
1398 
1399 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1400 		if (phandle < 0) {
1401 			printf("Warn: can't find connect node's handle\n");
1402 			continue;
1403 		}
1404 
1405 		ep_node = of_find_node_by_phandle(phandle);
1406 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1407 			printf("Warn: can't find endpoint node from phandle\n");
1408 			continue;
1409 		}
1410 
1411 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1412 		conn_ep = ofnode_get_by_phandle(phandle);
1413 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1414 			return -ENODEV;
1415 
1416 		conn_port = ofnode_get_parent(conn_ep);
1417 		if (!ofnode_valid(conn_port))
1418 			return -ENODEV;
1419 
1420 		ofnode_for_each_subnode(conn_ep, conn_port) {
1421 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1422 			path = conn_ep_dev_node->full_name;
1423 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1424 			conn_ep_offset = fdt_path_offset(blob, path);
1425 
1426 			if (!ofnode_is_available(conn_ep) &&
1427 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1428 				do_fixup_by_path_u32(blob, route_sub_path,
1429 						     "connect", phandle, 1);
1430 				fdt_status_okay(blob, conn_ep_offset);
1431 
1432 			} else if (ofnode_is_available(conn_ep) &&
1433 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1434 				fdt_status_disabled(blob, conn_ep_offset);
1435 			}
1436 		}
1437 	}
1438 
1439 	return 0;
1440 }
1441 #endif
1442 
1443 static int rockchip_display_probe(struct udevice *dev)
1444 {
1445 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1446 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1447 	const void *blob = gd->fdt_blob;
1448 	int phandle;
1449 	struct udevice *crtc_dev, *conn_dev;
1450 	struct rockchip_crtc *crtc;
1451 	const struct rockchip_connector *conn;
1452 	struct rockchip_panel *panel = NULL;
1453 	struct rockchip_bridge *bridge = NULL;
1454 	struct rockchip_phy *phy = NULL;
1455 	struct display_state *s;
1456 	const char *name;
1457 	int ret;
1458 	ofnode node, route_node;
1459 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1460 	struct public_phy_data *data;
1461 	bool is_ports_node = false;
1462 
1463 #if defined(CONFIG_ROCKCHIP_RK3568)
1464 	rockchip_display_fixup_dts((void *)blob);
1465 #endif
1466 
1467 	/* Before relocation we don't need to do anything */
1468 	if (!(gd->flags & GD_FLG_RELOC))
1469 		return 0;
1470 
1471 	data = malloc(sizeof(struct public_phy_data));
1472 	if (!data) {
1473 		printf("failed to alloc phy data\n");
1474 		return -ENOMEM;
1475 	}
1476 	data->phy_init = false;
1477 
1478 	init_display_buffer(plat->base);
1479 
1480 	route_node = dev_read_subnode(dev, "route");
1481 	if (!ofnode_valid(route_node))
1482 		return -ENODEV;
1483 
1484 	ofnode_for_each_subnode(node, route_node) {
1485 		if (!ofnode_is_available(node))
1486 			continue;
1487 		phandle = ofnode_read_u32_default(node, "connect", -1);
1488 		if (phandle < 0) {
1489 			printf("Warn: can't find connect node's handle\n");
1490 			continue;
1491 		}
1492 		ep_node = of_find_node_by_phandle(phandle);
1493 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1494 			printf("Warn: can't find endpoint node from phandle\n");
1495 			continue;
1496 		}
1497 		port_node = of_get_parent(ep_node);
1498 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1499 			printf("Warn: can't find port node from phandle\n");
1500 			continue;
1501 		}
1502 
1503 		port_parent_node = of_get_parent(port_node);
1504 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1505 			printf("Warn: can't find port parent node from phandle\n");
1506 			continue;
1507 		}
1508 
1509 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1510 		if (is_ports_node) {
1511 			vop_node = of_get_parent(port_parent_node);
1512 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1513 				printf("Warn: can't find crtc node from phandle\n");
1514 				continue;
1515 			}
1516 		} else {
1517 			vop_node = port_parent_node;
1518 		}
1519 
1520 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1521 						  np_to_ofnode(vop_node),
1522 						  &crtc_dev);
1523 		if (ret) {
1524 			printf("Warn: can't find crtc driver %d\n", ret);
1525 			continue;
1526 		}
1527 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1528 
1529 		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
1530 		if (!conn_dev) {
1531 			printf("Warn: can't find connect driver\n");
1532 			continue;
1533 		}
1534 
1535 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
1536 
1537 		phy = rockchip_of_find_phy(conn_dev);
1538 
1539 		bridge = rockchip_of_find_bridge(conn_dev);
1540 		if (bridge)
1541 			panel = rockchip_of_find_panel(bridge->dev);
1542 		else
1543 			panel = rockchip_of_find_panel(conn_dev);
1544 
1545 		s = malloc(sizeof(*s));
1546 		if (!s)
1547 			continue;
1548 
1549 		memset(s, 0, sizeof(*s));
1550 
1551 		INIT_LIST_HEAD(&s->head);
1552 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1553 		if (!ret)
1554 			memcpy(s->ulogo_name, name, strlen(name));
1555 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1556 		if (!ret)
1557 			memcpy(s->klogo_name, name, strlen(name));
1558 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1559 		if (!strcmp(name, "fullscreen"))
1560 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1561 		else
1562 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1563 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1564 		if (!strcmp(name, "fullscreen"))
1565 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1566 		else
1567 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1568 
1569 		s->blob = blob;
1570 		s->panel_state.panel = panel;
1571 		s->conn_state.node = conn_dev->node;
1572 		s->conn_state.dev = conn_dev;
1573 		s->conn_state.connector = conn;
1574 		s->conn_state.phy = phy;
1575 		s->conn_state.bridge = bridge;
1576 		s->conn_state.overscan.left_margin = 100;
1577 		s->conn_state.overscan.right_margin = 100;
1578 		s->conn_state.overscan.top_margin = 100;
1579 		s->conn_state.overscan.bottom_margin = 100;
1580 		s->crtc_state.node = np_to_ofnode(vop_node);
1581 		s->crtc_state.dev = crtc_dev;
1582 		s->crtc_state.crtc = crtc;
1583 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
1584 		s->node = node;
1585 
1586 		if (is_ports_node) { /* only vop2 will get into here */
1587 			ofnode vp_node = np_to_ofnode(port_node);
1588 			static bool get_plane_mask_from_dts;
1589 
1590 			s->crtc_state.ports_node = port_parent_node;
1591 			if (!get_plane_mask_from_dts) {
1592 				ofnode vp_sub_node;
1593 				int vp_id = 0;
1594 				bool vp_enable = false;
1595 
1596 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
1597 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
1598 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
1599 					if (ret) {
1600 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
1601 						s->crtc_state.crtc->assign_plane |= true;
1602 						printf("get vp%d plane mask:0x%x from dts\n", vp_id, ret);
1603 					}
1604 
1605 					/* To check current vp status */
1606 					vp_enable = false;
1607 					ofnode_for_each_subnode(vp_sub_node, vp_node)
1608 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
1609 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
1610 				}
1611 				get_plane_mask_from_dts = true;
1612 			}
1613 		}
1614 
1615 		if (bridge)
1616 			bridge->state = s;
1617 
1618 		if (panel)
1619 			panel->state = s;
1620 
1621 		get_crtc_mcu_mode(&s->crtc_state);
1622 
1623 		ret = ofnode_read_u32_default(s->crtc_state.node,
1624 					      "rockchip,dual-channel-swap", 0);
1625 		s->crtc_state.dual_channel_swap = ret;
1626 		if (connector_panel_init(s)) {
1627 			printf("Warn: Failed to init panel drivers\n");
1628 			free(s);
1629 			continue;
1630 		}
1631 
1632 		if (connector_phy_init(s, data)) {
1633 			printf("Warn: Failed to init phy drivers\n");
1634 			free(s);
1635 			continue;
1636 		}
1637 		list_add_tail(&s->head, &rockchip_display_list);
1638 	}
1639 
1640 	if (list_empty(&rockchip_display_list)) {
1641 		debug("Failed to found available display route\n");
1642 		return -ENODEV;
1643 	}
1644 	display_pre_init();
1645 
1646 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1647 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1648 	uc_priv->bpix = VIDEO_BPP32;
1649 
1650 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1651 	rockchip_show_fbbase(plat->base);
1652 	video_set_flush_dcache(dev, true);
1653 	#endif
1654 
1655 	return 0;
1656 }
1657 
1658 void rockchip_display_fixup(void *blob)
1659 {
1660 	const struct rockchip_connector_funcs *conn_funcs;
1661 	const struct rockchip_crtc_funcs *crtc_funcs;
1662 	const struct rockchip_connector *conn;
1663 	const struct rockchip_crtc *crtc;
1664 	struct display_state *s;
1665 	int offset;
1666 	const struct device_node *np;
1667 	const char *path;
1668 
1669 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1670 		list_for_each_entry(s, &rockchip_display_list, head)
1671 			load_bmp_logo(&s->logo, s->klogo_name);
1672 
1673 		if (!get_display_size())
1674 			return;
1675 
1676 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1677 						    (u64)memory_start,
1678 						    (u64)get_display_size());
1679 		if (offset < 0)
1680 			printf("failed to reserve drm-loader-logo memory\n");
1681 	} else {
1682 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1683 		/* Compatible with rkfb display, only need reserve memory */
1684 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1685 						    (u64)memory_start,
1686 						    MEMORY_POOL_SIZE);
1687 		if (offset < 0)
1688 			printf("failed to reserve fb-loader-logo memory\n");
1689 		else
1690 			list_for_each_entry(s, &rockchip_display_list, head)
1691 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
1692 		return;
1693 	}
1694 
1695 	list_for_each_entry(s, &rockchip_display_list, head) {
1696 		conn = s->conn_state.connector;
1697 		if (!conn)
1698 			continue;
1699 		conn_funcs = conn->funcs;
1700 		if (!conn_funcs) {
1701 			printf("failed to get exist connector\n");
1702 			continue;
1703 		}
1704 
1705 		crtc = s->crtc_state.crtc;
1706 		if (!crtc)
1707 			continue;
1708 
1709 		crtc_funcs = crtc->funcs;
1710 		if (!crtc_funcs) {
1711 			printf("failed to get exist crtc\n");
1712 			continue;
1713 		}
1714 
1715 		if (crtc_funcs->fixup_dts)
1716 			crtc_funcs->fixup_dts(s, blob);
1717 
1718 		if (conn_funcs->fixup_dts)
1719 			conn_funcs->fixup_dts(s, blob);
1720 
1721 		np = ofnode_to_np(s->node);
1722 		path = np->full_name;
1723 		fdt_increase_size(blob, 0x400);
1724 #define FDT_SET_U32(name, val) \
1725 		do_fixup_by_path_u32(blob, path, name, val, 1);
1726 
1727 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
1728 			 - memory_start;
1729 		FDT_SET_U32("logo,offset", offset);
1730 		FDT_SET_U32("logo,width", s->logo.width);
1731 		FDT_SET_U32("logo,height", s->logo.height);
1732 		FDT_SET_U32("logo,bpp", s->logo.bpp);
1733 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
1734 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
1735 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
1736 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
1737 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
1738 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
1739 		FDT_SET_U32("video,vrefresh",
1740 			    drm_mode_vrefresh(&s->conn_state.mode));
1741 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
1742 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
1743 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
1744 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
1745 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
1746 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
1747 #undef FDT_SET_U32
1748 	}
1749 }
1750 
1751 int rockchip_display_bind(struct udevice *dev)
1752 {
1753 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1754 
1755 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
1756 
1757 	return 0;
1758 }
1759 
1760 static const struct udevice_id rockchip_display_ids[] = {
1761 	{ .compatible = "rockchip,display-subsystem" },
1762 	{ }
1763 };
1764 
1765 U_BOOT_DRIVER(rockchip_display) = {
1766 	.name	= "rockchip_display",
1767 	.id	= UCLASS_VIDEO,
1768 	.of_match = rockchip_display_ids,
1769 	.bind	= rockchip_display_bind,
1770 	.probe	= rockchip_display_probe,
1771 };
1772 
1773 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
1774 			char *const argv[])
1775 {
1776 	if (argc != 1)
1777 		return CMD_RET_USAGE;
1778 
1779 	rockchip_show_logo();
1780 
1781 	return 0;
1782 }
1783 
1784 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
1785 				char *const argv[])
1786 {
1787 	if (argc != 2)
1788 		return CMD_RET_USAGE;
1789 
1790 	rockchip_show_bmp(argv[1]);
1791 
1792 	return 0;
1793 }
1794 
1795 U_BOOT_CMD(
1796 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
1797 	"load and display log from resource partition",
1798 	NULL
1799 );
1800 
1801 U_BOOT_CMD(
1802 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
1803 	"load and display bmp from resource partition",
1804 	"    <bmp_name>"
1805 );
1806