xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 6a03cdba23ccfb315a846cf0abb6a67ddb7d934f)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/list.h>
17 #include <linux/compat.h>
18 #include <linux/media-bus-format.h>
19 #include <malloc.h>
20 #include <video.h>
21 #include <video_rockchip.h>
22 #include <video_bridge.h>
23 #include <dm/device.h>
24 #include <dm/uclass-internal.h>
25 #include <asm/arch-rockchip/resource_img.h>
26 
27 #include "bmp_helper.h"
28 #include "rockchip_display.h"
29 #include "rockchip_crtc.h"
30 #include "rockchip_connector.h"
31 #include "rockchip_bridge.h"
32 #include "rockchip_phy.h"
33 #include "rockchip_panel.h"
34 #include <dm.h>
35 #include <dm/of_access.h>
36 #include <dm/ofnode.h>
37 #include <asm/io.h>
38 
39 #define DRIVER_VERSION	"v1.0.1"
40 
41 /***********************************************************************
42  *  Rockchip UBOOT DRM driver version
43  *
44  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
45  *  v1.0.1	: add much dsi update(hjc)
46  *
47  **********************************************************************/
48 
49 #define RK_BLK_SIZE 512
50 #define BMP_PROCESSED_FLAG 8399
51 
52 DECLARE_GLOBAL_DATA_PTR;
53 static LIST_HEAD(rockchip_display_list);
54 static LIST_HEAD(logo_cache_list);
55 
56 static unsigned long memory_start;
57 static unsigned long cubic_lut_memory_start;
58 static unsigned long memory_end;
59 static struct base2_info base_parameter;
60 static uint32_t crc32_table[256];
61 
62 /*
63  * the phy types are used by different connectors in public.
64  * The current version only has inno hdmi phy for hdmi and tve.
65  */
66 enum public_use_phy {
67 	NONE,
68 	INNO_HDMI_PHY
69 };
70 
71 /* save public phy data */
72 struct public_phy_data {
73 	const struct rockchip_phy *phy_drv;
74 	int phy_node;
75 	int public_phy_type;
76 	bool phy_init;
77 };
78 
79 void rockchip_display_make_crc32_table(void)
80 {
81 	uint32_t c;
82 	int n, k;
83 	unsigned long poly;		/* polynomial exclusive-or pattern */
84 	/* terms of polynomial defining this crc (except x^32): */
85 	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
86 
87 	/* make exclusive-or pattern from polynomial (0xedb88320L) */
88 	poly = 0L;
89 	for (n = 0; n < sizeof(p) / sizeof(char); n++)
90 		poly |= 1L << (31 - p[n]);
91 
92 	for (n = 0; n < 256; n++) {
93 		c = (unsigned long)n;
94 		for (k = 0; k < 8; k++)
95 		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
96 		crc32_table[n] = cpu_to_le32(c);
97 	}
98 }
99 
100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
101 {
102 	int i;
103 	uint32_t crc;
104 	crc = 0xFFFFFFFF;
105 
106 	for (i = 0; i < length; i++) {
107 		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
108 		data++;
109 	}
110 
111 	return crc ^ 0xffffffff;
112 }
113 
114 int rockchip_get_baseparameter(void)
115 {
116 	struct blk_desc *dev_desc;
117 	disk_partition_t part_info;
118 	int block_num = 2048;
119 	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
120 	int ret = 0;
121 
122 	dev_desc = rockchip_get_bootdev();
123 	if (!dev_desc) {
124 		printf("%s: Could not find device\n", __func__);
125 		return -ENOENT;
126 	}
127 
128 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
129 		printf("Could not find baseparameter partition\n");
130 		return -ENOENT;
131 	}
132 
133 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
134 	if (ret < 0) {
135 		printf("read baseparameter failed\n");
136 		return ret;
137 	}
138 
139 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
140 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
141 		printf("warning: bad baseparameter\n");
142 		memset(&base_parameter, 0, sizeof(base_parameter));
143 	}
144 	rockchip_display_make_crc32_table();
145 
146 	return ret;
147 }
148 
149 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
150 {
151 	struct base2_disp_info *disp_info;
152 	struct base2_disp_header *disp_header;
153 	int i = 0, offset = -1;
154 	u32 crc_val;
155 	void *base_parameter_addr = (void *)&base_parameter;
156 
157 	for (i = 0; i < 8; i++) {
158 		disp_header = &base_parameter.disp_header[i];
159 		if (disp_header->connector_type == type &&
160 		    disp_header->connector_id == id) {
161 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
162 			offset = disp_header->offset;
163 			break;
164 		}
165 	}
166 
167 	if (offset < 0)
168 		return NULL;
169 	disp_info = base_parameter_addr + offset;
170 	if (disp_info->screen_info[0].type != type ||
171 	    disp_info->screen_info[0].id != id) {
172 		printf("connector type or id is error, type:%d, id:%d\n",
173 		       disp_info->screen_info[0].type,
174 		       disp_info->screen_info[0].id);
175 		return NULL;
176 	}
177 
178 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
179 		return NULL;
180 
181 	crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4);
182 
183 	if (crc_val != disp_info->crc) {
184 		printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id);
185 		return NULL;
186 	}
187 
188 	return disp_info;
189 }
190 
191 /* check which kind of public phy does connector use */
192 static int check_public_use_phy(struct display_state *state)
193 {
194 	int ret = NONE;
195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
196 	struct connector_state *conn_state = &state->conn_state;
197 
198 	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
199 	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
200 		ret = INNO_HDMI_PHY;
201 #endif
202 
203 	return ret;
204 }
205 
206 /*
207  * get public phy driver and initialize it.
208  * The current version only has inno hdmi phy for hdmi and tve.
209  */
210 static int get_public_phy(struct display_state *state,
211 			  struct public_phy_data *data)
212 {
213 	struct connector_state *conn_state = &state->conn_state;
214 	struct rockchip_phy *phy;
215 	struct udevice *dev;
216 	int ret = 0;
217 
218 	switch (data->public_phy_type) {
219 	case INNO_HDMI_PHY:
220 #if defined(CONFIG_ROCKCHIP_RK3328)
221 		ret = uclass_get_device_by_name(UCLASS_PHY,
222 						"hdmiphy@ff430000", &dev);
223 #elif defined(CONFIG_ROCKCHIP_RK322X)
224 		ret = uclass_get_device_by_name(UCLASS_PHY,
225 						"hdmi-phy@12030000", &dev);
226 #else
227 		ret = -EINVAL;
228 #endif
229 		if (ret) {
230 			printf("Warn: can't find phy driver\n");
231 			return 0;
232 		}
233 
234 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
235 		if (!phy) {
236 			printf("failed to get phy driver\n");
237 			return 0;
238 		}
239 
240 		ret = rockchip_phy_init(phy);
241 		if (ret) {
242 			printf("failed to init phy driver\n");
243 			return ret;
244 		}
245 		conn_state->phy = phy;
246 
247 		debug("inno hdmi phy init success, save it\n");
248 		data->phy_drv = conn_state->phy;
249 		data->phy_init = true;
250 		return 0;
251 	default:
252 		return -EINVAL;
253 	}
254 }
255 
256 static void init_display_buffer(ulong base)
257 {
258 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
259 	memory_end = memory_start;
260 	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
261 }
262 
263 void *get_display_buffer(int size)
264 {
265 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
266 	void *buf;
267 
268 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
269 		printf("failed to alloc %dbyte memory to display\n", size);
270 		return NULL;
271 	}
272 	buf = (void *)roundup_memory;
273 
274 	memory_end = roundup_memory + size;
275 
276 	return buf;
277 }
278 
279 static unsigned long get_display_size(void)
280 {
281 	return memory_end - memory_start;
282 }
283 
284 static unsigned long get_single_cubic_lut_size(void)
285 {
286 	ulong cubic_lut_size;
287 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
288 
289 	/* This is depend on IC designed */
290 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
291 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
292 
293 	return cubic_lut_size;
294 }
295 
296 static unsigned long get_cubic_lut_offset(int crtc_id)
297 {
298 	return crtc_id * get_single_cubic_lut_size();
299 }
300 
301 unsigned long get_cubic_lut_buffer(int crtc_id)
302 {
303 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
304 }
305 
306 static unsigned long get_cubic_memory_size(void)
307 {
308 	/* Max support 4 cubic lut */
309 	return get_single_cubic_lut_size() * 4;
310 }
311 
312 bool can_direct_logo(int bpp)
313 {
314 	return bpp == 24 || bpp == 32;
315 }
316 
317 static int connector_phy_init(struct display_state *state,
318 			      struct public_phy_data *data)
319 {
320 	struct connector_state *conn_state = &state->conn_state;
321 	int type;
322 
323 	/* does this connector use public phy with others */
324 	type = check_public_use_phy(state);
325 	if (type == INNO_HDMI_PHY) {
326 		/* there is no public phy was initialized */
327 		if (!data->phy_init) {
328 			debug("start get public phy\n");
329 			data->public_phy_type = type;
330 			if (get_public_phy(state, data)) {
331 				printf("can't find correct public phy type\n");
332 				free(data);
333 				return -EINVAL;
334 			}
335 			return 0;
336 		}
337 
338 		/* if this phy has been initialized, get it directly */
339 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
340 		return 0;
341 	}
342 
343 	return 0;
344 }
345 
346 static int connector_panel_init(struct display_state *state)
347 {
348 	struct connector_state *conn_state = &state->conn_state;
349 	struct panel_state *panel_state = &state->panel_state;
350 	const struct rockchip_panel *panel = panel_state->panel;
351 	ofnode dsp_lut_node;
352 	int ret, len;
353 
354 	if (!panel)
355 		return 0;
356 
357 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
358 	if (!ofnode_valid(dsp_lut_node)) {
359 		debug("%s can not find dsp-lut node\n", __func__);
360 		return 0;
361 	}
362 
363 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
364 	if (len > 0) {
365 		conn_state->gamma.size = len / sizeof(u32);
366 		conn_state->gamma.lut = malloc(len);
367 		if (!conn_state->gamma.lut) {
368 			printf("malloc gamma lut failed\n");
369 			return -ENOMEM;
370 		}
371 		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
372 					    conn_state->gamma.lut,
373 					    conn_state->gamma.size);
374 		if (ret) {
375 			printf("Cannot decode gamma_lut\n");
376 			conn_state->gamma.lut = NULL;
377 			return -EINVAL;
378 		}
379 		panel_state->dsp_lut_node = dsp_lut_node;
380 	}
381 
382 	return 0;
383 }
384 
385 int drm_mode_vrefresh(const struct drm_display_mode *mode)
386 {
387 	int refresh = 0;
388 	unsigned int calc_val;
389 
390 	if (mode->vrefresh > 0) {
391 		refresh = mode->vrefresh;
392 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
393 		int vtotal;
394 
395 		vtotal = mode->vtotal;
396 		/* work out vrefresh the value will be x1000 */
397 		calc_val = (mode->clock * 1000);
398 		calc_val /= mode->htotal;
399 		refresh = (calc_val + vtotal / 2) / vtotal;
400 
401 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
402 			refresh *= 2;
403 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
404 			refresh /= 2;
405 		if (mode->vscan > 1)
406 			refresh /= mode->vscan;
407 	}
408 	return refresh;
409 }
410 
411 static int display_get_detail_timing(ofnode node, struct drm_display_mode *mode)
412 {
413 	int hactive, vactive, pixelclock;
414 	int hfront_porch, hback_porch, hsync_len;
415 	int vfront_porch, vback_porch, vsync_len;
416 	int val, flags = 0;
417 
418 #define FDT_GET_INT(val, name) \
419 	val = ofnode_read_s32_default(node, name, -1); \
420 	if (val < 0) { \
421 		printf("Can't get %s\n", name); \
422 		return -ENXIO; \
423 	}
424 
425 #define FDT_GET_INT_DEFAULT(val, name, default) \
426 	val = ofnode_read_s32_default(node, name, default);
427 
428 	FDT_GET_INT(hactive, "hactive");
429 	FDT_GET_INT(vactive, "vactive");
430 	FDT_GET_INT(pixelclock, "clock-frequency");
431 	FDT_GET_INT(hsync_len, "hsync-len");
432 	FDT_GET_INT(hfront_porch, "hfront-porch");
433 	FDT_GET_INT(hback_porch, "hback-porch");
434 	FDT_GET_INT(vsync_len, "vsync-len");
435 	FDT_GET_INT(vfront_porch, "vfront-porch");
436 	FDT_GET_INT(vback_porch, "vback-porch");
437 	FDT_GET_INT(val, "hsync-active");
438 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
439 	FDT_GET_INT(val, "vsync-active");
440 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
441 	FDT_GET_INT(val, "pixelclk-active");
442 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
443 
444 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
445 	if (val == DRM_MODE_FLAG_XMIRROR) {
446 		flags |= DRM_MODE_FLAG_XMIRROR;
447 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
448 		flags |= DRM_MODE_FLAG_YMIRROR;
449 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
450 		flags |= DRM_MODE_FLAG_XMIRROR;
451 		flags |= DRM_MODE_FLAG_YMIRROR;
452 	}
453 	mode->hdisplay = hactive;
454 	mode->hsync_start = mode->hdisplay + hfront_porch;
455 	mode->hsync_end = mode->hsync_start + hsync_len;
456 	mode->htotal = mode->hsync_end + hback_porch;
457 
458 	mode->vdisplay = vactive;
459 	mode->vsync_start = mode->vdisplay + vfront_porch;
460 	mode->vsync_end = mode->vsync_start + vsync_len;
461 	mode->vtotal = mode->vsync_end + vback_porch;
462 
463 	mode->clock = pixelclock / 1000;
464 	mode->flags = flags;
465 
466 	return 0;
467 }
468 
469 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode)
470 {
471 	int ret = 0;
472 
473 	ret = display_get_detail_timing(node, mode);
474 
475 	if (ret) {
476 		mode->clock = 74250;
477 		mode->flags = 0x5;
478 		mode->hdisplay = 1280;
479 		mode->hsync_start = 1390;
480 		mode->hsync_end = 1430;
481 		mode->htotal = 1650;
482 		mode->hskew = 0;
483 		mode->vdisplay = 720;
484 		mode->vsync_start = 725;
485 		mode->vsync_end = 730;
486 		mode->vtotal = 750;
487 		mode->vrefresh = 60;
488 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
489 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
490 	}
491 
492 	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
493 	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
494 	       mode->vscan);
495 
496 	return 0;
497 }
498 
499 static int display_get_timing_from_dts(struct panel_state *panel_state,
500 				       struct drm_display_mode *mode)
501 {
502 	struct rockchip_panel *panel = panel_state->panel;
503 	int phandle;
504 	ofnode timing, native_mode;
505 
506 	timing = dev_read_subnode(panel->dev, "display-timings");
507 	if (!ofnode_valid(timing))
508 		return -ENODEV;
509 
510 	native_mode = ofnode_find_subnode(timing, "timing");
511 	if (!ofnode_valid(native_mode)) {
512 		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
513 		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
514 		if (!ofnode_valid(native_mode)) {
515 			printf("failed to get display timings from DT\n");
516 			return -ENXIO;
517 		}
518 	}
519 
520 	display_get_detail_timing(native_mode, mode);
521 
522 	return 0;
523 }
524 
525 /**
526  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
527  * @edid_data: structure store mode list
528  * @max_output: vop max output resolution
529  */
530 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
531 				    struct vop_rect *max_output)
532 {
533 	int i;
534 
535 	for (i = 0; i < edid_data->modes; i++) {
536 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
537 		    edid_data->mode_buf[i].vdisplay > max_output->height)
538 			edid_data->mode_buf[i].invalid = true;
539 	}
540 }
541 
542 /**
543  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
544  * @p: mode
545  * @adjust_flags: a combination of adjustment flags
546  *
547  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
548  *
549  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
550  *   interlaced modes.
551  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
552  *   buffers containing two eyes (only adjust the timings when needed, eg. for
553  *   "frame packing" or "side by side full").
554  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
555  *   be performed for doublescan and vscan > 1 modes respectively.
556  */
557 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
558 {
559 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
560 		return;
561 
562 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
563 		p->crtc_clock = 2 * p->clock;
564 	else
565 		p->crtc_clock = p->clock;
566 	p->crtc_hdisplay = p->hdisplay;
567 	p->crtc_hsync_start = p->hsync_start;
568 	p->crtc_hsync_end = p->hsync_end;
569 	p->crtc_htotal = p->htotal;
570 	p->crtc_hskew = p->hskew;
571 	p->crtc_vdisplay = p->vdisplay;
572 	p->crtc_vsync_start = p->vsync_start;
573 	p->crtc_vsync_end = p->vsync_end;
574 	p->crtc_vtotal = p->vtotal;
575 
576 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
577 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
578 			p->crtc_vdisplay /= 2;
579 			p->crtc_vsync_start /= 2;
580 			p->crtc_vsync_end /= 2;
581 			p->crtc_vtotal /= 2;
582 		}
583 	}
584 
585 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
586 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
587 			p->crtc_vdisplay *= 2;
588 			p->crtc_vsync_start *= 2;
589 			p->crtc_vsync_end *= 2;
590 			p->crtc_vtotal *= 2;
591 		}
592 	}
593 
594 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
595 		if (p->vscan > 1) {
596 			p->crtc_vdisplay *= p->vscan;
597 			p->crtc_vsync_start *= p->vscan;
598 			p->crtc_vsync_end *= p->vscan;
599 			p->crtc_vtotal *= p->vscan;
600 		}
601 	}
602 
603 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
604 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
605 
606 		switch (layout) {
607 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
608 			p->crtc_clock *= 2;
609 			p->crtc_vdisplay += p->crtc_vtotal;
610 			p->crtc_vsync_start += p->crtc_vtotal;
611 			p->crtc_vsync_end += p->crtc_vtotal;
612 			p->crtc_vtotal += p->crtc_vtotal;
613 			break;
614 		}
615 	}
616 
617 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
618 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
619 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
620 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
621 }
622 
623 /**
624  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
625  * output format
626  *
627  * @connector: drm connector under action.
628  * @mode: video mode to be tested.
629  *
630  * Returns:
631  * true if the mode can be supported in YCBCR420 format
632  * false if not.
633  */
634 bool drm_mode_is_420_only(const struct drm_display_info *display,
635 			  struct drm_display_mode *mode)
636 {
637 	u8 vic = drm_match_cea_mode(mode);
638 
639 	return test_bit(vic, display->hdmi.y420_vdb_modes);
640 }
641 
642 /**
643  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
644  * output format also (along with RGB/YCBCR444/422)
645  *
646  * @display: display under action.
647  * @mode: video mode to be tested.
648  *
649  * Returns:
650  * true if the mode can be support YCBCR420 format
651  * false if not.
652  */
653 bool drm_mode_is_420_also(const struct drm_display_info *display,
654 			  struct drm_display_mode *mode)
655 {
656 	u8 vic = drm_match_cea_mode(mode);
657 
658 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
659 }
660 
661 /**
662  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
663  * output format
664  *
665  * @display: display under action.
666  * @mode: video mode to be tested.
667  *
668  * Returns:
669  * true if the mode can be supported in YCBCR420 format
670  * false if not.
671  */
672 bool drm_mode_is_420(const struct drm_display_info *display,
673 		     struct drm_display_mode *mode)
674 {
675 	return drm_mode_is_420_only(display, mode) ||
676 		drm_mode_is_420_also(display, mode);
677 }
678 
679 static int display_get_timing(struct display_state *state)
680 {
681 	struct connector_state *conn_state = &state->conn_state;
682 	struct drm_display_mode *mode = &conn_state->mode;
683 	const struct drm_display_mode *m;
684 	struct panel_state *panel_state = &state->panel_state;
685 	const struct rockchip_panel *panel = panel_state->panel;
686 
687 	if (dev_of_valid(panel->dev) &&
688 	    !display_get_timing_from_dts(panel_state, mode)) {
689 		printf("Using display timing dts\n");
690 		return 0;
691 	}
692 
693 	if (panel->data) {
694 		m = (const struct drm_display_mode *)panel->data;
695 		memcpy(mode, m, sizeof(*m));
696 		printf("Using display timing from compatible panel driver\n");
697 		return 0;
698 	}
699 
700 	return -ENODEV;
701 }
702 
703 static int display_pre_init(void)
704 {
705 	struct display_state *state;
706 	int ret = 0;
707 
708 	list_for_each_entry(state, &rockchip_display_list, head) {
709 		struct connector_state *conn_state = &state->conn_state;
710 		const struct rockchip_connector *conn = conn_state->connector;
711 		const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
712 		struct crtc_state *crtc_state = &state->crtc_state;
713 		struct rockchip_crtc *crtc = crtc_state->crtc;
714 
715 		if (conn_funcs->pre_init) {
716 			ret = conn_funcs->pre_init(state);
717 			if (ret)
718 				printf("pre init conn error\n");
719 		}
720 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
721 	}
722 	return ret;
723 }
724 
725 static int display_use_force_mode(struct display_state *state)
726 {
727 	struct connector_state *conn_state = &state->conn_state;
728 	struct drm_display_mode *mode = &conn_state->mode;
729 
730 	conn_state->bpc = 8;
731 	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
732 	conn_state->bus_format = state->force_bus_format;
733 
734 	return 0;
735 }
736 
737 static int display_get_edid_mode(struct display_state *state)
738 {
739 	int ret = 0;
740 	struct connector_state *conn_state = &state->conn_state;
741 	struct drm_display_mode *mode = &conn_state->mode;
742 	int bpc;
743 
744 	ret = edid_get_drm_mode(conn_state->edid, ret, mode, &bpc);
745 	if (!ret) {
746 		conn_state->bpc = bpc;
747 		edid_print_info((void *)&conn_state->edid);
748 	} else {
749 		conn_state->bpc = 8;
750 		mode->clock = 74250;
751 		mode->flags = 0x5;
752 		mode->hdisplay = 1280;
753 		mode->hsync_start = 1390;
754 		mode->hsync_end = 1430;
755 		mode->htotal = 1650;
756 		mode->hskew = 0;
757 		mode->vdisplay = 720;
758 		mode->vsync_start = 725;
759 		mode->vsync_end = 730;
760 		mode->vtotal = 750;
761 		mode->vrefresh = 60;
762 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
763 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
764 
765 		printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name);
766 	}
767 
768 	return ret;
769 }
770 
771 static int display_init(struct display_state *state)
772 {
773 	struct connector_state *conn_state = &state->conn_state;
774 	struct panel_state *panel_state = &state->panel_state;
775 	const struct rockchip_connector *conn = conn_state->connector;
776 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
777 	struct crtc_state *crtc_state = &state->crtc_state;
778 	struct rockchip_crtc *crtc = crtc_state->crtc;
779 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
780 	struct drm_display_mode *mode = &conn_state->mode;
781 	const char *compatible;
782 	int ret = 0;
783 	static bool __print_once = false;
784 
785 	if (!__print_once) {
786 		__print_once = true;
787 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
788 	}
789 
790 	if (state->is_init)
791 		return 0;
792 
793 	if (!conn_funcs || !crtc_funcs) {
794 		printf("failed to find connector or crtc functions\n");
795 		return -ENXIO;
796 	}
797 
798 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
799 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
800 		   sizeof(struct drm_display_mode))) {
801 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
802 			crtc_state->dev->name,
803 			crtc_state->crtc->active_mode.type,
804 			crtc_state->crtc->active_mode.hdisplay,
805 			crtc_state->crtc->active_mode.vdisplay,
806 			crtc_state->crtc->active_mode.vrefresh);
807 		return -ENODEV;
808 	}
809 
810 	if (crtc_funcs->preinit) {
811 		ret = crtc_funcs->preinit(state);
812 		if (ret)
813 			return ret;
814 	}
815 
816 	if (panel_state->panel)
817 		rockchip_panel_init(panel_state->panel);
818 
819 	if (conn_funcs->init) {
820 		ret = conn_funcs->init(state);
821 		if (ret)
822 			goto deinit;
823 	}
824 
825 	if (conn_state->phy)
826 		rockchip_phy_init(conn_state->phy);
827 
828 	/*
829 	 * support hotplug, but not connect;
830 	 */
831 #ifdef CONFIG_ROCKCHIP_DRM_TVE
832 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
833 		printf("hdmi plugin ,skip tve\n");
834 		goto deinit;
835 	}
836 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
837 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
838 		printf("hdmi plugin ,skip tve\n");
839 		goto deinit;
840 	}
841 #endif
842 	if (conn_funcs->detect) {
843 		ret = conn_funcs->detect(state);
844 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
845 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
846 			crtc->hdmi_hpd = ret;
847 #endif
848 		if (!ret && !state->force_output) {
849 			printf("%s disconnected\n", conn_state->dev->name);
850 			goto deinit;
851 		}
852 	}
853 
854 	if (panel_state->panel) {
855 		ret = display_get_timing(state);
856 		if (!ret)
857 			conn_state->bpc = panel_state->panel->bpc;
858 #if defined(CONFIG_I2C_EDID)
859 		if (ret < 0 && conn_funcs->get_edid) {
860 			rockchip_panel_prepare(panel_state->panel);
861 			ret = conn_funcs->get_edid(state);
862 			if (!ret)
863 				display_get_edid_mode(state);
864 		}
865 #endif
866 	} else if (conn_state->bridge) {
867 		ret = video_bridge_read_edid(conn_state->bridge->dev,
868 					     conn_state->edid, EDID_SIZE);
869 		if (ret > 0) {
870 #if defined(CONFIG_I2C_EDID)
871 			display_get_edid_mode(state);
872 #endif
873 		} else {
874 			ret = video_bridge_get_timing(conn_state->bridge->dev);
875 		}
876 	} else if (conn_funcs->get_timing) {
877 		ret = conn_funcs->get_timing(state);
878 	} else if (conn_funcs->get_edid) {
879 		ret = conn_funcs->get_edid(state);
880 #if defined(CONFIG_I2C_EDID)
881 		if (!ret)
882 			display_get_edid_mode(state);
883 #endif
884 	}
885 
886 	if (ret && !state->force_output)
887 		goto deinit;
888 	if (state->force_output)
889 		display_use_force_mode(state);
890 
891 	/* rk356x series drive mipi pixdata on posedge */
892 	compatible = dev_read_string(conn_state->dev, "compatible");
893 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
894 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
895 
896 	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
897 	       "    H: %04d %04d %04d %04d\n"
898 	       "    V: %04d %04d %04d %04d\n"
899 	       "bus_format: %x\n",
900 	       conn_state->dev->name,
901 	       state->force_output ? "use force output" : "",
902 	       mode->clock, mode->flags,
903 	       mode->hdisplay, mode->hsync_start,
904 	       mode->hsync_end, mode->htotal,
905 	       mode->vdisplay, mode->vsync_start,
906 	       mode->vsync_end, mode->vtotal,
907 	       conn_state->bus_format);
908 
909 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
910 
911 	if (conn_state->bridge)
912 		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
913 
914 	if (crtc_funcs->init) {
915 		ret = crtc_funcs->init(state);
916 		if (ret)
917 			goto deinit;
918 	}
919 	state->is_init = 1;
920 
921 	crtc_state->crtc->active = true;
922 	memcpy(&crtc_state->crtc->active_mode,
923 	       &conn_state->mode, sizeof(struct drm_display_mode));
924 
925 	return 0;
926 
927 deinit:
928 	if (conn_funcs->deinit)
929 		conn_funcs->deinit(state);
930 	return ret;
931 }
932 
933 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
934 {
935 	struct crtc_state *crtc_state = &state->crtc_state;
936 	const struct rockchip_crtc *crtc = crtc_state->crtc;
937 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
938 	int ret;
939 
940 	if (!state->is_init)
941 		return -EINVAL;
942 
943 	if (crtc_funcs->send_mcu_cmd) {
944 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
945 		if (ret)
946 			return ret;
947 	}
948 
949 	return 0;
950 }
951 
952 static int display_set_plane(struct display_state *state)
953 {
954 	struct crtc_state *crtc_state = &state->crtc_state;
955 	const struct rockchip_crtc *crtc = crtc_state->crtc;
956 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
957 	int ret;
958 
959 	if (!state->is_init)
960 		return -EINVAL;
961 
962 	if (crtc_funcs->set_plane) {
963 		ret = crtc_funcs->set_plane(state);
964 		if (ret)
965 			return ret;
966 	}
967 
968 	return 0;
969 }
970 
971 static int display_enable(struct display_state *state)
972 {
973 	struct connector_state *conn_state = &state->conn_state;
974 	const struct rockchip_connector *conn = conn_state->connector;
975 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
976 	struct crtc_state *crtc_state = &state->crtc_state;
977 	const struct rockchip_crtc *crtc = crtc_state->crtc;
978 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
979 	struct panel_state *panel_state = &state->panel_state;
980 
981 	if (!state->is_init)
982 		return -EINVAL;
983 
984 	if (state->is_enable)
985 		return 0;
986 
987 	if (crtc_funcs->prepare)
988 		crtc_funcs->prepare(state);
989 
990 	if (conn_funcs->prepare)
991 		conn_funcs->prepare(state);
992 
993 	if (conn_state->bridge)
994 		rockchip_bridge_pre_enable(conn_state->bridge);
995 
996 	if (panel_state->panel)
997 		rockchip_panel_prepare(panel_state->panel);
998 
999 	if (crtc_funcs->enable)
1000 		crtc_funcs->enable(state);
1001 
1002 	if (conn_funcs->enable)
1003 		conn_funcs->enable(state);
1004 
1005 	if (conn_state->bridge)
1006 		rockchip_bridge_enable(conn_state->bridge);
1007 
1008 	if (panel_state->panel)
1009 		rockchip_panel_enable(panel_state->panel);
1010 
1011 	state->is_enable = true;
1012 
1013 	return 0;
1014 }
1015 
1016 static int display_disable(struct display_state *state)
1017 {
1018 	struct connector_state *conn_state = &state->conn_state;
1019 	const struct rockchip_connector *conn = conn_state->connector;
1020 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
1021 	struct crtc_state *crtc_state = &state->crtc_state;
1022 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1023 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1024 	struct panel_state *panel_state = &state->panel_state;
1025 
1026 	if (!state->is_init)
1027 		return 0;
1028 
1029 	if (!state->is_enable)
1030 		return 0;
1031 
1032 	if (panel_state->panel)
1033 		rockchip_panel_disable(panel_state->panel);
1034 
1035 	if (conn_state->bridge)
1036 		rockchip_bridge_disable(conn_state->bridge);
1037 
1038 	if (conn_funcs->disable)
1039 		conn_funcs->disable(state);
1040 
1041 	if (crtc_funcs->disable)
1042 		crtc_funcs->disable(state);
1043 
1044 	if (panel_state->panel)
1045 		rockchip_panel_unprepare(panel_state->panel);
1046 
1047 	if (conn_state->bridge)
1048 		rockchip_bridge_post_disable(conn_state->bridge);
1049 
1050 	if (conn_funcs->unprepare)
1051 		conn_funcs->unprepare(state);
1052 
1053 	state->is_enable = 0;
1054 	state->is_init = 0;
1055 
1056 	return 0;
1057 }
1058 
1059 static int display_logo(struct display_state *state)
1060 {
1061 	struct crtc_state *crtc_state = &state->crtc_state;
1062 	struct connector_state *conn_state = &state->conn_state;
1063 	struct logo_info *logo = &state->logo;
1064 	int hdisplay, vdisplay, ret;
1065 
1066 	ret = display_init(state);
1067 	if (!state->is_init || ret)
1068 		return -ENODEV;
1069 
1070 	switch (logo->bpp) {
1071 	case 16:
1072 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1073 		break;
1074 	case 24:
1075 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1076 		break;
1077 	case 32:
1078 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1079 		break;
1080 	default:
1081 		printf("can't support bmp bits[%d]\n", logo->bpp);
1082 		return -EINVAL;
1083 	}
1084 	hdisplay = conn_state->mode.hdisplay;
1085 	vdisplay = conn_state->mode.vdisplay;
1086 	crtc_state->src_w = logo->width;
1087 	crtc_state->src_h = logo->height;
1088 	crtc_state->src_x = 0;
1089 	crtc_state->src_y = 0;
1090 	crtc_state->ymirror = logo->ymirror;
1091 
1092 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1093 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
1094 
1095 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1096 		crtc_state->crtc_x = 0;
1097 		crtc_state->crtc_y = 0;
1098 		crtc_state->crtc_w = hdisplay;
1099 		crtc_state->crtc_h = vdisplay;
1100 	} else {
1101 		if (crtc_state->src_w >= hdisplay) {
1102 			crtc_state->crtc_x = 0;
1103 			crtc_state->crtc_w = hdisplay;
1104 		} else {
1105 			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
1106 			crtc_state->crtc_w = crtc_state->src_w;
1107 		}
1108 
1109 		if (crtc_state->src_h >= vdisplay) {
1110 			crtc_state->crtc_y = 0;
1111 			crtc_state->crtc_h = vdisplay;
1112 		} else {
1113 			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
1114 			crtc_state->crtc_h = crtc_state->src_h;
1115 		}
1116 	}
1117 
1118 	display_set_plane(state);
1119 	display_enable(state);
1120 
1121 	return 0;
1122 }
1123 
1124 static int get_crtc_id(ofnode connect)
1125 {
1126 	int phandle;
1127 	struct device_node *remote;
1128 	int val;
1129 
1130 	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1131 	if (phandle < 0)
1132 		goto err;
1133 	remote = of_find_node_by_phandle(phandle);
1134 	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1135 	if (val < 0)
1136 		goto err;
1137 
1138 	return val;
1139 err:
1140 	printf("Can't get crtc id, default set to id = 0\n");
1141 	return 0;
1142 }
1143 
1144 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
1145 {
1146 	ofnode mcu_node;
1147 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1148 
1149 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1150 	if (!ofnode_valid(mcu_node))
1151 		return -ENODEV;
1152 
1153 #define FDT_GET_MCU_INT(val, name) \
1154 	do { \
1155 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1156 		if (val < 0) { \
1157 			printf("Can't get %s\n", name); \
1158 			return -ENXIO; \
1159 		} \
1160 	} while (0)
1161 
1162 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1163 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1164 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1165 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1166 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1167 
1168 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1169 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1170 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1171 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1172 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1173 
1174 	return 0;
1175 }
1176 
1177 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1178 {
1179 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1180 
1181 	list_for_each_entry(tmp, &logo_cache_list, head) {
1182 		if (!strcmp(tmp->name, bmp)) {
1183 			logo_cache = tmp;
1184 			break;
1185 		}
1186 	}
1187 
1188 	if (!logo_cache) {
1189 		logo_cache = malloc(sizeof(*logo_cache));
1190 		if (!logo_cache) {
1191 			printf("failed to alloc memory for logo cache\n");
1192 			return NULL;
1193 		}
1194 		memset(logo_cache, 0, sizeof(*logo_cache));
1195 		strcpy(logo_cache->name, bmp);
1196 		INIT_LIST_HEAD(&logo_cache->head);
1197 		list_add_tail(&logo_cache->head, &logo_cache_list);
1198 	}
1199 
1200 	return logo_cache;
1201 }
1202 
1203 /* Note: used only for rkfb kernel driver */
1204 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1205 {
1206 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1207 	void *dst = NULL;
1208 	int len, size;
1209 	struct bmp_header *header;
1210 
1211 	if (!logo || !bmp_name)
1212 		return -EINVAL;
1213 
1214 	header = malloc(RK_BLK_SIZE);
1215 	if (!header)
1216 		return -ENOMEM;
1217 
1218 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1219 	if (len != RK_BLK_SIZE) {
1220 		free(header);
1221 		return -EINVAL;
1222 	}
1223 	size = get_unaligned_le32(&header->file_size);
1224 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1225 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1226 	if (len != size) {
1227 		printf("failed to load bmp %s\n", bmp_name);
1228 		free(header);
1229 		return -ENOENT;
1230 	}
1231 
1232 	logo->mem = dst;
1233 #endif
1234 
1235 	return 0;
1236 }
1237 
1238 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1239 {
1240 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1241 	struct rockchip_logo_cache *logo_cache;
1242 	struct bmp_header *header;
1243 	void *dst = NULL, *pdst;
1244 	int size, len;
1245 	int ret = 0;
1246 	int reserved = 0;
1247 	int dst_size;
1248 
1249 	if (!logo || !bmp_name)
1250 		return -EINVAL;
1251 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1252 	if (!logo_cache)
1253 		return -ENOMEM;
1254 
1255 	if (logo_cache->logo.mem) {
1256 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1257 		return 0;
1258 	}
1259 
1260 	header = malloc(RK_BLK_SIZE);
1261 	if (!header)
1262 		return -ENOMEM;
1263 
1264 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1265 	if (len != RK_BLK_SIZE) {
1266 		ret = -EINVAL;
1267 		goto free_header;
1268 	}
1269 
1270 	logo->bpp = get_unaligned_le16(&header->bit_count);
1271 	logo->width = get_unaligned_le32(&header->width);
1272 	logo->height = get_unaligned_le32(&header->height);
1273 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1274 	reserved = get_unaligned_le32(&header->reserved);
1275 	if (logo->height < 0)
1276 	    logo->height = -logo->height;
1277 	size = get_unaligned_le32(&header->file_size);
1278 	if (!can_direct_logo(logo->bpp)) {
1279 		if (size > MEMORY_POOL_SIZE) {
1280 			printf("failed to use boot buf as temp bmp buffer\n");
1281 			ret = -ENOMEM;
1282 			goto free_header;
1283 		}
1284 		pdst = get_display_buffer(size);
1285 
1286 	} else {
1287 		pdst = get_display_buffer(size);
1288 		dst = pdst;
1289 	}
1290 
1291 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1292 	if (len != size) {
1293 		printf("failed to load bmp %s\n", bmp_name);
1294 		ret = -ENOENT;
1295 		goto free_header;
1296 	}
1297 
1298 	if (!can_direct_logo(logo->bpp)) {
1299 		/*
1300 		 * TODO: force use 16bpp if bpp less than 16;
1301 		 */
1302 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1303 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1304 		dst = get_display_buffer(dst_size);
1305 		if (!dst) {
1306 			ret = -ENOMEM;
1307 			goto free_header;
1308 		}
1309 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1310 			printf("failed to decode bmp %s\n", bmp_name);
1311 			ret = -EINVAL;
1312 			goto free_header;
1313 		}
1314 
1315 		logo->offset = 0;
1316 		logo->ymirror = 0;
1317 	} else {
1318 		logo->offset = get_unaligned_le32(&header->data_offset);
1319 		if (reserved == BMP_PROCESSED_FLAG)
1320 			logo->ymirror = 0;
1321 		else
1322 			logo->ymirror = 1;
1323 	}
1324 	logo->mem = dst;
1325 
1326 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1327 
1328 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1329 
1330 free_header:
1331 
1332 	free(header);
1333 
1334 	return ret;
1335 #else
1336 	return -EINVAL;
1337 #endif
1338 }
1339 
1340 void rockchip_show_fbbase(ulong fbbase)
1341 {
1342 	struct display_state *s;
1343 
1344 	list_for_each_entry(s, &rockchip_display_list, head) {
1345 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1346 		s->logo.mem = (char *)fbbase;
1347 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1348 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1349 		s->logo.bpp = 32;
1350 		s->logo.ymirror = 0;
1351 
1352 		display_logo(s);
1353 	}
1354 }
1355 
1356 int rockchip_show_bmp(const char *bmp)
1357 {
1358 	struct display_state *s;
1359 	int ret = 0;
1360 
1361 	if (!bmp) {
1362 		list_for_each_entry(s, &rockchip_display_list, head)
1363 			display_disable(s);
1364 		return -ENOENT;
1365 	}
1366 
1367 	list_for_each_entry(s, &rockchip_display_list, head) {
1368 		s->logo.mode = s->charge_logo_mode;
1369 		if (load_bmp_logo(&s->logo, bmp))
1370 			continue;
1371 		ret = display_logo(s);
1372 	}
1373 
1374 	return ret;
1375 }
1376 
1377 int rockchip_show_logo(void)
1378 {
1379 	struct display_state *s;
1380 	int ret = 0;
1381 
1382 	list_for_each_entry(s, &rockchip_display_list, head) {
1383 		s->logo.mode = s->logo_mode;
1384 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1385 			printf("failed to display uboot logo\n");
1386 		else
1387 			ret = display_logo(s);
1388 
1389 		/* Load kernel bmp in rockchip_display_fixup() later */
1390 	}
1391 
1392 	return ret;
1393 }
1394 
1395 enum {
1396 	PORT_DIR_IN,
1397 	PORT_DIR_OUT,
1398 };
1399 
1400 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
1401 {
1402 	ofnode panel_node, ports, port, ep, port_parent_node;
1403 	struct udevice *panel_dev;
1404 	int ret;
1405 
1406 	panel_node = dev_read_subnode(dev, "panel");
1407 	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
1408 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
1409 						  &panel_dev);
1410 		if (!ret)
1411 			goto found;
1412 	}
1413 
1414 	ports = dev_read_subnode(dev, "ports");
1415 	if (!ofnode_valid(ports))
1416 		return NULL;
1417 
1418 	ofnode_for_each_subnode(port, ports) {
1419 		u32 reg;
1420 
1421 		if (ofnode_read_u32(port, "reg", &reg))
1422 			continue;
1423 
1424 		if (reg != PORT_DIR_OUT)
1425 			continue;
1426 
1427 		ofnode_for_each_subnode(ep, port) {
1428 			ofnode _ep, _port;
1429 			uint phandle;
1430 			bool is_ports_node = false;
1431 
1432 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1433 				continue;
1434 
1435 			_ep = ofnode_get_by_phandle(phandle);
1436 			if (!ofnode_valid(_ep))
1437 				continue;
1438 
1439 			_port = ofnode_get_parent(_ep);
1440 			if (!ofnode_valid(_port))
1441 				continue;
1442 
1443 			port_parent_node = ofnode_get_parent(_port);
1444 			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
1445 			if (is_ports_node)
1446 				panel_node = ofnode_get_parent(port_parent_node);
1447 			else
1448 				panel_node = ofnode_get_parent(_port);
1449 			if (!ofnode_valid(panel_node))
1450 				continue;
1451 
1452 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
1453 							  panel_node,
1454 							  &panel_dev);
1455 			if (!ret)
1456 				goto found;
1457 		}
1458 	}
1459 
1460 	return NULL;
1461 
1462 found:
1463 	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1464 }
1465 
1466 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
1467 {
1468 	ofnode node, ports, port, ep;
1469 	struct udevice *dev;
1470 	int ret;
1471 
1472 	ports = dev_read_subnode(conn_dev, "ports");
1473 	if (!ofnode_valid(ports))
1474 		return NULL;
1475 
1476 	ofnode_for_each_subnode(port, ports) {
1477 		u32 reg;
1478 
1479 		if (ofnode_read_u32(port, "reg", &reg))
1480 			continue;
1481 
1482 		if (reg != PORT_DIR_OUT)
1483 			continue;
1484 
1485 		ofnode_for_each_subnode(ep, port) {
1486 			ofnode _ep, _port, _ports;
1487 			uint phandle;
1488 
1489 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1490 				continue;
1491 
1492 			_ep = ofnode_get_by_phandle(phandle);
1493 			if (!ofnode_valid(_ep))
1494 				continue;
1495 
1496 			_port = ofnode_get_parent(_ep);
1497 			if (!ofnode_valid(_port))
1498 				continue;
1499 
1500 			_ports = ofnode_get_parent(_port);
1501 			if (!ofnode_valid(_ports))
1502 				continue;
1503 
1504 			node = ofnode_get_parent(_ports);
1505 			if (!ofnode_valid(node))
1506 				continue;
1507 
1508 			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
1509 							  node, &dev);
1510 			if (!ret)
1511 				goto found;
1512 		}
1513 	}
1514 
1515 	return NULL;
1516 
1517 found:
1518 	return (struct rockchip_bridge *)dev_get_driver_data(dev);
1519 }
1520 
1521 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
1522 {
1523 	ofnode ep, port, ports, conn;
1524 	uint phandle;
1525 	struct udevice *dev;
1526 	int ret;
1527 
1528 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1529 		return NULL;
1530 
1531 	ep = ofnode_get_by_phandle(phandle);
1532 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1533 		return NULL;
1534 
1535 	port = ofnode_get_parent(ep);
1536 	if (!ofnode_valid(port))
1537 		return NULL;
1538 
1539 	ports = ofnode_get_parent(port);
1540 	if (!ofnode_valid(ports))
1541 		return NULL;
1542 
1543 	conn = ofnode_get_parent(ports);
1544 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1545 		return NULL;
1546 
1547 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1548 	if (ret)
1549 		return NULL;
1550 
1551 	return dev;
1552 }
1553 
1554 static bool rockchip_get_display_path_status(ofnode endpoint)
1555 {
1556 	ofnode ep;
1557 	uint phandle;
1558 
1559 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1560 		return false;
1561 
1562 	ep = ofnode_get_by_phandle(phandle);
1563 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1564 		return false;
1565 
1566 	return true;
1567 }
1568 
1569 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1570 {
1571 	struct udevice *phy_dev;
1572 	int ret;
1573 
1574 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1575 	if (ret)
1576 		return NULL;
1577 
1578 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1579 }
1580 
1581 #if defined(CONFIG_ROCKCHIP_RK3568)
1582 static int rockchip_display_fixup_dts(void *blob)
1583 {
1584 	ofnode route_node, route_subnode, conn_ep, conn_port;
1585 	const struct device_node *route_sub_devnode;
1586 	const struct device_node *ep_node, *conn_ep_dev_node;
1587 	u32 phandle;
1588 	int conn_ep_offset;
1589 	const char *route_sub_path, *path;
1590 
1591 	/* Don't go further if new variant after
1592 	 * reading PMUGRF_SOC_CON15
1593 	 */
1594 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1595 		return 0;
1596 
1597 	route_node = ofnode_path("/display-subsystem/route");
1598 	if (!ofnode_valid(route_node))
1599 		return -EINVAL;
1600 
1601 	ofnode_for_each_subnode(route_subnode, route_node) {
1602 		if (!ofnode_is_available(route_subnode))
1603 			continue;
1604 
1605 		route_sub_devnode = ofnode_to_np(route_subnode);
1606 		route_sub_path = route_sub_devnode->full_name;
1607 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1608 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1609 			return 0;
1610 
1611 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1612 		if (phandle < 0) {
1613 			printf("Warn: can't find connect node's handle\n");
1614 			continue;
1615 		}
1616 
1617 		ep_node = of_find_node_by_phandle(phandle);
1618 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1619 			printf("Warn: can't find endpoint node from phandle\n");
1620 			continue;
1621 		}
1622 
1623 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1624 		conn_ep = ofnode_get_by_phandle(phandle);
1625 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1626 			return -ENODEV;
1627 
1628 		conn_port = ofnode_get_parent(conn_ep);
1629 		if (!ofnode_valid(conn_port))
1630 			return -ENODEV;
1631 
1632 		ofnode_for_each_subnode(conn_ep, conn_port) {
1633 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1634 			path = conn_ep_dev_node->full_name;
1635 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1636 			conn_ep_offset = fdt_path_offset(blob, path);
1637 
1638 			if (!ofnode_is_available(conn_ep) &&
1639 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1640 				do_fixup_by_path_u32(blob, route_sub_path,
1641 						     "connect", phandle, 1);
1642 				fdt_status_okay(blob, conn_ep_offset);
1643 
1644 			} else if (ofnode_is_available(conn_ep) &&
1645 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1646 				fdt_status_disabled(blob, conn_ep_offset);
1647 			}
1648 		}
1649 	}
1650 
1651 	return 0;
1652 }
1653 #endif
1654 
1655 static int rockchip_display_probe(struct udevice *dev)
1656 {
1657 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1658 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1659 	const void *blob = gd->fdt_blob;
1660 	int phandle;
1661 	struct udevice *crtc_dev, *conn_dev;
1662 	struct rockchip_crtc *crtc;
1663 	const struct rockchip_connector *conn;
1664 	struct rockchip_panel *panel = NULL;
1665 	struct rockchip_bridge *bridge = NULL;
1666 	struct rockchip_phy *phy = NULL;
1667 	struct display_state *s;
1668 	const char *name;
1669 	int ret;
1670 	ofnode node, route_node, timing_node;
1671 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1672 	struct public_phy_data *data;
1673 	bool is_ports_node = false;
1674 
1675 #if defined(CONFIG_ROCKCHIP_RK3568)
1676 	rockchip_display_fixup_dts((void *)blob);
1677 #endif
1678 
1679 	/* Before relocation we don't need to do anything */
1680 	if (!(gd->flags & GD_FLG_RELOC))
1681 		return 0;
1682 
1683 	data = malloc(sizeof(struct public_phy_data));
1684 	if (!data) {
1685 		printf("failed to alloc phy data\n");
1686 		return -ENOMEM;
1687 	}
1688 	data->phy_init = false;
1689 
1690 	init_display_buffer(plat->base);
1691 
1692 	route_node = dev_read_subnode(dev, "route");
1693 	if (!ofnode_valid(route_node))
1694 		return -ENODEV;
1695 
1696 	ofnode_for_each_subnode(node, route_node) {
1697 		if (!ofnode_is_available(node))
1698 			continue;
1699 		phandle = ofnode_read_u32_default(node, "connect", -1);
1700 		if (phandle < 0) {
1701 			printf("Warn: can't find connect node's handle\n");
1702 			continue;
1703 		}
1704 		ep_node = of_find_node_by_phandle(phandle);
1705 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1706 			printf("Warn: can't find endpoint node from phandle\n");
1707 			continue;
1708 		}
1709 		port_node = of_get_parent(ep_node);
1710 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1711 			printf("Warn: can't find port node from phandle\n");
1712 			continue;
1713 		}
1714 
1715 		port_parent_node = of_get_parent(port_node);
1716 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1717 			printf("Warn: can't find port parent node from phandle\n");
1718 			continue;
1719 		}
1720 
1721 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1722 		if (is_ports_node) {
1723 			vop_node = of_get_parent(port_parent_node);
1724 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1725 				printf("Warn: can't find crtc node from phandle\n");
1726 				continue;
1727 			}
1728 		} else {
1729 			vop_node = port_parent_node;
1730 		}
1731 
1732 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1733 						  np_to_ofnode(vop_node),
1734 						  &crtc_dev);
1735 		if (ret) {
1736 			printf("Warn: can't find crtc driver %d\n", ret);
1737 			continue;
1738 		}
1739 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1740 
1741 		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
1742 		if (!conn_dev) {
1743 			printf("Warn: can't find connect driver\n");
1744 			continue;
1745 		}
1746 
1747 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
1748 
1749 		phy = rockchip_of_find_phy(conn_dev);
1750 
1751 		bridge = rockchip_of_find_bridge(conn_dev);
1752 		if (bridge)
1753 			panel = rockchip_of_find_panel(bridge->dev);
1754 		else
1755 			panel = rockchip_of_find_panel(conn_dev);
1756 
1757 		s = malloc(sizeof(*s));
1758 		if (!s)
1759 			continue;
1760 
1761 		memset(s, 0, sizeof(*s));
1762 
1763 		INIT_LIST_HEAD(&s->head);
1764 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1765 		if (!ret)
1766 			memcpy(s->ulogo_name, name, strlen(name));
1767 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1768 		if (!ret)
1769 			memcpy(s->klogo_name, name, strlen(name));
1770 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1771 		if (!strcmp(name, "fullscreen"))
1772 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1773 		else
1774 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1775 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1776 		if (!strcmp(name, "fullscreen"))
1777 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1778 		else
1779 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1780 
1781 		s->force_output = ofnode_read_bool(node, "force-output");
1782 
1783 		if (s->force_output) {
1784 			timing_node = ofnode_find_subnode(node, "force_timing");
1785 			ret = display_get_force_timing_from_dts(timing_node, &s->force_mode);
1786 			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
1787 				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
1788 		}
1789 
1790 		s->blob = blob;
1791 		s->panel_state.panel = panel;
1792 		s->conn_state.node = conn_dev->node;
1793 		s->conn_state.dev = conn_dev;
1794 		s->conn_state.connector = conn;
1795 		s->conn_state.phy = phy;
1796 		s->conn_state.bridge = bridge;
1797 		s->conn_state.overscan.left_margin = 100;
1798 		s->conn_state.overscan.right_margin = 100;
1799 		s->conn_state.overscan.top_margin = 100;
1800 		s->conn_state.overscan.bottom_margin = 100;
1801 		s->crtc_state.node = np_to_ofnode(vop_node);
1802 		s->crtc_state.dev = crtc_dev;
1803 		s->crtc_state.crtc = crtc;
1804 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
1805 		s->node = node;
1806 
1807 		if (is_ports_node) { /* only vop2 will get into here */
1808 			ofnode vp_node = np_to_ofnode(port_node);
1809 			static bool get_plane_mask_from_dts;
1810 
1811 			s->crtc_state.ports_node = port_parent_node;
1812 			if (!get_plane_mask_from_dts) {
1813 				ofnode vp_sub_node;
1814 				int vp_id = 0;
1815 				bool vp_enable = false;
1816 
1817 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
1818 					int cursor_plane = -1;
1819 
1820 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
1821 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
1822 
1823 					cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
1824 					s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
1825 					if (ret) {
1826 						int primary_plane = 0;
1827 
1828 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
1829 						s->crtc_state.crtc->assign_plane |= true;
1830 						primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0);
1831 						printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
1832 						       vp_id,
1833 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
1834 						       primary_plane,
1835 						       cursor_plane);
1836 					}
1837 
1838 					/* To check current vp status */
1839 					vp_enable = false;
1840 					ofnode_for_each_subnode(vp_sub_node, vp_node)
1841 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
1842 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
1843 				}
1844 				get_plane_mask_from_dts = true;
1845 			}
1846 		}
1847 
1848 		if (bridge)
1849 			bridge->state = s;
1850 
1851 		if (panel)
1852 			panel->state = s;
1853 
1854 		get_crtc_mcu_mode(&s->crtc_state);
1855 
1856 		ret = ofnode_read_u32_default(s->crtc_state.node,
1857 					      "rockchip,dual-channel-swap", 0);
1858 		s->crtc_state.dual_channel_swap = ret;
1859 		if (connector_panel_init(s)) {
1860 			printf("Warn: Failed to init panel drivers\n");
1861 			free(s);
1862 			continue;
1863 		}
1864 
1865 		if (connector_phy_init(s, data)) {
1866 			printf("Warn: Failed to init phy drivers\n");
1867 			free(s);
1868 			continue;
1869 		}
1870 		list_add_tail(&s->head, &rockchip_display_list);
1871 	}
1872 
1873 	if (list_empty(&rockchip_display_list)) {
1874 		debug("Failed to found available display route\n");
1875 		return -ENODEV;
1876 	}
1877 	rockchip_get_baseparameter();
1878 	display_pre_init();
1879 
1880 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1881 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1882 	uc_priv->bpix = VIDEO_BPP32;
1883 
1884 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1885 	rockchip_show_fbbase(plat->base);
1886 	video_set_flush_dcache(dev, true);
1887 	#endif
1888 
1889 	return 0;
1890 }
1891 
1892 void rockchip_display_fixup(void *blob)
1893 {
1894 	const struct rockchip_connector_funcs *conn_funcs;
1895 	const struct rockchip_crtc_funcs *crtc_funcs;
1896 	const struct rockchip_connector *conn;
1897 	const struct rockchip_crtc *crtc;
1898 	struct display_state *s;
1899 	int offset;
1900 	const struct device_node *np;
1901 	const char *path;
1902 
1903 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1904 		list_for_each_entry(s, &rockchip_display_list, head)
1905 			load_bmp_logo(&s->logo, s->klogo_name);
1906 
1907 		if (!get_display_size())
1908 			return;
1909 
1910 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1911 						    (u64)memory_start,
1912 						    (u64)get_display_size());
1913 		if (offset < 0)
1914 			printf("failed to reserve drm-loader-logo memory\n");
1915 
1916 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
1917 						    (u64)cubic_lut_memory_start,
1918 						    (u64)get_cubic_memory_size());
1919 		if (offset < 0)
1920 			printf("failed to reserve drm-cubic-lut memory\n");
1921 	} else {
1922 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1923 		/* Compatible with rkfb display, only need reserve memory */
1924 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1925 						    (u64)memory_start,
1926 						    MEMORY_POOL_SIZE);
1927 		if (offset < 0)
1928 			printf("failed to reserve fb-loader-logo memory\n");
1929 		else
1930 			list_for_each_entry(s, &rockchip_display_list, head)
1931 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
1932 		return;
1933 	}
1934 
1935 	list_for_each_entry(s, &rockchip_display_list, head) {
1936 		conn = s->conn_state.connector;
1937 		if (!conn)
1938 			continue;
1939 		conn_funcs = conn->funcs;
1940 		if (!conn_funcs) {
1941 			printf("failed to get exist connector\n");
1942 			continue;
1943 		}
1944 
1945 		crtc = s->crtc_state.crtc;
1946 		if (!crtc)
1947 			continue;
1948 
1949 		crtc_funcs = crtc->funcs;
1950 		if (!crtc_funcs) {
1951 			printf("failed to get exist crtc\n");
1952 			continue;
1953 		}
1954 
1955 		if (crtc_funcs->fixup_dts)
1956 			crtc_funcs->fixup_dts(s, blob);
1957 
1958 		if (conn_funcs->fixup_dts)
1959 			conn_funcs->fixup_dts(s, blob);
1960 
1961 		np = ofnode_to_np(s->node);
1962 		path = np->full_name;
1963 		fdt_increase_size(blob, 0x400);
1964 #define FDT_SET_U32(name, val) \
1965 		do_fixup_by_path_u32(blob, path, name, val, 1);
1966 
1967 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
1968 			 - memory_start;
1969 		FDT_SET_U32("logo,offset", offset);
1970 		FDT_SET_U32("logo,width", s->logo.width);
1971 		FDT_SET_U32("logo,height", s->logo.height);
1972 		FDT_SET_U32("logo,bpp", s->logo.bpp);
1973 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
1974 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
1975 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
1976 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
1977 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
1978 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
1979 		FDT_SET_U32("video,vrefresh",
1980 			    drm_mode_vrefresh(&s->conn_state.mode));
1981 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
1982 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
1983 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
1984 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
1985 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
1986 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
1987 
1988 		if (s->conn_state.disp_info) {
1989 			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
1990 			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
1991 			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
1992 			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
1993 		}
1994 
1995 		if (s->conn_state.disp_info->cubic_lut_data.size &&
1996 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
1997 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
1998 
1999 #undef FDT_SET_U32
2000 	}
2001 }
2002 
2003 int rockchip_display_bind(struct udevice *dev)
2004 {
2005 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2006 
2007 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2008 
2009 	return 0;
2010 }
2011 
2012 static const struct udevice_id rockchip_display_ids[] = {
2013 	{ .compatible = "rockchip,display-subsystem" },
2014 	{ }
2015 };
2016 
2017 U_BOOT_DRIVER(rockchip_display) = {
2018 	.name	= "rockchip_display",
2019 	.id	= UCLASS_VIDEO,
2020 	.of_match = rockchip_display_ids,
2021 	.bind	= rockchip_display_bind,
2022 	.probe	= rockchip_display_probe,
2023 };
2024 
2025 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2026 			char *const argv[])
2027 {
2028 	if (argc != 1)
2029 		return CMD_RET_USAGE;
2030 
2031 	rockchip_show_logo();
2032 
2033 	return 0;
2034 }
2035 
2036 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2037 				char *const argv[])
2038 {
2039 	if (argc != 2)
2040 		return CMD_RET_USAGE;
2041 
2042 	rockchip_show_bmp(argv[1]);
2043 
2044 	return 0;
2045 }
2046 
2047 U_BOOT_CMD(
2048 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2049 	"load and display log from resource partition",
2050 	NULL
2051 );
2052 
2053 U_BOOT_CMD(
2054 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2055 	"load and display bmp from resource partition",
2056 	"    <bmp_name>"
2057 );
2058