xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 647502d6f747bc2f4db31c4d5855ffd2b34bd7f2)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/list.h>
17 #include <linux/compat.h>
18 #include <linux/media-bus-format.h>
19 #include <malloc.h>
20 #include <video.h>
21 #include <video_rockchip.h>
22 #include <video_bridge.h>
23 #include <dm/device.h>
24 #include <dm/uclass-internal.h>
25 #include <asm/arch-rockchip/resource_img.h>
26 
27 #include "bmp_helper.h"
28 #include "rockchip_display.h"
29 #include "rockchip_crtc.h"
30 #include "rockchip_connector.h"
31 #include "rockchip_bridge.h"
32 #include "rockchip_phy.h"
33 #include "rockchip_panel.h"
34 #include <dm.h>
35 #include <dm/of_access.h>
36 #include <dm/ofnode.h>
37 #include <asm/io.h>
38 
39 #define DRIVER_VERSION	"v1.0.1"
40 
41 /***********************************************************************
42  *  Rockchip UBOOT DRM driver version
43  *
44  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
45  *  v1.0.1	: add much dsi update(hjc)
46  *
47  **********************************************************************/
48 
49 #define RK_BLK_SIZE 512
50 #define BMP_PROCESSED_FLAG 8399
51 
52 DECLARE_GLOBAL_DATA_PTR;
53 static LIST_HEAD(rockchip_display_list);
54 static LIST_HEAD(logo_cache_list);
55 
56 static unsigned long memory_start;
57 static unsigned long cubic_lut_memory_start;
58 static unsigned long memory_end;
59 static struct base2_info base_parameter;
60 static uint32_t crc32_table[256];
61 
62 /*
63  * the phy types are used by different connectors in public.
64  * The current version only has inno hdmi phy for hdmi and tve.
65  */
66 enum public_use_phy {
67 	NONE,
68 	INNO_HDMI_PHY
69 };
70 
71 /* save public phy data */
72 struct public_phy_data {
73 	const struct rockchip_phy *phy_drv;
74 	int phy_node;
75 	int public_phy_type;
76 	bool phy_init;
77 };
78 
79 void rockchip_display_make_crc32_table(void)
80 {
81 	uint32_t c;
82 	int n, k;
83 	unsigned long poly;		/* polynomial exclusive-or pattern */
84 	/* terms of polynomial defining this crc (except x^32): */
85 	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
86 
87 	/* make exclusive-or pattern from polynomial (0xedb88320L) */
88 	poly = 0L;
89 	for (n = 0; n < sizeof(p) / sizeof(char); n++)
90 		poly |= 1L << (31 - p[n]);
91 
92 	for (n = 0; n < 256; n++) {
93 		c = (unsigned long)n;
94 		for (k = 0; k < 8; k++)
95 		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
96 		crc32_table[n] = cpu_to_le32(c);
97 	}
98 }
99 
100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
101 {
102 	int i;
103 	uint32_t crc;
104 	crc = 0xFFFFFFFF;
105 
106 	for (i = 0; i < length; i++) {
107 		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
108 		data++;
109 	}
110 
111 	return crc ^ 0xffffffff;
112 }
113 
114 int rockchip_get_baseparameter(void)
115 {
116 	struct blk_desc *dev_desc;
117 	disk_partition_t part_info;
118 	int block_num = 2048;
119 	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
120 	int ret = 0;
121 
122 	dev_desc = rockchip_get_bootdev();
123 	if (!dev_desc) {
124 		printf("%s: Could not find device\n", __func__);
125 		return -ENOENT;
126 	}
127 
128 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
129 		printf("Could not find baseparameter partition\n");
130 		return -ENOENT;
131 	}
132 
133 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
134 	if (ret < 0) {
135 		printf("read baseparameter failed\n");
136 		return ret;
137 	}
138 
139 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
140 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
141 		printf("warning: bad baseparameter\n");
142 		memset(&base_parameter, 0, sizeof(base_parameter));
143 	}
144 	rockchip_display_make_crc32_table();
145 
146 	return ret;
147 }
148 
149 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
150 {
151 	struct base2_disp_info *disp_info;
152 	struct base2_disp_header *disp_header;
153 	int i = 0, offset = -1;
154 	u32 crc_val;
155 	void *base_parameter_addr = (void *)&base_parameter;
156 
157 	for (i = 0; i < 8; i++) {
158 		disp_header = &base_parameter.disp_header[i];
159 		if (disp_header->connector_type == type &&
160 		    disp_header->connector_id == id) {
161 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
162 			offset = disp_header->offset;
163 			break;
164 		}
165 	}
166 
167 	if (offset < 0)
168 		return NULL;
169 	disp_info = base_parameter_addr + offset;
170 	if (disp_info->screen_info[0].type != type ||
171 	    disp_info->screen_info[0].id != id) {
172 		printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n",
173 		       disp_info->screen_info[0].type,
174 		       disp_info->screen_info[0].id);
175 		return NULL;
176 	}
177 
178 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
179 		return NULL;
180 
181 	crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4);
182 
183 	if (crc_val != disp_info->crc) {
184 		printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id);
185 		return NULL;
186 	}
187 
188 	return disp_info;
189 }
190 
191 /* check which kind of public phy does connector use */
192 static int check_public_use_phy(struct display_state *state)
193 {
194 	int ret = NONE;
195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
196 	struct connector_state *conn_state = &state->conn_state;
197 
198 	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
199 	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
200 		ret = INNO_HDMI_PHY;
201 #endif
202 
203 	return ret;
204 }
205 
206 /*
207  * get public phy driver and initialize it.
208  * The current version only has inno hdmi phy for hdmi and tve.
209  */
210 static int get_public_phy(struct display_state *state,
211 			  struct public_phy_data *data)
212 {
213 	struct connector_state *conn_state = &state->conn_state;
214 	struct rockchip_phy *phy;
215 	struct udevice *dev;
216 	int ret = 0;
217 
218 	switch (data->public_phy_type) {
219 	case INNO_HDMI_PHY:
220 #if defined(CONFIG_ROCKCHIP_RK3328)
221 		ret = uclass_get_device_by_name(UCLASS_PHY,
222 						"hdmiphy@ff430000", &dev);
223 #elif defined(CONFIG_ROCKCHIP_RK322X)
224 		ret = uclass_get_device_by_name(UCLASS_PHY,
225 						"hdmi-phy@12030000", &dev);
226 #else
227 		ret = -EINVAL;
228 #endif
229 		if (ret) {
230 			printf("Warn: can't find phy driver\n");
231 			return 0;
232 		}
233 
234 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
235 		if (!phy) {
236 			printf("failed to get phy driver\n");
237 			return 0;
238 		}
239 
240 		ret = rockchip_phy_init(phy);
241 		if (ret) {
242 			printf("failed to init phy driver\n");
243 			return ret;
244 		}
245 		conn_state->phy = phy;
246 
247 		debug("inno hdmi phy init success, save it\n");
248 		data->phy_drv = conn_state->phy;
249 		data->phy_init = true;
250 		return 0;
251 	default:
252 		return -EINVAL;
253 	}
254 }
255 
256 static void init_display_buffer(ulong base)
257 {
258 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
259 	memory_end = memory_start;
260 	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
261 }
262 
263 void *get_display_buffer(int size)
264 {
265 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
266 	void *buf;
267 
268 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
269 		printf("failed to alloc %dbyte memory to display\n", size);
270 		return NULL;
271 	}
272 	buf = (void *)roundup_memory;
273 
274 	memory_end = roundup_memory + size;
275 
276 	return buf;
277 }
278 
279 static unsigned long get_display_size(void)
280 {
281 	return memory_end - memory_start;
282 }
283 
284 static unsigned long get_single_cubic_lut_size(void)
285 {
286 	ulong cubic_lut_size;
287 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
288 
289 	/* This is depend on IC designed */
290 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
291 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
292 
293 	return cubic_lut_size;
294 }
295 
296 static unsigned long get_cubic_lut_offset(int crtc_id)
297 {
298 	return crtc_id * get_single_cubic_lut_size();
299 }
300 
301 unsigned long get_cubic_lut_buffer(int crtc_id)
302 {
303 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
304 }
305 
306 static unsigned long get_cubic_memory_size(void)
307 {
308 	/* Max support 4 cubic lut */
309 	return get_single_cubic_lut_size() * 4;
310 }
311 
312 bool can_direct_logo(int bpp)
313 {
314 	return bpp == 16 || bpp == 32;
315 }
316 
317 static int connector_phy_init(struct display_state *state,
318 			      struct public_phy_data *data)
319 {
320 	struct connector_state *conn_state = &state->conn_state;
321 	int type;
322 
323 	/* does this connector use public phy with others */
324 	type = check_public_use_phy(state);
325 	if (type == INNO_HDMI_PHY) {
326 		/* there is no public phy was initialized */
327 		if (!data->phy_init) {
328 			debug("start get public phy\n");
329 			data->public_phy_type = type;
330 			if (get_public_phy(state, data)) {
331 				printf("can't find correct public phy type\n");
332 				free(data);
333 				return -EINVAL;
334 			}
335 			return 0;
336 		}
337 
338 		/* if this phy has been initialized, get it directly */
339 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
340 		return 0;
341 	}
342 
343 	return 0;
344 }
345 
346 static int connector_panel_init(struct display_state *state)
347 {
348 	struct connector_state *conn_state = &state->conn_state;
349 	struct panel_state *panel_state = &state->panel_state;
350 	const struct rockchip_panel *panel = panel_state->panel;
351 	ofnode dsp_lut_node;
352 	int ret, len;
353 
354 	if (!panel)
355 		return 0;
356 
357 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
358 	if (!ofnode_valid(dsp_lut_node)) {
359 		debug("%s can not find dsp-lut node\n", __func__);
360 		return 0;
361 	}
362 
363 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
364 	if (len > 0) {
365 		conn_state->gamma.size = len / sizeof(u32);
366 		conn_state->gamma.lut = malloc(len);
367 		if (!conn_state->gamma.lut) {
368 			printf("malloc gamma lut failed\n");
369 			return -ENOMEM;
370 		}
371 		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
372 					    conn_state->gamma.lut,
373 					    conn_state->gamma.size);
374 		if (ret) {
375 			printf("Cannot decode gamma_lut\n");
376 			conn_state->gamma.lut = NULL;
377 			return -EINVAL;
378 		}
379 		panel_state->dsp_lut_node = dsp_lut_node;
380 	}
381 
382 	return 0;
383 }
384 
385 int drm_mode_vrefresh(const struct drm_display_mode *mode)
386 {
387 	int refresh = 0;
388 	unsigned int calc_val;
389 
390 	if (mode->vrefresh > 0) {
391 		refresh = mode->vrefresh;
392 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
393 		int vtotal;
394 
395 		vtotal = mode->vtotal;
396 		/* work out vrefresh the value will be x1000 */
397 		calc_val = (mode->clock * 1000);
398 		calc_val /= mode->htotal;
399 		refresh = (calc_val + vtotal / 2) / vtotal;
400 
401 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
402 			refresh *= 2;
403 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
404 			refresh /= 2;
405 		if (mode->vscan > 1)
406 			refresh /= mode->vscan;
407 	}
408 	return refresh;
409 }
410 
411 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode)
412 {
413 	int hactive, vactive, pixelclock;
414 	int hfront_porch, hback_porch, hsync_len;
415 	int vfront_porch, vback_porch, vsync_len;
416 	int val, flags = 0;
417 
418 #define FDT_GET_INT(val, name) \
419 	val = ofnode_read_s32_default(node, name, -1); \
420 	if (val < 0) { \
421 		printf("Can't get %s\n", name); \
422 		return -ENXIO; \
423 	}
424 
425 #define FDT_GET_INT_DEFAULT(val, name, default) \
426 	val = ofnode_read_s32_default(node, name, default);
427 
428 	FDT_GET_INT(hactive, "hactive");
429 	FDT_GET_INT(vactive, "vactive");
430 	FDT_GET_INT(pixelclock, "clock-frequency");
431 	FDT_GET_INT(hsync_len, "hsync-len");
432 	FDT_GET_INT(hfront_porch, "hfront-porch");
433 	FDT_GET_INT(hback_porch, "hback-porch");
434 	FDT_GET_INT(vsync_len, "vsync-len");
435 	FDT_GET_INT(vfront_porch, "vfront-porch");
436 	FDT_GET_INT(vback_porch, "vback-porch");
437 	FDT_GET_INT(val, "hsync-active");
438 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
439 	FDT_GET_INT(val, "vsync-active");
440 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
441 	FDT_GET_INT(val, "pixelclk-active");
442 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
443 
444 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
445 	if (val == DRM_MODE_FLAG_XMIRROR) {
446 		flags |= DRM_MODE_FLAG_XMIRROR;
447 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
448 		flags |= DRM_MODE_FLAG_YMIRROR;
449 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
450 		flags |= DRM_MODE_FLAG_XMIRROR;
451 		flags |= DRM_MODE_FLAG_YMIRROR;
452 	}
453 	mode->hdisplay = hactive;
454 	mode->hsync_start = mode->hdisplay + hfront_porch;
455 	mode->hsync_end = mode->hsync_start + hsync_len;
456 	mode->htotal = mode->hsync_end + hback_porch;
457 
458 	mode->vdisplay = vactive;
459 	mode->vsync_start = mode->vdisplay + vfront_porch;
460 	mode->vsync_end = mode->vsync_start + vsync_len;
461 	mode->vtotal = mode->vsync_end + vback_porch;
462 
463 	mode->clock = pixelclock / 1000;
464 	mode->flags = flags;
465 	mode->vrefresh = drm_mode_vrefresh(mode);
466 
467 	return 0;
468 }
469 
470 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode)
471 {
472 	int ret = 0;
473 
474 	ret = rockchip_ofnode_get_display_mode(node, mode);
475 
476 	if (ret) {
477 		mode->clock = 74250;
478 		mode->flags = 0x5;
479 		mode->hdisplay = 1280;
480 		mode->hsync_start = 1390;
481 		mode->hsync_end = 1430;
482 		mode->htotal = 1650;
483 		mode->hskew = 0;
484 		mode->vdisplay = 720;
485 		mode->vsync_start = 725;
486 		mode->vsync_end = 730;
487 		mode->vtotal = 750;
488 		mode->vrefresh = 60;
489 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
490 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
491 	}
492 
493 	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
494 	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
495 	       mode->vscan);
496 
497 	return 0;
498 }
499 
500 static int display_get_timing_from_dts(struct panel_state *panel_state,
501 				       struct drm_display_mode *mode)
502 {
503 	struct rockchip_panel *panel = panel_state->panel;
504 	struct ofnode_phandle_args args;
505 	ofnode dt, timing;
506 	int ret;
507 
508 	dt = dev_read_subnode(panel->dev, "display-timings");
509 	if (ofnode_valid(dt)) {
510 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
511 						     0, 0, &args);
512 		if (ret)
513 			return ret;
514 
515 		timing = args.node;
516 	} else {
517 		timing = dev_read_subnode(panel->dev, "panel-timing");
518 	}
519 
520 	if (!ofnode_valid(timing)) {
521 		printf("failed to get display timings from DT\n");
522 		return -ENXIO;
523 	}
524 
525 	rockchip_ofnode_get_display_mode(timing, mode);
526 
527 	return 0;
528 }
529 
530 /**
531  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
532  * @edid_data: structure store mode list
533  * @max_output: vop max output resolution
534  */
535 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
536 				    struct vop_rect *max_output)
537 {
538 	int i;
539 
540 	for (i = 0; i < edid_data->modes; i++) {
541 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
542 		    edid_data->mode_buf[i].vdisplay > max_output->height)
543 			edid_data->mode_buf[i].invalid = true;
544 	}
545 }
546 
547 /**
548  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
549  * @p: mode
550  * @adjust_flags: a combination of adjustment flags
551  *
552  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
553  *
554  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
555  *   interlaced modes.
556  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
557  *   buffers containing two eyes (only adjust the timings when needed, eg. for
558  *   "frame packing" or "side by side full").
559  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
560  *   be performed for doublescan and vscan > 1 modes respectively.
561  */
562 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
563 {
564 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
565 		return;
566 
567 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
568 		p->crtc_clock = 2 * p->clock;
569 	else
570 		p->crtc_clock = p->clock;
571 	p->crtc_hdisplay = p->hdisplay;
572 	p->crtc_hsync_start = p->hsync_start;
573 	p->crtc_hsync_end = p->hsync_end;
574 	p->crtc_htotal = p->htotal;
575 	p->crtc_hskew = p->hskew;
576 	p->crtc_vdisplay = p->vdisplay;
577 	p->crtc_vsync_start = p->vsync_start;
578 	p->crtc_vsync_end = p->vsync_end;
579 	p->crtc_vtotal = p->vtotal;
580 
581 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
582 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
583 			p->crtc_vdisplay /= 2;
584 			p->crtc_vsync_start /= 2;
585 			p->crtc_vsync_end /= 2;
586 			p->crtc_vtotal /= 2;
587 		}
588 	}
589 
590 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
591 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
592 			p->crtc_vdisplay *= 2;
593 			p->crtc_vsync_start *= 2;
594 			p->crtc_vsync_end *= 2;
595 			p->crtc_vtotal *= 2;
596 		}
597 	}
598 
599 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
600 		if (p->vscan > 1) {
601 			p->crtc_vdisplay *= p->vscan;
602 			p->crtc_vsync_start *= p->vscan;
603 			p->crtc_vsync_end *= p->vscan;
604 			p->crtc_vtotal *= p->vscan;
605 		}
606 	}
607 
608 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
609 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
610 
611 		switch (layout) {
612 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
613 			p->crtc_clock *= 2;
614 			p->crtc_vdisplay += p->crtc_vtotal;
615 			p->crtc_vsync_start += p->crtc_vtotal;
616 			p->crtc_vsync_end += p->crtc_vtotal;
617 			p->crtc_vtotal += p->crtc_vtotal;
618 			break;
619 		}
620 	}
621 
622 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
623 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
624 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
625 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
626 }
627 
628 /**
629  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
630  * output format
631  *
632  * @connector: drm connector under action.
633  * @mode: video mode to be tested.
634  *
635  * Returns:
636  * true if the mode can be supported in YCBCR420 format
637  * false if not.
638  */
639 bool drm_mode_is_420_only(const struct drm_display_info *display,
640 			  struct drm_display_mode *mode)
641 {
642 	u8 vic = drm_match_cea_mode(mode);
643 
644 	return test_bit(vic, display->hdmi.y420_vdb_modes);
645 }
646 
647 /**
648  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
649  * output format also (along with RGB/YCBCR444/422)
650  *
651  * @display: display under action.
652  * @mode: video mode to be tested.
653  *
654  * Returns:
655  * true if the mode can be support YCBCR420 format
656  * false if not.
657  */
658 bool drm_mode_is_420_also(const struct drm_display_info *display,
659 			  struct drm_display_mode *mode)
660 {
661 	u8 vic = drm_match_cea_mode(mode);
662 
663 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
664 }
665 
666 /**
667  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
668  * output format
669  *
670  * @display: display under action.
671  * @mode: video mode to be tested.
672  *
673  * Returns:
674  * true if the mode can be supported in YCBCR420 format
675  * false if not.
676  */
677 bool drm_mode_is_420(const struct drm_display_info *display,
678 		     struct drm_display_mode *mode)
679 {
680 	return drm_mode_is_420_only(display, mode) ||
681 		drm_mode_is_420_also(display, mode);
682 }
683 
684 static int display_get_timing(struct display_state *state)
685 {
686 	struct connector_state *conn_state = &state->conn_state;
687 	struct drm_display_mode *mode = &conn_state->mode;
688 	const struct drm_display_mode *m;
689 	struct panel_state *panel_state = &state->panel_state;
690 	const struct rockchip_panel *panel = panel_state->panel;
691 
692 	if (dev_of_valid(panel->dev) &&
693 	    !display_get_timing_from_dts(panel_state, mode)) {
694 		printf("Using display timing dts\n");
695 		return 0;
696 	}
697 
698 	if (panel->data) {
699 		m = (const struct drm_display_mode *)panel->data;
700 		memcpy(mode, m, sizeof(*m));
701 		printf("Using display timing from compatible panel driver\n");
702 		return 0;
703 	}
704 
705 	return -ENODEV;
706 }
707 
708 static int display_pre_init(void)
709 {
710 	struct display_state *state;
711 	int ret = 0;
712 
713 	list_for_each_entry(state, &rockchip_display_list, head) {
714 		struct connector_state *conn_state = &state->conn_state;
715 		const struct rockchip_connector *conn = conn_state->connector;
716 		const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
717 		struct crtc_state *crtc_state = &state->crtc_state;
718 		struct rockchip_crtc *crtc = crtc_state->crtc;
719 
720 		if (conn_funcs->pre_init) {
721 			ret = conn_funcs->pre_init(state);
722 			if (ret)
723 				printf("pre init conn error\n");
724 		}
725 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
726 	}
727 	return ret;
728 }
729 
730 static int display_use_force_mode(struct display_state *state)
731 {
732 	struct connector_state *conn_state = &state->conn_state;
733 	struct drm_display_mode *mode = &conn_state->mode;
734 
735 	conn_state->bpc = 8;
736 	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
737 	conn_state->bus_format = state->force_bus_format;
738 
739 	return 0;
740 }
741 
742 static int display_get_edid_mode(struct display_state *state)
743 {
744 	int ret = 0;
745 	struct connector_state *conn_state = &state->conn_state;
746 	struct drm_display_mode *mode = &conn_state->mode;
747 	int bpc;
748 
749 	ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
750 	if (!ret) {
751 		conn_state->bpc = bpc;
752 		edid_print_info((void *)&conn_state->edid);
753 	} else {
754 		conn_state->bpc = 8;
755 		mode->clock = 74250;
756 		mode->flags = 0x5;
757 		mode->hdisplay = 1280;
758 		mode->hsync_start = 1390;
759 		mode->hsync_end = 1430;
760 		mode->htotal = 1650;
761 		mode->hskew = 0;
762 		mode->vdisplay = 720;
763 		mode->vsync_start = 725;
764 		mode->vsync_end = 730;
765 		mode->vtotal = 750;
766 		mode->vrefresh = 60;
767 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
768 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
769 
770 		printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name);
771 	}
772 
773 	return ret;
774 }
775 
776 static int display_init(struct display_state *state)
777 {
778 	struct connector_state *conn_state = &state->conn_state;
779 	struct panel_state *panel_state = &state->panel_state;
780 	const struct rockchip_connector *conn = conn_state->connector;
781 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
782 	struct crtc_state *crtc_state = &state->crtc_state;
783 	struct rockchip_crtc *crtc = crtc_state->crtc;
784 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
785 	struct drm_display_mode *mode = &conn_state->mode;
786 	const char *compatible;
787 	int ret = 0;
788 	static bool __print_once = false;
789 
790 	if (!__print_once) {
791 		__print_once = true;
792 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
793 	}
794 
795 	if (state->is_init)
796 		return 0;
797 
798 	if (!conn_funcs || !crtc_funcs) {
799 		printf("failed to find connector or crtc functions\n");
800 		return -ENXIO;
801 	}
802 
803 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
804 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
805 		   sizeof(struct drm_display_mode))) {
806 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
807 			crtc_state->dev->name,
808 			crtc_state->crtc->active_mode.type,
809 			crtc_state->crtc->active_mode.hdisplay,
810 			crtc_state->crtc->active_mode.vdisplay,
811 			crtc_state->crtc->active_mode.vrefresh);
812 		return -ENODEV;
813 	}
814 
815 	if (crtc_funcs->preinit) {
816 		ret = crtc_funcs->preinit(state);
817 		if (ret)
818 			return ret;
819 	}
820 
821 	if (panel_state->panel)
822 		rockchip_panel_init(panel_state->panel, state);
823 
824 	if (conn_state->bridge)
825 		rockchip_bridge_init(conn_state->bridge, state);
826 
827 	if (conn_funcs->init) {
828 		ret = conn_funcs->init(state);
829 		if (ret)
830 			goto deinit;
831 	}
832 
833 	if (conn_state->phy)
834 		rockchip_phy_init(conn_state->phy);
835 
836 	/*
837 	 * support hotplug, but not connect;
838 	 */
839 #ifdef CONFIG_ROCKCHIP_DRM_TVE
840 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
841 		printf("hdmi plugin ,skip tve\n");
842 		goto deinit;
843 	}
844 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
845 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
846 		printf("hdmi plugin ,skip tve\n");
847 		goto deinit;
848 	}
849 #endif
850 	if (conn_funcs->detect) {
851 		ret = conn_funcs->detect(state);
852 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
853 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
854 			crtc->hdmi_hpd = ret;
855 #endif
856 		if (!ret && !state->force_output) {
857 			printf("%s disconnected\n", conn_state->dev->name);
858 			goto deinit;
859 		}
860 	}
861 
862 	if (conn_state->bridge) {
863 		if (!rockchip_bridge_detect(conn_state->bridge)) {
864 			printf("%s disconnected\n",
865 			       dev_np(conn_state->bridge->dev)->full_name);
866 			goto deinit;
867 		}
868 	}
869 
870 	if (panel_state->panel) {
871 		ret = display_get_timing(state);
872 		if (!ret)
873 			conn_state->bpc = panel_state->panel->bpc;
874 #if defined(CONFIG_I2C_EDID)
875 		if (ret < 0 && conn_funcs->get_edid) {
876 			rockchip_panel_prepare(panel_state->panel);
877 			ret = conn_funcs->get_edid(state);
878 			if (!ret)
879 				display_get_edid_mode(state);
880 		}
881 #endif
882 	} else if (conn_state->bridge) {
883 		ret = video_bridge_read_edid(conn_state->bridge->dev,
884 					     conn_state->edid, EDID_SIZE);
885 		if (ret > 0) {
886 #if defined(CONFIG_I2C_EDID)
887 			display_get_edid_mode(state);
888 #endif
889 		} else {
890 			ret = video_bridge_get_timing(conn_state->bridge->dev);
891 		}
892 	} else if (conn_funcs->get_timing) {
893 		ret = conn_funcs->get_timing(state);
894 	} else if (conn_funcs->get_edid) {
895 		ret = conn_funcs->get_edid(state);
896 #if defined(CONFIG_I2C_EDID)
897 		if (!ret)
898 			display_get_edid_mode(state);
899 #endif
900 	}
901 
902 	if (ret && !state->force_output)
903 		goto deinit;
904 	if (state->force_output)
905 		display_use_force_mode(state);
906 
907 	/* rk356x series drive mipi pixdata on posedge */
908 	compatible = dev_read_string(conn_state->dev, "compatible");
909 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
910 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
911 
912 	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
913 	       "    H: %04d %04d %04d %04d\n"
914 	       "    V: %04d %04d %04d %04d\n"
915 	       "bus_format: %x\n",
916 	       conn_state->dev->name,
917 	       state->force_output ? "use force output" : "",
918 	       mode->clock, mode->flags,
919 	       mode->hdisplay, mode->hsync_start,
920 	       mode->hsync_end, mode->htotal,
921 	       mode->vdisplay, mode->vsync_start,
922 	       mode->vsync_end, mode->vtotal,
923 	       conn_state->bus_format);
924 
925 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
926 
927 	if (conn_state->bridge)
928 		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
929 
930 	if (crtc_funcs->init) {
931 		ret = crtc_funcs->init(state);
932 		if (ret)
933 			goto deinit;
934 	}
935 	state->is_init = 1;
936 
937 	crtc_state->crtc->active = true;
938 	memcpy(&crtc_state->crtc->active_mode,
939 	       &conn_state->mode, sizeof(struct drm_display_mode));
940 
941 	return 0;
942 
943 deinit:
944 	if (conn_funcs->deinit)
945 		conn_funcs->deinit(state);
946 	return ret;
947 }
948 
949 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
950 {
951 	struct crtc_state *crtc_state = &state->crtc_state;
952 	const struct rockchip_crtc *crtc = crtc_state->crtc;
953 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
954 	int ret;
955 
956 	if (!state->is_init)
957 		return -EINVAL;
958 
959 	if (crtc_funcs->send_mcu_cmd) {
960 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
961 		if (ret)
962 			return ret;
963 	}
964 
965 	return 0;
966 }
967 
968 static int display_set_plane(struct display_state *state)
969 {
970 	struct crtc_state *crtc_state = &state->crtc_state;
971 	const struct rockchip_crtc *crtc = crtc_state->crtc;
972 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
973 	int ret;
974 
975 	if (!state->is_init)
976 		return -EINVAL;
977 
978 	if (crtc_funcs->set_plane) {
979 		ret = crtc_funcs->set_plane(state);
980 		if (ret)
981 			return ret;
982 	}
983 
984 	return 0;
985 }
986 
987 static int display_enable(struct display_state *state)
988 {
989 	struct connector_state *conn_state = &state->conn_state;
990 	const struct rockchip_connector *conn = conn_state->connector;
991 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
992 	struct crtc_state *crtc_state = &state->crtc_state;
993 	const struct rockchip_crtc *crtc = crtc_state->crtc;
994 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
995 	struct panel_state *panel_state = &state->panel_state;
996 
997 	if (!state->is_init)
998 		return -EINVAL;
999 
1000 	if (state->is_enable)
1001 		return 0;
1002 
1003 	if (crtc_funcs->prepare)
1004 		crtc_funcs->prepare(state);
1005 
1006 	if (conn_funcs->prepare)
1007 		conn_funcs->prepare(state);
1008 
1009 	if (conn_state->bridge)
1010 		rockchip_bridge_pre_enable(conn_state->bridge);
1011 
1012 	if (panel_state->panel)
1013 		rockchip_panel_prepare(panel_state->panel);
1014 
1015 	if (crtc_funcs->enable)
1016 		crtc_funcs->enable(state);
1017 
1018 	if (conn_funcs->enable)
1019 		conn_funcs->enable(state);
1020 
1021 	if (conn_state->bridge)
1022 		rockchip_bridge_enable(conn_state->bridge);
1023 
1024 	if (panel_state->panel)
1025 		rockchip_panel_enable(panel_state->panel);
1026 
1027 	state->is_enable = true;
1028 
1029 	return 0;
1030 }
1031 
1032 static int display_disable(struct display_state *state)
1033 {
1034 	struct connector_state *conn_state = &state->conn_state;
1035 	const struct rockchip_connector *conn = conn_state->connector;
1036 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
1037 	struct crtc_state *crtc_state = &state->crtc_state;
1038 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1039 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1040 	struct panel_state *panel_state = &state->panel_state;
1041 
1042 	if (!state->is_init)
1043 		return 0;
1044 
1045 	if (!state->is_enable)
1046 		return 0;
1047 
1048 	if (panel_state->panel)
1049 		rockchip_panel_disable(panel_state->panel);
1050 
1051 	if (conn_state->bridge)
1052 		rockchip_bridge_disable(conn_state->bridge);
1053 
1054 	if (conn_funcs->disable)
1055 		conn_funcs->disable(state);
1056 
1057 	if (crtc_funcs->disable)
1058 		crtc_funcs->disable(state);
1059 
1060 	if (panel_state->panel)
1061 		rockchip_panel_unprepare(panel_state->panel);
1062 
1063 	if (conn_state->bridge)
1064 		rockchip_bridge_post_disable(conn_state->bridge);
1065 
1066 	if (conn_funcs->unprepare)
1067 		conn_funcs->unprepare(state);
1068 
1069 	state->is_enable = 0;
1070 	state->is_init = 0;
1071 
1072 	return 0;
1073 }
1074 
1075 static int display_logo(struct display_state *state)
1076 {
1077 	struct crtc_state *crtc_state = &state->crtc_state;
1078 	struct connector_state *conn_state = &state->conn_state;
1079 	struct logo_info *logo = &state->logo;
1080 	int hdisplay, vdisplay, ret;
1081 
1082 	ret = display_init(state);
1083 	if (!state->is_init || ret)
1084 		return -ENODEV;
1085 
1086 	switch (logo->bpp) {
1087 	case 16:
1088 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1089 		break;
1090 	case 24:
1091 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1092 		break;
1093 	case 32:
1094 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1095 		break;
1096 	default:
1097 		printf("can't support bmp bits[%d]\n", logo->bpp);
1098 		return -EINVAL;
1099 	}
1100 	hdisplay = conn_state->mode.hdisplay;
1101 	vdisplay = conn_state->mode.vdisplay;
1102 	crtc_state->src_rect.w = logo->width;
1103 	crtc_state->src_rect.h = logo->height;
1104 	crtc_state->src_rect.x = 0;
1105 	crtc_state->src_rect.y = 0;
1106 	crtc_state->ymirror = logo->ymirror;
1107 	crtc_state->rb_swap = 0;
1108 
1109 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1110 	crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5;
1111 
1112 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1113 		crtc_state->crtc_rect.x = 0;
1114 		crtc_state->crtc_rect.y = 0;
1115 		crtc_state->crtc_rect.w = hdisplay;
1116 		crtc_state->crtc_rect.h = vdisplay;
1117 	} else {
1118 		if (crtc_state->src_rect.w >= hdisplay) {
1119 			crtc_state->crtc_rect.x = 0;
1120 			crtc_state->crtc_rect.w = hdisplay;
1121 		} else {
1122 			crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2;
1123 			crtc_state->crtc_rect.w = crtc_state->src_rect.w;
1124 		}
1125 
1126 		if (crtc_state->src_rect.h >= vdisplay) {
1127 			crtc_state->crtc_rect.y = 0;
1128 			crtc_state->crtc_rect.h = vdisplay;
1129 		} else {
1130 			crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2;
1131 			crtc_state->crtc_rect.h = crtc_state->src_rect.h;
1132 		}
1133 	}
1134 
1135 	display_set_plane(state);
1136 	display_enable(state);
1137 
1138 	return 0;
1139 }
1140 
1141 static int get_crtc_id(ofnode connect, bool is_ports_node)
1142 {
1143 	struct device_node *port_node;
1144 	struct device_node *remote;
1145 	int phandle;
1146 	int val;
1147 
1148 	if (is_ports_node) {
1149 		port_node = of_get_parent(connect.np);
1150 		if (!port_node)
1151 			goto err;
1152 
1153 		val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
1154 		if (val < 0)
1155 			goto err;
1156 	} else {
1157 		phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1158 		if (phandle < 0)
1159 			goto err;
1160 
1161 		remote = of_find_node_by_phandle(phandle);
1162 		if (!remote)
1163 			goto err;
1164 
1165 		val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1166 		if (val < 0)
1167 			goto err;
1168 	}
1169 
1170 	return val;
1171 err:
1172 	printf("Can't get crtc id, default set to id = 0\n");
1173 	return 0;
1174 }
1175 
1176 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
1177 {
1178 	ofnode mcu_node;
1179 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1180 
1181 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1182 	if (!ofnode_valid(mcu_node))
1183 		return -ENODEV;
1184 
1185 #define FDT_GET_MCU_INT(val, name) \
1186 	do { \
1187 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1188 		if (val < 0) { \
1189 			printf("Can't get %s\n", name); \
1190 			return -ENXIO; \
1191 		} \
1192 	} while (0)
1193 
1194 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1195 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1196 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1197 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1198 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1199 
1200 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1201 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1202 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1203 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1204 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1205 
1206 	return 0;
1207 }
1208 
1209 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1210 {
1211 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1212 
1213 	list_for_each_entry(tmp, &logo_cache_list, head) {
1214 		if (!strcmp(tmp->name, bmp)) {
1215 			logo_cache = tmp;
1216 			break;
1217 		}
1218 	}
1219 
1220 	if (!logo_cache) {
1221 		logo_cache = malloc(sizeof(*logo_cache));
1222 		if (!logo_cache) {
1223 			printf("failed to alloc memory for logo cache\n");
1224 			return NULL;
1225 		}
1226 		memset(logo_cache, 0, sizeof(*logo_cache));
1227 		strcpy(logo_cache->name, bmp);
1228 		INIT_LIST_HEAD(&logo_cache->head);
1229 		list_add_tail(&logo_cache->head, &logo_cache_list);
1230 	}
1231 
1232 	return logo_cache;
1233 }
1234 
1235 /* Note: used only for rkfb kernel driver */
1236 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1237 {
1238 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1239 	void *dst = NULL;
1240 	int len, size;
1241 	struct bmp_header *header;
1242 
1243 	if (!logo || !bmp_name)
1244 		return -EINVAL;
1245 
1246 	header = malloc(RK_BLK_SIZE);
1247 	if (!header)
1248 		return -ENOMEM;
1249 
1250 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1251 	if (len != RK_BLK_SIZE) {
1252 		free(header);
1253 		return -EINVAL;
1254 	}
1255 	size = get_unaligned_le32(&header->file_size);
1256 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1257 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1258 	if (len != size) {
1259 		printf("failed to load bmp %s\n", bmp_name);
1260 		free(header);
1261 		return -ENOENT;
1262 	}
1263 
1264 	logo->mem = dst;
1265 #endif
1266 
1267 	return 0;
1268 }
1269 
1270 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1271 {
1272 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1273 	struct rockchip_logo_cache *logo_cache;
1274 	struct bmp_header *header;
1275 	void *dst = NULL, *pdst;
1276 	int size, len;
1277 	int ret = 0;
1278 	int reserved = 0;
1279 	int dst_size;
1280 
1281 	if (!logo || !bmp_name)
1282 		return -EINVAL;
1283 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1284 	if (!logo_cache)
1285 		return -ENOMEM;
1286 
1287 	if (logo_cache->logo.mem) {
1288 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1289 		return 0;
1290 	}
1291 
1292 	header = malloc(RK_BLK_SIZE);
1293 	if (!header)
1294 		return -ENOMEM;
1295 
1296 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1297 	if (len != RK_BLK_SIZE) {
1298 		ret = -EINVAL;
1299 		goto free_header;
1300 	}
1301 
1302 	logo->bpp = get_unaligned_le16(&header->bit_count);
1303 	logo->width = get_unaligned_le32(&header->width);
1304 	logo->height = get_unaligned_le32(&header->height);
1305 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1306 	reserved = get_unaligned_le32(&header->reserved);
1307 	if (logo->height < 0)
1308 	    logo->height = -logo->height;
1309 	size = get_unaligned_le32(&header->file_size);
1310 	if (!can_direct_logo(logo->bpp)) {
1311 		if (size > MEMORY_POOL_SIZE) {
1312 			printf("failed to use boot buf as temp bmp buffer\n");
1313 			ret = -ENOMEM;
1314 			goto free_header;
1315 		}
1316 		pdst = get_display_buffer(size);
1317 
1318 	} else {
1319 		pdst = get_display_buffer(size);
1320 		dst = pdst;
1321 	}
1322 
1323 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1324 	if (len != size) {
1325 		printf("failed to load bmp %s\n", bmp_name);
1326 		ret = -ENOENT;
1327 		goto free_header;
1328 	}
1329 
1330 	if (!can_direct_logo(logo->bpp)) {
1331 		/*
1332 		 * TODO: force use 16bpp if bpp less than 16;
1333 		 */
1334 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1335 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1336 		dst = get_display_buffer(dst_size);
1337 		if (!dst) {
1338 			ret = -ENOMEM;
1339 			goto free_header;
1340 		}
1341 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1342 			printf("failed to decode bmp %s\n", bmp_name);
1343 			ret = -EINVAL;
1344 			goto free_header;
1345 		}
1346 
1347 		logo->offset = 0;
1348 		logo->ymirror = 0;
1349 	} else {
1350 		logo->offset = get_unaligned_le32(&header->data_offset);
1351 		if (reserved == BMP_PROCESSED_FLAG)
1352 			logo->ymirror = 0;
1353 		else
1354 			logo->ymirror = 1;
1355 	}
1356 	logo->mem = dst;
1357 
1358 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1359 
1360 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1361 
1362 free_header:
1363 
1364 	free(header);
1365 
1366 	return ret;
1367 #else
1368 	return -EINVAL;
1369 #endif
1370 }
1371 
1372 void rockchip_show_fbbase(ulong fbbase)
1373 {
1374 	struct display_state *s;
1375 
1376 	list_for_each_entry(s, &rockchip_display_list, head) {
1377 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1378 		s->logo.mem = (char *)fbbase;
1379 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1380 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1381 		s->logo.bpp = 32;
1382 		s->logo.ymirror = 0;
1383 
1384 		display_logo(s);
1385 	}
1386 }
1387 
1388 int rockchip_show_bmp(const char *bmp)
1389 {
1390 	struct display_state *s;
1391 	int ret = 0;
1392 
1393 	if (!bmp) {
1394 		list_for_each_entry(s, &rockchip_display_list, head)
1395 			display_disable(s);
1396 		return -ENOENT;
1397 	}
1398 
1399 	list_for_each_entry(s, &rockchip_display_list, head) {
1400 		s->logo.mode = s->charge_logo_mode;
1401 		if (load_bmp_logo(&s->logo, bmp))
1402 			continue;
1403 		ret = display_logo(s);
1404 	}
1405 
1406 	return ret;
1407 }
1408 
1409 int rockchip_show_logo(void)
1410 {
1411 	struct display_state *s;
1412 	int ret = 0;
1413 
1414 	list_for_each_entry(s, &rockchip_display_list, head) {
1415 		s->logo.mode = s->logo_mode;
1416 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1417 			printf("failed to display uboot logo\n");
1418 		else
1419 			ret = display_logo(s);
1420 
1421 		/* Load kernel bmp in rockchip_display_fixup() later */
1422 	}
1423 
1424 	return ret;
1425 }
1426 
1427 enum {
1428 	PORT_DIR_IN,
1429 	PORT_DIR_OUT,
1430 };
1431 
1432 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
1433 {
1434 	ofnode panel_node, ports, port, ep, port_parent_node;
1435 	struct udevice *panel_dev;
1436 	int ret;
1437 
1438 	panel_node = dev_read_subnode(dev, "panel");
1439 	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
1440 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
1441 						  &panel_dev);
1442 		if (!ret)
1443 			goto found;
1444 	}
1445 
1446 	ports = dev_read_subnode(dev, "ports");
1447 	if (!ofnode_valid(ports))
1448 		return NULL;
1449 
1450 	ofnode_for_each_subnode(port, ports) {
1451 		u32 reg;
1452 
1453 		if (ofnode_read_u32(port, "reg", &reg))
1454 			continue;
1455 
1456 		if (reg != PORT_DIR_OUT)
1457 			continue;
1458 
1459 		ofnode_for_each_subnode(ep, port) {
1460 			ofnode _ep, _port;
1461 			uint phandle;
1462 			bool is_ports_node = false;
1463 
1464 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1465 				continue;
1466 
1467 			_ep = ofnode_get_by_phandle(phandle);
1468 			if (!ofnode_valid(_ep))
1469 				continue;
1470 
1471 			_port = ofnode_get_parent(_ep);
1472 			if (!ofnode_valid(_port))
1473 				continue;
1474 
1475 			port_parent_node = ofnode_get_parent(_port);
1476 			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
1477 			if (is_ports_node)
1478 				panel_node = ofnode_get_parent(port_parent_node);
1479 			else
1480 				panel_node = ofnode_get_parent(_port);
1481 			if (!ofnode_valid(panel_node))
1482 				continue;
1483 
1484 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
1485 							  panel_node,
1486 							  &panel_dev);
1487 			if (!ret)
1488 				goto found;
1489 		}
1490 	}
1491 
1492 	return NULL;
1493 
1494 found:
1495 	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1496 }
1497 
1498 static struct rockchip_bridge *rockchip_ofnode_find_bridge(ofnode node)
1499 {
1500 	struct udevice *dev;
1501 	int ret;
1502 
1503 	ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, node, &dev);
1504 	if (ret)
1505 		return ERR_PTR(ret);
1506 
1507 	return (struct rockchip_bridge *)dev_get_driver_data(dev);
1508 }
1509 
1510 static int rockchip_of_find_bridge(ofnode node, struct rockchip_bridge **bridge)
1511 {
1512 	ofnode remote, ports, port, ep;
1513 	int ret = -EPROBE_DEFER;
1514 	u32 reg;
1515 
1516 	if (!bridge)
1517 		return -EINVAL;
1518 
1519 	ports = ofnode_find_subnode(node, "ports");
1520 	if (!ofnode_valid(ports))
1521 		return -ENODEV;
1522 
1523 	ofnode_for_each_subnode(port, ports) {
1524 		if (ofnode_read_u32(port, "reg", &reg))
1525 			continue;
1526 
1527 		if (reg == PORT_DIR_OUT)
1528 			break;
1529 	}
1530 
1531 	if (reg != PORT_DIR_OUT)
1532 		return -ENODEV;
1533 
1534 	ofnode_for_each_subnode(ep, port) {
1535 		ofnode _ep, _port, _ports;
1536 		uint phandle;
1537 
1538 		if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1539 			continue;
1540 
1541 		_ep = ofnode_get_by_phandle(phandle);
1542 		if (!ofnode_valid(_ep))
1543 			continue;
1544 
1545 		_port = ofnode_get_parent(_ep);
1546 		if (!ofnode_valid(_port))
1547 			continue;
1548 
1549 		_ports = ofnode_get_parent(_port);
1550 		if (!ofnode_valid(_ports))
1551 			continue;
1552 
1553 		remote = ofnode_get_parent(_ports);
1554 		if (ofnode_valid(remote))
1555 			break;
1556 	}
1557 
1558 	*bridge = rockchip_ofnode_find_bridge(remote);
1559 	if (!IS_ERR(*bridge))
1560 		ret = 0;
1561 
1562 	return ret;
1563 }
1564 
1565 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
1566 {
1567 	ofnode ep, port, ports, conn;
1568 	uint phandle;
1569 	struct udevice *dev;
1570 	int ret;
1571 
1572 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1573 		return NULL;
1574 
1575 	ep = ofnode_get_by_phandle(phandle);
1576 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1577 		return NULL;
1578 
1579 	port = ofnode_get_parent(ep);
1580 	if (!ofnode_valid(port))
1581 		return NULL;
1582 
1583 	ports = ofnode_get_parent(port);
1584 	if (!ofnode_valid(ports))
1585 		return NULL;
1586 
1587 	conn = ofnode_get_parent(ports);
1588 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1589 		return NULL;
1590 
1591 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1592 	if (ret)
1593 		return NULL;
1594 
1595 	return dev;
1596 }
1597 
1598 static bool rockchip_get_display_path_status(ofnode endpoint)
1599 {
1600 	ofnode ep;
1601 	uint phandle;
1602 
1603 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1604 		return false;
1605 
1606 	ep = ofnode_get_by_phandle(phandle);
1607 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1608 		return false;
1609 
1610 	return true;
1611 }
1612 
1613 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1614 {
1615 	struct udevice *phy_dev;
1616 	int ret;
1617 
1618 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1619 	if (ret)
1620 		return NULL;
1621 
1622 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1623 }
1624 
1625 #if defined(CONFIG_ROCKCHIP_RK3568)
1626 static int rockchip_display_fixup_dts(void *blob)
1627 {
1628 	ofnode route_node, route_subnode, conn_ep, conn_port;
1629 	const struct device_node *route_sub_devnode;
1630 	const struct device_node *ep_node, *conn_ep_dev_node;
1631 	u32 phandle;
1632 	int conn_ep_offset;
1633 	const char *route_sub_path, *path;
1634 
1635 	/* Don't go further if new variant after
1636 	 * reading PMUGRF_SOC_CON15
1637 	 */
1638 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1639 		return 0;
1640 
1641 	route_node = ofnode_path("/display-subsystem/route");
1642 	if (!ofnode_valid(route_node))
1643 		return -EINVAL;
1644 
1645 	ofnode_for_each_subnode(route_subnode, route_node) {
1646 		if (!ofnode_is_available(route_subnode))
1647 			continue;
1648 
1649 		route_sub_devnode = ofnode_to_np(route_subnode);
1650 		route_sub_path = route_sub_devnode->full_name;
1651 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1652 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1653 			return 0;
1654 
1655 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1656 		if (phandle < 0) {
1657 			printf("Warn: can't find connect node's handle\n");
1658 			continue;
1659 		}
1660 
1661 		ep_node = of_find_node_by_phandle(phandle);
1662 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1663 			printf("Warn: can't find endpoint node from phandle\n");
1664 			continue;
1665 		}
1666 
1667 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1668 		conn_ep = ofnode_get_by_phandle(phandle);
1669 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1670 			return -ENODEV;
1671 
1672 		conn_port = ofnode_get_parent(conn_ep);
1673 		if (!ofnode_valid(conn_port))
1674 			return -ENODEV;
1675 
1676 		ofnode_for_each_subnode(conn_ep, conn_port) {
1677 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1678 			path = conn_ep_dev_node->full_name;
1679 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1680 			conn_ep_offset = fdt_path_offset(blob, path);
1681 
1682 			if (!ofnode_is_available(conn_ep) &&
1683 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1684 				do_fixup_by_path_u32(blob, route_sub_path,
1685 						     "connect", phandle, 1);
1686 				fdt_status_okay(blob, conn_ep_offset);
1687 
1688 			} else if (ofnode_is_available(conn_ep) &&
1689 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1690 				fdt_status_disabled(blob, conn_ep_offset);
1691 			}
1692 		}
1693 	}
1694 
1695 	return 0;
1696 }
1697 #endif
1698 
1699 static int rockchip_display_probe(struct udevice *dev)
1700 {
1701 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1702 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1703 	const void *blob = gd->fdt_blob;
1704 	int phandle;
1705 	struct udevice *crtc_dev, *conn_dev;
1706 	struct rockchip_crtc *crtc;
1707 	const struct rockchip_connector *conn;
1708 	struct rockchip_panel *panel = NULL;
1709 	struct rockchip_bridge *bridge = NULL, *b = NULL;
1710 	struct rockchip_phy *phy = NULL;
1711 	struct display_state *s;
1712 	const char *name;
1713 	int ret;
1714 	ofnode node, route_node, timing_node;
1715 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1716 	struct public_phy_data *data;
1717 	bool is_ports_node = false;
1718 
1719 #if defined(CONFIG_ROCKCHIP_RK3568)
1720 	rockchip_display_fixup_dts((void *)blob);
1721 #endif
1722 
1723 	/* Before relocation we don't need to do anything */
1724 	if (!(gd->flags & GD_FLG_RELOC))
1725 		return 0;
1726 
1727 	data = malloc(sizeof(struct public_phy_data));
1728 	if (!data) {
1729 		printf("failed to alloc phy data\n");
1730 		return -ENOMEM;
1731 	}
1732 	data->phy_init = false;
1733 
1734 	init_display_buffer(plat->base);
1735 
1736 	route_node = dev_read_subnode(dev, "route");
1737 	if (!ofnode_valid(route_node))
1738 		return -ENODEV;
1739 
1740 	ofnode_for_each_subnode(node, route_node) {
1741 		if (!ofnode_is_available(node))
1742 			continue;
1743 		phandle = ofnode_read_u32_default(node, "connect", -1);
1744 		if (phandle < 0) {
1745 			printf("Warn: can't find connect node's handle\n");
1746 			continue;
1747 		}
1748 		ep_node = of_find_node_by_phandle(phandle);
1749 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1750 			printf("Warn: can't find endpoint node from phandle\n");
1751 			continue;
1752 		}
1753 		port_node = of_get_parent(ep_node);
1754 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1755 			printf("Warn: can't find port node from phandle\n");
1756 			continue;
1757 		}
1758 
1759 		port_parent_node = of_get_parent(port_node);
1760 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1761 			printf("Warn: can't find port parent node from phandle\n");
1762 			continue;
1763 		}
1764 
1765 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1766 		if (is_ports_node) {
1767 			vop_node = of_get_parent(port_parent_node);
1768 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1769 				printf("Warn: can't find crtc node from phandle\n");
1770 				continue;
1771 			}
1772 		} else {
1773 			vop_node = port_parent_node;
1774 		}
1775 
1776 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1777 						  np_to_ofnode(vop_node),
1778 						  &crtc_dev);
1779 		if (ret) {
1780 			printf("Warn: can't find crtc driver %d\n", ret);
1781 			continue;
1782 		}
1783 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1784 
1785 		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
1786 		if (!conn_dev) {
1787 			printf("Warn: can't find connect driver\n");
1788 			continue;
1789 		}
1790 
1791 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
1792 
1793 		phy = rockchip_of_find_phy(conn_dev);
1794 
1795 		panel = rockchip_of_find_panel(conn_dev);
1796 		if (!panel) {
1797 			/* No panel found yet, check for a bridge next. */
1798 			ret = rockchip_of_find_bridge(dev_ofnode(conn_dev), &bridge);
1799 			if (ret && ret != -ENODEV)
1800 				continue;
1801 
1802 			b = bridge;
1803 			while (b) {
1804 				struct rockchip_bridge *next_bridge = NULL;
1805 
1806 				ret = rockchip_of_find_bridge(dev_ofnode(b->dev), &next_bridge);
1807 				if (ret)
1808 					break;
1809 
1810 				b->next_bridge = next_bridge;
1811 				b = next_bridge;
1812 			}
1813 
1814 			if (b)
1815 				panel = rockchip_of_find_panel(b->dev);
1816 		}
1817 
1818 		s = malloc(sizeof(*s));
1819 		if (!s)
1820 			continue;
1821 
1822 		memset(s, 0, sizeof(*s));
1823 
1824 		INIT_LIST_HEAD(&s->head);
1825 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1826 		if (!ret)
1827 			memcpy(s->ulogo_name, name, strlen(name));
1828 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1829 		if (!ret)
1830 			memcpy(s->klogo_name, name, strlen(name));
1831 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1832 		if (!strcmp(name, "fullscreen"))
1833 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1834 		else
1835 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1836 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1837 		if (!strcmp(name, "fullscreen"))
1838 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1839 		else
1840 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1841 
1842 		s->force_output = ofnode_read_bool(node, "force-output");
1843 
1844 		if (s->force_output) {
1845 			timing_node = ofnode_find_subnode(node, "force_timing");
1846 			ret = display_get_force_timing_from_dts(timing_node, &s->force_mode);
1847 			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
1848 				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
1849 		}
1850 
1851 		s->blob = blob;
1852 		s->panel_state.panel = panel;
1853 		s->conn_state.node = conn_dev->node;
1854 		s->conn_state.dev = conn_dev;
1855 		s->conn_state.connector = conn;
1856 		s->conn_state.phy = phy;
1857 		s->conn_state.bridge = bridge;
1858 		s->conn_state.overscan.left_margin = 100;
1859 		s->conn_state.overscan.right_margin = 100;
1860 		s->conn_state.overscan.top_margin = 100;
1861 		s->conn_state.overscan.bottom_margin = 100;
1862 		s->crtc_state.node = np_to_ofnode(vop_node);
1863 		s->crtc_state.dev = crtc_dev;
1864 		s->crtc_state.crtc = crtc;
1865 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node);
1866 		s->node = node;
1867 
1868 		if (is_ports_node) { /* only vop2 will get into here */
1869 			ofnode vp_node = np_to_ofnode(port_node);
1870 			static bool get_plane_mask_from_dts;
1871 
1872 			s->crtc_state.ports_node = port_parent_node;
1873 			if (!get_plane_mask_from_dts) {
1874 				ofnode vp_sub_node;
1875 				int vp_id = 0;
1876 				bool vp_enable = false;
1877 
1878 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
1879 					int cursor_plane = -1;
1880 
1881 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
1882 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
1883 
1884 					cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
1885 					s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
1886 					if (ret) {
1887 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
1888 						s->crtc_state.crtc->assign_plane |= true;
1889 						s->crtc_state.crtc->vps[vp_id].primary_plane_id =
1890 							ofnode_read_u32_default(vp_node, "rockchip,primary-plane", -1);
1891 						printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
1892 						       vp_id,
1893 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
1894 						       s->crtc_state.crtc->vps[vp_id].primary_plane_id,
1895 						       cursor_plane);
1896 					}
1897 
1898 					/* To check current vp status */
1899 					vp_enable = false;
1900 					ofnode_for_each_subnode(vp_sub_node, vp_node)
1901 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
1902 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
1903 				}
1904 				get_plane_mask_from_dts = true;
1905 			}
1906 		}
1907 
1908 		get_crtc_mcu_mode(&s->crtc_state);
1909 
1910 		ret = ofnode_read_u32_default(s->crtc_state.node,
1911 					      "rockchip,dual-channel-swap", 0);
1912 		s->crtc_state.dual_channel_swap = ret;
1913 		if (connector_panel_init(s)) {
1914 			printf("Warn: Failed to init panel drivers\n");
1915 			free(s);
1916 			continue;
1917 		}
1918 
1919 		if (connector_phy_init(s, data)) {
1920 			printf("Warn: Failed to init phy drivers\n");
1921 			free(s);
1922 			continue;
1923 		}
1924 		list_add_tail(&s->head, &rockchip_display_list);
1925 	}
1926 
1927 	if (list_empty(&rockchip_display_list)) {
1928 		debug("Failed to found available display route\n");
1929 		return -ENODEV;
1930 	}
1931 	rockchip_get_baseparameter();
1932 	display_pre_init();
1933 
1934 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1935 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1936 	uc_priv->bpix = VIDEO_BPP32;
1937 
1938 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1939 	rockchip_show_fbbase(plat->base);
1940 	video_set_flush_dcache(dev, true);
1941 	#endif
1942 
1943 	return 0;
1944 }
1945 
1946 void rockchip_display_fixup(void *blob)
1947 {
1948 	const struct rockchip_connector_funcs *conn_funcs;
1949 	const struct rockchip_crtc_funcs *crtc_funcs;
1950 	const struct rockchip_connector *conn;
1951 	const struct rockchip_crtc *crtc;
1952 	struct display_state *s;
1953 	int offset;
1954 	const struct device_node *np;
1955 	const char *path;
1956 
1957 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1958 		list_for_each_entry(s, &rockchip_display_list, head)
1959 			load_bmp_logo(&s->logo, s->klogo_name);
1960 
1961 		if (!get_display_size())
1962 			return;
1963 
1964 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1965 						    (u64)memory_start,
1966 						    (u64)get_display_size());
1967 		if (offset < 0)
1968 			printf("failed to reserve drm-loader-logo memory\n");
1969 
1970 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
1971 						    (u64)cubic_lut_memory_start,
1972 						    (u64)get_cubic_memory_size());
1973 		if (offset < 0)
1974 			printf("failed to reserve drm-cubic-lut memory\n");
1975 	} else {
1976 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1977 		/* Compatible with rkfb display, only need reserve memory */
1978 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1979 						    (u64)memory_start,
1980 						    MEMORY_POOL_SIZE);
1981 		if (offset < 0)
1982 			printf("failed to reserve fb-loader-logo memory\n");
1983 		else
1984 			list_for_each_entry(s, &rockchip_display_list, head)
1985 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
1986 		return;
1987 	}
1988 
1989 	list_for_each_entry(s, &rockchip_display_list, head) {
1990 		conn = s->conn_state.connector;
1991 		if (!conn)
1992 			continue;
1993 		conn_funcs = conn->funcs;
1994 		if (!conn_funcs) {
1995 			printf("failed to get exist connector\n");
1996 			continue;
1997 		}
1998 
1999 		crtc = s->crtc_state.crtc;
2000 		if (!crtc)
2001 			continue;
2002 
2003 		crtc_funcs = crtc->funcs;
2004 		if (!crtc_funcs) {
2005 			printf("failed to get exist crtc\n");
2006 			continue;
2007 		}
2008 
2009 		if (crtc_funcs->fixup_dts)
2010 			crtc_funcs->fixup_dts(s, blob);
2011 
2012 		if (conn_funcs->fixup_dts)
2013 			conn_funcs->fixup_dts(s, blob);
2014 
2015 		np = ofnode_to_np(s->node);
2016 		path = np->full_name;
2017 		fdt_increase_size(blob, 0x400);
2018 #define FDT_SET_U32(name, val) \
2019 		do_fixup_by_path_u32(blob, path, name, val, 1);
2020 
2021 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
2022 			 - memory_start;
2023 		FDT_SET_U32("logo,offset", offset);
2024 		FDT_SET_U32("logo,width", s->logo.width);
2025 		FDT_SET_U32("logo,height", s->logo.height);
2026 		FDT_SET_U32("logo,bpp", s->logo.bpp);
2027 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
2028 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
2029 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
2030 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
2031 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
2032 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
2033 		FDT_SET_U32("video,vrefresh",
2034 			    drm_mode_vrefresh(&s->conn_state.mode));
2035 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
2036 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
2037 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
2038 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
2039 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
2040 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
2041 
2042 		if (s->conn_state.disp_info) {
2043 			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
2044 			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
2045 			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
2046 			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
2047 		}
2048 
2049 		if (s->conn_state.disp_info->cubic_lut_data.size &&
2050 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
2051 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
2052 
2053 #undef FDT_SET_U32
2054 	}
2055 }
2056 
2057 int rockchip_display_bind(struct udevice *dev)
2058 {
2059 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2060 
2061 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2062 
2063 	return 0;
2064 }
2065 
2066 static const struct udevice_id rockchip_display_ids[] = {
2067 	{ .compatible = "rockchip,display-subsystem" },
2068 	{ }
2069 };
2070 
2071 U_BOOT_DRIVER(rockchip_display) = {
2072 	.name	= "rockchip_display",
2073 	.id	= UCLASS_VIDEO,
2074 	.of_match = rockchip_display_ids,
2075 	.bind	= rockchip_display_bind,
2076 	.probe	= rockchip_display_probe,
2077 };
2078 
2079 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2080 			char *const argv[])
2081 {
2082 	if (argc != 1)
2083 		return CMD_RET_USAGE;
2084 
2085 	rockchip_show_logo();
2086 
2087 	return 0;
2088 }
2089 
2090 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2091 				char *const argv[])
2092 {
2093 	if (argc != 2)
2094 		return CMD_RET_USAGE;
2095 
2096 	rockchip_show_bmp(argv[1]);
2097 
2098 	return 0;
2099 }
2100 
2101 U_BOOT_CMD(
2102 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2103 	"load and display log from resource partition",
2104 	NULL
2105 );
2106 
2107 U_BOOT_CMD(
2108 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2109 	"load and display bmp from resource partition",
2110 	"    <bmp_name>"
2111 );
2112