xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 6414e3bc8687dbcc585b804d5c0bdfdb2d979c4b)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/list.h>
17 #include <linux/compat.h>
18 #include <linux/media-bus-format.h>
19 #include <malloc.h>
20 #include <video.h>
21 #include <video_rockchip.h>
22 #include <video_bridge.h>
23 #include <dm/device.h>
24 #include <dm/uclass-internal.h>
25 #include <asm/arch-rockchip/resource_img.h>
26 
27 #include "bmp_helper.h"
28 #include "rockchip_display.h"
29 #include "rockchip_crtc.h"
30 #include "rockchip_connector.h"
31 #include "rockchip_bridge.h"
32 #include "rockchip_phy.h"
33 #include "rockchip_panel.h"
34 #include <dm.h>
35 #include <dm/of_access.h>
36 #include <dm/ofnode.h>
37 #include <asm/io.h>
38 
39 #define DRIVER_VERSION	"v1.0.1"
40 
41 /***********************************************************************
42  *  Rockchip UBOOT DRM driver version
43  *
44  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
45  *  v1.0.1	: add much dsi update(hjc)
46  *
47  **********************************************************************/
48 
49 #define RK_BLK_SIZE 512
50 #define BMP_PROCESSED_FLAG 8399
51 
52 DECLARE_GLOBAL_DATA_PTR;
53 static LIST_HEAD(rockchip_display_list);
54 static LIST_HEAD(logo_cache_list);
55 
56 static unsigned long memory_start;
57 static unsigned long cubic_lut_memory_start;
58 static unsigned long memory_end;
59 static struct base2_info base_parameter;
60 static uint32_t crc32_table[256];
61 
62 /*
63  * the phy types are used by different connectors in public.
64  * The current version only has inno hdmi phy for hdmi and tve.
65  */
66 enum public_use_phy {
67 	NONE,
68 	INNO_HDMI_PHY
69 };
70 
71 /* save public phy data */
72 struct public_phy_data {
73 	const struct rockchip_phy *phy_drv;
74 	int phy_node;
75 	int public_phy_type;
76 	bool phy_init;
77 };
78 
79 void rockchip_display_make_crc32_table(void)
80 {
81 	uint32_t c;
82 	int n, k;
83 	unsigned long poly;		/* polynomial exclusive-or pattern */
84 	/* terms of polynomial defining this crc (except x^32): */
85 	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
86 
87 	/* make exclusive-or pattern from polynomial (0xedb88320L) */
88 	poly = 0L;
89 	for (n = 0; n < sizeof(p) / sizeof(char); n++)
90 		poly |= 1L << (31 - p[n]);
91 
92 	for (n = 0; n < 256; n++) {
93 		c = (unsigned long)n;
94 		for (k = 0; k < 8; k++)
95 		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
96 		crc32_table[n] = cpu_to_le32(c);
97 	}
98 }
99 
100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
101 {
102 	int i;
103 	uint32_t crc;
104 	crc = 0xFFFFFFFF;
105 
106 	for (i = 0; i < length; i++) {
107 		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
108 		data++;
109 	}
110 
111 	return crc ^ 0xffffffff;
112 }
113 
114 int rockchip_get_baseparameter(void)
115 {
116 	struct blk_desc *dev_desc;
117 	disk_partition_t part_info;
118 	int block_num = 2048;
119 	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
120 	int ret = 0;
121 
122 	dev_desc = rockchip_get_bootdev();
123 	if (!dev_desc) {
124 		printf("%s: Could not find device\n", __func__);
125 		return -ENOENT;
126 	}
127 
128 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
129 		printf("Could not find baseparameter partition\n");
130 		return -ENOENT;
131 	}
132 
133 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
134 	if (ret < 0) {
135 		printf("read baseparameter failed\n");
136 		return ret;
137 	}
138 
139 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
140 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
141 		printf("warning: bad baseparameter\n");
142 		memset(&base_parameter, 0, sizeof(base_parameter));
143 	}
144 	rockchip_display_make_crc32_table();
145 
146 	return ret;
147 }
148 
149 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
150 {
151 	struct base2_disp_info *disp_info;
152 	int i = 0;
153 	u32 crc_val;
154 
155 	for (i = 0; i < 8; i++) {
156 		disp_info = &base_parameter.disp_info[i];
157 		if (disp_info->screen_info[0].type == type &&
158 		    disp_info->screen_info[0].id == id) {
159 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
160 			break;
161 		}
162 	}
163 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
164 		return NULL;
165 
166 	crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4);
167 
168 	if (crc_val != disp_info->crc) {
169 		printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id);
170 		return NULL;
171 	}
172 
173 	return disp_info;
174 }
175 
176 /* check which kind of public phy does connector use */
177 static int check_public_use_phy(struct display_state *state)
178 {
179 	int ret = NONE;
180 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
181 	struct connector_state *conn_state = &state->conn_state;
182 
183 	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
184 	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
185 		ret = INNO_HDMI_PHY;
186 #endif
187 
188 	return ret;
189 }
190 
191 /*
192  * get public phy driver and initialize it.
193  * The current version only has inno hdmi phy for hdmi and tve.
194  */
195 static int get_public_phy(struct display_state *state,
196 			  struct public_phy_data *data)
197 {
198 	struct connector_state *conn_state = &state->conn_state;
199 	struct rockchip_phy *phy;
200 	struct udevice *dev;
201 	int ret = 0;
202 
203 	switch (data->public_phy_type) {
204 	case INNO_HDMI_PHY:
205 #if defined(CONFIG_ROCKCHIP_RK3328)
206 		ret = uclass_get_device_by_name(UCLASS_PHY,
207 						"hdmiphy@ff430000", &dev);
208 #elif defined(CONFIG_ROCKCHIP_RK322X)
209 		ret = uclass_get_device_by_name(UCLASS_PHY,
210 						"hdmi-phy@12030000", &dev);
211 #else
212 		ret = -EINVAL;
213 #endif
214 		if (ret) {
215 			printf("Warn: can't find phy driver\n");
216 			return 0;
217 		}
218 
219 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
220 		if (!phy) {
221 			printf("failed to get phy driver\n");
222 			return 0;
223 		}
224 
225 		ret = rockchip_phy_init(phy);
226 		if (ret) {
227 			printf("failed to init phy driver\n");
228 			return ret;
229 		}
230 		conn_state->phy = phy;
231 
232 		debug("inno hdmi phy init success, save it\n");
233 		data->phy_drv = conn_state->phy;
234 		data->phy_init = true;
235 		return 0;
236 	default:
237 		return -EINVAL;
238 	}
239 }
240 
241 static void init_display_buffer(ulong base)
242 {
243 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
244 	memory_end = memory_start;
245 	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
246 }
247 
248 void *get_display_buffer(int size)
249 {
250 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
251 	void *buf;
252 
253 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
254 		printf("failed to alloc %dbyte memory to display\n", size);
255 		return NULL;
256 	}
257 	buf = (void *)roundup_memory;
258 
259 	memory_end = roundup_memory + size;
260 
261 	return buf;
262 }
263 
264 static unsigned long get_display_size(void)
265 {
266 	return memory_end - memory_start;
267 }
268 
269 static unsigned long get_single_cubic_lut_size(void)
270 {
271 	ulong cubic_lut_size;
272 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
273 
274 	/* This is depend on IC designed */
275 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
276 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
277 
278 	return cubic_lut_size;
279 }
280 
281 static unsigned long get_cubic_lut_offset(int crtc_id)
282 {
283 	return crtc_id * get_single_cubic_lut_size();
284 }
285 
286 unsigned long get_cubic_lut_buffer(int crtc_id)
287 {
288 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
289 }
290 
291 static unsigned long get_cubic_memory_size(void)
292 {
293 	/* Max support 4 cubic lut */
294 	return get_single_cubic_lut_size() * 4;
295 }
296 
297 bool can_direct_logo(int bpp)
298 {
299 	return bpp == 24 || bpp == 32;
300 }
301 
302 static int connector_phy_init(struct display_state *state,
303 			      struct public_phy_data *data)
304 {
305 	struct connector_state *conn_state = &state->conn_state;
306 	int type;
307 
308 	/* does this connector use public phy with others */
309 	type = check_public_use_phy(state);
310 	if (type == INNO_HDMI_PHY) {
311 		/* there is no public phy was initialized */
312 		if (!data->phy_init) {
313 			debug("start get public phy\n");
314 			data->public_phy_type = type;
315 			if (get_public_phy(state, data)) {
316 				printf("can't find correct public phy type\n");
317 				free(data);
318 				return -EINVAL;
319 			}
320 			return 0;
321 		}
322 
323 		/* if this phy has been initialized, get it directly */
324 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
325 		return 0;
326 	}
327 
328 	return 0;
329 }
330 
331 static int connector_panel_init(struct display_state *state)
332 {
333 	struct connector_state *conn_state = &state->conn_state;
334 	struct panel_state *panel_state = &state->panel_state;
335 	const struct rockchip_panel *panel = panel_state->panel;
336 	ofnode dsp_lut_node;
337 	int ret, len;
338 
339 	if (!panel)
340 		return 0;
341 
342 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
343 	if (!ofnode_valid(dsp_lut_node)) {
344 		debug("%s can not find dsp-lut node\n", __func__);
345 		return 0;
346 	}
347 
348 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
349 	if (len > 0) {
350 		conn_state->gamma.size = len / sizeof(u32);
351 		conn_state->gamma.lut = malloc(len);
352 		if (!conn_state->gamma.lut) {
353 			printf("malloc gamma lut failed\n");
354 			return -ENOMEM;
355 		}
356 		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
357 					    conn_state->gamma.lut,
358 					    conn_state->gamma.size);
359 		if (ret) {
360 			printf("Cannot decode gamma_lut\n");
361 			conn_state->gamma.lut = NULL;
362 			return -EINVAL;
363 		}
364 		panel_state->dsp_lut_node = dsp_lut_node;
365 	}
366 
367 	return 0;
368 }
369 
370 int drm_mode_vrefresh(const struct drm_display_mode *mode)
371 {
372 	int refresh = 0;
373 	unsigned int calc_val;
374 
375 	if (mode->vrefresh > 0) {
376 		refresh = mode->vrefresh;
377 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
378 		int vtotal;
379 
380 		vtotal = mode->vtotal;
381 		/* work out vrefresh the value will be x1000 */
382 		calc_val = (mode->clock * 1000);
383 		calc_val /= mode->htotal;
384 		refresh = (calc_val + vtotal / 2) / vtotal;
385 
386 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
387 			refresh *= 2;
388 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
389 			refresh /= 2;
390 		if (mode->vscan > 1)
391 			refresh /= mode->vscan;
392 	}
393 	return refresh;
394 }
395 
396 static int display_get_timing_from_dts(struct panel_state *panel_state,
397 				       struct drm_display_mode *mode)
398 {
399 	struct rockchip_panel *panel = panel_state->panel;
400 	int phandle;
401 	int hactive, vactive, pixelclock;
402 	int hfront_porch, hback_porch, hsync_len;
403 	int vfront_porch, vback_porch, vsync_len;
404 	int val, flags = 0;
405 	ofnode timing, native_mode;
406 
407 	timing = dev_read_subnode(panel->dev, "display-timings");
408 	if (!ofnode_valid(timing))
409 		return -ENODEV;
410 
411 	native_mode = ofnode_find_subnode(timing, "timing");
412 	if (!ofnode_valid(native_mode)) {
413 		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
414 		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
415 		if (!ofnode_valid(native_mode)) {
416 			printf("failed to get display timings from DT\n");
417 			return -ENXIO;
418 		}
419 	}
420 
421 #define FDT_GET_INT(val, name) \
422 	val = ofnode_read_s32_default(native_mode, name, -1); \
423 	if (val < 0) { \
424 		printf("Can't get %s\n", name); \
425 		return -ENXIO; \
426 	}
427 
428 #define FDT_GET_INT_DEFAULT(val, name, default) \
429 	val = ofnode_read_s32_default(native_mode, name, default);
430 
431 	FDT_GET_INT(hactive, "hactive");
432 	FDT_GET_INT(vactive, "vactive");
433 	FDT_GET_INT(pixelclock, "clock-frequency");
434 	FDT_GET_INT(hsync_len, "hsync-len");
435 	FDT_GET_INT(hfront_porch, "hfront-porch");
436 	FDT_GET_INT(hback_porch, "hback-porch");
437 	FDT_GET_INT(vsync_len, "vsync-len");
438 	FDT_GET_INT(vfront_porch, "vfront-porch");
439 	FDT_GET_INT(vback_porch, "vback-porch");
440 	FDT_GET_INT(val, "hsync-active");
441 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
442 	FDT_GET_INT(val, "vsync-active");
443 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
444 	FDT_GET_INT(val, "pixelclk-active");
445 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
446 
447 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
448 	if (val == DRM_MODE_FLAG_XMIRROR) {
449 		flags |= DRM_MODE_FLAG_XMIRROR;
450 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
451 		flags |= DRM_MODE_FLAG_YMIRROR;
452 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
453 		flags |= DRM_MODE_FLAG_XMIRROR;
454 		flags |= DRM_MODE_FLAG_YMIRROR;
455 	}
456 	mode->hdisplay = hactive;
457 	mode->hsync_start = mode->hdisplay + hfront_porch;
458 	mode->hsync_end = mode->hsync_start + hsync_len;
459 	mode->htotal = mode->hsync_end + hback_porch;
460 
461 	mode->vdisplay = vactive;
462 	mode->vsync_start = mode->vdisplay + vfront_porch;
463 	mode->vsync_end = mode->vsync_start + vsync_len;
464 	mode->vtotal = mode->vsync_end + vback_porch;
465 
466 	mode->clock = pixelclock / 1000;
467 	mode->flags = flags;
468 
469 	return 0;
470 }
471 
472 /**
473  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
474  * @edid_data: structure store mode list
475  * @max_output: vop max output resolution
476  */
477 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
478 				    struct vop_rect *max_output)
479 {
480 	int i;
481 
482 	for (i = 0; i < edid_data->modes; i++) {
483 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
484 		    edid_data->mode_buf[i].vdisplay > max_output->height)
485 			edid_data->mode_buf[i].invalid = true;
486 	}
487 }
488 
489 /**
490  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
491  * @p: mode
492  * @adjust_flags: a combination of adjustment flags
493  *
494  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
495  *
496  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
497  *   interlaced modes.
498  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
499  *   buffers containing two eyes (only adjust the timings when needed, eg. for
500  *   "frame packing" or "side by side full").
501  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
502  *   be performed for doublescan and vscan > 1 modes respectively.
503  */
504 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
505 {
506 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
507 		return;
508 
509 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
510 		p->crtc_clock = 2 * p->clock;
511 	else
512 		p->crtc_clock = p->clock;
513 	p->crtc_hdisplay = p->hdisplay;
514 	p->crtc_hsync_start = p->hsync_start;
515 	p->crtc_hsync_end = p->hsync_end;
516 	p->crtc_htotal = p->htotal;
517 	p->crtc_hskew = p->hskew;
518 	p->crtc_vdisplay = p->vdisplay;
519 	p->crtc_vsync_start = p->vsync_start;
520 	p->crtc_vsync_end = p->vsync_end;
521 	p->crtc_vtotal = p->vtotal;
522 
523 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
524 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
525 			p->crtc_vdisplay /= 2;
526 			p->crtc_vsync_start /= 2;
527 			p->crtc_vsync_end /= 2;
528 			p->crtc_vtotal /= 2;
529 		}
530 	}
531 
532 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
533 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
534 			p->crtc_vdisplay *= 2;
535 			p->crtc_vsync_start *= 2;
536 			p->crtc_vsync_end *= 2;
537 			p->crtc_vtotal *= 2;
538 		}
539 	}
540 
541 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
542 		if (p->vscan > 1) {
543 			p->crtc_vdisplay *= p->vscan;
544 			p->crtc_vsync_start *= p->vscan;
545 			p->crtc_vsync_end *= p->vscan;
546 			p->crtc_vtotal *= p->vscan;
547 		}
548 	}
549 
550 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
551 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
552 
553 		switch (layout) {
554 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
555 			p->crtc_clock *= 2;
556 			p->crtc_vdisplay += p->crtc_vtotal;
557 			p->crtc_vsync_start += p->crtc_vtotal;
558 			p->crtc_vsync_end += p->crtc_vtotal;
559 			p->crtc_vtotal += p->crtc_vtotal;
560 			break;
561 		}
562 	}
563 
564 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
565 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
566 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
567 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
568 }
569 
570 /**
571  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
572  * output format
573  *
574  * @connector: drm connector under action.
575  * @mode: video mode to be tested.
576  *
577  * Returns:
578  * true if the mode can be supported in YCBCR420 format
579  * false if not.
580  */
581 bool drm_mode_is_420_only(const struct drm_display_info *display,
582 			  struct drm_display_mode *mode)
583 {
584 	u8 vic = drm_match_cea_mode(mode);
585 
586 	return test_bit(vic, display->hdmi.y420_vdb_modes);
587 }
588 
589 /**
590  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
591  * output format also (along with RGB/YCBCR444/422)
592  *
593  * @display: display under action.
594  * @mode: video mode to be tested.
595  *
596  * Returns:
597  * true if the mode can be support YCBCR420 format
598  * false if not.
599  */
600 bool drm_mode_is_420_also(const struct drm_display_info *display,
601 			  struct drm_display_mode *mode)
602 {
603 	u8 vic = drm_match_cea_mode(mode);
604 
605 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
606 }
607 
608 /**
609  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
610  * output format
611  *
612  * @display: display under action.
613  * @mode: video mode to be tested.
614  *
615  * Returns:
616  * true if the mode can be supported in YCBCR420 format
617  * false if not.
618  */
619 bool drm_mode_is_420(const struct drm_display_info *display,
620 		     struct drm_display_mode *mode)
621 {
622 	return drm_mode_is_420_only(display, mode) ||
623 		drm_mode_is_420_also(display, mode);
624 }
625 
626 static int display_get_timing(struct display_state *state)
627 {
628 	struct connector_state *conn_state = &state->conn_state;
629 	struct drm_display_mode *mode = &conn_state->mode;
630 	const struct drm_display_mode *m;
631 	struct panel_state *panel_state = &state->panel_state;
632 	const struct rockchip_panel *panel = panel_state->panel;
633 
634 	if (dev_of_valid(panel->dev) &&
635 	    !display_get_timing_from_dts(panel_state, mode)) {
636 		printf("Using display timing dts\n");
637 		return 0;
638 	}
639 
640 	if (panel->data) {
641 		m = (const struct drm_display_mode *)panel->data;
642 		memcpy(mode, m, sizeof(*m));
643 		printf("Using display timing from compatible panel driver\n");
644 		return 0;
645 	}
646 
647 	return -ENODEV;
648 }
649 
650 static int display_pre_init(void)
651 {
652 	struct display_state *state;
653 	int ret = 0;
654 
655 	list_for_each_entry(state, &rockchip_display_list, head) {
656 		struct connector_state *conn_state = &state->conn_state;
657 		const struct rockchip_connector *conn = conn_state->connector;
658 		const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
659 		struct crtc_state *crtc_state = &state->crtc_state;
660 		struct rockchip_crtc *crtc = crtc_state->crtc;
661 
662 		if (conn_funcs->pre_init) {
663 			ret = conn_funcs->pre_init(state);
664 			if (ret)
665 				printf("pre init conn error\n");
666 		}
667 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
668 	}
669 	return ret;
670 }
671 
672 static int display_init(struct display_state *state)
673 {
674 	struct connector_state *conn_state = &state->conn_state;
675 	struct panel_state *panel_state = &state->panel_state;
676 	const struct rockchip_connector *conn = conn_state->connector;
677 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
678 	struct crtc_state *crtc_state = &state->crtc_state;
679 	struct rockchip_crtc *crtc = crtc_state->crtc;
680 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
681 	struct drm_display_mode *mode = &conn_state->mode;
682 	const char *compatible;
683 	int ret = 0;
684 	static bool __print_once = false;
685 #if defined(CONFIG_I2C_EDID)
686 	int bpc;
687 #endif
688 	if (!__print_once) {
689 		__print_once = true;
690 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
691 	}
692 
693 	if (state->is_init)
694 		return 0;
695 
696 	if (!conn_funcs || !crtc_funcs) {
697 		printf("failed to find connector or crtc functions\n");
698 		return -ENXIO;
699 	}
700 
701 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
702 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
703 		   sizeof(struct drm_display_mode))) {
704 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
705 			crtc_state->dev->name,
706 			crtc_state->crtc->active_mode.type,
707 			crtc_state->crtc->active_mode.hdisplay,
708 			crtc_state->crtc->active_mode.vdisplay,
709 			crtc_state->crtc->active_mode.vrefresh);
710 		return -ENODEV;
711 	}
712 
713 	if (crtc_funcs->preinit) {
714 		ret = crtc_funcs->preinit(state);
715 		if (ret)
716 			return ret;
717 	}
718 
719 	if (panel_state->panel)
720 		rockchip_panel_init(panel_state->panel);
721 
722 	if (conn_funcs->init) {
723 		ret = conn_funcs->init(state);
724 		if (ret)
725 			goto deinit;
726 	}
727 
728 	if (conn_state->phy)
729 		rockchip_phy_init(conn_state->phy);
730 
731 	/*
732 	 * support hotplug, but not connect;
733 	 */
734 #ifdef CONFIG_ROCKCHIP_DRM_TVE
735 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
736 		printf("hdmi plugin ,skip tve\n");
737 		goto deinit;
738 	}
739 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
740 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
741 		printf("hdmi plugin ,skip tve\n");
742 		goto deinit;
743 	}
744 #endif
745 	if (conn_funcs->detect) {
746 		ret = conn_funcs->detect(state);
747 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
748 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
749 			crtc->hdmi_hpd = ret;
750 #endif
751 		if (!ret)
752 			goto deinit;
753 	}
754 
755 	if (panel_state->panel) {
756 		ret = display_get_timing(state);
757 		if (!ret)
758 			conn_state->bpc = panel_state->panel->bpc;
759 #if defined(CONFIG_I2C_EDID)
760 		if (ret < 0 && conn_funcs->get_edid) {
761 			rockchip_panel_prepare(panel_state->panel);
762 
763 			ret = conn_funcs->get_edid(state);
764 			if (!ret) {
765 				ret = edid_get_drm_mode((void *)&conn_state->edid,
766 							sizeof(conn_state->edid),
767 							mode, &bpc);
768 				if (!ret) {
769 					conn_state->bpc = bpc;
770 					edid_print_info((void *)&conn_state->edid);
771 				}
772 			}
773 		}
774 #endif
775 	} else if (conn_state->bridge) {
776 		ret = video_bridge_read_edid(conn_state->bridge->dev,
777 					     conn_state->edid, EDID_SIZE);
778 		if (ret > 0) {
779 #if defined(CONFIG_I2C_EDID)
780 			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
781 						&bpc);
782 			if (!ret) {
783 				conn_state->bpc = bpc;
784 				edid_print_info((void *)&conn_state->edid);
785 			}
786 #endif
787 		} else {
788 			ret = video_bridge_get_timing(conn_state->bridge->dev);
789 		}
790 	} else if (conn_funcs->get_timing) {
791 		ret = conn_funcs->get_timing(state);
792 	} else if (conn_funcs->get_edid) {
793 		ret = conn_funcs->get_edid(state);
794 #if defined(CONFIG_I2C_EDID)
795 		if (!ret) {
796 			ret = edid_get_drm_mode((void *)&conn_state->edid,
797 						sizeof(conn_state->edid), mode,
798 						&bpc);
799 			if (!ret) {
800 				conn_state->bpc = bpc;
801 				edid_print_info((void *)&conn_state->edid);
802 			}
803 		}
804 #endif
805 	}
806 
807 	if (ret)
808 		goto deinit;
809 
810 	/* rk356x series drive mipi pixdata on posedge */
811 	compatible = dev_read_string(conn_state->dev, "compatible");
812 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
813 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
814 
815 	printf("Detailed mode clock %u kHz, flags[%x]\n"
816 	       "    H: %04d %04d %04d %04d\n"
817 	       "    V: %04d %04d %04d %04d\n"
818 	       "bus_format: %x\n",
819 	       mode->clock, mode->flags,
820 	       mode->hdisplay, mode->hsync_start,
821 	       mode->hsync_end, mode->htotal,
822 	       mode->vdisplay, mode->vsync_start,
823 	       mode->vsync_end, mode->vtotal,
824 	       conn_state->bus_format);
825 
826 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
827 
828 	if (conn_state->bridge)
829 		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
830 
831 	if (crtc_funcs->init) {
832 		ret = crtc_funcs->init(state);
833 		if (ret)
834 			goto deinit;
835 	}
836 	state->is_init = 1;
837 
838 	crtc_state->crtc->active = true;
839 	memcpy(&crtc_state->crtc->active_mode,
840 	       &conn_state->mode, sizeof(struct drm_display_mode));
841 
842 	return 0;
843 
844 deinit:
845 	if (conn_funcs->deinit)
846 		conn_funcs->deinit(state);
847 	return ret;
848 }
849 
850 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
851 {
852 	struct crtc_state *crtc_state = &state->crtc_state;
853 	const struct rockchip_crtc *crtc = crtc_state->crtc;
854 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
855 	int ret;
856 
857 	if (!state->is_init)
858 		return -EINVAL;
859 
860 	if (crtc_funcs->send_mcu_cmd) {
861 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
862 		if (ret)
863 			return ret;
864 	}
865 
866 	return 0;
867 }
868 
869 static int display_set_plane(struct display_state *state)
870 {
871 	struct crtc_state *crtc_state = &state->crtc_state;
872 	const struct rockchip_crtc *crtc = crtc_state->crtc;
873 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
874 	int ret;
875 
876 	if (!state->is_init)
877 		return -EINVAL;
878 
879 	if (crtc_funcs->set_plane) {
880 		ret = crtc_funcs->set_plane(state);
881 		if (ret)
882 			return ret;
883 	}
884 
885 	return 0;
886 }
887 
888 static int display_enable(struct display_state *state)
889 {
890 	struct connector_state *conn_state = &state->conn_state;
891 	const struct rockchip_connector *conn = conn_state->connector;
892 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
893 	struct crtc_state *crtc_state = &state->crtc_state;
894 	const struct rockchip_crtc *crtc = crtc_state->crtc;
895 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
896 	struct panel_state *panel_state = &state->panel_state;
897 
898 	if (!state->is_init)
899 		return -EINVAL;
900 
901 	if (state->is_enable)
902 		return 0;
903 
904 	if (crtc_funcs->prepare)
905 		crtc_funcs->prepare(state);
906 
907 	if (conn_funcs->prepare)
908 		conn_funcs->prepare(state);
909 
910 	if (conn_state->bridge)
911 		rockchip_bridge_pre_enable(conn_state->bridge);
912 
913 	if (panel_state->panel)
914 		rockchip_panel_prepare(panel_state->panel);
915 
916 	if (crtc_funcs->enable)
917 		crtc_funcs->enable(state);
918 
919 	if (conn_funcs->enable)
920 		conn_funcs->enable(state);
921 
922 	if (conn_state->bridge)
923 		rockchip_bridge_enable(conn_state->bridge);
924 
925 	if (panel_state->panel)
926 		rockchip_panel_enable(panel_state->panel);
927 
928 	state->is_enable = true;
929 
930 	return 0;
931 }
932 
933 static int display_disable(struct display_state *state)
934 {
935 	struct connector_state *conn_state = &state->conn_state;
936 	const struct rockchip_connector *conn = conn_state->connector;
937 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
938 	struct crtc_state *crtc_state = &state->crtc_state;
939 	const struct rockchip_crtc *crtc = crtc_state->crtc;
940 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
941 	struct panel_state *panel_state = &state->panel_state;
942 
943 	if (!state->is_init)
944 		return 0;
945 
946 	if (!state->is_enable)
947 		return 0;
948 
949 	if (panel_state->panel)
950 		rockchip_panel_disable(panel_state->panel);
951 
952 	if (conn_state->bridge)
953 		rockchip_bridge_disable(conn_state->bridge);
954 
955 	if (conn_funcs->disable)
956 		conn_funcs->disable(state);
957 
958 	if (crtc_funcs->disable)
959 		crtc_funcs->disable(state);
960 
961 	if (panel_state->panel)
962 		rockchip_panel_unprepare(panel_state->panel);
963 
964 	if (conn_state->bridge)
965 		rockchip_bridge_post_disable(conn_state->bridge);
966 
967 	if (conn_funcs->unprepare)
968 		conn_funcs->unprepare(state);
969 
970 	state->is_enable = 0;
971 	state->is_init = 0;
972 
973 	return 0;
974 }
975 
976 static int display_logo(struct display_state *state)
977 {
978 	struct crtc_state *crtc_state = &state->crtc_state;
979 	struct connector_state *conn_state = &state->conn_state;
980 	struct logo_info *logo = &state->logo;
981 	int hdisplay, vdisplay, ret;
982 
983 	ret = display_init(state);
984 	if (!state->is_init || ret)
985 		return -ENODEV;
986 
987 	switch (logo->bpp) {
988 	case 16:
989 		crtc_state->format = ROCKCHIP_FMT_RGB565;
990 		break;
991 	case 24:
992 		crtc_state->format = ROCKCHIP_FMT_RGB888;
993 		break;
994 	case 32:
995 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
996 		break;
997 	default:
998 		printf("can't support bmp bits[%d]\n", logo->bpp);
999 		return -EINVAL;
1000 	}
1001 	hdisplay = conn_state->mode.hdisplay;
1002 	vdisplay = conn_state->mode.vdisplay;
1003 	crtc_state->src_w = logo->width;
1004 	crtc_state->src_h = logo->height;
1005 	crtc_state->src_x = 0;
1006 	crtc_state->src_y = 0;
1007 	crtc_state->ymirror = logo->ymirror;
1008 
1009 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1010 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
1011 
1012 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1013 		crtc_state->crtc_x = 0;
1014 		crtc_state->crtc_y = 0;
1015 		crtc_state->crtc_w = hdisplay;
1016 		crtc_state->crtc_h = vdisplay;
1017 	} else {
1018 		if (crtc_state->src_w >= hdisplay) {
1019 			crtc_state->crtc_x = 0;
1020 			crtc_state->crtc_w = hdisplay;
1021 		} else {
1022 			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
1023 			crtc_state->crtc_w = crtc_state->src_w;
1024 		}
1025 
1026 		if (crtc_state->src_h >= vdisplay) {
1027 			crtc_state->crtc_y = 0;
1028 			crtc_state->crtc_h = vdisplay;
1029 		} else {
1030 			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
1031 			crtc_state->crtc_h = crtc_state->src_h;
1032 		}
1033 	}
1034 
1035 	display_set_plane(state);
1036 	display_enable(state);
1037 
1038 	return 0;
1039 }
1040 
1041 static int get_crtc_id(ofnode connect)
1042 {
1043 	int phandle;
1044 	struct device_node *remote;
1045 	int val;
1046 
1047 	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1048 	if (phandle < 0)
1049 		goto err;
1050 	remote = of_find_node_by_phandle(phandle);
1051 	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1052 	if (val < 0)
1053 		goto err;
1054 
1055 	return val;
1056 err:
1057 	printf("Can't get crtc id, default set to id = 0\n");
1058 	return 0;
1059 }
1060 
1061 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
1062 {
1063 	ofnode mcu_node;
1064 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1065 
1066 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1067 	if (!ofnode_valid(mcu_node))
1068 		return -ENODEV;
1069 
1070 #define FDT_GET_MCU_INT(val, name) \
1071 	do { \
1072 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1073 		if (val < 0) { \
1074 			printf("Can't get %s\n", name); \
1075 			return -ENXIO; \
1076 		} \
1077 	} while (0)
1078 
1079 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1080 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1081 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1082 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1083 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1084 
1085 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1086 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1087 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1088 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1089 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1090 
1091 	return 0;
1092 }
1093 
1094 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1095 {
1096 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1097 
1098 	list_for_each_entry(tmp, &logo_cache_list, head) {
1099 		if (!strcmp(tmp->name, bmp)) {
1100 			logo_cache = tmp;
1101 			break;
1102 		}
1103 	}
1104 
1105 	if (!logo_cache) {
1106 		logo_cache = malloc(sizeof(*logo_cache));
1107 		if (!logo_cache) {
1108 			printf("failed to alloc memory for logo cache\n");
1109 			return NULL;
1110 		}
1111 		memset(logo_cache, 0, sizeof(*logo_cache));
1112 		strcpy(logo_cache->name, bmp);
1113 		INIT_LIST_HEAD(&logo_cache->head);
1114 		list_add_tail(&logo_cache->head, &logo_cache_list);
1115 	}
1116 
1117 	return logo_cache;
1118 }
1119 
1120 /* Note: used only for rkfb kernel driver */
1121 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1122 {
1123 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1124 	void *dst = NULL;
1125 	int len, size;
1126 	struct bmp_header *header;
1127 
1128 	if (!logo || !bmp_name)
1129 		return -EINVAL;
1130 
1131 	header = malloc(RK_BLK_SIZE);
1132 	if (!header)
1133 		return -ENOMEM;
1134 
1135 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1136 	if (len != RK_BLK_SIZE) {
1137 		free(header);
1138 		return -EINVAL;
1139 	}
1140 	size = get_unaligned_le32(&header->file_size);
1141 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1142 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1143 	if (len != size) {
1144 		printf("failed to load bmp %s\n", bmp_name);
1145 		free(header);
1146 		return -ENOENT;
1147 	}
1148 
1149 	logo->mem = dst;
1150 #endif
1151 
1152 	return 0;
1153 }
1154 
1155 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1156 {
1157 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1158 	struct rockchip_logo_cache *logo_cache;
1159 	struct bmp_header *header;
1160 	void *dst = NULL, *pdst;
1161 	int size, len;
1162 	int ret = 0;
1163 	int reserved = 0;
1164 
1165 	if (!logo || !bmp_name)
1166 		return -EINVAL;
1167 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1168 	if (!logo_cache)
1169 		return -ENOMEM;
1170 
1171 	if (logo_cache->logo.mem) {
1172 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1173 		return 0;
1174 	}
1175 
1176 	header = malloc(RK_BLK_SIZE);
1177 	if (!header)
1178 		return -ENOMEM;
1179 
1180 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1181 	if (len != RK_BLK_SIZE) {
1182 		ret = -EINVAL;
1183 		goto free_header;
1184 	}
1185 
1186 	logo->bpp = get_unaligned_le16(&header->bit_count);
1187 	logo->width = get_unaligned_le32(&header->width);
1188 	logo->height = get_unaligned_le32(&header->height);
1189 	reserved = get_unaligned_le32(&header->reserved);
1190 	if (logo->height < 0)
1191 	    logo->height = -logo->height;
1192 	size = get_unaligned_le32(&header->file_size);
1193 	if (!can_direct_logo(logo->bpp)) {
1194 		if (size > MEMORY_POOL_SIZE) {
1195 			printf("failed to use boot buf as temp bmp buffer\n");
1196 			ret = -ENOMEM;
1197 			goto free_header;
1198 		}
1199 		pdst = get_display_buffer(size);
1200 
1201 	} else {
1202 		pdst = get_display_buffer(size);
1203 		dst = pdst;
1204 	}
1205 
1206 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1207 	if (len != size) {
1208 		printf("failed to load bmp %s\n", bmp_name);
1209 		ret = -ENOENT;
1210 		goto free_header;
1211 	}
1212 
1213 	if (!can_direct_logo(logo->bpp)) {
1214 		int dst_size;
1215 		/*
1216 		 * TODO: force use 16bpp if bpp less than 16;
1217 		 */
1218 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1219 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1220 
1221 		dst = get_display_buffer(dst_size);
1222 		if (!dst) {
1223 			ret = -ENOMEM;
1224 			goto free_header;
1225 		}
1226 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1227 			printf("failed to decode bmp %s\n", bmp_name);
1228 			ret = -EINVAL;
1229 			goto free_header;
1230 		}
1231 		flush_dcache_range((ulong)dst,
1232 				   ALIGN((ulong)dst + dst_size,
1233 					 CONFIG_SYS_CACHELINE_SIZE));
1234 
1235 		logo->offset = 0;
1236 		logo->ymirror = 0;
1237 	} else {
1238 		logo->offset = get_unaligned_le32(&header->data_offset);
1239 		if (reserved == BMP_PROCESSED_FLAG)
1240 			logo->ymirror = 0;
1241 		else
1242 			logo->ymirror = 1;
1243 	}
1244 	logo->mem = dst;
1245 
1246 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1247 
1248 free_header:
1249 
1250 	free(header);
1251 
1252 	return ret;
1253 #else
1254 	return -EINVAL;
1255 #endif
1256 }
1257 
1258 void rockchip_show_fbbase(ulong fbbase)
1259 {
1260 	struct display_state *s;
1261 
1262 	list_for_each_entry(s, &rockchip_display_list, head) {
1263 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1264 		s->logo.mem = (char *)fbbase;
1265 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1266 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1267 		s->logo.bpp = 32;
1268 		s->logo.ymirror = 0;
1269 
1270 		display_logo(s);
1271 	}
1272 }
1273 
1274 int rockchip_show_bmp(const char *bmp)
1275 {
1276 	struct display_state *s;
1277 	int ret = 0;
1278 
1279 	if (!bmp) {
1280 		list_for_each_entry(s, &rockchip_display_list, head)
1281 			display_disable(s);
1282 		return -ENOENT;
1283 	}
1284 
1285 	list_for_each_entry(s, &rockchip_display_list, head) {
1286 		s->logo.mode = s->charge_logo_mode;
1287 		if (load_bmp_logo(&s->logo, bmp))
1288 			continue;
1289 		ret = display_logo(s);
1290 	}
1291 
1292 	return ret;
1293 }
1294 
1295 int rockchip_show_logo(void)
1296 {
1297 	struct display_state *s;
1298 	int ret = 0;
1299 
1300 	list_for_each_entry(s, &rockchip_display_list, head) {
1301 		s->logo.mode = s->logo_mode;
1302 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1303 			printf("failed to display uboot logo\n");
1304 		else
1305 			ret = display_logo(s);
1306 
1307 		/* Load kernel bmp in rockchip_display_fixup() later */
1308 	}
1309 
1310 	return ret;
1311 }
1312 
1313 enum {
1314 	PORT_DIR_IN,
1315 	PORT_DIR_OUT,
1316 };
1317 
1318 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
1319 {
1320 	ofnode panel_node, ports, port, ep, port_parent_node;
1321 	struct udevice *panel_dev;
1322 	int ret;
1323 
1324 	panel_node = dev_read_subnode(dev, "panel");
1325 	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
1326 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
1327 						  &panel_dev);
1328 		if (!ret)
1329 			goto found;
1330 	}
1331 
1332 	ports = dev_read_subnode(dev, "ports");
1333 	if (!ofnode_valid(ports))
1334 		return NULL;
1335 
1336 	ofnode_for_each_subnode(port, ports) {
1337 		u32 reg;
1338 
1339 		if (ofnode_read_u32(port, "reg", &reg))
1340 			continue;
1341 
1342 		if (reg != PORT_DIR_OUT)
1343 			continue;
1344 
1345 		ofnode_for_each_subnode(ep, port) {
1346 			ofnode _ep, _port;
1347 			uint phandle;
1348 			bool is_ports_node = false;
1349 
1350 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1351 				continue;
1352 
1353 			_ep = ofnode_get_by_phandle(phandle);
1354 			if (!ofnode_valid(_ep))
1355 				continue;
1356 
1357 			_port = ofnode_get_parent(_ep);
1358 			if (!ofnode_valid(_port))
1359 				continue;
1360 
1361 			port_parent_node = ofnode_get_parent(_port);
1362 			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
1363 			if (is_ports_node)
1364 				panel_node = ofnode_get_parent(port_parent_node);
1365 			else
1366 				panel_node = ofnode_get_parent(_port);
1367 			if (!ofnode_valid(panel_node))
1368 				continue;
1369 
1370 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
1371 							  panel_node,
1372 							  &panel_dev);
1373 			if (!ret)
1374 				goto found;
1375 		}
1376 	}
1377 
1378 	return NULL;
1379 
1380 found:
1381 	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1382 }
1383 
1384 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
1385 {
1386 	ofnode node, ports, port, ep;
1387 	struct udevice *dev;
1388 	int ret;
1389 
1390 	ports = dev_read_subnode(conn_dev, "ports");
1391 	if (!ofnode_valid(ports))
1392 		return NULL;
1393 
1394 	ofnode_for_each_subnode(port, ports) {
1395 		u32 reg;
1396 
1397 		if (ofnode_read_u32(port, "reg", &reg))
1398 			continue;
1399 
1400 		if (reg != PORT_DIR_OUT)
1401 			continue;
1402 
1403 		ofnode_for_each_subnode(ep, port) {
1404 			ofnode _ep, _port, _ports;
1405 			uint phandle;
1406 
1407 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1408 				continue;
1409 
1410 			_ep = ofnode_get_by_phandle(phandle);
1411 			if (!ofnode_valid(_ep))
1412 				continue;
1413 
1414 			_port = ofnode_get_parent(_ep);
1415 			if (!ofnode_valid(_port))
1416 				continue;
1417 
1418 			_ports = ofnode_get_parent(_port);
1419 			if (!ofnode_valid(_ports))
1420 				continue;
1421 
1422 			node = ofnode_get_parent(_ports);
1423 			if (!ofnode_valid(node))
1424 				continue;
1425 
1426 			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
1427 							  node, &dev);
1428 			if (!ret)
1429 				goto found;
1430 		}
1431 	}
1432 
1433 	return NULL;
1434 
1435 found:
1436 	return (struct rockchip_bridge *)dev_get_driver_data(dev);
1437 }
1438 
1439 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
1440 {
1441 	ofnode ep, port, ports, conn;
1442 	uint phandle;
1443 	struct udevice *dev;
1444 	int ret;
1445 
1446 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1447 		return NULL;
1448 
1449 	ep = ofnode_get_by_phandle(phandle);
1450 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1451 		return NULL;
1452 
1453 	port = ofnode_get_parent(ep);
1454 	if (!ofnode_valid(port))
1455 		return NULL;
1456 
1457 	ports = ofnode_get_parent(port);
1458 	if (!ofnode_valid(ports))
1459 		return NULL;
1460 
1461 	conn = ofnode_get_parent(ports);
1462 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1463 		return NULL;
1464 
1465 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1466 	if (ret)
1467 		return NULL;
1468 
1469 	return dev;
1470 }
1471 
1472 static bool rockchip_get_display_path_status(ofnode endpoint)
1473 {
1474 	ofnode ep;
1475 	uint phandle;
1476 
1477 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1478 		return false;
1479 
1480 	ep = ofnode_get_by_phandle(phandle);
1481 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1482 		return false;
1483 
1484 	return true;
1485 }
1486 
1487 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1488 {
1489 	struct udevice *phy_dev;
1490 	int ret;
1491 
1492 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1493 	if (ret)
1494 		return NULL;
1495 
1496 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1497 }
1498 
1499 #if defined(CONFIG_ROCKCHIP_RK3568)
1500 static int rockchip_display_fixup_dts(void *blob)
1501 {
1502 	ofnode route_node, route_subnode, conn_ep, conn_port;
1503 	const struct device_node *route_sub_devnode;
1504 	const struct device_node *ep_node, *conn_ep_dev_node;
1505 	u32 phandle;
1506 	int conn_ep_offset;
1507 	const char *route_sub_path, *path;
1508 
1509 	/* Don't go further if new variant after
1510 	 * reading PMUGRF_SOC_CON15
1511 	 */
1512 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1513 		return 0;
1514 
1515 	route_node = ofnode_path("/display-subsystem/route");
1516 	if (!ofnode_valid(route_node))
1517 		return -EINVAL;
1518 
1519 	ofnode_for_each_subnode(route_subnode, route_node) {
1520 		if (!ofnode_is_available(route_subnode))
1521 			continue;
1522 
1523 		route_sub_devnode = ofnode_to_np(route_subnode);
1524 		route_sub_path = route_sub_devnode->full_name;
1525 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1526 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1527 			return 0;
1528 
1529 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1530 		if (phandle < 0) {
1531 			printf("Warn: can't find connect node's handle\n");
1532 			continue;
1533 		}
1534 
1535 		ep_node = of_find_node_by_phandle(phandle);
1536 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1537 			printf("Warn: can't find endpoint node from phandle\n");
1538 			continue;
1539 		}
1540 
1541 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1542 		conn_ep = ofnode_get_by_phandle(phandle);
1543 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1544 			return -ENODEV;
1545 
1546 		conn_port = ofnode_get_parent(conn_ep);
1547 		if (!ofnode_valid(conn_port))
1548 			return -ENODEV;
1549 
1550 		ofnode_for_each_subnode(conn_ep, conn_port) {
1551 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1552 			path = conn_ep_dev_node->full_name;
1553 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1554 			conn_ep_offset = fdt_path_offset(blob, path);
1555 
1556 			if (!ofnode_is_available(conn_ep) &&
1557 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1558 				do_fixup_by_path_u32(blob, route_sub_path,
1559 						     "connect", phandle, 1);
1560 				fdt_status_okay(blob, conn_ep_offset);
1561 
1562 			} else if (ofnode_is_available(conn_ep) &&
1563 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1564 				fdt_status_disabled(blob, conn_ep_offset);
1565 			}
1566 		}
1567 	}
1568 
1569 	return 0;
1570 }
1571 #endif
1572 
1573 static int rockchip_display_probe(struct udevice *dev)
1574 {
1575 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1576 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1577 	const void *blob = gd->fdt_blob;
1578 	int phandle;
1579 	struct udevice *crtc_dev, *conn_dev;
1580 	struct rockchip_crtc *crtc;
1581 	const struct rockchip_connector *conn;
1582 	struct rockchip_panel *panel = NULL;
1583 	struct rockchip_bridge *bridge = NULL;
1584 	struct rockchip_phy *phy = NULL;
1585 	struct display_state *s;
1586 	const char *name;
1587 	int ret;
1588 	ofnode node, route_node;
1589 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1590 	struct public_phy_data *data;
1591 	bool is_ports_node = false;
1592 
1593 #if defined(CONFIG_ROCKCHIP_RK3568)
1594 	rockchip_display_fixup_dts((void *)blob);
1595 #endif
1596 
1597 	/* Before relocation we don't need to do anything */
1598 	if (!(gd->flags & GD_FLG_RELOC))
1599 		return 0;
1600 
1601 	data = malloc(sizeof(struct public_phy_data));
1602 	if (!data) {
1603 		printf("failed to alloc phy data\n");
1604 		return -ENOMEM;
1605 	}
1606 	data->phy_init = false;
1607 
1608 	init_display_buffer(plat->base);
1609 
1610 	route_node = dev_read_subnode(dev, "route");
1611 	if (!ofnode_valid(route_node))
1612 		return -ENODEV;
1613 
1614 	ofnode_for_each_subnode(node, route_node) {
1615 		if (!ofnode_is_available(node))
1616 			continue;
1617 		phandle = ofnode_read_u32_default(node, "connect", -1);
1618 		if (phandle < 0) {
1619 			printf("Warn: can't find connect node's handle\n");
1620 			continue;
1621 		}
1622 		ep_node = of_find_node_by_phandle(phandle);
1623 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1624 			printf("Warn: can't find endpoint node from phandle\n");
1625 			continue;
1626 		}
1627 		port_node = of_get_parent(ep_node);
1628 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1629 			printf("Warn: can't find port node from phandle\n");
1630 			continue;
1631 		}
1632 
1633 		port_parent_node = of_get_parent(port_node);
1634 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1635 			printf("Warn: can't find port parent node from phandle\n");
1636 			continue;
1637 		}
1638 
1639 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1640 		if (is_ports_node) {
1641 			vop_node = of_get_parent(port_parent_node);
1642 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1643 				printf("Warn: can't find crtc node from phandle\n");
1644 				continue;
1645 			}
1646 		} else {
1647 			vop_node = port_parent_node;
1648 		}
1649 
1650 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1651 						  np_to_ofnode(vop_node),
1652 						  &crtc_dev);
1653 		if (ret) {
1654 			printf("Warn: can't find crtc driver %d\n", ret);
1655 			continue;
1656 		}
1657 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1658 
1659 		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
1660 		if (!conn_dev) {
1661 			printf("Warn: can't find connect driver\n");
1662 			continue;
1663 		}
1664 
1665 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
1666 
1667 		phy = rockchip_of_find_phy(conn_dev);
1668 
1669 		bridge = rockchip_of_find_bridge(conn_dev);
1670 		if (bridge)
1671 			panel = rockchip_of_find_panel(bridge->dev);
1672 		else
1673 			panel = rockchip_of_find_panel(conn_dev);
1674 
1675 		s = malloc(sizeof(*s));
1676 		if (!s)
1677 			continue;
1678 
1679 		memset(s, 0, sizeof(*s));
1680 
1681 		INIT_LIST_HEAD(&s->head);
1682 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1683 		if (!ret)
1684 			memcpy(s->ulogo_name, name, strlen(name));
1685 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1686 		if (!ret)
1687 			memcpy(s->klogo_name, name, strlen(name));
1688 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1689 		if (!strcmp(name, "fullscreen"))
1690 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1691 		else
1692 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1693 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1694 		if (!strcmp(name, "fullscreen"))
1695 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1696 		else
1697 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1698 
1699 		s->blob = blob;
1700 		s->panel_state.panel = panel;
1701 		s->conn_state.node = conn_dev->node;
1702 		s->conn_state.dev = conn_dev;
1703 		s->conn_state.connector = conn;
1704 		s->conn_state.phy = phy;
1705 		s->conn_state.bridge = bridge;
1706 		s->conn_state.overscan.left_margin = 100;
1707 		s->conn_state.overscan.right_margin = 100;
1708 		s->conn_state.overscan.top_margin = 100;
1709 		s->conn_state.overscan.bottom_margin = 100;
1710 		s->crtc_state.node = np_to_ofnode(vop_node);
1711 		s->crtc_state.dev = crtc_dev;
1712 		s->crtc_state.crtc = crtc;
1713 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
1714 		s->node = node;
1715 
1716 		if (is_ports_node) { /* only vop2 will get into here */
1717 			ofnode vp_node = np_to_ofnode(port_node);
1718 			static bool get_plane_mask_from_dts;
1719 
1720 			s->crtc_state.ports_node = port_parent_node;
1721 			if (!get_plane_mask_from_dts) {
1722 				ofnode vp_sub_node;
1723 				int vp_id = 0;
1724 				bool vp_enable = false;
1725 
1726 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
1727 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
1728 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
1729 					if (ret) {
1730 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
1731 						s->crtc_state.crtc->assign_plane |= true;
1732 						printf("get vp%d plane mask:0x%x from dts\n", vp_id, ret);
1733 					}
1734 
1735 					/* To check current vp status */
1736 					vp_enable = false;
1737 					ofnode_for_each_subnode(vp_sub_node, vp_node)
1738 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
1739 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
1740 				}
1741 				get_plane_mask_from_dts = true;
1742 			}
1743 		}
1744 
1745 		if (bridge)
1746 			bridge->state = s;
1747 
1748 		if (panel)
1749 			panel->state = s;
1750 
1751 		get_crtc_mcu_mode(&s->crtc_state);
1752 
1753 		ret = ofnode_read_u32_default(s->crtc_state.node,
1754 					      "rockchip,dual-channel-swap", 0);
1755 		s->crtc_state.dual_channel_swap = ret;
1756 		if (connector_panel_init(s)) {
1757 			printf("Warn: Failed to init panel drivers\n");
1758 			free(s);
1759 			continue;
1760 		}
1761 
1762 		if (connector_phy_init(s, data)) {
1763 			printf("Warn: Failed to init phy drivers\n");
1764 			free(s);
1765 			continue;
1766 		}
1767 		list_add_tail(&s->head, &rockchip_display_list);
1768 	}
1769 
1770 	if (list_empty(&rockchip_display_list)) {
1771 		debug("Failed to found available display route\n");
1772 		return -ENODEV;
1773 	}
1774 	rockchip_get_baseparameter();
1775 	display_pre_init();
1776 
1777 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1778 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1779 	uc_priv->bpix = VIDEO_BPP32;
1780 
1781 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1782 	rockchip_show_fbbase(plat->base);
1783 	video_set_flush_dcache(dev, true);
1784 	#endif
1785 
1786 	return 0;
1787 }
1788 
1789 void rockchip_display_fixup(void *blob)
1790 {
1791 	const struct rockchip_connector_funcs *conn_funcs;
1792 	const struct rockchip_crtc_funcs *crtc_funcs;
1793 	const struct rockchip_connector *conn;
1794 	const struct rockchip_crtc *crtc;
1795 	struct display_state *s;
1796 	int offset;
1797 	const struct device_node *np;
1798 	const char *path;
1799 
1800 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1801 		list_for_each_entry(s, &rockchip_display_list, head)
1802 			load_bmp_logo(&s->logo, s->klogo_name);
1803 
1804 		if (!get_display_size())
1805 			return;
1806 
1807 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1808 						    (u64)memory_start,
1809 						    (u64)get_display_size());
1810 		if (offset < 0)
1811 			printf("failed to reserve drm-loader-logo memory\n");
1812 
1813 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
1814 						    (u64)cubic_lut_memory_start,
1815 						    (u64)get_cubic_memory_size());
1816 		if (offset < 0)
1817 			printf("failed to reserve drm-cubic-lut memory\n");
1818 	} else {
1819 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1820 		/* Compatible with rkfb display, only need reserve memory */
1821 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1822 						    (u64)memory_start,
1823 						    MEMORY_POOL_SIZE);
1824 		if (offset < 0)
1825 			printf("failed to reserve fb-loader-logo memory\n");
1826 		else
1827 			list_for_each_entry(s, &rockchip_display_list, head)
1828 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
1829 		return;
1830 	}
1831 
1832 	list_for_each_entry(s, &rockchip_display_list, head) {
1833 		conn = s->conn_state.connector;
1834 		if (!conn)
1835 			continue;
1836 		conn_funcs = conn->funcs;
1837 		if (!conn_funcs) {
1838 			printf("failed to get exist connector\n");
1839 			continue;
1840 		}
1841 
1842 		crtc = s->crtc_state.crtc;
1843 		if (!crtc)
1844 			continue;
1845 
1846 		crtc_funcs = crtc->funcs;
1847 		if (!crtc_funcs) {
1848 			printf("failed to get exist crtc\n");
1849 			continue;
1850 		}
1851 
1852 		if (crtc_funcs->fixup_dts)
1853 			crtc_funcs->fixup_dts(s, blob);
1854 
1855 		if (conn_funcs->fixup_dts)
1856 			conn_funcs->fixup_dts(s, blob);
1857 
1858 		np = ofnode_to_np(s->node);
1859 		path = np->full_name;
1860 		fdt_increase_size(blob, 0x400);
1861 #define FDT_SET_U32(name, val) \
1862 		do_fixup_by_path_u32(blob, path, name, val, 1);
1863 
1864 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
1865 			 - memory_start;
1866 		FDT_SET_U32("logo,offset", offset);
1867 		FDT_SET_U32("logo,width", s->logo.width);
1868 		FDT_SET_U32("logo,height", s->logo.height);
1869 		FDT_SET_U32("logo,bpp", s->logo.bpp);
1870 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
1871 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
1872 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
1873 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
1874 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
1875 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
1876 		FDT_SET_U32("video,vrefresh",
1877 			    drm_mode_vrefresh(&s->conn_state.mode));
1878 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
1879 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
1880 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
1881 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
1882 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
1883 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
1884 
1885 		if (s->conn_state.disp_info->cubic_lut_data.size &&
1886 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
1887 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
1888 
1889 #undef FDT_SET_U32
1890 	}
1891 }
1892 
1893 int rockchip_display_bind(struct udevice *dev)
1894 {
1895 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1896 
1897 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
1898 
1899 	return 0;
1900 }
1901 
1902 static const struct udevice_id rockchip_display_ids[] = {
1903 	{ .compatible = "rockchip,display-subsystem" },
1904 	{ }
1905 };
1906 
1907 U_BOOT_DRIVER(rockchip_display) = {
1908 	.name	= "rockchip_display",
1909 	.id	= UCLASS_VIDEO,
1910 	.of_match = rockchip_display_ids,
1911 	.bind	= rockchip_display_bind,
1912 	.probe	= rockchip_display_probe,
1913 };
1914 
1915 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
1916 			char *const argv[])
1917 {
1918 	if (argc != 1)
1919 		return CMD_RET_USAGE;
1920 
1921 	rockchip_show_logo();
1922 
1923 	return 0;
1924 }
1925 
1926 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
1927 				char *const argv[])
1928 {
1929 	if (argc != 2)
1930 		return CMD_RET_USAGE;
1931 
1932 	rockchip_show_bmp(argv[1]);
1933 
1934 	return 0;
1935 }
1936 
1937 U_BOOT_CMD(
1938 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
1939 	"load and display log from resource partition",
1940 	NULL
1941 );
1942 
1943 U_BOOT_CMD(
1944 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
1945 	"load and display bmp from resource partition",
1946 	"    <bmp_name>"
1947 );
1948