xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 4c8e468b74b6e49e6b9164d76a83e558de02e48e)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/list.h>
17 #include <linux/compat.h>
18 #include <linux/media-bus-format.h>
19 #include <malloc.h>
20 #include <video.h>
21 #include <video_rockchip.h>
22 #include <video_bridge.h>
23 #include <dm/device.h>
24 #include <dm/uclass-internal.h>
25 #include <asm/arch-rockchip/resource_img.h>
26 
27 #include "bmp_helper.h"
28 #include "rockchip_display.h"
29 #include "rockchip_crtc.h"
30 #include "rockchip_connector.h"
31 #include "rockchip_bridge.h"
32 #include "rockchip_phy.h"
33 #include "rockchip_panel.h"
34 #include <dm.h>
35 #include <dm/of_access.h>
36 #include <dm/ofnode.h>
37 #include <asm/io.h>
38 
39 #define DRIVER_VERSION	"v1.0.1"
40 
41 /***********************************************************************
42  *  Rockchip UBOOT DRM driver version
43  *
44  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
45  *  v1.0.1	: add much dsi update(hjc)
46  *
47  **********************************************************************/
48 
49 #define RK_BLK_SIZE 512
50 #define BMP_PROCESSED_FLAG 8399
51 
52 DECLARE_GLOBAL_DATA_PTR;
53 static LIST_HEAD(rockchip_display_list);
54 static LIST_HEAD(logo_cache_list);
55 
56 static unsigned long memory_start;
57 static unsigned long cubic_lut_memory_start;
58 static unsigned long memory_end;
59 static struct base2_info base_parameter;
60 static uint32_t crc32_table[256];
61 
62 /*
63  * the phy types are used by different connectors in public.
64  * The current version only has inno hdmi phy for hdmi and tve.
65  */
66 enum public_use_phy {
67 	NONE,
68 	INNO_HDMI_PHY
69 };
70 
71 /* save public phy data */
72 struct public_phy_data {
73 	const struct rockchip_phy *phy_drv;
74 	int phy_node;
75 	int public_phy_type;
76 	bool phy_init;
77 };
78 
79 void rockchip_display_make_crc32_table(void)
80 {
81 	uint32_t c;
82 	int n, k;
83 	unsigned long poly;		/* polynomial exclusive-or pattern */
84 	/* terms of polynomial defining this crc (except x^32): */
85 	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
86 
87 	/* make exclusive-or pattern from polynomial (0xedb88320L) */
88 	poly = 0L;
89 	for (n = 0; n < sizeof(p) / sizeof(char); n++)
90 		poly |= 1L << (31 - p[n]);
91 
92 	for (n = 0; n < 256; n++) {
93 		c = (unsigned long)n;
94 		for (k = 0; k < 8; k++)
95 		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
96 		crc32_table[n] = cpu_to_le32(c);
97 	}
98 }
99 
100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
101 {
102 	int i;
103 	uint32_t crc;
104 	crc = 0xFFFFFFFF;
105 
106 	for (i = 0; i < length; i++) {
107 		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
108 		data++;
109 	}
110 
111 	return crc ^ 0xffffffff;
112 }
113 
114 int rockchip_get_baseparameter(void)
115 {
116 	struct blk_desc *dev_desc;
117 	disk_partition_t part_info;
118 	int block_num = 2048;
119 	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
120 	int ret = 0;
121 
122 	dev_desc = rockchip_get_bootdev();
123 	if (!dev_desc) {
124 		printf("%s: Could not find device\n", __func__);
125 		return -ENOENT;
126 	}
127 
128 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
129 		printf("Could not find baseparameter partition\n");
130 		return -ENOENT;
131 	}
132 
133 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
134 	if (ret < 0) {
135 		printf("read baseparameter failed\n");
136 		return ret;
137 	}
138 
139 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
140 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
141 		printf("warning: bad baseparameter\n");
142 		memset(&base_parameter, 0, sizeof(base_parameter));
143 	}
144 	rockchip_display_make_crc32_table();
145 
146 	return ret;
147 }
148 
149 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
150 {
151 	struct base2_disp_info *disp_info;
152 	struct base2_disp_header *disp_header;
153 	int i = 0, offset = -1;
154 	u32 crc_val;
155 	u32 base2_length;
156 	void *base_parameter_addr = (void *)&base_parameter;
157 
158 	for (i = 0; i < 8; i++) {
159 		disp_header = &base_parameter.disp_header[i];
160 		if (disp_header->connector_type == type &&
161 		    disp_header->connector_id == id) {
162 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
163 			offset = disp_header->offset;
164 			break;
165 		}
166 	}
167 
168 	if (offset < 0)
169 		return NULL;
170 	disp_info = base_parameter_addr + offset;
171 	if (disp_info->screen_info[0].type != type ||
172 	    disp_info->screen_info[0].id != id) {
173 		printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n",
174 		       disp_info->screen_info[0].type,
175 		       disp_info->screen_info[0].id);
176 		return NULL;
177 	}
178 
179 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
180 		return NULL;
181 
182 	if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) {
183 		crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info,
184 						      sizeof(struct base2_disp_info) - 4);
185 		if (crc_val != disp_info->crc2) {
186 			printf("error: connector type[%d], id[%d] disp info crc2 check error\n",
187 			       type, id);
188 			return NULL;
189 		}
190 	} else {
191 		base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) -
192 			       sizeof(struct acm_data) - 10 * 1024 - 4;
193 		crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4);
194 		if (crc_val != disp_info->crc) {
195 			printf("error: connector type[%d], id[%d] disp info crc check error\n",
196 			       type, id);
197 			return NULL;
198 		}
199 	}
200 
201 	return disp_info;
202 }
203 
204 /* check which kind of public phy does connector use */
205 static int check_public_use_phy(struct rockchip_connector *conn)
206 {
207 	int ret = NONE;
208 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
209 
210 	if (!strncmp(dev_read_name(conn->dev), "tve", 3) ||
211 	    !strncmp(dev_read_name(conn->dev), "hdmi", 4))
212 		ret = INNO_HDMI_PHY;
213 #endif
214 
215 	return ret;
216 }
217 
218 /*
219  * get public phy driver and initialize it.
220  * The current version only has inno hdmi phy for hdmi and tve.
221  */
222 static int get_public_phy(struct rockchip_connector *conn,
223 			  struct public_phy_data *data)
224 {
225 	struct rockchip_phy *phy;
226 	struct udevice *dev;
227 	int ret = 0;
228 
229 	switch (data->public_phy_type) {
230 	case INNO_HDMI_PHY:
231 #if defined(CONFIG_ROCKCHIP_RK3328)
232 		ret = uclass_get_device_by_name(UCLASS_PHY,
233 						"hdmiphy@ff430000", &dev);
234 #elif defined(CONFIG_ROCKCHIP_RK322X)
235 		ret = uclass_get_device_by_name(UCLASS_PHY,
236 						"hdmi-phy@12030000", &dev);
237 #else
238 		ret = -EINVAL;
239 #endif
240 		if (ret) {
241 			printf("Warn: can't find phy driver\n");
242 			return 0;
243 		}
244 
245 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
246 		if (!phy) {
247 			printf("failed to get phy driver\n");
248 			return 0;
249 		}
250 
251 		ret = rockchip_phy_init(phy);
252 		if (ret) {
253 			printf("failed to init phy driver\n");
254 			return ret;
255 		}
256 		conn->phy = phy;
257 
258 		debug("inno hdmi phy init success, save it\n");
259 		data->phy_drv = conn->phy;
260 		data->phy_init = true;
261 		return 0;
262 	default:
263 		return -EINVAL;
264 	}
265 }
266 
267 static void init_display_buffer(ulong base)
268 {
269 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
270 	memory_end = memory_start;
271 	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
272 }
273 
274 void *get_display_buffer(int size)
275 {
276 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
277 	void *buf;
278 
279 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
280 		printf("failed to alloc %dbyte memory to display\n", size);
281 		return NULL;
282 	}
283 	buf = (void *)roundup_memory;
284 
285 	memory_end = roundup_memory + size;
286 
287 	return buf;
288 }
289 
290 static unsigned long get_display_size(void)
291 {
292 	return memory_end - memory_start;
293 }
294 
295 static unsigned long get_single_cubic_lut_size(void)
296 {
297 	ulong cubic_lut_size;
298 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
299 
300 	/* This is depend on IC designed */
301 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
302 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
303 
304 	return cubic_lut_size;
305 }
306 
307 static unsigned long get_cubic_lut_offset(int crtc_id)
308 {
309 	return crtc_id * get_single_cubic_lut_size();
310 }
311 
312 unsigned long get_cubic_lut_buffer(int crtc_id)
313 {
314 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
315 }
316 
317 static unsigned long get_cubic_memory_size(void)
318 {
319 	/* Max support 4 cubic lut */
320 	return get_single_cubic_lut_size() * 4;
321 }
322 
323 bool can_direct_logo(int bpp)
324 {
325 	return bpp == 16 || bpp == 32;
326 }
327 
328 static int connector_phy_init(struct rockchip_connector *conn,
329 			      struct public_phy_data *data)
330 {
331 	int type;
332 
333 	/* does this connector use public phy with others */
334 	type = check_public_use_phy(conn);
335 	if (type == INNO_HDMI_PHY) {
336 		/* there is no public phy was initialized */
337 		if (!data->phy_init) {
338 			debug("start get public phy\n");
339 			data->public_phy_type = type;
340 			if (get_public_phy(conn, data)) {
341 				printf("can't find correct public phy type\n");
342 				free(data);
343 				return -EINVAL;
344 			}
345 			return 0;
346 		}
347 
348 		/* if this phy has been initialized, get it directly */
349 		conn->phy = (struct rockchip_phy *)data->phy_drv;
350 		return 0;
351 	}
352 
353 	return 0;
354 }
355 
356 int drm_mode_vrefresh(const struct drm_display_mode *mode)
357 {
358 	int refresh = 0;
359 	unsigned int calc_val;
360 
361 	if (mode->vrefresh > 0) {
362 		refresh = mode->vrefresh;
363 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
364 		int vtotal;
365 
366 		vtotal = mode->vtotal;
367 		/* work out vrefresh the value will be x1000 */
368 		calc_val = (mode->clock * 1000);
369 		calc_val /= mode->htotal;
370 		refresh = (calc_val + vtotal / 2) / vtotal;
371 
372 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
373 			refresh *= 2;
374 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
375 			refresh /= 2;
376 		if (mode->vscan > 1)
377 			refresh /= mode->vscan;
378 	}
379 	return refresh;
380 }
381 
382 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode)
383 {
384 	int hactive, vactive, pixelclock;
385 	int hfront_porch, hback_porch, hsync_len;
386 	int vfront_porch, vback_porch, vsync_len;
387 	int val, flags = 0;
388 
389 #define FDT_GET_INT(val, name) \
390 	val = ofnode_read_s32_default(node, name, -1); \
391 	if (val < 0) { \
392 		printf("Can't get %s\n", name); \
393 		return -ENXIO; \
394 	}
395 
396 #define FDT_GET_INT_DEFAULT(val, name, default) \
397 	val = ofnode_read_s32_default(node, name, default);
398 
399 	FDT_GET_INT(hactive, "hactive");
400 	FDT_GET_INT(vactive, "vactive");
401 	FDT_GET_INT(pixelclock, "clock-frequency");
402 	FDT_GET_INT(hsync_len, "hsync-len");
403 	FDT_GET_INT(hfront_porch, "hfront-porch");
404 	FDT_GET_INT(hback_porch, "hback-porch");
405 	FDT_GET_INT(vsync_len, "vsync-len");
406 	FDT_GET_INT(vfront_porch, "vfront-porch");
407 	FDT_GET_INT(vback_porch, "vback-porch");
408 	FDT_GET_INT(val, "hsync-active");
409 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
410 	FDT_GET_INT(val, "vsync-active");
411 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
412 	FDT_GET_INT(val, "pixelclk-active");
413 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
414 
415 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
416 	if (val == DRM_MODE_FLAG_XMIRROR) {
417 		flags |= DRM_MODE_FLAG_XMIRROR;
418 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
419 		flags |= DRM_MODE_FLAG_YMIRROR;
420 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
421 		flags |= DRM_MODE_FLAG_XMIRROR;
422 		flags |= DRM_MODE_FLAG_YMIRROR;
423 	}
424 	mode->hdisplay = hactive;
425 	mode->hsync_start = mode->hdisplay + hfront_porch;
426 	mode->hsync_end = mode->hsync_start + hsync_len;
427 	mode->htotal = mode->hsync_end + hback_porch;
428 
429 	mode->vdisplay = vactive;
430 	mode->vsync_start = mode->vdisplay + vfront_porch;
431 	mode->vsync_end = mode->vsync_start + vsync_len;
432 	mode->vtotal = mode->vsync_end + vback_porch;
433 
434 	mode->clock = pixelclock / 1000;
435 	mode->flags = flags;
436 	mode->vrefresh = drm_mode_vrefresh(mode);
437 
438 	return 0;
439 }
440 
441 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode)
442 {
443 	int ret = 0;
444 
445 	ret = rockchip_ofnode_get_display_mode(node, mode);
446 
447 	if (ret) {
448 		mode->clock = 74250;
449 		mode->flags = 0x5;
450 		mode->hdisplay = 1280;
451 		mode->hsync_start = 1390;
452 		mode->hsync_end = 1430;
453 		mode->htotal = 1650;
454 		mode->hskew = 0;
455 		mode->vdisplay = 720;
456 		mode->vsync_start = 725;
457 		mode->vsync_end = 730;
458 		mode->vtotal = 750;
459 		mode->vrefresh = 60;
460 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
461 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
462 	}
463 
464 	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
465 	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
466 	       mode->vscan);
467 
468 	return 0;
469 }
470 
471 static int display_get_timing_from_dts(struct rockchip_panel *panel,
472 				       struct drm_display_mode *mode)
473 {
474 	struct ofnode_phandle_args args;
475 	ofnode dt, timing, mcu_panel;
476 	int ret;
477 
478 	mcu_panel = dev_read_subnode(panel->dev, "mcu-panel");
479 	dt = dev_read_subnode(panel->dev, "display-timings");
480 	if (ofnode_valid(dt)) {
481 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
482 						     0, 0, &args);
483 		if (ret)
484 			return ret;
485 
486 		timing = args.node;
487 	} else if (ofnode_valid(mcu_panel)) {
488 		dt = ofnode_find_subnode(mcu_panel, "display-timings");
489 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
490 						     0, 0, &args);
491 		if (ret)
492 			return ret;
493 
494 		timing = args.node;
495 	} else {
496 		timing = dev_read_subnode(panel->dev, "panel-timing");
497 	}
498 
499 	if (!ofnode_valid(timing)) {
500 		printf("failed to get display timings from DT\n");
501 		return -ENXIO;
502 	}
503 
504 	rockchip_ofnode_get_display_mode(timing, mode);
505 
506 	return 0;
507 }
508 
509 /**
510  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
511  * @edid_data: structure store mode list
512  * @max_output: vop max output resolution
513  */
514 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
515 				    struct vop_rect *max_output)
516 {
517 	int i;
518 
519 	for (i = 0; i < edid_data->modes; i++) {
520 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
521 		    edid_data->mode_buf[i].vdisplay > max_output->height)
522 			edid_data->mode_buf[i].invalid = true;
523 	}
524 }
525 
526 /**
527  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
528  * @p: mode
529  * @adjust_flags: a combination of adjustment flags
530  *
531  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
532  *
533  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
534  *   interlaced modes.
535  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
536  *   buffers containing two eyes (only adjust the timings when needed, eg. for
537  *   "frame packing" or "side by side full").
538  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
539  *   be performed for doublescan and vscan > 1 modes respectively.
540  */
541 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
542 {
543 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
544 		return;
545 
546 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
547 		p->crtc_clock = 2 * p->clock;
548 	else
549 		p->crtc_clock = p->clock;
550 	p->crtc_hdisplay = p->hdisplay;
551 	p->crtc_hsync_start = p->hsync_start;
552 	p->crtc_hsync_end = p->hsync_end;
553 	p->crtc_htotal = p->htotal;
554 	p->crtc_hskew = p->hskew;
555 	p->crtc_vdisplay = p->vdisplay;
556 	p->crtc_vsync_start = p->vsync_start;
557 	p->crtc_vsync_end = p->vsync_end;
558 	p->crtc_vtotal = p->vtotal;
559 
560 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
561 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
562 			p->crtc_vdisplay /= 2;
563 			p->crtc_vsync_start /= 2;
564 			p->crtc_vsync_end /= 2;
565 			p->crtc_vtotal /= 2;
566 		}
567 	}
568 
569 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
570 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
571 			p->crtc_vdisplay *= 2;
572 			p->crtc_vsync_start *= 2;
573 			p->crtc_vsync_end *= 2;
574 			p->crtc_vtotal *= 2;
575 		}
576 	}
577 
578 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
579 		if (p->vscan > 1) {
580 			p->crtc_vdisplay *= p->vscan;
581 			p->crtc_vsync_start *= p->vscan;
582 			p->crtc_vsync_end *= p->vscan;
583 			p->crtc_vtotal *= p->vscan;
584 		}
585 	}
586 
587 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
588 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
589 
590 		switch (layout) {
591 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
592 			p->crtc_clock *= 2;
593 			p->crtc_vdisplay += p->crtc_vtotal;
594 			p->crtc_vsync_start += p->crtc_vtotal;
595 			p->crtc_vsync_end += p->crtc_vtotal;
596 			p->crtc_vtotal += p->crtc_vtotal;
597 			break;
598 		}
599 	}
600 
601 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
602 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
603 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
604 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
605 }
606 
607 /**
608  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
609  * output format
610  *
611  * @connector: drm connector under action.
612  * @mode: video mode to be tested.
613  *
614  * Returns:
615  * true if the mode can be supported in YCBCR420 format
616  * false if not.
617  */
618 bool drm_mode_is_420_only(const struct drm_display_info *display,
619 			  struct drm_display_mode *mode)
620 {
621 	u8 vic = drm_match_cea_mode(mode);
622 
623 	return test_bit(vic, display->hdmi.y420_vdb_modes);
624 }
625 
626 /**
627  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
628  * output format also (along with RGB/YCBCR444/422)
629  *
630  * @display: display under action.
631  * @mode: video mode to be tested.
632  *
633  * Returns:
634  * true if the mode can be support YCBCR420 format
635  * false if not.
636  */
637 bool drm_mode_is_420_also(const struct drm_display_info *display,
638 			  struct drm_display_mode *mode)
639 {
640 	u8 vic = drm_match_cea_mode(mode);
641 
642 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
643 }
644 
645 /**
646  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
647  * output format
648  *
649  * @display: display under action.
650  * @mode: video mode to be tested.
651  *
652  * Returns:
653  * true if the mode can be supported in YCBCR420 format
654  * false if not.
655  */
656 bool drm_mode_is_420(const struct drm_display_info *display,
657 		     struct drm_display_mode *mode)
658 {
659 	return drm_mode_is_420_only(display, mode) ||
660 		drm_mode_is_420_also(display, mode);
661 }
662 
663 static int display_get_timing(struct display_state *state)
664 {
665 	struct connector_state *conn_state = &state->conn_state;
666 	struct drm_display_mode *mode = &conn_state->mode;
667 	const struct drm_display_mode *m;
668 	struct rockchip_panel *panel = conn_state->connector->panel;
669 
670 	if (panel->funcs->get_mode)
671 		return panel->funcs->get_mode(panel, mode);
672 
673 	if (dev_of_valid(panel->dev) &&
674 	    !display_get_timing_from_dts(panel, mode)) {
675 		printf("Using display timing dts\n");
676 		return 0;
677 	}
678 
679 	if (panel->data) {
680 		m = (const struct drm_display_mode *)panel->data;
681 		memcpy(mode, m, sizeof(*m));
682 		printf("Using display timing from compatible panel driver\n");
683 		return 0;
684 	}
685 
686 	return -ENODEV;
687 }
688 
689 static int display_pre_init(void)
690 {
691 	struct display_state *state;
692 	int ret = 0;
693 
694 	list_for_each_entry(state, &rockchip_display_list, head) {
695 		struct connector_state *conn_state = &state->conn_state;
696 		struct crtc_state *crtc_state = &state->crtc_state;
697 		struct rockchip_crtc *crtc = crtc_state->crtc;
698 
699 		ret = rockchip_connector_pre_init(state);
700 		if (ret)
701 			printf("pre init conn error\n");
702 
703 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
704 	}
705 	return ret;
706 }
707 
708 static int display_use_force_mode(struct display_state *state)
709 {
710 	struct connector_state *conn_state = &state->conn_state;
711 	struct drm_display_mode *mode = &conn_state->mode;
712 
713 	conn_state->bpc = 8;
714 	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
715 	conn_state->bus_format = state->force_bus_format;
716 
717 	return 0;
718 }
719 
720 static int display_get_edid_mode(struct display_state *state)
721 {
722 	int ret = 0;
723 	struct connector_state *conn_state = &state->conn_state;
724 	struct drm_display_mode *mode = &conn_state->mode;
725 	int bpc;
726 
727 	ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
728 	if (!ret) {
729 		conn_state->bpc = bpc;
730 		edid_print_info((void *)&conn_state->edid);
731 	} else {
732 		conn_state->bpc = 8;
733 		mode->clock = 74250;
734 		mode->flags = 0x5;
735 		mode->hdisplay = 1280;
736 		mode->hsync_start = 1390;
737 		mode->hsync_end = 1430;
738 		mode->htotal = 1650;
739 		mode->hskew = 0;
740 		mode->vdisplay = 720;
741 		mode->vsync_start = 725;
742 		mode->vsync_end = 730;
743 		mode->vtotal = 750;
744 		mode->vrefresh = 60;
745 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
746 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
747 
748 		printf("error: %s get mode from edid failed, use 720p60 as default mode\n",
749 		       state->conn_state.connector->dev->name);
750 	}
751 
752 	return ret;
753 }
754 
755 static int display_mode_valid(struct display_state *state)
756 {
757 	struct connector_state *conn_state = &state->conn_state;
758 	struct rockchip_connector *conn = conn_state->connector;
759 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
760 	struct crtc_state *crtc_state = &state->crtc_state;
761 	const struct rockchip_crtc *crtc = crtc_state->crtc;
762 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
763 	int ret;
764 
765 	if (conn_funcs->mode_valid) {
766 		ret = conn_funcs->mode_valid(conn, state);
767 		if (ret)
768 			return ret;
769 	}
770 
771 	if (crtc_funcs->mode_valid) {
772 		ret = crtc_funcs->mode_valid(state);
773 		if (ret)
774 			return ret;
775 	}
776 
777 	return 0;
778 }
779 
780 static int display_init(struct display_state *state)
781 {
782 	struct connector_state *conn_state = &state->conn_state;
783 	struct rockchip_connector *conn = conn_state->connector;
784 	struct crtc_state *crtc_state = &state->crtc_state;
785 	struct rockchip_crtc *crtc = crtc_state->crtc;
786 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
787 	struct drm_display_mode *mode = &conn_state->mode;
788 	const char *compatible;
789 	int ret = 0;
790 	static bool __print_once = false;
791 
792 	if (!__print_once) {
793 		__print_once = true;
794 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
795 	}
796 
797 	if (state->is_init)
798 		return 0;
799 
800 	if (!crtc_funcs) {
801 		printf("failed to find crtc functions\n");
802 		return -ENXIO;
803 	}
804 
805 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
806 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
807 		   sizeof(struct drm_display_mode))) {
808 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
809 			crtc_state->dev->name,
810 			crtc_state->crtc->active_mode.type,
811 			crtc_state->crtc->active_mode.hdisplay,
812 			crtc_state->crtc->active_mode.vdisplay,
813 			crtc_state->crtc->active_mode.vrefresh);
814 		return -ENODEV;
815 	}
816 
817 	if (crtc_funcs->preinit) {
818 		ret = crtc_funcs->preinit(state);
819 		if (ret)
820 			return ret;
821 	}
822 
823 	ret = rockchip_connector_init(state);
824 	if (ret)
825 		goto deinit;
826 
827 	/*
828 	 * support hotplug, but not connect;
829 	 */
830 #ifdef CONFIG_DRM_ROCKCHIP_TVE
831 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
832 		printf("hdmi plugin ,skip tve\n");
833 		goto deinit;
834 	}
835 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
836 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
837 		printf("hdmi plugin ,skip tve\n");
838 		goto deinit;
839 	}
840 #endif
841 
842 	ret = rockchip_connector_detect(state);
843 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
844 	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
845 		crtc->hdmi_hpd = ret;
846 #endif
847 	if (!ret && !state->force_output)
848 		goto deinit;
849 
850 	if (conn->panel) {
851 		ret = display_get_timing(state);
852 		if (!ret)
853 			conn_state->bpc = conn->panel->bpc;
854 #if defined(CONFIG_I2C_EDID)
855 		if (ret < 0 && conn->funcs->get_edid) {
856 			rockchip_panel_prepare(conn->panel);
857 			ret = conn->funcs->get_edid(conn, state);
858 			if (!ret)
859 				display_get_edid_mode(state);
860 		}
861 #endif
862 	} else if (conn->bridge) {
863 		ret = video_bridge_read_edid(conn->bridge->dev,
864 					     conn_state->edid, EDID_SIZE);
865 		if (ret > 0) {
866 #if defined(CONFIG_I2C_EDID)
867 			display_get_edid_mode(state);
868 #endif
869 		} else {
870 			ret = video_bridge_get_timing(conn->bridge->dev);
871 		}
872 	} else if (conn->funcs->get_timing) {
873 		ret = conn->funcs->get_timing(conn, state);
874 	} else if (conn->funcs->get_edid) {
875 		ret = conn->funcs->get_edid(conn, state);
876 #if defined(CONFIG_I2C_EDID)
877 		if (!ret)
878 			display_get_edid_mode(state);
879 #endif
880 	}
881 
882 	if (!ret && conn_state->secondary) {
883 		struct rockchip_connector *connector = conn_state->secondary;
884 
885 		if (connector->panel) {
886 			if (connector->panel->funcs->get_mode) {
887 				struct drm_display_mode *_mode = drm_mode_create();
888 
889 				ret = connector->panel->funcs->get_mode(connector->panel, _mode);
890 				if (!ret && !drm_mode_equal(_mode, mode))
891 					ret = -EINVAL;
892 
893 				drm_mode_destroy(_mode);
894 			}
895 		}
896 	}
897 
898 	if (ret && !state->force_output)
899 		goto deinit;
900 	if (state->force_output)
901 		display_use_force_mode(state);
902 
903 	if (display_mode_valid(state))
904 		goto deinit;
905 
906 	/* rk356x series drive mipi pixdata on posedge */
907 	compatible = dev_read_string(conn->dev, "compatible");
908 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
909 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
910 
911 	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
912 	       "    H: %04d %04d %04d %04d\n"
913 	       "    V: %04d %04d %04d %04d\n"
914 	       "bus_format: %x\n",
915 	       conn->dev->name,
916 	       state->force_output ? "use force output" : "",
917 	       mode->clock, mode->flags,
918 	       mode->hdisplay, mode->hsync_start,
919 	       mode->hsync_end, mode->htotal,
920 	       mode->vdisplay, mode->vsync_start,
921 	       mode->vsync_end, mode->vtotal,
922 	       conn_state->bus_format);
923 
924 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
925 
926 	if (conn_state->secondary) {
927 		mode->crtc_clock *= 2;
928 		mode->crtc_hdisplay *= 2;
929 		mode->crtc_hsync_start *= 2;
930 		mode->crtc_hsync_end *= 2;
931 		mode->crtc_htotal *= 2;
932 	}
933 
934 	if (conn->bridge)
935 		rockchip_bridge_mode_set(conn->bridge, &conn_state->mode);
936 
937 	if (crtc_funcs->init) {
938 		ret = crtc_funcs->init(state);
939 		if (ret)
940 			goto deinit;
941 	}
942 	state->is_init = 1;
943 
944 	crtc_state->crtc->active = true;
945 	memcpy(&crtc_state->crtc->active_mode,
946 	       &conn_state->mode, sizeof(struct drm_display_mode));
947 
948 	return 0;
949 
950 deinit:
951 	rockchip_connector_deinit(state);
952 	return ret;
953 }
954 
955 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
956 {
957 	struct crtc_state *crtc_state = &state->crtc_state;
958 	const struct rockchip_crtc *crtc = crtc_state->crtc;
959 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
960 	int ret;
961 
962 	if (!state->is_init)
963 		return -EINVAL;
964 
965 	if (crtc_funcs->send_mcu_cmd) {
966 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
967 		if (ret)
968 			return ret;
969 	}
970 
971 	return 0;
972 }
973 
974 static int display_set_plane(struct display_state *state)
975 {
976 	struct crtc_state *crtc_state = &state->crtc_state;
977 	const struct rockchip_crtc *crtc = crtc_state->crtc;
978 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
979 	int ret;
980 
981 	if (!state->is_init)
982 		return -EINVAL;
983 
984 	if (crtc_funcs->set_plane) {
985 		ret = crtc_funcs->set_plane(state);
986 		if (ret)
987 			return ret;
988 	}
989 
990 	return 0;
991 }
992 
993 static int display_enable(struct display_state *state)
994 {
995 	struct crtc_state *crtc_state = &state->crtc_state;
996 	const struct rockchip_crtc *crtc = crtc_state->crtc;
997 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
998 
999 	if (!state->is_init)
1000 		return -EINVAL;
1001 
1002 	if (state->is_enable)
1003 		return 0;
1004 
1005 	if (crtc_funcs->prepare)
1006 		crtc_funcs->prepare(state);
1007 
1008 	rockchip_connector_pre_enable(state);
1009 
1010 	if (crtc_funcs->enable)
1011 		crtc_funcs->enable(state);
1012 
1013 	rockchip_connector_enable(state);
1014 
1015 	state->is_enable = true;
1016 
1017 	return 0;
1018 }
1019 
1020 static int display_disable(struct display_state *state)
1021 {
1022 	struct crtc_state *crtc_state = &state->crtc_state;
1023 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1024 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1025 
1026 	if (!state->is_init)
1027 		return 0;
1028 
1029 	if (!state->is_enable)
1030 		return 0;
1031 
1032 	rockchip_connector_disable(state);
1033 
1034 	if (crtc_funcs->disable)
1035 		crtc_funcs->disable(state);
1036 
1037 	rockchip_connector_post_disable(state);
1038 
1039 	state->is_enable = 0;
1040 	state->is_init = 0;
1041 
1042 	return 0;
1043 }
1044 
1045 static int display_rect_calc_scale(int src, int dst)
1046 {
1047 	int scale = 0;
1048 
1049 	if (WARN_ON(src < 0 || dst < 0))
1050 		return -EINVAL;
1051 
1052 	if (dst == 0)
1053 		return 0;
1054 
1055 	src <<= 16;
1056 
1057 	if (src > (dst << 16))
1058 		return DIV_ROUND_UP(src, dst);
1059 	else
1060 		scale = src / dst;
1061 
1062 	return scale;
1063 }
1064 
1065 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst,
1066 			     int min_hscale, int max_hscale)
1067 {
1068 	int hscale = display_rect_calc_scale(src->w, dst->w);
1069 
1070 	if (hscale < 0 || dst->w == 0)
1071 		return hscale;
1072 
1073 	if (hscale < min_hscale || hscale > max_hscale)
1074 		return -ERANGE;
1075 
1076 	return hscale;
1077 }
1078 
1079 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst,
1080 			     int min_vscale, int max_vscale)
1081 {
1082 	int vscale = display_rect_calc_scale(src->h, dst->h);
1083 
1084 	if (vscale < 0 || dst->h == 0)
1085 		return vscale;
1086 
1087 	if (vscale < min_vscale || vscale > max_vscale)
1088 		return -ERANGE;
1089 
1090 	return vscale;
1091 }
1092 
1093 static int display_check(struct display_state *state)
1094 {
1095 	struct connector_state *conn_state = &state->conn_state;
1096 	struct rockchip_connector *conn = conn_state->connector;
1097 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
1098 	struct crtc_state *crtc_state = &state->crtc_state;
1099 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1100 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1101 	int ret;
1102 
1103 	if (!state->is_init)
1104 		return 0;
1105 
1106 	if (conn_funcs->check) {
1107 		ret = conn_funcs->check(conn, state);
1108 		if (ret)
1109 			goto check_fail;
1110 	}
1111 
1112 	if (crtc_funcs->check) {
1113 		ret = crtc_funcs->check(state);
1114 		if (ret)
1115 			goto check_fail;
1116 	}
1117 
1118 	if (crtc_funcs->plane_check) {
1119 		ret = crtc_funcs->plane_check(state);
1120 		if (ret)
1121 			goto check_fail;
1122 	}
1123 
1124 	return 0;
1125 
1126 check_fail:
1127 	state->is_init = false;
1128 	return ret;
1129 }
1130 
1131 static int display_logo(struct display_state *state)
1132 {
1133 	struct crtc_state *crtc_state = &state->crtc_state;
1134 	struct connector_state *conn_state = &state->conn_state;
1135 	struct logo_info *logo = &state->logo;
1136 	int hdisplay, vdisplay, ret;
1137 
1138 	ret = display_init(state);
1139 	if (!state->is_init || ret)
1140 		return -ENODEV;
1141 
1142 	switch (logo->bpp) {
1143 	case 16:
1144 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1145 		break;
1146 	case 24:
1147 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1148 		break;
1149 	case 32:
1150 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1151 		break;
1152 	default:
1153 		printf("can't support bmp bits[%d]\n", logo->bpp);
1154 		return -EINVAL;
1155 	}
1156 	hdisplay = conn_state->mode.crtc_hdisplay;
1157 	vdisplay = conn_state->mode.vdisplay;
1158 	crtc_state->src_rect.w = logo->width;
1159 	crtc_state->src_rect.h = logo->height;
1160 	crtc_state->src_rect.x = 0;
1161 	crtc_state->src_rect.y = 0;
1162 	crtc_state->ymirror = logo->ymirror;
1163 	crtc_state->rb_swap = 0;
1164 
1165 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1166 	crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5;
1167 
1168 	if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1169 		crtc_state->crtc_rect.x = 0;
1170 		crtc_state->crtc_rect.y = 0;
1171 		crtc_state->crtc_rect.w = hdisplay;
1172 		crtc_state->crtc_rect.h = vdisplay;
1173 	} else {
1174 		if (crtc_state->src_rect.w >= hdisplay) {
1175 			crtc_state->crtc_rect.x = 0;
1176 			crtc_state->crtc_rect.w = hdisplay;
1177 		} else {
1178 			crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2;
1179 			crtc_state->crtc_rect.w = crtc_state->src_rect.w;
1180 		}
1181 
1182 		if (crtc_state->src_rect.h >= vdisplay) {
1183 			crtc_state->crtc_rect.y = 0;
1184 			crtc_state->crtc_rect.h = vdisplay;
1185 		} else {
1186 			crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2;
1187 			crtc_state->crtc_rect.h = crtc_state->src_rect.h;
1188 		}
1189 	}
1190 
1191 	display_check(state);
1192 	display_set_plane(state);
1193 	display_enable(state);
1194 
1195 	return 0;
1196 }
1197 
1198 static int get_crtc_id(ofnode connect, bool is_ports_node)
1199 {
1200 	struct device_node *port_node;
1201 	struct device_node *remote;
1202 	int phandle;
1203 	int val;
1204 
1205 	if (is_ports_node) {
1206 		port_node = of_get_parent(connect.np);
1207 		if (!port_node)
1208 			goto err;
1209 
1210 		val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
1211 		if (val < 0)
1212 			goto err;
1213 	} else {
1214 		phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1215 		if (phandle < 0)
1216 			goto err;
1217 
1218 		remote = of_find_node_by_phandle(phandle);
1219 		if (!remote)
1220 			goto err;
1221 
1222 		val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1223 		if (val < 0)
1224 			goto err;
1225 	}
1226 
1227 	return val;
1228 err:
1229 	printf("Can't get crtc id, default set to id = 0\n");
1230 	return 0;
1231 }
1232 
1233 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
1234 {
1235 	ofnode mcu_node;
1236 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1237 
1238 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1239 	if (!ofnode_valid(mcu_node))
1240 		return -ENODEV;
1241 
1242 #define FDT_GET_MCU_INT(val, name) \
1243 	do { \
1244 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1245 		if (val < 0) { \
1246 			printf("Can't get %s\n", name); \
1247 			return -ENXIO; \
1248 		} \
1249 	} while (0)
1250 
1251 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1252 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1253 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1254 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1255 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1256 
1257 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1258 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1259 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1260 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1261 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1262 
1263 	return 0;
1264 }
1265 
1266 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1267 {
1268 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1269 
1270 	list_for_each_entry(tmp, &logo_cache_list, head) {
1271 		if (!strcmp(tmp->name, bmp)) {
1272 			logo_cache = tmp;
1273 			break;
1274 		}
1275 	}
1276 
1277 	if (!logo_cache) {
1278 		logo_cache = malloc(sizeof(*logo_cache));
1279 		if (!logo_cache) {
1280 			printf("failed to alloc memory for logo cache\n");
1281 			return NULL;
1282 		}
1283 		memset(logo_cache, 0, sizeof(*logo_cache));
1284 		strcpy(logo_cache->name, bmp);
1285 		INIT_LIST_HEAD(&logo_cache->head);
1286 		list_add_tail(&logo_cache->head, &logo_cache_list);
1287 	}
1288 
1289 	return logo_cache;
1290 }
1291 
1292 /* Note: used only for rkfb kernel driver */
1293 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1294 {
1295 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1296 	void *dst = NULL;
1297 	int len, size;
1298 	struct bmp_header *header;
1299 
1300 	if (!logo || !bmp_name)
1301 		return -EINVAL;
1302 
1303 	header = malloc(RK_BLK_SIZE);
1304 	if (!header)
1305 		return -ENOMEM;
1306 
1307 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1308 	if (len != RK_BLK_SIZE) {
1309 		free(header);
1310 		return -EINVAL;
1311 	}
1312 	size = get_unaligned_le32(&header->file_size);
1313 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1314 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1315 	if (len != size) {
1316 		printf("failed to load bmp %s\n", bmp_name);
1317 		free(header);
1318 		return -ENOENT;
1319 	}
1320 
1321 	logo->mem = dst;
1322 #endif
1323 
1324 	return 0;
1325 }
1326 
1327 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1328 {
1329 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1330 	struct rockchip_logo_cache *logo_cache;
1331 	struct bmp_header *header;
1332 	void *dst = NULL, *pdst;
1333 	int size, len;
1334 	int ret = 0;
1335 	int reserved = 0;
1336 	int dst_size;
1337 
1338 	if (!logo || !bmp_name)
1339 		return -EINVAL;
1340 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1341 	if (!logo_cache)
1342 		return -ENOMEM;
1343 
1344 	if (logo_cache->logo.mem) {
1345 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1346 		return 0;
1347 	}
1348 
1349 	header = malloc(RK_BLK_SIZE);
1350 	if (!header)
1351 		return -ENOMEM;
1352 
1353 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1354 	if (len != RK_BLK_SIZE) {
1355 		ret = -EINVAL;
1356 		goto free_header;
1357 	}
1358 
1359 	logo->bpp = get_unaligned_le16(&header->bit_count);
1360 	logo->width = get_unaligned_le32(&header->width);
1361 	logo->height = get_unaligned_le32(&header->height);
1362 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1363 	reserved = get_unaligned_le32(&header->reserved);
1364 	if (logo->height < 0)
1365 	    logo->height = -logo->height;
1366 	size = get_unaligned_le32(&header->file_size);
1367 	if (!can_direct_logo(logo->bpp)) {
1368 		if (size > MEMORY_POOL_SIZE) {
1369 			printf("failed to use boot buf as temp bmp buffer\n");
1370 			ret = -ENOMEM;
1371 			goto free_header;
1372 		}
1373 		pdst = get_display_buffer(size);
1374 
1375 	} else {
1376 		pdst = get_display_buffer(size);
1377 		dst = pdst;
1378 	}
1379 
1380 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1381 	if (len != size) {
1382 		printf("failed to load bmp %s\n", bmp_name);
1383 		ret = -ENOENT;
1384 		goto free_header;
1385 	}
1386 
1387 	if (!can_direct_logo(logo->bpp)) {
1388 		/*
1389 		 * TODO: force use 16bpp if bpp less than 16;
1390 		 */
1391 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1392 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1393 		dst = get_display_buffer(dst_size);
1394 		if (!dst) {
1395 			ret = -ENOMEM;
1396 			goto free_header;
1397 		}
1398 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1399 			printf("failed to decode bmp %s\n", bmp_name);
1400 			ret = -EINVAL;
1401 			goto free_header;
1402 		}
1403 
1404 		logo->offset = 0;
1405 		logo->ymirror = 0;
1406 	} else {
1407 		logo->offset = get_unaligned_le32(&header->data_offset);
1408 		if (reserved == BMP_PROCESSED_FLAG)
1409 			logo->ymirror = 0;
1410 		else
1411 			logo->ymirror = 1;
1412 	}
1413 	logo->mem = dst;
1414 
1415 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1416 
1417 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1418 
1419 free_header:
1420 
1421 	free(header);
1422 
1423 	return ret;
1424 #else
1425 	return -EINVAL;
1426 #endif
1427 }
1428 
1429 void rockchip_show_fbbase(ulong fbbase)
1430 {
1431 	struct display_state *s;
1432 
1433 	list_for_each_entry(s, &rockchip_display_list, head) {
1434 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1435 		s->logo.mem = (char *)fbbase;
1436 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1437 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1438 		s->logo.bpp = 32;
1439 		s->logo.ymirror = 0;
1440 
1441 		display_logo(s);
1442 	}
1443 }
1444 
1445 int rockchip_show_bmp(const char *bmp)
1446 {
1447 	struct display_state *s;
1448 	int ret = 0;
1449 
1450 	if (!bmp) {
1451 		list_for_each_entry(s, &rockchip_display_list, head)
1452 			display_disable(s);
1453 		return -ENOENT;
1454 	}
1455 
1456 	list_for_each_entry(s, &rockchip_display_list, head) {
1457 		s->logo.mode = s->charge_logo_mode;
1458 		if (load_bmp_logo(&s->logo, bmp))
1459 			continue;
1460 		ret = display_logo(s);
1461 	}
1462 
1463 	return ret;
1464 }
1465 
1466 int rockchip_show_logo(void)
1467 {
1468 	struct display_state *s;
1469 	int ret = 0;
1470 
1471 	list_for_each_entry(s, &rockchip_display_list, head) {
1472 		s->logo.mode = s->logo_mode;
1473 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1474 			printf("failed to display uboot logo\n");
1475 		else
1476 			ret = display_logo(s);
1477 
1478 		/* Load kernel bmp in rockchip_display_fixup() later */
1479 	}
1480 
1481 	return ret;
1482 }
1483 
1484 int rockchip_vop_dump(const char *cmd)
1485 {
1486 	struct display_state *state;
1487 	struct crtc_state *crtc_state;
1488 	struct rockchip_crtc *crtc;
1489 	const struct rockchip_crtc_funcs *crtc_funcs;
1490 	int ret = -EINVAL;
1491 
1492 	list_for_each_entry(state, &rockchip_display_list, head) {
1493 		if (!state->is_init)
1494 			continue;
1495 		crtc_state = &state->crtc_state;
1496 		crtc = crtc_state->crtc;
1497 		crtc_funcs = crtc->funcs;
1498 
1499 		if (!cmd)
1500 			ret = crtc_funcs->active_regs_dump(state);
1501 		else if (!strcmp(cmd, "a") || !strcmp(cmd, "all"))
1502 			ret = crtc_funcs->regs_dump(state);
1503 		if (!ret)
1504 			break;
1505 	}
1506 
1507 	if (ret)
1508 		ret = CMD_RET_USAGE;
1509 
1510 	return ret;
1511 }
1512 
1513 enum {
1514 	PORT_DIR_IN,
1515 	PORT_DIR_OUT,
1516 };
1517 
1518 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id)
1519 {
1520 	ofnode ports, port;
1521 	u32 reg;
1522 
1523 	ports = ofnode_find_subnode(node, "ports");
1524 	if (!ofnode_valid(ports))
1525 		return NULL;
1526 
1527 	ofnode_for_each_subnode(port, ports) {
1528 		if (ofnode_read_u32(port, "reg", &reg))
1529 			continue;
1530 
1531 		if (reg == id)
1532 			break;
1533 	}
1534 
1535 	if (reg == id)
1536 		return ofnode_to_np(port);
1537 
1538 	return NULL;
1539 }
1540 
1541 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port)
1542 {
1543 	ofnode parent;
1544 	int is_ports_node;
1545 
1546 	parent = ofnode_get_parent(port);
1547 	is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0;
1548 	if (is_ports_node)
1549 		parent = ofnode_get_parent(parent);
1550 
1551 	return ofnode_to_np(parent);
1552 }
1553 
1554 const struct device_node *
1555 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint)
1556 {
1557 	const struct device_node *port_node;
1558 	ofnode ep;
1559 	u32 reg;
1560 
1561 	port_node = rockchip_of_graph_get_port_by_id(node, port);
1562 	if (!port_node)
1563 		return NULL;
1564 
1565 	ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) {
1566 		if (ofnode_read_u32(ep, "reg", &reg))
1567 			break;
1568 		if (reg == endpoint)
1569 			break;
1570 	}
1571 
1572 	if (!ofnode_valid(ep))
1573 		return NULL;
1574 
1575 	return ofnode_to_np(ep);
1576 }
1577 
1578 static const struct device_node *
1579 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint)
1580 {
1581 	const struct device_node *ep_node;
1582 	ofnode ep;
1583 	uint phandle;
1584 
1585 	ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint);
1586 	if (!ep_node)
1587 		return NULL;
1588 
1589 	if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle))
1590 		return NULL;
1591 
1592 	ep = ofnode_get_by_phandle(phandle);
1593 	if (!ofnode_valid(ep))
1594 		return NULL;
1595 
1596 	return ofnode_to_np(ep);
1597 }
1598 
1599 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel)
1600 {
1601 	const struct device_node *ep_node, *panel_node;
1602 	ofnode panel_ofnode, port;
1603 	struct udevice *panel_dev;
1604 	int ret = 0;
1605 
1606 	*panel = NULL;
1607 	panel_ofnode = dev_read_subnode(dev, "panel");
1608 	if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) {
1609 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode,
1610 						  &panel_dev);
1611 		if (!ret)
1612 			goto found;
1613 	}
1614 
1615 	ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1616 	if (!ep_node)
1617 		return -ENODEV;
1618 
1619 	port = ofnode_get_parent(np_to_ofnode(ep_node));
1620 	if (!ofnode_valid(port))
1621 		return -ENODEV;
1622 
1623 	panel_node = rockchip_of_graph_get_port_parent(port);
1624 	if (!panel_node)
1625 		return -ENODEV;
1626 
1627 	ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev);
1628 	if (!ret)
1629 		goto found;
1630 
1631 	return -ENODEV;
1632 
1633 found:
1634 	*panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1635 	return 0;
1636 }
1637 
1638 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge)
1639 {
1640 	const struct device_node *ep_node, *bridge_node;
1641 	ofnode port;
1642 	struct udevice *bridge_dev;
1643 	int ret = 0;
1644 
1645 	ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1646 	if (!ep_node)
1647 		return -ENODEV;
1648 
1649 	port = ofnode_get_parent(np_to_ofnode(ep_node));
1650 	if (!ofnode_valid(port))
1651 		return -ENODEV;
1652 
1653 	bridge_node = rockchip_of_graph_get_port_parent(port);
1654 	if (!bridge_node)
1655 		return -ENODEV;
1656 
1657 	ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node),
1658 					  &bridge_dev);
1659 	if (!ret)
1660 		goto found;
1661 
1662 	return -ENODEV;
1663 
1664 found:
1665 	*bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev);
1666 	return 0;
1667 }
1668 
1669 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel,
1670 					    struct rockchip_bridge **bridge)
1671 {
1672 	int ret = 0;
1673 
1674 	if (*panel)
1675 		return 0;
1676 
1677 	*panel = NULL;
1678 	*bridge = NULL;
1679 
1680 	if (panel) {
1681 		ret  = rockchip_of_find_panel(dev, panel);
1682 		if (!ret)
1683 			return 0;
1684 	}
1685 
1686 	if (ret) {
1687 		ret = rockchip_of_find_bridge(dev, bridge);
1688 		if (!ret)
1689 			ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel,
1690 							       &(*bridge)->next_bridge);
1691 	}
1692 
1693 	return ret;
1694 }
1695 
1696 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1697 {
1698 	struct udevice *phy_dev;
1699 	int ret;
1700 
1701 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1702 	if (ret)
1703 		return NULL;
1704 
1705 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1706 }
1707 
1708 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint)
1709 {
1710 	ofnode ep, port, ports, conn;
1711 	uint phandle;
1712 	struct udevice *dev;
1713 	int ret;
1714 
1715 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1716 		return NULL;
1717 
1718 	ep = ofnode_get_by_phandle(phandle);
1719 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1720 		return NULL;
1721 
1722 	port = ofnode_get_parent(ep);
1723 	if (!ofnode_valid(port))
1724 		return NULL;
1725 
1726 	ports = ofnode_get_parent(port);
1727 	if (!ofnode_valid(ports))
1728 		return NULL;
1729 
1730 	conn = ofnode_get_parent(ports);
1731 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1732 		return NULL;
1733 
1734 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1735 	if (ret)
1736 		return NULL;
1737 
1738 	return dev;
1739 }
1740 
1741 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint)
1742 {
1743 	struct rockchip_connector *conn;
1744 	struct udevice *dev;
1745 	int ret;
1746 
1747 	dev = rockchip_of_find_connector_device(endpoint);
1748 	if (!dev) {
1749 		printf("Warn: can't find connect driver\n");
1750 		return NULL;
1751 	}
1752 
1753 	conn = get_rockchip_connector_by_device(dev);
1754 	if (!conn)
1755 		return NULL;
1756 	ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge);
1757 	if (ret)
1758 		debug("Warn: no find panel or bridge\n");
1759 
1760 	conn->phy = rockchip_of_find_phy(dev);
1761 
1762 	return conn;
1763 }
1764 
1765 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn)
1766 {
1767 	char *conn_name;
1768 	struct device_node *split_node;
1769 	struct udevice *split_dev;
1770 	struct rockchip_connector *split_conn;
1771 	bool split_mode;
1772 	int ret;
1773 
1774 	split_mode = ofnode_read_bool(conn->dev->node, "split-mode");
1775 	if (!split_mode)
1776 		return NULL;
1777 
1778 	switch (conn->type) {
1779 	case DRM_MODE_CONNECTOR_DisplayPort:
1780 		conn_name = "dp";
1781 		break;
1782 	case DRM_MODE_CONNECTOR_eDP:
1783 		conn_name = "edp";
1784 		break;
1785 	case DRM_MODE_CONNECTOR_HDMIA:
1786 		conn_name = "hdmi";
1787 		break;
1788 	default:
1789 		return NULL;
1790 	}
1791 
1792 	split_node = of_alias_get_dev(conn_name, !conn->id);
1793 	if (!split_node || !of_device_is_available(split_node))
1794 		return NULL;
1795 
1796 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev);
1797 	if (ret)
1798 		return NULL;
1799 
1800 	split_conn = get_rockchip_connector_by_device(split_dev);
1801 	if (!split_conn)
1802 		return NULL;
1803 	ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge);
1804 	if (ret)
1805 		debug("Warn: no find panel or bridge\n");
1806 
1807 	split_conn->phy = rockchip_of_find_phy(split_dev);
1808 
1809 	return split_conn;
1810 }
1811 
1812 static bool rockchip_get_display_path_status(ofnode endpoint)
1813 {
1814 	ofnode ep;
1815 	uint phandle;
1816 
1817 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1818 		return false;
1819 
1820 	ep = ofnode_get_by_phandle(phandle);
1821 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1822 		return false;
1823 
1824 	return true;
1825 }
1826 
1827 #if defined(CONFIG_ROCKCHIP_RK3568)
1828 static int rockchip_display_fixup_dts(void *blob)
1829 {
1830 	ofnode route_node, route_subnode, conn_ep, conn_port;
1831 	const struct device_node *route_sub_devnode;
1832 	const struct device_node *ep_node, *conn_ep_dev_node;
1833 	u32 phandle;
1834 	int conn_ep_offset;
1835 	const char *route_sub_path, *path;
1836 
1837 	/* Don't go further if new variant after
1838 	 * reading PMUGRF_SOC_CON15
1839 	 */
1840 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1841 		return 0;
1842 
1843 	route_node = ofnode_path("/display-subsystem/route");
1844 	if (!ofnode_valid(route_node))
1845 		return -EINVAL;
1846 
1847 	ofnode_for_each_subnode(route_subnode, route_node) {
1848 		if (!ofnode_is_available(route_subnode))
1849 			continue;
1850 
1851 		route_sub_devnode = ofnode_to_np(route_subnode);
1852 		route_sub_path = route_sub_devnode->full_name;
1853 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1854 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1855 			return 0;
1856 
1857 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1858 		if (phandle < 0) {
1859 			printf("Warn: can't find connect node's handle\n");
1860 			continue;
1861 		}
1862 
1863 		ep_node = of_find_node_by_phandle(phandle);
1864 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1865 			printf("Warn: can't find endpoint node from phandle\n");
1866 			continue;
1867 		}
1868 
1869 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1870 		conn_ep = ofnode_get_by_phandle(phandle);
1871 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1872 			return -ENODEV;
1873 
1874 		conn_port = ofnode_get_parent(conn_ep);
1875 		if (!ofnode_valid(conn_port))
1876 			return -ENODEV;
1877 
1878 		ofnode_for_each_subnode(conn_ep, conn_port) {
1879 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1880 			path = conn_ep_dev_node->full_name;
1881 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1882 			conn_ep_offset = fdt_path_offset(blob, path);
1883 
1884 			if (!ofnode_is_available(conn_ep) &&
1885 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1886 				do_fixup_by_path_u32(blob, route_sub_path,
1887 						     "connect", phandle, 1);
1888 				fdt_status_okay(blob, conn_ep_offset);
1889 
1890 			} else if (ofnode_is_available(conn_ep) &&
1891 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1892 				fdt_status_disabled(blob, conn_ep_offset);
1893 			}
1894 		}
1895 	}
1896 
1897 	return 0;
1898 }
1899 #endif
1900 
1901 static int rockchip_display_probe(struct udevice *dev)
1902 {
1903 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1904 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1905 	const void *blob = gd->fdt_blob;
1906 	int phandle;
1907 	struct udevice *crtc_dev;
1908 	struct rockchip_crtc *crtc;
1909 	struct rockchip_connector *conn, *split_conn;
1910 	struct display_state *s;
1911 	const char *name;
1912 	int ret;
1913 	ofnode node, route_node, timing_node;
1914 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1915 	struct public_phy_data *data;
1916 	bool is_ports_node = false;
1917 
1918 #if defined(CONFIG_ROCKCHIP_RK3568)
1919 	rockchip_display_fixup_dts((void *)blob);
1920 #endif
1921 	/* Before relocation we don't need to do anything */
1922 	if (!(gd->flags & GD_FLG_RELOC))
1923 		return 0;
1924 
1925 	data = malloc(sizeof(struct public_phy_data));
1926 	if (!data) {
1927 		printf("failed to alloc phy data\n");
1928 		return -ENOMEM;
1929 	}
1930 	data->phy_init = false;
1931 
1932 	init_display_buffer(plat->base);
1933 
1934 	route_node = dev_read_subnode(dev, "route");
1935 	if (!ofnode_valid(route_node))
1936 		return -ENODEV;
1937 
1938 	ofnode_for_each_subnode(node, route_node) {
1939 		if (!ofnode_is_available(node))
1940 			continue;
1941 		phandle = ofnode_read_u32_default(node, "connect", -1);
1942 		if (phandle < 0) {
1943 			printf("Warn: can't find connect node's handle\n");
1944 			continue;
1945 		}
1946 		ep_node = of_find_node_by_phandle(phandle);
1947 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1948 			printf("Warn: can't find endpoint node from phandle\n");
1949 			continue;
1950 		}
1951 		port_node = of_get_parent(ep_node);
1952 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1953 			printf("Warn: can't find port node from phandle\n");
1954 			continue;
1955 		}
1956 
1957 		port_parent_node = of_get_parent(port_node);
1958 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1959 			printf("Warn: can't find port parent node from phandle\n");
1960 			continue;
1961 		}
1962 
1963 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1964 		if (is_ports_node) {
1965 			vop_node = of_get_parent(port_parent_node);
1966 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1967 				printf("Warn: can't find crtc node from phandle\n");
1968 				continue;
1969 			}
1970 		} else {
1971 			vop_node = port_parent_node;
1972 		}
1973 
1974 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1975 						  np_to_ofnode(vop_node),
1976 						  &crtc_dev);
1977 		if (ret) {
1978 			printf("Warn: can't find crtc driver %d\n", ret);
1979 			continue;
1980 		}
1981 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1982 
1983 		conn = rockchip_of_get_connector(np_to_ofnode(ep_node));
1984 		if (!conn) {
1985 			printf("Warn: can't get connect driver\n");
1986 			continue;
1987 		}
1988 		split_conn = rockchip_get_split_connector(conn);
1989 
1990 		s = malloc(sizeof(*s));
1991 		if (!s)
1992 			continue;
1993 
1994 		memset(s, 0, sizeof(*s));
1995 
1996 		INIT_LIST_HEAD(&s->head);
1997 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1998 		if (!ret)
1999 			memcpy(s->ulogo_name, name, strlen(name));
2000 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
2001 		if (!ret)
2002 			memcpy(s->klogo_name, name, strlen(name));
2003 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
2004 		if (!strcmp(name, "fullscreen"))
2005 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
2006 		else
2007 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
2008 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
2009 		if (!strcmp(name, "fullscreen"))
2010 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
2011 		else
2012 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
2013 
2014 		s->force_output = ofnode_read_bool(node, "force-output");
2015 
2016 		if (s->force_output) {
2017 			timing_node = ofnode_find_subnode(node, "force_timing");
2018 			ret = display_get_force_timing_from_dts(timing_node, &s->force_mode);
2019 			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
2020 				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
2021 		}
2022 
2023 		s->blob = blob;
2024 		s->conn_state.connector = conn;
2025 		s->conn_state.secondary = NULL;
2026 		s->conn_state.type = conn->type;
2027 		if (split_conn) {
2028 			s->conn_state.secondary = split_conn;
2029 			s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
2030 			s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0;
2031 		}
2032 		s->conn_state.overscan.left_margin = 100;
2033 		s->conn_state.overscan.right_margin = 100;
2034 		s->conn_state.overscan.top_margin = 100;
2035 		s->conn_state.overscan.bottom_margin = 100;
2036 		s->crtc_state.node = np_to_ofnode(vop_node);
2037 		s->crtc_state.dev = crtc_dev;
2038 		s->crtc_state.crtc = crtc;
2039 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node);
2040 		s->node = node;
2041 
2042 		if (is_ports_node) { /* only vop2 will get into here */
2043 			ofnode vp_node = np_to_ofnode(port_node);
2044 			static bool get_plane_mask_from_dts;
2045 
2046 			s->crtc_state.ports_node = port_parent_node;
2047 			if (!get_plane_mask_from_dts) {
2048 				ofnode vp_sub_node;
2049 				int vp_id = 0;
2050 				bool vp_enable = false;
2051 
2052 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
2053 					int cursor_plane = -1;
2054 
2055 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
2056 
2057 					s->crtc_state.crtc->vps[vp_id].xmirror_en =
2058 						ofnode_read_bool(vp_node, "xmirror-enable");
2059 
2060 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
2061 
2062 					cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
2063 					s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
2064 					if (ret) {
2065 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
2066 						s->crtc_state.crtc->assign_plane |= true;
2067 						s->crtc_state.crtc->vps[vp_id].primary_plane_id =
2068 							ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX);
2069 						printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
2070 						       vp_id,
2071 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
2072 						       s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 :
2073 						       s->crtc_state.crtc->vps[vp_id].primary_plane_id,
2074 						       cursor_plane);
2075 					}
2076 
2077 					/* To check current vp status */
2078 					vp_enable = false;
2079 					ofnode_for_each_subnode(vp_sub_node, vp_node)
2080 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
2081 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
2082 				}
2083 				get_plane_mask_from_dts = true;
2084 			}
2085 		}
2086 
2087 		get_crtc_mcu_mode(&s->crtc_state);
2088 
2089 		ret = ofnode_read_u32_default(s->crtc_state.node,
2090 					      "rockchip,dual-channel-swap", 0);
2091 		s->crtc_state.dual_channel_swap = ret;
2092 
2093 		if (connector_phy_init(conn, data)) {
2094 			printf("Warn: Failed to init phy drivers\n");
2095 			free(s);
2096 			continue;
2097 		}
2098 		list_add_tail(&s->head, &rockchip_display_list);
2099 	}
2100 
2101 	if (list_empty(&rockchip_display_list)) {
2102 		debug("Failed to found available display route\n");
2103 		return -ENODEV;
2104 	}
2105 	rockchip_get_baseparameter();
2106 	display_pre_init();
2107 
2108 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
2109 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
2110 	uc_priv->bpix = VIDEO_BPP32;
2111 
2112 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
2113 	rockchip_show_fbbase(plat->base);
2114 	video_set_flush_dcache(dev, true);
2115 	#endif
2116 
2117 	return 0;
2118 }
2119 
2120 void rockchip_display_fixup(void *blob)
2121 {
2122 	const struct rockchip_connector_funcs *conn_funcs;
2123 	const struct rockchip_crtc_funcs *crtc_funcs;
2124 	struct rockchip_connector *conn;
2125 	const struct rockchip_crtc *crtc;
2126 	struct display_state *s;
2127 	int offset;
2128 	int ret;
2129 	const struct device_node *np;
2130 	const char *path;
2131 	const char *cacm_header;
2132 
2133 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
2134 		list_for_each_entry(s, &rockchip_display_list, head) {
2135 			ret = load_bmp_logo(&s->logo, s->klogo_name);
2136 			if (ret < 0) {
2137 				s->is_klogo_valid = false;
2138 				printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id);
2139 			} else {
2140 				s->is_klogo_valid = true;
2141 			}
2142 		}
2143 
2144 		if (!get_display_size())
2145 			return;
2146 
2147 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
2148 						    (u64)memory_start,
2149 						    (u64)get_display_size());
2150 		if (offset < 0)
2151 			printf("failed to reserve drm-loader-logo memory\n");
2152 
2153 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
2154 						    (u64)cubic_lut_memory_start,
2155 						    (u64)get_cubic_memory_size());
2156 		if (offset < 0)
2157 			printf("failed to reserve drm-cubic-lut memory\n");
2158 	} else {
2159 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
2160 		/* Compatible with rkfb display, only need reserve memory */
2161 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
2162 						    (u64)memory_start,
2163 						    MEMORY_POOL_SIZE);
2164 		if (offset < 0)
2165 			printf("failed to reserve fb-loader-logo memory\n");
2166 		else
2167 			list_for_each_entry(s, &rockchip_display_list, head)
2168 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
2169 		return;
2170 	}
2171 
2172 	list_for_each_entry(s, &rockchip_display_list, head) {
2173 		/*
2174 		 * If plane mask is not set in dts, fixup dts to assign it
2175 		 * whether crtc is initialized or not.
2176 		 */
2177 		if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane)
2178 			s->crtc_state.crtc->funcs->fixup_dts(s, blob);
2179 
2180 		if (!s->is_init || !s->is_klogo_valid)
2181 			continue;
2182 
2183 		conn = s->conn_state.connector;
2184 		if (!conn)
2185 			continue;
2186 		conn_funcs = conn->funcs;
2187 		if (!conn_funcs) {
2188 			printf("failed to get exist connector\n");
2189 			continue;
2190 		}
2191 
2192 		if (s->conn_state.secondary) {
2193 			s->conn_state.mode.clock *= 2;
2194 			s->conn_state.mode.hdisplay *= 2;
2195 		}
2196 
2197 		crtc = s->crtc_state.crtc;
2198 		if (!crtc)
2199 			continue;
2200 
2201 		crtc_funcs = crtc->funcs;
2202 		if (!crtc_funcs) {
2203 			printf("failed to get exist crtc\n");
2204 			continue;
2205 		}
2206 
2207 		np = ofnode_to_np(s->node);
2208 		path = np->full_name;
2209 		fdt_increase_size(blob, 0x400);
2210 #define FDT_SET_U32(name, val) \
2211 		do_fixup_by_path_u32(blob, path, name, val, 1);
2212 
2213 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
2214 			 - memory_start;
2215 		FDT_SET_U32("logo,offset", offset);
2216 		FDT_SET_U32("logo,width", s->logo.width);
2217 		FDT_SET_U32("logo,height", s->logo.height);
2218 		FDT_SET_U32("logo,bpp", s->logo.bpp);
2219 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
2220 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
2221 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
2222 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
2223 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
2224 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
2225 		FDT_SET_U32("video,vrefresh",
2226 			    drm_mode_vrefresh(&s->conn_state.mode));
2227 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
2228 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
2229 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
2230 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
2231 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
2232 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
2233 
2234 		if (s->conn_state.disp_info) {
2235 			cacm_header = (const char*)&s->conn_state.disp_info->cacm_header;
2236 
2237 			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
2238 			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
2239 			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
2240 			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
2241 
2242 			if (!strncasecmp(cacm_header, "CACM", 4)) {
2243 				FDT_SET_U32("post_csc,hue",
2244 					    s->conn_state.disp_info->csc_info.hue);
2245 				FDT_SET_U32("post_csc,saturation",
2246 					    s->conn_state.disp_info->csc_info.saturation);
2247 				FDT_SET_U32("post_csc,contrast",
2248 					    s->conn_state.disp_info->csc_info.contrast);
2249 				FDT_SET_U32("post_csc,brightness",
2250 					    s->conn_state.disp_info->csc_info.brightness);
2251 				FDT_SET_U32("post_csc,r_gain",
2252 					    s->conn_state.disp_info->csc_info.r_gain);
2253 				FDT_SET_U32("post_csc,g_gain",
2254 					    s->conn_state.disp_info->csc_info.g_gain);
2255 				FDT_SET_U32("post_csc,b_gain",
2256 					    s->conn_state.disp_info->csc_info.b_gain);
2257 				FDT_SET_U32("post_csc,r_offset",
2258 					    s->conn_state.disp_info->csc_info.r_offset);
2259 				FDT_SET_U32("post_csc,g_offset",
2260 					    s->conn_state.disp_info->csc_info.g_offset);
2261 				FDT_SET_U32("post_csc,b_offset",
2262 					    s->conn_state.disp_info->csc_info.b_offset);
2263 				FDT_SET_U32("post_csc,csc_enable",
2264 					    s->conn_state.disp_info->csc_info.csc_enable);
2265 			}
2266 		}
2267 
2268 		if (s->conn_state.disp_info->cubic_lut_data.size &&
2269 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
2270 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
2271 
2272 #undef FDT_SET_U32
2273 	}
2274 }
2275 
2276 int rockchip_display_bind(struct udevice *dev)
2277 {
2278 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2279 
2280 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2281 
2282 	return 0;
2283 }
2284 
2285 static const struct udevice_id rockchip_display_ids[] = {
2286 	{ .compatible = "rockchip,display-subsystem" },
2287 	{ }
2288 };
2289 
2290 U_BOOT_DRIVER(rockchip_display) = {
2291 	.name	= "rockchip_display",
2292 	.id	= UCLASS_VIDEO,
2293 	.of_match = rockchip_display_ids,
2294 	.bind	= rockchip_display_bind,
2295 	.probe	= rockchip_display_probe,
2296 };
2297 
2298 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2299 			char *const argv[])
2300 {
2301 	if (argc != 1)
2302 		return CMD_RET_USAGE;
2303 
2304 	rockchip_show_logo();
2305 
2306 	return 0;
2307 }
2308 
2309 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2310 				char *const argv[])
2311 {
2312 	if (argc != 2)
2313 		return CMD_RET_USAGE;
2314 
2315 	rockchip_show_bmp(argv[1]);
2316 
2317 	return 0;
2318 }
2319 
2320 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc,
2321 				char *const argv[])
2322 {
2323 	int ret;
2324 
2325 	if (argc < 1 || argc > 2)
2326 		return CMD_RET_USAGE;
2327 
2328 	ret = rockchip_vop_dump(argv[1]);
2329 
2330 	return ret;
2331 }
2332 
2333 U_BOOT_CMD(
2334 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2335 	"load and display log from resource partition",
2336 	NULL
2337 );
2338 
2339 U_BOOT_CMD(
2340 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2341 	"load and display bmp from resource partition",
2342 	"    <bmp_name>"
2343 );
2344 
2345 U_BOOT_CMD(
2346 	vop_dump, 2, 1, do_rockchip_vop_dump,
2347 	"dump vop regs",
2348 	" [a/all]"
2349 );
2350