xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 3bbe0d2f9129303e9f36d3ddfa3485653e188ecd)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/list.h>
17 #include <linux/compat.h>
18 #include <linux/media-bus-format.h>
19 #include <malloc.h>
20 #include <video.h>
21 #include <video_rockchip.h>
22 #include <video_bridge.h>
23 #include <dm/device.h>
24 #include <dm/uclass-internal.h>
25 #include <asm/arch-rockchip/resource_img.h>
26 
27 #include "bmp_helper.h"
28 #include "rockchip_display.h"
29 #include "rockchip_crtc.h"
30 #include "rockchip_connector.h"
31 #include "rockchip_bridge.h"
32 #include "rockchip_phy.h"
33 #include "rockchip_panel.h"
34 #include <dm.h>
35 #include <dm/of_access.h>
36 #include <dm/ofnode.h>
37 #include <asm/io.h>
38 
39 #define DRIVER_VERSION	"v1.0.1"
40 
41 /***********************************************************************
42  *  Rockchip UBOOT DRM driver version
43  *
44  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
45  *  v1.0.1	: add much dsi update(hjc)
46  *
47  **********************************************************************/
48 
49 #define RK_BLK_SIZE 512
50 #define BMP_PROCESSED_FLAG 8399
51 
52 DECLARE_GLOBAL_DATA_PTR;
53 static LIST_HEAD(rockchip_display_list);
54 static LIST_HEAD(logo_cache_list);
55 
56 static unsigned long memory_start;
57 static unsigned long cubic_lut_memory_start;
58 static unsigned long memory_end;
59 static struct base2_info base_parameter;
60 static uint32_t crc32_table[256];
61 
62 /*
63  * the phy types are used by different connectors in public.
64  * The current version only has inno hdmi phy for hdmi and tve.
65  */
66 enum public_use_phy {
67 	NONE,
68 	INNO_HDMI_PHY
69 };
70 
71 /* save public phy data */
72 struct public_phy_data {
73 	const struct rockchip_phy *phy_drv;
74 	int phy_node;
75 	int public_phy_type;
76 	bool phy_init;
77 };
78 
79 void rockchip_display_make_crc32_table(void)
80 {
81 	uint32_t c;
82 	int n, k;
83 	unsigned long poly;		/* polynomial exclusive-or pattern */
84 	/* terms of polynomial defining this crc (except x^32): */
85 	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
86 
87 	/* make exclusive-or pattern from polynomial (0xedb88320L) */
88 	poly = 0L;
89 	for (n = 0; n < sizeof(p) / sizeof(char); n++)
90 		poly |= 1L << (31 - p[n]);
91 
92 	for (n = 0; n < 256; n++) {
93 		c = (unsigned long)n;
94 		for (k = 0; k < 8; k++)
95 		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
96 		crc32_table[n] = cpu_to_le32(c);
97 	}
98 }
99 
100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
101 {
102 	int i;
103 	uint32_t crc;
104 	crc = 0xFFFFFFFF;
105 
106 	for (i = 0; i < length; i++) {
107 		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
108 		data++;
109 	}
110 
111 	return crc ^ 0xffffffff;
112 }
113 
114 int rockchip_get_baseparameter(void)
115 {
116 	struct blk_desc *dev_desc;
117 	disk_partition_t part_info;
118 	int block_num = 2048;
119 	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
120 	int ret = 0;
121 
122 	dev_desc = rockchip_get_bootdev();
123 	if (!dev_desc) {
124 		printf("%s: Could not find device\n", __func__);
125 		return -ENOENT;
126 	}
127 
128 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
129 		printf("Could not find baseparameter partition\n");
130 		return -ENOENT;
131 	}
132 
133 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
134 	if (ret < 0) {
135 		printf("read baseparameter failed\n");
136 		return ret;
137 	}
138 
139 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
140 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
141 		printf("warning: bad baseparameter\n");
142 		memset(&base_parameter, 0, sizeof(base_parameter));
143 	}
144 	rockchip_display_make_crc32_table();
145 
146 	return ret;
147 }
148 
149 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
150 {
151 	struct base2_disp_info *disp_info;
152 	struct base2_disp_header *disp_header;
153 	int i = 0, offset = -1;
154 	u32 crc_val;
155 	void *base_parameter_addr = (void *)&base_parameter;
156 
157 	for (i = 0; i < 8; i++) {
158 		disp_header = &base_parameter.disp_header[i];
159 		if (disp_header->connector_type == type &&
160 		    disp_header->connector_id == id) {
161 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
162 			offset = disp_header->offset;
163 			break;
164 		}
165 	}
166 
167 	if (offset < 0)
168 		return NULL;
169 	disp_info = base_parameter_addr + offset;
170 	if (disp_info->screen_info[0].type != type ||
171 	    disp_info->screen_info[0].id != id) {
172 		printf("connector type or id is error, type:%d, id:%d\n",
173 		       disp_info->screen_info[0].type,
174 		       disp_info->screen_info[0].id);
175 		return NULL;
176 	}
177 
178 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
179 		return NULL;
180 
181 	crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4);
182 
183 	if (crc_val != disp_info->crc) {
184 		printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id);
185 		return NULL;
186 	}
187 
188 	return disp_info;
189 }
190 
191 /* check which kind of public phy does connector use */
192 static int check_public_use_phy(struct display_state *state)
193 {
194 	int ret = NONE;
195 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
196 	struct connector_state *conn_state = &state->conn_state;
197 
198 	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
199 	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
200 		ret = INNO_HDMI_PHY;
201 #endif
202 
203 	return ret;
204 }
205 
206 /*
207  * get public phy driver and initialize it.
208  * The current version only has inno hdmi phy for hdmi and tve.
209  */
210 static int get_public_phy(struct display_state *state,
211 			  struct public_phy_data *data)
212 {
213 	struct connector_state *conn_state = &state->conn_state;
214 	struct rockchip_phy *phy;
215 	struct udevice *dev;
216 	int ret = 0;
217 
218 	switch (data->public_phy_type) {
219 	case INNO_HDMI_PHY:
220 #if defined(CONFIG_ROCKCHIP_RK3328)
221 		ret = uclass_get_device_by_name(UCLASS_PHY,
222 						"hdmiphy@ff430000", &dev);
223 #elif defined(CONFIG_ROCKCHIP_RK322X)
224 		ret = uclass_get_device_by_name(UCLASS_PHY,
225 						"hdmi-phy@12030000", &dev);
226 #else
227 		ret = -EINVAL;
228 #endif
229 		if (ret) {
230 			printf("Warn: can't find phy driver\n");
231 			return 0;
232 		}
233 
234 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
235 		if (!phy) {
236 			printf("failed to get phy driver\n");
237 			return 0;
238 		}
239 
240 		ret = rockchip_phy_init(phy);
241 		if (ret) {
242 			printf("failed to init phy driver\n");
243 			return ret;
244 		}
245 		conn_state->phy = phy;
246 
247 		debug("inno hdmi phy init success, save it\n");
248 		data->phy_drv = conn_state->phy;
249 		data->phy_init = true;
250 		return 0;
251 	default:
252 		return -EINVAL;
253 	}
254 }
255 
256 static void init_display_buffer(ulong base)
257 {
258 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
259 	memory_end = memory_start;
260 	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
261 }
262 
263 void *get_display_buffer(int size)
264 {
265 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
266 	void *buf;
267 
268 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
269 		printf("failed to alloc %dbyte memory to display\n", size);
270 		return NULL;
271 	}
272 	buf = (void *)roundup_memory;
273 
274 	memory_end = roundup_memory + size;
275 
276 	return buf;
277 }
278 
279 static unsigned long get_display_size(void)
280 {
281 	return memory_end - memory_start;
282 }
283 
284 static unsigned long get_single_cubic_lut_size(void)
285 {
286 	ulong cubic_lut_size;
287 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
288 
289 	/* This is depend on IC designed */
290 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
291 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
292 
293 	return cubic_lut_size;
294 }
295 
296 static unsigned long get_cubic_lut_offset(int crtc_id)
297 {
298 	return crtc_id * get_single_cubic_lut_size();
299 }
300 
301 unsigned long get_cubic_lut_buffer(int crtc_id)
302 {
303 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
304 }
305 
306 static unsigned long get_cubic_memory_size(void)
307 {
308 	/* Max support 4 cubic lut */
309 	return get_single_cubic_lut_size() * 4;
310 }
311 
312 bool can_direct_logo(int bpp)
313 {
314 	return bpp == 24 || bpp == 32;
315 }
316 
317 static int connector_phy_init(struct display_state *state,
318 			      struct public_phy_data *data)
319 {
320 	struct connector_state *conn_state = &state->conn_state;
321 	int type;
322 
323 	/* does this connector use public phy with others */
324 	type = check_public_use_phy(state);
325 	if (type == INNO_HDMI_PHY) {
326 		/* there is no public phy was initialized */
327 		if (!data->phy_init) {
328 			debug("start get public phy\n");
329 			data->public_phy_type = type;
330 			if (get_public_phy(state, data)) {
331 				printf("can't find correct public phy type\n");
332 				free(data);
333 				return -EINVAL;
334 			}
335 			return 0;
336 		}
337 
338 		/* if this phy has been initialized, get it directly */
339 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
340 		return 0;
341 	}
342 
343 	return 0;
344 }
345 
346 static int connector_panel_init(struct display_state *state)
347 {
348 	struct connector_state *conn_state = &state->conn_state;
349 	struct panel_state *panel_state = &state->panel_state;
350 	const struct rockchip_panel *panel = panel_state->panel;
351 	ofnode dsp_lut_node;
352 	int ret, len;
353 
354 	if (!panel)
355 		return 0;
356 
357 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
358 	if (!ofnode_valid(dsp_lut_node)) {
359 		debug("%s can not find dsp-lut node\n", __func__);
360 		return 0;
361 	}
362 
363 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
364 	if (len > 0) {
365 		conn_state->gamma.size = len / sizeof(u32);
366 		conn_state->gamma.lut = malloc(len);
367 		if (!conn_state->gamma.lut) {
368 			printf("malloc gamma lut failed\n");
369 			return -ENOMEM;
370 		}
371 		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
372 					    conn_state->gamma.lut,
373 					    conn_state->gamma.size);
374 		if (ret) {
375 			printf("Cannot decode gamma_lut\n");
376 			conn_state->gamma.lut = NULL;
377 			return -EINVAL;
378 		}
379 		panel_state->dsp_lut_node = dsp_lut_node;
380 	}
381 
382 	return 0;
383 }
384 
385 int drm_mode_vrefresh(const struct drm_display_mode *mode)
386 {
387 	int refresh = 0;
388 	unsigned int calc_val;
389 
390 	if (mode->vrefresh > 0) {
391 		refresh = mode->vrefresh;
392 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
393 		int vtotal;
394 
395 		vtotal = mode->vtotal;
396 		/* work out vrefresh the value will be x1000 */
397 		calc_val = (mode->clock * 1000);
398 		calc_val /= mode->htotal;
399 		refresh = (calc_val + vtotal / 2) / vtotal;
400 
401 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
402 			refresh *= 2;
403 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
404 			refresh /= 2;
405 		if (mode->vscan > 1)
406 			refresh /= mode->vscan;
407 	}
408 	return refresh;
409 }
410 
411 static int display_get_detail_timing(ofnode node, struct drm_display_mode *mode)
412 {
413 	int hactive, vactive, pixelclock;
414 	int hfront_porch, hback_porch, hsync_len;
415 	int vfront_porch, vback_porch, vsync_len;
416 	int val, flags = 0;
417 
418 #define FDT_GET_INT(val, name) \
419 	val = ofnode_read_s32_default(node, name, -1); \
420 	if (val < 0) { \
421 		printf("Can't get %s\n", name); \
422 		return -ENXIO; \
423 	}
424 
425 #define FDT_GET_INT_DEFAULT(val, name, default) \
426 	val = ofnode_read_s32_default(node, name, default);
427 
428 	FDT_GET_INT(hactive, "hactive");
429 	FDT_GET_INT(vactive, "vactive");
430 	FDT_GET_INT(pixelclock, "clock-frequency");
431 	FDT_GET_INT(hsync_len, "hsync-len");
432 	FDT_GET_INT(hfront_porch, "hfront-porch");
433 	FDT_GET_INT(hback_porch, "hback-porch");
434 	FDT_GET_INT(vsync_len, "vsync-len");
435 	FDT_GET_INT(vfront_porch, "vfront-porch");
436 	FDT_GET_INT(vback_porch, "vback-porch");
437 	FDT_GET_INT(val, "hsync-active");
438 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
439 	FDT_GET_INT(val, "vsync-active");
440 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
441 	FDT_GET_INT(val, "pixelclk-active");
442 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
443 
444 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
445 	if (val == DRM_MODE_FLAG_XMIRROR) {
446 		flags |= DRM_MODE_FLAG_XMIRROR;
447 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
448 		flags |= DRM_MODE_FLAG_YMIRROR;
449 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
450 		flags |= DRM_MODE_FLAG_XMIRROR;
451 		flags |= DRM_MODE_FLAG_YMIRROR;
452 	}
453 	mode->hdisplay = hactive;
454 	mode->hsync_start = mode->hdisplay + hfront_porch;
455 	mode->hsync_end = mode->hsync_start + hsync_len;
456 	mode->htotal = mode->hsync_end + hback_porch;
457 
458 	mode->vdisplay = vactive;
459 	mode->vsync_start = mode->vdisplay + vfront_porch;
460 	mode->vsync_end = mode->vsync_start + vsync_len;
461 	mode->vtotal = mode->vsync_end + vback_porch;
462 
463 	mode->clock = pixelclock / 1000;
464 	mode->flags = flags;
465 
466 	return 0;
467 }
468 
469 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode)
470 {
471 	int ret = 0;
472 
473 	ret = display_get_detail_timing(node, mode);
474 
475 	if (ret) {
476 		mode->clock = 74250;
477 		mode->flags = 0x5;
478 		mode->hdisplay = 1280;
479 		mode->hsync_start = 1390;
480 		mode->hsync_end = 1430;
481 		mode->htotal = 1650;
482 		mode->hskew = 0;
483 		mode->vdisplay = 720;
484 		mode->vsync_start = 725;
485 		mode->vsync_end = 730;
486 		mode->vtotal = 750;
487 		mode->vrefresh = 60;
488 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
489 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
490 	}
491 
492 	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
493 	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
494 	       mode->vscan);
495 
496 	return 0;
497 }
498 
499 static int display_get_timing_from_dts(struct panel_state *panel_state,
500 				       struct drm_display_mode *mode)
501 {
502 	struct rockchip_panel *panel = panel_state->panel;
503 	struct ofnode_phandle_args args;
504 	ofnode dt, timing;
505 	int ret;
506 
507 	dt = dev_read_subnode(panel->dev, "display-timings");
508 	if (ofnode_valid(dt)) {
509 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
510 						     0, 0, &args);
511 		if (ret)
512 			return ret;
513 
514 		timing = args.node;
515 	} else {
516 		timing = dev_read_subnode(panel->dev, "panel-timing");
517 	}
518 
519 	if (!ofnode_valid(timing)) {
520 		printf("failed to get display timings from DT\n");
521 		return -ENXIO;
522 	}
523 
524 	display_get_detail_timing(timing, mode);
525 
526 	return 0;
527 }
528 
529 /**
530  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
531  * @edid_data: structure store mode list
532  * @max_output: vop max output resolution
533  */
534 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
535 				    struct vop_rect *max_output)
536 {
537 	int i;
538 
539 	for (i = 0; i < edid_data->modes; i++) {
540 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
541 		    edid_data->mode_buf[i].vdisplay > max_output->height)
542 			edid_data->mode_buf[i].invalid = true;
543 	}
544 }
545 
546 /**
547  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
548  * @p: mode
549  * @adjust_flags: a combination of adjustment flags
550  *
551  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
552  *
553  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
554  *   interlaced modes.
555  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
556  *   buffers containing two eyes (only adjust the timings when needed, eg. for
557  *   "frame packing" or "side by side full").
558  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
559  *   be performed for doublescan and vscan > 1 modes respectively.
560  */
561 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
562 {
563 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
564 		return;
565 
566 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
567 		p->crtc_clock = 2 * p->clock;
568 	else
569 		p->crtc_clock = p->clock;
570 	p->crtc_hdisplay = p->hdisplay;
571 	p->crtc_hsync_start = p->hsync_start;
572 	p->crtc_hsync_end = p->hsync_end;
573 	p->crtc_htotal = p->htotal;
574 	p->crtc_hskew = p->hskew;
575 	p->crtc_vdisplay = p->vdisplay;
576 	p->crtc_vsync_start = p->vsync_start;
577 	p->crtc_vsync_end = p->vsync_end;
578 	p->crtc_vtotal = p->vtotal;
579 
580 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
581 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
582 			p->crtc_vdisplay /= 2;
583 			p->crtc_vsync_start /= 2;
584 			p->crtc_vsync_end /= 2;
585 			p->crtc_vtotal /= 2;
586 		}
587 	}
588 
589 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
590 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
591 			p->crtc_vdisplay *= 2;
592 			p->crtc_vsync_start *= 2;
593 			p->crtc_vsync_end *= 2;
594 			p->crtc_vtotal *= 2;
595 		}
596 	}
597 
598 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
599 		if (p->vscan > 1) {
600 			p->crtc_vdisplay *= p->vscan;
601 			p->crtc_vsync_start *= p->vscan;
602 			p->crtc_vsync_end *= p->vscan;
603 			p->crtc_vtotal *= p->vscan;
604 		}
605 	}
606 
607 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
608 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
609 
610 		switch (layout) {
611 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
612 			p->crtc_clock *= 2;
613 			p->crtc_vdisplay += p->crtc_vtotal;
614 			p->crtc_vsync_start += p->crtc_vtotal;
615 			p->crtc_vsync_end += p->crtc_vtotal;
616 			p->crtc_vtotal += p->crtc_vtotal;
617 			break;
618 		}
619 	}
620 
621 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
622 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
623 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
624 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
625 }
626 
627 /**
628  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
629  * output format
630  *
631  * @connector: drm connector under action.
632  * @mode: video mode to be tested.
633  *
634  * Returns:
635  * true if the mode can be supported in YCBCR420 format
636  * false if not.
637  */
638 bool drm_mode_is_420_only(const struct drm_display_info *display,
639 			  struct drm_display_mode *mode)
640 {
641 	u8 vic = drm_match_cea_mode(mode);
642 
643 	return test_bit(vic, display->hdmi.y420_vdb_modes);
644 }
645 
646 /**
647  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
648  * output format also (along with RGB/YCBCR444/422)
649  *
650  * @display: display under action.
651  * @mode: video mode to be tested.
652  *
653  * Returns:
654  * true if the mode can be support YCBCR420 format
655  * false if not.
656  */
657 bool drm_mode_is_420_also(const struct drm_display_info *display,
658 			  struct drm_display_mode *mode)
659 {
660 	u8 vic = drm_match_cea_mode(mode);
661 
662 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
663 }
664 
665 /**
666  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
667  * output format
668  *
669  * @display: display under action.
670  * @mode: video mode to be tested.
671  *
672  * Returns:
673  * true if the mode can be supported in YCBCR420 format
674  * false if not.
675  */
676 bool drm_mode_is_420(const struct drm_display_info *display,
677 		     struct drm_display_mode *mode)
678 {
679 	return drm_mode_is_420_only(display, mode) ||
680 		drm_mode_is_420_also(display, mode);
681 }
682 
683 static int display_get_timing(struct display_state *state)
684 {
685 	struct connector_state *conn_state = &state->conn_state;
686 	struct drm_display_mode *mode = &conn_state->mode;
687 	const struct drm_display_mode *m;
688 	struct panel_state *panel_state = &state->panel_state;
689 	const struct rockchip_panel *panel = panel_state->panel;
690 
691 	if (dev_of_valid(panel->dev) &&
692 	    !display_get_timing_from_dts(panel_state, mode)) {
693 		printf("Using display timing dts\n");
694 		return 0;
695 	}
696 
697 	if (panel->data) {
698 		m = (const struct drm_display_mode *)panel->data;
699 		memcpy(mode, m, sizeof(*m));
700 		printf("Using display timing from compatible panel driver\n");
701 		return 0;
702 	}
703 
704 	return -ENODEV;
705 }
706 
707 static int display_pre_init(void)
708 {
709 	struct display_state *state;
710 	int ret = 0;
711 
712 	list_for_each_entry(state, &rockchip_display_list, head) {
713 		struct connector_state *conn_state = &state->conn_state;
714 		const struct rockchip_connector *conn = conn_state->connector;
715 		const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
716 		struct crtc_state *crtc_state = &state->crtc_state;
717 		struct rockchip_crtc *crtc = crtc_state->crtc;
718 
719 		if (conn_funcs->pre_init) {
720 			ret = conn_funcs->pre_init(state);
721 			if (ret)
722 				printf("pre init conn error\n");
723 		}
724 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
725 	}
726 	return ret;
727 }
728 
729 static int display_use_force_mode(struct display_state *state)
730 {
731 	struct connector_state *conn_state = &state->conn_state;
732 	struct drm_display_mode *mode = &conn_state->mode;
733 
734 	conn_state->bpc = 8;
735 	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
736 	conn_state->bus_format = state->force_bus_format;
737 
738 	return 0;
739 }
740 
741 static int display_get_edid_mode(struct display_state *state)
742 {
743 	int ret = 0;
744 	struct connector_state *conn_state = &state->conn_state;
745 	struct drm_display_mode *mode = &conn_state->mode;
746 	int bpc;
747 
748 	ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
749 	if (!ret) {
750 		conn_state->bpc = bpc;
751 		edid_print_info((void *)&conn_state->edid);
752 	} else {
753 		conn_state->bpc = 8;
754 		mode->clock = 74250;
755 		mode->flags = 0x5;
756 		mode->hdisplay = 1280;
757 		mode->hsync_start = 1390;
758 		mode->hsync_end = 1430;
759 		mode->htotal = 1650;
760 		mode->hskew = 0;
761 		mode->vdisplay = 720;
762 		mode->vsync_start = 725;
763 		mode->vsync_end = 730;
764 		mode->vtotal = 750;
765 		mode->vrefresh = 60;
766 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
767 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
768 
769 		printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name);
770 	}
771 
772 	return ret;
773 }
774 
775 static int display_init(struct display_state *state)
776 {
777 	struct connector_state *conn_state = &state->conn_state;
778 	struct panel_state *panel_state = &state->panel_state;
779 	const struct rockchip_connector *conn = conn_state->connector;
780 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
781 	struct crtc_state *crtc_state = &state->crtc_state;
782 	struct rockchip_crtc *crtc = crtc_state->crtc;
783 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
784 	struct drm_display_mode *mode = &conn_state->mode;
785 	const char *compatible;
786 	int ret = 0;
787 	static bool __print_once = false;
788 
789 	if (!__print_once) {
790 		__print_once = true;
791 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
792 	}
793 
794 	if (state->is_init)
795 		return 0;
796 
797 	if (!conn_funcs || !crtc_funcs) {
798 		printf("failed to find connector or crtc functions\n");
799 		return -ENXIO;
800 	}
801 
802 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
803 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
804 		   sizeof(struct drm_display_mode))) {
805 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
806 			crtc_state->dev->name,
807 			crtc_state->crtc->active_mode.type,
808 			crtc_state->crtc->active_mode.hdisplay,
809 			crtc_state->crtc->active_mode.vdisplay,
810 			crtc_state->crtc->active_mode.vrefresh);
811 		return -ENODEV;
812 	}
813 
814 	if (crtc_funcs->preinit) {
815 		ret = crtc_funcs->preinit(state);
816 		if (ret)
817 			return ret;
818 	}
819 
820 	if (panel_state->panel)
821 		rockchip_panel_init(panel_state->panel);
822 
823 	if (conn_funcs->init) {
824 		ret = conn_funcs->init(state);
825 		if (ret)
826 			goto deinit;
827 	}
828 
829 	if (conn_state->phy)
830 		rockchip_phy_init(conn_state->phy);
831 
832 	/*
833 	 * support hotplug, but not connect;
834 	 */
835 #ifdef CONFIG_ROCKCHIP_DRM_TVE
836 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
837 		printf("hdmi plugin ,skip tve\n");
838 		goto deinit;
839 	}
840 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
841 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
842 		printf("hdmi plugin ,skip tve\n");
843 		goto deinit;
844 	}
845 #endif
846 	if (conn_funcs->detect) {
847 		ret = conn_funcs->detect(state);
848 #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
849 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
850 			crtc->hdmi_hpd = ret;
851 #endif
852 		if (!ret && !state->force_output) {
853 			printf("%s disconnected\n", conn_state->dev->name);
854 			goto deinit;
855 		}
856 	}
857 
858 	if (panel_state->panel) {
859 		ret = display_get_timing(state);
860 		if (!ret)
861 			conn_state->bpc = panel_state->panel->bpc;
862 #if defined(CONFIG_I2C_EDID)
863 		if (ret < 0 && conn_funcs->get_edid) {
864 			rockchip_panel_prepare(panel_state->panel);
865 			ret = conn_funcs->get_edid(state);
866 			if (!ret)
867 				display_get_edid_mode(state);
868 		}
869 #endif
870 	} else if (conn_state->bridge) {
871 		ret = video_bridge_read_edid(conn_state->bridge->dev,
872 					     conn_state->edid, EDID_SIZE);
873 		if (ret > 0) {
874 #if defined(CONFIG_I2C_EDID)
875 			display_get_edid_mode(state);
876 #endif
877 		} else {
878 			ret = video_bridge_get_timing(conn_state->bridge->dev);
879 		}
880 	} else if (conn_funcs->get_timing) {
881 		ret = conn_funcs->get_timing(state);
882 	} else if (conn_funcs->get_edid) {
883 		ret = conn_funcs->get_edid(state);
884 #if defined(CONFIG_I2C_EDID)
885 		if (!ret)
886 			display_get_edid_mode(state);
887 #endif
888 	}
889 
890 	if (ret && !state->force_output)
891 		goto deinit;
892 	if (state->force_output)
893 		display_use_force_mode(state);
894 
895 	/* rk356x series drive mipi pixdata on posedge */
896 	compatible = dev_read_string(conn_state->dev, "compatible");
897 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
898 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
899 
900 	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
901 	       "    H: %04d %04d %04d %04d\n"
902 	       "    V: %04d %04d %04d %04d\n"
903 	       "bus_format: %x\n",
904 	       conn_state->dev->name,
905 	       state->force_output ? "use force output" : "",
906 	       mode->clock, mode->flags,
907 	       mode->hdisplay, mode->hsync_start,
908 	       mode->hsync_end, mode->htotal,
909 	       mode->vdisplay, mode->vsync_start,
910 	       mode->vsync_end, mode->vtotal,
911 	       conn_state->bus_format);
912 
913 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
914 
915 	if (conn_state->bridge)
916 		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
917 
918 	if (crtc_funcs->init) {
919 		ret = crtc_funcs->init(state);
920 		if (ret)
921 			goto deinit;
922 	}
923 	state->is_init = 1;
924 
925 	crtc_state->crtc->active = true;
926 	memcpy(&crtc_state->crtc->active_mode,
927 	       &conn_state->mode, sizeof(struct drm_display_mode));
928 
929 	return 0;
930 
931 deinit:
932 	if (conn_funcs->deinit)
933 		conn_funcs->deinit(state);
934 	return ret;
935 }
936 
937 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
938 {
939 	struct crtc_state *crtc_state = &state->crtc_state;
940 	const struct rockchip_crtc *crtc = crtc_state->crtc;
941 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
942 	int ret;
943 
944 	if (!state->is_init)
945 		return -EINVAL;
946 
947 	if (crtc_funcs->send_mcu_cmd) {
948 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
949 		if (ret)
950 			return ret;
951 	}
952 
953 	return 0;
954 }
955 
956 static int display_set_plane(struct display_state *state)
957 {
958 	struct crtc_state *crtc_state = &state->crtc_state;
959 	const struct rockchip_crtc *crtc = crtc_state->crtc;
960 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
961 	int ret;
962 
963 	if (!state->is_init)
964 		return -EINVAL;
965 
966 	if (crtc_funcs->set_plane) {
967 		ret = crtc_funcs->set_plane(state);
968 		if (ret)
969 			return ret;
970 	}
971 
972 	return 0;
973 }
974 
975 static int display_enable(struct display_state *state)
976 {
977 	struct connector_state *conn_state = &state->conn_state;
978 	const struct rockchip_connector *conn = conn_state->connector;
979 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
980 	struct crtc_state *crtc_state = &state->crtc_state;
981 	const struct rockchip_crtc *crtc = crtc_state->crtc;
982 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
983 	struct panel_state *panel_state = &state->panel_state;
984 
985 	if (!state->is_init)
986 		return -EINVAL;
987 
988 	if (state->is_enable)
989 		return 0;
990 
991 	if (crtc_funcs->prepare)
992 		crtc_funcs->prepare(state);
993 
994 	if (conn_funcs->prepare)
995 		conn_funcs->prepare(state);
996 
997 	if (conn_state->bridge)
998 		rockchip_bridge_pre_enable(conn_state->bridge);
999 
1000 	if (panel_state->panel)
1001 		rockchip_panel_prepare(panel_state->panel);
1002 
1003 	if (crtc_funcs->enable)
1004 		crtc_funcs->enable(state);
1005 
1006 	if (conn_funcs->enable)
1007 		conn_funcs->enable(state);
1008 
1009 	if (conn_state->bridge)
1010 		rockchip_bridge_enable(conn_state->bridge);
1011 
1012 	if (panel_state->panel)
1013 		rockchip_panel_enable(panel_state->panel);
1014 
1015 	state->is_enable = true;
1016 
1017 	return 0;
1018 }
1019 
1020 static int display_disable(struct display_state *state)
1021 {
1022 	struct connector_state *conn_state = &state->conn_state;
1023 	const struct rockchip_connector *conn = conn_state->connector;
1024 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
1025 	struct crtc_state *crtc_state = &state->crtc_state;
1026 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1027 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1028 	struct panel_state *panel_state = &state->panel_state;
1029 
1030 	if (!state->is_init)
1031 		return 0;
1032 
1033 	if (!state->is_enable)
1034 		return 0;
1035 
1036 	if (panel_state->panel)
1037 		rockchip_panel_disable(panel_state->panel);
1038 
1039 	if (conn_state->bridge)
1040 		rockchip_bridge_disable(conn_state->bridge);
1041 
1042 	if (conn_funcs->disable)
1043 		conn_funcs->disable(state);
1044 
1045 	if (crtc_funcs->disable)
1046 		crtc_funcs->disable(state);
1047 
1048 	if (panel_state->panel)
1049 		rockchip_panel_unprepare(panel_state->panel);
1050 
1051 	if (conn_state->bridge)
1052 		rockchip_bridge_post_disable(conn_state->bridge);
1053 
1054 	if (conn_funcs->unprepare)
1055 		conn_funcs->unprepare(state);
1056 
1057 	state->is_enable = 0;
1058 	state->is_init = 0;
1059 
1060 	return 0;
1061 }
1062 
1063 static int display_logo(struct display_state *state)
1064 {
1065 	struct crtc_state *crtc_state = &state->crtc_state;
1066 	struct connector_state *conn_state = &state->conn_state;
1067 	struct logo_info *logo = &state->logo;
1068 	int hdisplay, vdisplay, ret;
1069 
1070 	ret = display_init(state);
1071 	if (!state->is_init || ret)
1072 		return -ENODEV;
1073 
1074 	switch (logo->bpp) {
1075 	case 16:
1076 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1077 		break;
1078 	case 24:
1079 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1080 		break;
1081 	case 32:
1082 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1083 		break;
1084 	default:
1085 		printf("can't support bmp bits[%d]\n", logo->bpp);
1086 		return -EINVAL;
1087 	}
1088 	hdisplay = conn_state->mode.hdisplay;
1089 	vdisplay = conn_state->mode.vdisplay;
1090 	crtc_state->src_w = logo->width;
1091 	crtc_state->src_h = logo->height;
1092 	crtc_state->src_x = 0;
1093 	crtc_state->src_y = 0;
1094 	crtc_state->ymirror = logo->ymirror;
1095 	crtc_state->rb_swap = 0;
1096 
1097 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1098 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
1099 
1100 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1101 		crtc_state->crtc_x = 0;
1102 		crtc_state->crtc_y = 0;
1103 		crtc_state->crtc_w = hdisplay;
1104 		crtc_state->crtc_h = vdisplay;
1105 	} else {
1106 		if (crtc_state->src_w >= hdisplay) {
1107 			crtc_state->crtc_x = 0;
1108 			crtc_state->crtc_w = hdisplay;
1109 		} else {
1110 			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
1111 			crtc_state->crtc_w = crtc_state->src_w;
1112 		}
1113 
1114 		if (crtc_state->src_h >= vdisplay) {
1115 			crtc_state->crtc_y = 0;
1116 			crtc_state->crtc_h = vdisplay;
1117 		} else {
1118 			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
1119 			crtc_state->crtc_h = crtc_state->src_h;
1120 		}
1121 	}
1122 
1123 	display_set_plane(state);
1124 	display_enable(state);
1125 
1126 	return 0;
1127 }
1128 
1129 static int get_crtc_id(struct device_node *connect)
1130 {
1131 	struct device_node *port_node;
1132 	int val;
1133 
1134 	port_node = of_get_parent(connect);
1135 	if (!port_node)
1136 		goto err;
1137 	val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
1138 	if (val < 0)
1139 		goto err;
1140 
1141 	return val;
1142 err:
1143 	printf("Can't get crtc id, default set to id = 0\n");
1144 	return 0;
1145 }
1146 
1147 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
1148 {
1149 	ofnode mcu_node;
1150 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1151 
1152 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1153 	if (!ofnode_valid(mcu_node))
1154 		return -ENODEV;
1155 
1156 #define FDT_GET_MCU_INT(val, name) \
1157 	do { \
1158 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1159 		if (val < 0) { \
1160 			printf("Can't get %s\n", name); \
1161 			return -ENXIO; \
1162 		} \
1163 	} while (0)
1164 
1165 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1166 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1167 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1168 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1169 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1170 
1171 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1172 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1173 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1174 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1175 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1176 
1177 	return 0;
1178 }
1179 
1180 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1181 {
1182 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1183 
1184 	list_for_each_entry(tmp, &logo_cache_list, head) {
1185 		if (!strcmp(tmp->name, bmp)) {
1186 			logo_cache = tmp;
1187 			break;
1188 		}
1189 	}
1190 
1191 	if (!logo_cache) {
1192 		logo_cache = malloc(sizeof(*logo_cache));
1193 		if (!logo_cache) {
1194 			printf("failed to alloc memory for logo cache\n");
1195 			return NULL;
1196 		}
1197 		memset(logo_cache, 0, sizeof(*logo_cache));
1198 		strcpy(logo_cache->name, bmp);
1199 		INIT_LIST_HEAD(&logo_cache->head);
1200 		list_add_tail(&logo_cache->head, &logo_cache_list);
1201 	}
1202 
1203 	return logo_cache;
1204 }
1205 
1206 /* Note: used only for rkfb kernel driver */
1207 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1208 {
1209 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1210 	void *dst = NULL;
1211 	int len, size;
1212 	struct bmp_header *header;
1213 
1214 	if (!logo || !bmp_name)
1215 		return -EINVAL;
1216 
1217 	header = malloc(RK_BLK_SIZE);
1218 	if (!header)
1219 		return -ENOMEM;
1220 
1221 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1222 	if (len != RK_BLK_SIZE) {
1223 		free(header);
1224 		return -EINVAL;
1225 	}
1226 	size = get_unaligned_le32(&header->file_size);
1227 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1228 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1229 	if (len != size) {
1230 		printf("failed to load bmp %s\n", bmp_name);
1231 		free(header);
1232 		return -ENOENT;
1233 	}
1234 
1235 	logo->mem = dst;
1236 #endif
1237 
1238 	return 0;
1239 }
1240 
1241 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1242 {
1243 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1244 	struct rockchip_logo_cache *logo_cache;
1245 	struct bmp_header *header;
1246 	void *dst = NULL, *pdst;
1247 	int size, len;
1248 	int ret = 0;
1249 	int reserved = 0;
1250 	int dst_size;
1251 
1252 	if (!logo || !bmp_name)
1253 		return -EINVAL;
1254 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1255 	if (!logo_cache)
1256 		return -ENOMEM;
1257 
1258 	if (logo_cache->logo.mem) {
1259 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1260 		return 0;
1261 	}
1262 
1263 	header = malloc(RK_BLK_SIZE);
1264 	if (!header)
1265 		return -ENOMEM;
1266 
1267 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1268 	if (len != RK_BLK_SIZE) {
1269 		ret = -EINVAL;
1270 		goto free_header;
1271 	}
1272 
1273 	logo->bpp = get_unaligned_le16(&header->bit_count);
1274 	logo->width = get_unaligned_le32(&header->width);
1275 	logo->height = get_unaligned_le32(&header->height);
1276 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1277 	reserved = get_unaligned_le32(&header->reserved);
1278 	if (logo->height < 0)
1279 	    logo->height = -logo->height;
1280 	size = get_unaligned_le32(&header->file_size);
1281 	if (!can_direct_logo(logo->bpp)) {
1282 		if (size > MEMORY_POOL_SIZE) {
1283 			printf("failed to use boot buf as temp bmp buffer\n");
1284 			ret = -ENOMEM;
1285 			goto free_header;
1286 		}
1287 		pdst = get_display_buffer(size);
1288 
1289 	} else {
1290 		pdst = get_display_buffer(size);
1291 		dst = pdst;
1292 	}
1293 
1294 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1295 	if (len != size) {
1296 		printf("failed to load bmp %s\n", bmp_name);
1297 		ret = -ENOENT;
1298 		goto free_header;
1299 	}
1300 
1301 	if (!can_direct_logo(logo->bpp)) {
1302 		/*
1303 		 * TODO: force use 16bpp if bpp less than 16;
1304 		 */
1305 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1306 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1307 		dst = get_display_buffer(dst_size);
1308 		if (!dst) {
1309 			ret = -ENOMEM;
1310 			goto free_header;
1311 		}
1312 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1313 			printf("failed to decode bmp %s\n", bmp_name);
1314 			ret = -EINVAL;
1315 			goto free_header;
1316 		}
1317 
1318 		logo->offset = 0;
1319 		logo->ymirror = 0;
1320 	} else {
1321 		logo->offset = get_unaligned_le32(&header->data_offset);
1322 		if (reserved == BMP_PROCESSED_FLAG)
1323 			logo->ymirror = 0;
1324 		else
1325 			logo->ymirror = 1;
1326 	}
1327 	logo->mem = dst;
1328 
1329 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1330 
1331 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1332 
1333 free_header:
1334 
1335 	free(header);
1336 
1337 	return ret;
1338 #else
1339 	return -EINVAL;
1340 #endif
1341 }
1342 
1343 void rockchip_show_fbbase(ulong fbbase)
1344 {
1345 	struct display_state *s;
1346 
1347 	list_for_each_entry(s, &rockchip_display_list, head) {
1348 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1349 		s->logo.mem = (char *)fbbase;
1350 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1351 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1352 		s->logo.bpp = 32;
1353 		s->logo.ymirror = 0;
1354 
1355 		display_logo(s);
1356 	}
1357 }
1358 
1359 int rockchip_show_bmp(const char *bmp)
1360 {
1361 	struct display_state *s;
1362 	int ret = 0;
1363 
1364 	if (!bmp) {
1365 		list_for_each_entry(s, &rockchip_display_list, head)
1366 			display_disable(s);
1367 		return -ENOENT;
1368 	}
1369 
1370 	list_for_each_entry(s, &rockchip_display_list, head) {
1371 		s->logo.mode = s->charge_logo_mode;
1372 		if (load_bmp_logo(&s->logo, bmp))
1373 			continue;
1374 		ret = display_logo(s);
1375 	}
1376 
1377 	return ret;
1378 }
1379 
1380 int rockchip_show_logo(void)
1381 {
1382 	struct display_state *s;
1383 	int ret = 0;
1384 
1385 	list_for_each_entry(s, &rockchip_display_list, head) {
1386 		s->logo.mode = s->logo_mode;
1387 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1388 			printf("failed to display uboot logo\n");
1389 		else
1390 			ret = display_logo(s);
1391 
1392 		/* Load kernel bmp in rockchip_display_fixup() later */
1393 	}
1394 
1395 	return ret;
1396 }
1397 
1398 enum {
1399 	PORT_DIR_IN,
1400 	PORT_DIR_OUT,
1401 };
1402 
1403 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
1404 {
1405 	ofnode panel_node, ports, port, ep, port_parent_node;
1406 	struct udevice *panel_dev;
1407 	int ret;
1408 
1409 	panel_node = dev_read_subnode(dev, "panel");
1410 	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
1411 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
1412 						  &panel_dev);
1413 		if (!ret)
1414 			goto found;
1415 	}
1416 
1417 	ports = dev_read_subnode(dev, "ports");
1418 	if (!ofnode_valid(ports))
1419 		return NULL;
1420 
1421 	ofnode_for_each_subnode(port, ports) {
1422 		u32 reg;
1423 
1424 		if (ofnode_read_u32(port, "reg", &reg))
1425 			continue;
1426 
1427 		if (reg != PORT_DIR_OUT)
1428 			continue;
1429 
1430 		ofnode_for_each_subnode(ep, port) {
1431 			ofnode _ep, _port;
1432 			uint phandle;
1433 			bool is_ports_node = false;
1434 
1435 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1436 				continue;
1437 
1438 			_ep = ofnode_get_by_phandle(phandle);
1439 			if (!ofnode_valid(_ep))
1440 				continue;
1441 
1442 			_port = ofnode_get_parent(_ep);
1443 			if (!ofnode_valid(_port))
1444 				continue;
1445 
1446 			port_parent_node = ofnode_get_parent(_port);
1447 			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
1448 			if (is_ports_node)
1449 				panel_node = ofnode_get_parent(port_parent_node);
1450 			else
1451 				panel_node = ofnode_get_parent(_port);
1452 			if (!ofnode_valid(panel_node))
1453 				continue;
1454 
1455 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
1456 							  panel_node,
1457 							  &panel_dev);
1458 			if (!ret)
1459 				goto found;
1460 		}
1461 	}
1462 
1463 	return NULL;
1464 
1465 found:
1466 	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1467 }
1468 
1469 static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
1470 {
1471 	ofnode node, ports, port, ep;
1472 	struct udevice *dev;
1473 	int ret;
1474 
1475 	ports = dev_read_subnode(conn_dev, "ports");
1476 	if (!ofnode_valid(ports))
1477 		return NULL;
1478 
1479 	ofnode_for_each_subnode(port, ports) {
1480 		u32 reg;
1481 
1482 		if (ofnode_read_u32(port, "reg", &reg))
1483 			continue;
1484 
1485 		if (reg != PORT_DIR_OUT)
1486 			continue;
1487 
1488 		ofnode_for_each_subnode(ep, port) {
1489 			ofnode _ep, _port, _ports;
1490 			uint phandle;
1491 
1492 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
1493 				continue;
1494 
1495 			_ep = ofnode_get_by_phandle(phandle);
1496 			if (!ofnode_valid(_ep))
1497 				continue;
1498 
1499 			_port = ofnode_get_parent(_ep);
1500 			if (!ofnode_valid(_port))
1501 				continue;
1502 
1503 			_ports = ofnode_get_parent(_port);
1504 			if (!ofnode_valid(_ports))
1505 				continue;
1506 
1507 			node = ofnode_get_parent(_ports);
1508 			if (!ofnode_valid(node))
1509 				continue;
1510 
1511 			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
1512 							  node, &dev);
1513 			if (!ret)
1514 				goto found;
1515 		}
1516 	}
1517 
1518 	return NULL;
1519 
1520 found:
1521 	return (struct rockchip_bridge *)dev_get_driver_data(dev);
1522 }
1523 
1524 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
1525 {
1526 	ofnode ep, port, ports, conn;
1527 	uint phandle;
1528 	struct udevice *dev;
1529 	int ret;
1530 
1531 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1532 		return NULL;
1533 
1534 	ep = ofnode_get_by_phandle(phandle);
1535 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1536 		return NULL;
1537 
1538 	port = ofnode_get_parent(ep);
1539 	if (!ofnode_valid(port))
1540 		return NULL;
1541 
1542 	ports = ofnode_get_parent(port);
1543 	if (!ofnode_valid(ports))
1544 		return NULL;
1545 
1546 	conn = ofnode_get_parent(ports);
1547 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1548 		return NULL;
1549 
1550 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1551 	if (ret)
1552 		return NULL;
1553 
1554 	return dev;
1555 }
1556 
1557 static bool rockchip_get_display_path_status(ofnode endpoint)
1558 {
1559 	ofnode ep;
1560 	uint phandle;
1561 
1562 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1563 		return false;
1564 
1565 	ep = ofnode_get_by_phandle(phandle);
1566 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1567 		return false;
1568 
1569 	return true;
1570 }
1571 
1572 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1573 {
1574 	struct udevice *phy_dev;
1575 	int ret;
1576 
1577 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1578 	if (ret)
1579 		return NULL;
1580 
1581 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1582 }
1583 
1584 #if defined(CONFIG_ROCKCHIP_RK3568)
1585 static int rockchip_display_fixup_dts(void *blob)
1586 {
1587 	ofnode route_node, route_subnode, conn_ep, conn_port;
1588 	const struct device_node *route_sub_devnode;
1589 	const struct device_node *ep_node, *conn_ep_dev_node;
1590 	u32 phandle;
1591 	int conn_ep_offset;
1592 	const char *route_sub_path, *path;
1593 
1594 	/* Don't go further if new variant after
1595 	 * reading PMUGRF_SOC_CON15
1596 	 */
1597 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1598 		return 0;
1599 
1600 	route_node = ofnode_path("/display-subsystem/route");
1601 	if (!ofnode_valid(route_node))
1602 		return -EINVAL;
1603 
1604 	ofnode_for_each_subnode(route_subnode, route_node) {
1605 		if (!ofnode_is_available(route_subnode))
1606 			continue;
1607 
1608 		route_sub_devnode = ofnode_to_np(route_subnode);
1609 		route_sub_path = route_sub_devnode->full_name;
1610 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1611 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1612 			return 0;
1613 
1614 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1615 		if (phandle < 0) {
1616 			printf("Warn: can't find connect node's handle\n");
1617 			continue;
1618 		}
1619 
1620 		ep_node = of_find_node_by_phandle(phandle);
1621 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1622 			printf("Warn: can't find endpoint node from phandle\n");
1623 			continue;
1624 		}
1625 
1626 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1627 		conn_ep = ofnode_get_by_phandle(phandle);
1628 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1629 			return -ENODEV;
1630 
1631 		conn_port = ofnode_get_parent(conn_ep);
1632 		if (!ofnode_valid(conn_port))
1633 			return -ENODEV;
1634 
1635 		ofnode_for_each_subnode(conn_ep, conn_port) {
1636 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1637 			path = conn_ep_dev_node->full_name;
1638 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1639 			conn_ep_offset = fdt_path_offset(blob, path);
1640 
1641 			if (!ofnode_is_available(conn_ep) &&
1642 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1643 				do_fixup_by_path_u32(blob, route_sub_path,
1644 						     "connect", phandle, 1);
1645 				fdt_status_okay(blob, conn_ep_offset);
1646 
1647 			} else if (ofnode_is_available(conn_ep) &&
1648 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1649 				fdt_status_disabled(blob, conn_ep_offset);
1650 			}
1651 		}
1652 	}
1653 
1654 	return 0;
1655 }
1656 #endif
1657 
1658 static int rockchip_display_probe(struct udevice *dev)
1659 {
1660 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1661 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1662 	const void *blob = gd->fdt_blob;
1663 	int phandle;
1664 	struct udevice *crtc_dev, *conn_dev;
1665 	struct rockchip_crtc *crtc;
1666 	const struct rockchip_connector *conn;
1667 	struct rockchip_panel *panel = NULL;
1668 	struct rockchip_bridge *bridge = NULL;
1669 	struct rockchip_phy *phy = NULL;
1670 	struct display_state *s;
1671 	const char *name;
1672 	int ret;
1673 	ofnode node, route_node, timing_node;
1674 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1675 	struct public_phy_data *data;
1676 	bool is_ports_node = false;
1677 
1678 #if defined(CONFIG_ROCKCHIP_RK3568)
1679 	rockchip_display_fixup_dts((void *)blob);
1680 #endif
1681 
1682 	/* Before relocation we don't need to do anything */
1683 	if (!(gd->flags & GD_FLG_RELOC))
1684 		return 0;
1685 
1686 	data = malloc(sizeof(struct public_phy_data));
1687 	if (!data) {
1688 		printf("failed to alloc phy data\n");
1689 		return -ENOMEM;
1690 	}
1691 	data->phy_init = false;
1692 
1693 	init_display_buffer(plat->base);
1694 
1695 	route_node = dev_read_subnode(dev, "route");
1696 	if (!ofnode_valid(route_node))
1697 		return -ENODEV;
1698 
1699 	ofnode_for_each_subnode(node, route_node) {
1700 		if (!ofnode_is_available(node))
1701 			continue;
1702 		phandle = ofnode_read_u32_default(node, "connect", -1);
1703 		if (phandle < 0) {
1704 			printf("Warn: can't find connect node's handle\n");
1705 			continue;
1706 		}
1707 		ep_node = of_find_node_by_phandle(phandle);
1708 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1709 			printf("Warn: can't find endpoint node from phandle\n");
1710 			continue;
1711 		}
1712 		port_node = of_get_parent(ep_node);
1713 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1714 			printf("Warn: can't find port node from phandle\n");
1715 			continue;
1716 		}
1717 
1718 		port_parent_node = of_get_parent(port_node);
1719 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1720 			printf("Warn: can't find port parent node from phandle\n");
1721 			continue;
1722 		}
1723 
1724 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1725 		if (is_ports_node) {
1726 			vop_node = of_get_parent(port_parent_node);
1727 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1728 				printf("Warn: can't find crtc node from phandle\n");
1729 				continue;
1730 			}
1731 		} else {
1732 			vop_node = port_parent_node;
1733 		}
1734 
1735 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1736 						  np_to_ofnode(vop_node),
1737 						  &crtc_dev);
1738 		if (ret) {
1739 			printf("Warn: can't find crtc driver %d\n", ret);
1740 			continue;
1741 		}
1742 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1743 
1744 		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
1745 		if (!conn_dev) {
1746 			printf("Warn: can't find connect driver\n");
1747 			continue;
1748 		}
1749 
1750 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
1751 
1752 		phy = rockchip_of_find_phy(conn_dev);
1753 
1754 		bridge = rockchip_of_find_bridge(conn_dev);
1755 		if (bridge)
1756 			panel = rockchip_of_find_panel(bridge->dev);
1757 		else
1758 			panel = rockchip_of_find_panel(conn_dev);
1759 
1760 		s = malloc(sizeof(*s));
1761 		if (!s)
1762 			continue;
1763 
1764 		memset(s, 0, sizeof(*s));
1765 
1766 		INIT_LIST_HEAD(&s->head);
1767 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1768 		if (!ret)
1769 			memcpy(s->ulogo_name, name, strlen(name));
1770 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1771 		if (!ret)
1772 			memcpy(s->klogo_name, name, strlen(name));
1773 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1774 		if (!strcmp(name, "fullscreen"))
1775 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1776 		else
1777 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1778 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1779 		if (!strcmp(name, "fullscreen"))
1780 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1781 		else
1782 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1783 
1784 		s->force_output = ofnode_read_bool(node, "force-output");
1785 
1786 		if (s->force_output) {
1787 			timing_node = ofnode_find_subnode(node, "force_timing");
1788 			ret = display_get_force_timing_from_dts(timing_node, &s->force_mode);
1789 			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
1790 				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
1791 		}
1792 
1793 		s->blob = blob;
1794 		s->panel_state.panel = panel;
1795 		s->conn_state.node = conn_dev->node;
1796 		s->conn_state.dev = conn_dev;
1797 		s->conn_state.connector = conn;
1798 		s->conn_state.phy = phy;
1799 		s->conn_state.bridge = bridge;
1800 		s->conn_state.overscan.left_margin = 100;
1801 		s->conn_state.overscan.right_margin = 100;
1802 		s->conn_state.overscan.top_margin = 100;
1803 		s->conn_state.overscan.bottom_margin = 100;
1804 		s->crtc_state.node = np_to_ofnode(vop_node);
1805 		s->crtc_state.dev = crtc_dev;
1806 		s->crtc_state.crtc = crtc;
1807 		s->crtc_state.crtc_id = get_crtc_id(ep_node);
1808 		s->node = node;
1809 
1810 		if (is_ports_node) { /* only vop2 will get into here */
1811 			ofnode vp_node = np_to_ofnode(port_node);
1812 			static bool get_plane_mask_from_dts;
1813 
1814 			s->crtc_state.ports_node = port_parent_node;
1815 			if (!get_plane_mask_from_dts) {
1816 				ofnode vp_sub_node;
1817 				int vp_id = 0;
1818 				bool vp_enable = false;
1819 
1820 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
1821 					int cursor_plane = -1;
1822 
1823 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
1824 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
1825 
1826 					cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
1827 					s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
1828 					if (ret) {
1829 						int primary_plane = 0;
1830 
1831 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
1832 						s->crtc_state.crtc->assign_plane |= true;
1833 						primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0);
1834 						printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
1835 						       vp_id,
1836 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
1837 						       primary_plane,
1838 						       cursor_plane);
1839 					}
1840 
1841 					/* To check current vp status */
1842 					vp_enable = false;
1843 					ofnode_for_each_subnode(vp_sub_node, vp_node)
1844 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
1845 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
1846 				}
1847 				get_plane_mask_from_dts = true;
1848 			}
1849 		}
1850 
1851 		if (bridge)
1852 			bridge->state = s;
1853 
1854 		if (panel)
1855 			panel->state = s;
1856 
1857 		get_crtc_mcu_mode(&s->crtc_state);
1858 
1859 		ret = ofnode_read_u32_default(s->crtc_state.node,
1860 					      "rockchip,dual-channel-swap", 0);
1861 		s->crtc_state.dual_channel_swap = ret;
1862 		if (connector_panel_init(s)) {
1863 			printf("Warn: Failed to init panel drivers\n");
1864 			free(s);
1865 			continue;
1866 		}
1867 
1868 		if (connector_phy_init(s, data)) {
1869 			printf("Warn: Failed to init phy drivers\n");
1870 			free(s);
1871 			continue;
1872 		}
1873 		list_add_tail(&s->head, &rockchip_display_list);
1874 	}
1875 
1876 	if (list_empty(&rockchip_display_list)) {
1877 		debug("Failed to found available display route\n");
1878 		return -ENODEV;
1879 	}
1880 	rockchip_get_baseparameter();
1881 	display_pre_init();
1882 
1883 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1884 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1885 	uc_priv->bpix = VIDEO_BPP32;
1886 
1887 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1888 	rockchip_show_fbbase(plat->base);
1889 	video_set_flush_dcache(dev, true);
1890 	#endif
1891 
1892 	return 0;
1893 }
1894 
1895 void rockchip_display_fixup(void *blob)
1896 {
1897 	const struct rockchip_connector_funcs *conn_funcs;
1898 	const struct rockchip_crtc_funcs *crtc_funcs;
1899 	const struct rockchip_connector *conn;
1900 	const struct rockchip_crtc *crtc;
1901 	struct display_state *s;
1902 	int offset;
1903 	const struct device_node *np;
1904 	const char *path;
1905 
1906 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1907 		list_for_each_entry(s, &rockchip_display_list, head)
1908 			load_bmp_logo(&s->logo, s->klogo_name);
1909 
1910 		if (!get_display_size())
1911 			return;
1912 
1913 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1914 						    (u64)memory_start,
1915 						    (u64)get_display_size());
1916 		if (offset < 0)
1917 			printf("failed to reserve drm-loader-logo memory\n");
1918 
1919 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
1920 						    (u64)cubic_lut_memory_start,
1921 						    (u64)get_cubic_memory_size());
1922 		if (offset < 0)
1923 			printf("failed to reserve drm-cubic-lut memory\n");
1924 	} else {
1925 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1926 		/* Compatible with rkfb display, only need reserve memory */
1927 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1928 						    (u64)memory_start,
1929 						    MEMORY_POOL_SIZE);
1930 		if (offset < 0)
1931 			printf("failed to reserve fb-loader-logo memory\n");
1932 		else
1933 			list_for_each_entry(s, &rockchip_display_list, head)
1934 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
1935 		return;
1936 	}
1937 
1938 	list_for_each_entry(s, &rockchip_display_list, head) {
1939 		conn = s->conn_state.connector;
1940 		if (!conn)
1941 			continue;
1942 		conn_funcs = conn->funcs;
1943 		if (!conn_funcs) {
1944 			printf("failed to get exist connector\n");
1945 			continue;
1946 		}
1947 
1948 		crtc = s->crtc_state.crtc;
1949 		if (!crtc)
1950 			continue;
1951 
1952 		crtc_funcs = crtc->funcs;
1953 		if (!crtc_funcs) {
1954 			printf("failed to get exist crtc\n");
1955 			continue;
1956 		}
1957 
1958 		if (crtc_funcs->fixup_dts)
1959 			crtc_funcs->fixup_dts(s, blob);
1960 
1961 		if (conn_funcs->fixup_dts)
1962 			conn_funcs->fixup_dts(s, blob);
1963 
1964 		np = ofnode_to_np(s->node);
1965 		path = np->full_name;
1966 		fdt_increase_size(blob, 0x400);
1967 #define FDT_SET_U32(name, val) \
1968 		do_fixup_by_path_u32(blob, path, name, val, 1);
1969 
1970 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
1971 			 - memory_start;
1972 		FDT_SET_U32("logo,offset", offset);
1973 		FDT_SET_U32("logo,width", s->logo.width);
1974 		FDT_SET_U32("logo,height", s->logo.height);
1975 		FDT_SET_U32("logo,bpp", s->logo.bpp);
1976 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
1977 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
1978 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
1979 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
1980 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
1981 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
1982 		FDT_SET_U32("video,vrefresh",
1983 			    drm_mode_vrefresh(&s->conn_state.mode));
1984 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
1985 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
1986 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
1987 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
1988 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
1989 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
1990 
1991 		if (s->conn_state.disp_info) {
1992 			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
1993 			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
1994 			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
1995 			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
1996 		}
1997 
1998 		if (s->conn_state.disp_info->cubic_lut_data.size &&
1999 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
2000 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
2001 
2002 #undef FDT_SET_U32
2003 	}
2004 }
2005 
2006 int rockchip_display_bind(struct udevice *dev)
2007 {
2008 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2009 
2010 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2011 
2012 	return 0;
2013 }
2014 
2015 static const struct udevice_id rockchip_display_ids[] = {
2016 	{ .compatible = "rockchip,display-subsystem" },
2017 	{ }
2018 };
2019 
2020 U_BOOT_DRIVER(rockchip_display) = {
2021 	.name	= "rockchip_display",
2022 	.id	= UCLASS_VIDEO,
2023 	.of_match = rockchip_display_ids,
2024 	.bind	= rockchip_display_bind,
2025 	.probe	= rockchip_display_probe,
2026 };
2027 
2028 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2029 			char *const argv[])
2030 {
2031 	if (argc != 1)
2032 		return CMD_RET_USAGE;
2033 
2034 	rockchip_show_logo();
2035 
2036 	return 0;
2037 }
2038 
2039 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2040 				char *const argv[])
2041 {
2042 	if (argc != 2)
2043 		return CMD_RET_USAGE;
2044 
2045 	rockchip_show_bmp(argv[1]);
2046 
2047 	return 0;
2048 }
2049 
2050 U_BOOT_CMD(
2051 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2052 	"load and display log from resource partition",
2053 	NULL
2054 );
2055 
2056 U_BOOT_CMD(
2057 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2058 	"load and display bmp from resource partition",
2059 	"    <bmp_name>"
2060 );
2061