1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <memalign.h> 21 #include <video.h> 22 #include <video_rockchip.h> 23 #include <video_bridge.h> 24 #include <dm/device.h> 25 #include <dm/uclass-internal.h> 26 #include <asm/arch-rockchip/resource_img.h> 27 #include <asm/arch-rockchip/cpu.h> 28 29 #include "bmp_helper.h" 30 #include "libnsbmp.h" 31 #include "rockchip_display.h" 32 #include "rockchip_crtc.h" 33 #include "rockchip_connector.h" 34 #include "rockchip_bridge.h" 35 #include "rockchip_phy.h" 36 #include "rockchip_panel.h" 37 #include <dm.h> 38 #include <dm/of_access.h> 39 #include <dm/ofnode.h> 40 #include <asm/io.h> 41 42 #define DRIVER_VERSION "v1.0.1" 43 44 /*********************************************************************** 45 * Rockchip UBOOT DRM driver version 46 * 47 * v1.0.0 : add basic version for rockchip drm driver(hjc) 48 * v1.0.1 : add much dsi update(hjc) 49 * 50 **********************************************************************/ 51 52 #define RK_BLK_SIZE 512 53 #define BMP_PROCESSED_FLAG 8399 54 #define BYTES_PER_PIXEL sizeof(uint32_t) 55 #define MAX_IMAGE_BYTES (8 * 1024 * 1024) 56 57 DECLARE_GLOBAL_DATA_PTR; 58 static LIST_HEAD(rockchip_display_list); 59 static LIST_HEAD(logo_cache_list); 60 61 static unsigned long memory_start; 62 static unsigned long cubic_lut_memory_start; 63 static unsigned long memory_end; 64 static struct base2_info base_parameter; 65 static u32 align_size = PAGE_SIZE; 66 67 /* 68 * the phy types are used by different connectors in public. 69 * The current version only has inno hdmi phy for hdmi and tve. 70 */ 71 enum public_use_phy { 72 NONE, 73 INNO_HDMI_PHY 74 }; 75 76 /* save public phy data */ 77 struct public_phy_data { 78 const struct rockchip_phy *phy_drv; 79 int phy_node; 80 int public_phy_type; 81 bool phy_init; 82 }; 83 84 char* rockchip_get_output_if_name(u32 output_if, char *name) 85 { 86 if (output_if & VOP_OUTPUT_IF_RGB) 87 strcat(name, " RGB"); 88 if (output_if & VOP_OUTPUT_IF_BT1120) 89 strcat(name, " BT1120"); 90 if (output_if & VOP_OUTPUT_IF_BT656) 91 strcat(name, " BT656"); 92 if (output_if & VOP_OUTPUT_IF_LVDS0) 93 strcat(name, " LVDS0"); 94 if (output_if & VOP_OUTPUT_IF_LVDS1) 95 strcat(name, " LVDS1"); 96 if (output_if & VOP_OUTPUT_IF_MIPI0) 97 strcat(name, " MIPI0"); 98 if (output_if & VOP_OUTPUT_IF_MIPI1) 99 strcat(name, " MIPI1"); 100 if (output_if & VOP_OUTPUT_IF_eDP0) 101 strcat(name, " eDP0"); 102 if (output_if & VOP_OUTPUT_IF_eDP1) 103 strcat(name, " eDP1"); 104 if (output_if & VOP_OUTPUT_IF_DP0) 105 strcat(name, " DP0"); 106 if (output_if & VOP_OUTPUT_IF_DP1) 107 strcat(name, " DP1"); 108 if (output_if & VOP_OUTPUT_IF_HDMI0) 109 strcat(name, " HDMI0"); 110 if (output_if & VOP_OUTPUT_IF_HDMI1) 111 strcat(name, " HDMI1"); 112 113 return name; 114 } 115 116 u32 rockchip_drm_get_cycles_per_pixel(u32 bus_format) 117 { 118 switch (bus_format) { 119 case MEDIA_BUS_FMT_RGB565_1X16: 120 case MEDIA_BUS_FMT_RGB666_1X18: 121 case MEDIA_BUS_FMT_RGB888_1X24: 122 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 123 return 1; 124 case MEDIA_BUS_FMT_RGB565_2X8_LE: 125 case MEDIA_BUS_FMT_BGR565_2X8_LE: 126 return 2; 127 case MEDIA_BUS_FMT_RGB666_3X6: 128 case MEDIA_BUS_FMT_RGB888_3X8: 129 case MEDIA_BUS_FMT_BGR888_3X8: 130 return 3; 131 case MEDIA_BUS_FMT_RGB888_DUMMY_4X8: 132 case MEDIA_BUS_FMT_BGR888_DUMMY_4X8: 133 return 4; 134 default: 135 return 1; 136 } 137 } 138 139 int rockchip_get_baseparameter(void) 140 { 141 struct blk_desc *dev_desc; 142 disk_partition_t part_info; 143 int block_num; 144 char *baseparameter_buf; 145 int ret = 0; 146 147 dev_desc = rockchip_get_bootdev(); 148 if (!dev_desc) { 149 printf("%s: Could not find device\n", __func__); 150 return -ENOENT; 151 } 152 153 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 154 printf("Could not find baseparameter partition\n"); 155 return -ENOENT; 156 } 157 158 block_num = BLOCK_CNT(sizeof(base_parameter), dev_desc); 159 baseparameter_buf = memalign(ARCH_DMA_MINALIGN, block_num * dev_desc->blksz); 160 if (!baseparameter_buf) { 161 printf("failed to alloc memory for baseparameter buffer\n"); 162 return -ENOMEM; 163 } 164 165 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 166 if (ret < 0) { 167 printf("read baseparameter failed\n"); 168 goto out; 169 } 170 171 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 172 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 173 printf("warning: bad baseparameter\n"); 174 memset(&base_parameter, 0, sizeof(base_parameter)); 175 } 176 rockchip_display_make_crc32_table(); 177 178 out: 179 free(baseparameter_buf); 180 return ret; 181 } 182 183 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 184 { 185 struct base2_disp_info *disp_info; 186 struct base2_disp_header *disp_header; 187 int i = 0, offset = -1; 188 u32 crc_val; 189 u32 base2_length; 190 void *base_parameter_addr = (void *)&base_parameter; 191 192 for (i = 0; i < 8; i++) { 193 disp_header = &base_parameter.disp_header[i]; 194 if (disp_header->connector_type == type && 195 disp_header->connector_id == id) { 196 printf("disp info %d, type:%d, id:%d\n", i, type, id); 197 offset = disp_header->offset; 198 break; 199 } 200 } 201 202 if (offset < 0) 203 return NULL; 204 disp_info = base_parameter_addr + offset; 205 if (disp_info->screen_info[0].type != type || 206 disp_info->screen_info[0].id != id) { 207 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 208 disp_info->screen_info[0].type, 209 disp_info->screen_info[0].id); 210 return NULL; 211 } 212 213 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 214 return NULL; 215 216 if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) { 217 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, 218 sizeof(struct base2_disp_info) - 4); 219 if (crc_val != disp_info->crc2) { 220 printf("error: connector type[%d], id[%d] disp info crc2 check error\n", 221 type, id); 222 return NULL; 223 } 224 } else { 225 base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) - 226 sizeof(struct acm_data) - 10 * 1024 - 4; 227 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4); 228 if (crc_val != disp_info->crc) { 229 printf("error: connector type[%d], id[%d] disp info crc check error\n", 230 type, id); 231 return NULL; 232 } 233 } 234 235 return disp_info; 236 } 237 238 /* check which kind of public phy does connector use */ 239 static int check_public_use_phy(struct rockchip_connector *conn) 240 { 241 int ret = NONE; 242 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 243 244 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 245 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 246 ret = INNO_HDMI_PHY; 247 #endif 248 249 return ret; 250 } 251 252 /* 253 * get public phy driver and initialize it. 254 * The current version only has inno hdmi phy for hdmi and tve. 255 */ 256 static int get_public_phy(struct rockchip_connector *conn, 257 struct public_phy_data *data) 258 { 259 struct rockchip_phy *phy; 260 struct udevice *dev; 261 int ret = 0; 262 263 switch (data->public_phy_type) { 264 case INNO_HDMI_PHY: 265 #if defined(CONFIG_ROCKCHIP_RK3328) 266 ret = uclass_get_device_by_name(UCLASS_PHY, 267 "hdmiphy@ff430000", &dev); 268 #elif defined(CONFIG_ROCKCHIP_RK322X) 269 ret = uclass_get_device_by_name(UCLASS_PHY, 270 "hdmi-phy@12030000", &dev); 271 #else 272 ret = -EINVAL; 273 #endif 274 if (ret) { 275 printf("Warn: can't find phy driver\n"); 276 return 0; 277 } 278 279 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 280 if (!phy) { 281 printf("failed to get phy driver\n"); 282 return 0; 283 } 284 285 ret = rockchip_phy_init(phy); 286 if (ret) { 287 printf("failed to init phy driver\n"); 288 return ret; 289 } 290 conn->phy = phy; 291 292 debug("inno hdmi phy init success, save it\n"); 293 data->phy_drv = conn->phy; 294 data->phy_init = true; 295 return 0; 296 default: 297 return -EINVAL; 298 } 299 } 300 301 static void init_display_buffer(ulong base) 302 { 303 memory_start = ALIGN(base + DRM_ROCKCHIP_FB_SIZE, align_size); 304 memory_end = memory_start; 305 cubic_lut_memory_start = ALIGN(memory_start + MEMORY_POOL_SIZE, align_size); 306 } 307 308 void *get_display_buffer(int size) 309 { 310 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 311 void *buf; 312 313 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 314 printf("failed to alloc %dbyte memory to display\n", size); 315 return NULL; 316 } 317 buf = (void *)roundup_memory; 318 319 memory_end = roundup_memory + size; 320 321 return buf; 322 } 323 324 static unsigned long get_display_size(void) 325 { 326 return memory_end - memory_start; 327 } 328 329 static unsigned long get_single_cubic_lut_size(void) 330 { 331 ulong cubic_lut_size; 332 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 333 334 /* This is depend on IC designed */ 335 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 336 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 337 338 return cubic_lut_size; 339 } 340 341 static unsigned long get_cubic_lut_offset(int crtc_id) 342 { 343 return crtc_id * get_single_cubic_lut_size(); 344 } 345 346 unsigned long get_cubic_lut_buffer(int crtc_id) 347 { 348 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 349 } 350 351 static unsigned long get_cubic_memory_size(void) 352 { 353 /* Max support 4 cubic lut */ 354 return get_single_cubic_lut_size() * 4; 355 } 356 357 bool can_direct_logo(int bpp) 358 { 359 return bpp == 16 || bpp == 32; 360 } 361 362 static int connector_phy_init(struct rockchip_connector *conn, 363 struct public_phy_data *data) 364 { 365 int type; 366 367 /* does this connector use public phy with others */ 368 type = check_public_use_phy(conn); 369 if (type == INNO_HDMI_PHY) { 370 /* there is no public phy was initialized */ 371 if (!data->phy_init) { 372 debug("start get public phy\n"); 373 data->public_phy_type = type; 374 if (get_public_phy(conn, data)) { 375 printf("can't find correct public phy type\n"); 376 free(data); 377 return -EINVAL; 378 } 379 return 0; 380 } 381 382 /* if this phy has been initialized, get it directly */ 383 conn->phy = (struct rockchip_phy *)data->phy_drv; 384 return 0; 385 } 386 387 return 0; 388 } 389 390 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode, u32 *bus_flags) 391 { 392 int hactive, vactive, pixelclock; 393 int hfront_porch, hback_porch, hsync_len; 394 int vfront_porch, vback_porch, vsync_len; 395 int val, flags = 0; 396 397 #define FDT_GET_BOOL(val, name) \ 398 val = ofnode_read_bool(node, name); 399 400 #define FDT_GET_INT(val, name) \ 401 val = ofnode_read_s32_default(node, name, -1); \ 402 if (val < 0) { \ 403 printf("Can't get %s\n", name); \ 404 return -ENXIO; \ 405 } 406 407 #define FDT_GET_INT_DEFAULT(val, name, default) \ 408 val = ofnode_read_s32_default(node, name, default); 409 410 FDT_GET_INT(hactive, "hactive"); 411 FDT_GET_INT(vactive, "vactive"); 412 FDT_GET_INT(pixelclock, "clock-frequency"); 413 FDT_GET_INT(hsync_len, "hsync-len"); 414 FDT_GET_INT(hfront_porch, "hfront-porch"); 415 FDT_GET_INT(hback_porch, "hback-porch"); 416 FDT_GET_INT(vsync_len, "vsync-len"); 417 FDT_GET_INT(vfront_porch, "vfront-porch"); 418 FDT_GET_INT(vback_porch, "vback-porch"); 419 FDT_GET_INT(val, "hsync-active"); 420 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 421 FDT_GET_INT(val, "vsync-active"); 422 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 423 424 FDT_GET_BOOL(val, "interlaced"); 425 flags |= val ? DRM_MODE_FLAG_INTERLACE : 0; 426 FDT_GET_BOOL(val, "doublescan"); 427 flags |= val ? DRM_MODE_FLAG_DBLSCAN : 0; 428 FDT_GET_BOOL(val, "doubleclk"); 429 flags |= val ? DRM_MODE_FLAG_DBLCLK : 0; 430 431 FDT_GET_INT(val, "de-active"); 432 *bus_flags |= val ? DRM_BUS_FLAG_DE_HIGH : DRM_BUS_FLAG_DE_LOW; 433 FDT_GET_INT(val, "pixelclk-active"); 434 *bus_flags |= val ? DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE : DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 435 436 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 437 if (val == DRM_MODE_FLAG_XMIRROR) { 438 flags |= DRM_MODE_FLAG_XMIRROR; 439 } else if (val == DRM_MODE_FLAG_YMIRROR) { 440 flags |= DRM_MODE_FLAG_YMIRROR; 441 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 442 flags |= DRM_MODE_FLAG_XMIRROR; 443 flags |= DRM_MODE_FLAG_YMIRROR; 444 } 445 mode->hdisplay = hactive; 446 mode->hsync_start = mode->hdisplay + hfront_porch; 447 mode->hsync_end = mode->hsync_start + hsync_len; 448 mode->htotal = mode->hsync_end + hback_porch; 449 450 mode->vdisplay = vactive; 451 mode->vsync_start = mode->vdisplay + vfront_porch; 452 mode->vsync_end = mode->vsync_start + vsync_len; 453 mode->vtotal = mode->vsync_end + vback_porch; 454 455 mode->clock = pixelclock / 1000; 456 mode->flags = flags; 457 mode->vrefresh = drm_mode_vrefresh(mode); 458 459 return 0; 460 } 461 462 static int display_get_force_timing_from_dts(ofnode node, 463 struct drm_display_mode *mode, 464 u32 *bus_flags) 465 { 466 int ret = 0; 467 468 ret = rockchip_ofnode_get_display_mode(node, mode, bus_flags); 469 470 if (ret) { 471 mode->clock = 74250; 472 mode->flags = 0x5; 473 mode->hdisplay = 1280; 474 mode->hsync_start = 1390; 475 mode->hsync_end = 1430; 476 mode->htotal = 1650; 477 mode->hskew = 0; 478 mode->vdisplay = 720; 479 mode->vsync_start = 725; 480 mode->vsync_end = 730; 481 mode->vtotal = 750; 482 mode->vrefresh = 60; 483 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 484 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 485 } 486 487 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 488 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 489 mode->vscan); 490 491 return 0; 492 } 493 494 static int display_get_timing_from_dts(struct rockchip_panel *panel, 495 struct drm_display_mode *mode, 496 u32 *bus_flags) 497 { 498 struct ofnode_phandle_args args; 499 ofnode dt, timing, mcu_panel; 500 int ret; 501 502 mcu_panel = dev_read_subnode(panel->dev, "mcu-panel"); 503 dt = dev_read_subnode(panel->dev, "display-timings"); 504 if (ofnode_valid(dt)) { 505 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 506 0, 0, &args); 507 if (ret) 508 return ret; 509 510 timing = args.node; 511 } else if (ofnode_valid(mcu_panel)) { 512 dt = ofnode_find_subnode(mcu_panel, "display-timings"); 513 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 514 0, 0, &args); 515 if (ret) 516 return ret; 517 518 timing = args.node; 519 } else { 520 timing = dev_read_subnode(panel->dev, "panel-timing"); 521 } 522 523 if (!ofnode_valid(timing)) { 524 printf("failed to get display timings from DT\n"); 525 return -ENXIO; 526 } 527 528 rockchip_ofnode_get_display_mode(timing, mode, bus_flags); 529 530 return 0; 531 } 532 533 static int display_get_timing(struct display_state *state) 534 { 535 struct connector_state *conn_state = &state->conn_state; 536 struct drm_display_mode *mode = &conn_state->mode; 537 const struct drm_display_mode *m; 538 struct rockchip_panel *panel = conn_state->connector->panel; 539 540 if (panel->funcs->get_mode) 541 return panel->funcs->get_mode(panel, mode); 542 543 if (dev_of_valid(panel->dev) && 544 !display_get_timing_from_dts(panel, mode, &conn_state->bus_flags)) { 545 printf("Using display timing dts\n"); 546 return 0; 547 } 548 549 if (panel->data) { 550 m = (const struct drm_display_mode *)panel->data; 551 memcpy(mode, m, sizeof(*m)); 552 printf("Using display timing from compatible panel driver\n"); 553 return 0; 554 } 555 556 return -ENODEV; 557 } 558 559 static int display_pre_init(void) 560 { 561 struct display_state *state; 562 int ret = 0; 563 564 list_for_each_entry(state, &rockchip_display_list, head) { 565 struct connector_state *conn_state = &state->conn_state; 566 struct crtc_state *crtc_state = &state->crtc_state; 567 struct rockchip_crtc *crtc = crtc_state->crtc; 568 569 ret = rockchip_connector_pre_init(state); 570 if (ret) 571 printf("pre init conn error\n"); 572 573 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 574 } 575 return ret; 576 } 577 578 static int display_use_force_mode(struct display_state *state) 579 { 580 struct connector_state *conn_state = &state->conn_state; 581 struct drm_display_mode *mode = &conn_state->mode; 582 583 conn_state->bpc = 8; 584 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 585 conn_state->bus_format = state->force_bus_format; 586 587 return 0; 588 } 589 590 static int display_get_edid_mode(struct display_state *state) 591 { 592 int ret = 0; 593 struct connector_state *conn_state = &state->conn_state; 594 struct drm_display_mode *mode = &conn_state->mode; 595 int bpc; 596 597 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 598 if (!ret) { 599 conn_state->bpc = bpc; 600 edid_print_info((void *)&conn_state->edid); 601 } else { 602 conn_state->bpc = 8; 603 mode->clock = 74250; 604 mode->flags = 0x5; 605 mode->hdisplay = 1280; 606 mode->hsync_start = 1390; 607 mode->hsync_end = 1430; 608 mode->htotal = 1650; 609 mode->hskew = 0; 610 mode->vdisplay = 720; 611 mode->vsync_start = 725; 612 mode->vsync_end = 730; 613 mode->vtotal = 750; 614 mode->vrefresh = 60; 615 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 616 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 617 618 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 619 state->conn_state.connector->dev->name); 620 } 621 622 return ret; 623 } 624 625 static int display_mode_valid(struct display_state *state) 626 { 627 struct connector_state *conn_state = &state->conn_state; 628 struct rockchip_connector *conn = conn_state->connector; 629 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 630 struct crtc_state *crtc_state = &state->crtc_state; 631 const struct rockchip_crtc *crtc = crtc_state->crtc; 632 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 633 int ret; 634 635 if (conn_funcs->mode_valid && state->enabled_at_spl == false) { 636 ret = conn_funcs->mode_valid(conn, state); 637 if (ret) 638 return ret; 639 } 640 641 if (crtc_funcs->mode_valid) { 642 ret = crtc_funcs->mode_valid(state); 643 if (ret) 644 return ret; 645 } 646 647 return 0; 648 } 649 650 static int display_mode_fixup(struct display_state *state) 651 { 652 struct crtc_state *crtc_state = &state->crtc_state; 653 const struct rockchip_crtc *crtc = crtc_state->crtc; 654 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 655 int ret; 656 657 if (crtc_funcs->mode_fixup) { 658 ret = crtc_funcs->mode_fixup(state); 659 if (ret) 660 return ret; 661 } 662 663 return 0; 664 } 665 666 static int display_init(struct display_state *state) 667 { 668 struct connector_state *conn_state = &state->conn_state; 669 struct rockchip_connector *conn = conn_state->connector; 670 struct crtc_state *crtc_state = &state->crtc_state; 671 struct rockchip_crtc *crtc = crtc_state->crtc; 672 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 673 struct drm_display_mode *mode = &conn_state->mode; 674 const char *compatible; 675 int ret = 0; 676 static bool __print_once = false; 677 #ifdef CONFIG_SPL_BUILD 678 struct spl_display_info *spl_disp_info = (struct spl_display_info *)CONFIG_SPL_VIDEO_BUF; 679 #endif 680 if (!__print_once) { 681 __print_once = true; 682 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 683 } 684 685 if (state->is_init) 686 return 0; 687 688 if (!crtc_funcs) { 689 printf("failed to find crtc functions\n"); 690 return -ENXIO; 691 } 692 693 #ifdef CONFIG_SPL_BUILD 694 if (state->conn_state.type == DRM_MODE_CONNECTOR_HDMIA) 695 state->enabled_at_spl = spl_disp_info->enabled == 1 ? true : false; 696 if (state->enabled_at_spl) 697 printf("HDMI enabled at SPL\n"); 698 #endif 699 if (crtc_state->crtc->active && !crtc_state->ports_node && 700 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 701 sizeof(struct drm_display_mode))) { 702 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 703 crtc_state->dev->name, 704 crtc_state->crtc->active_mode.type, 705 crtc_state->crtc->active_mode.hdisplay, 706 crtc_state->crtc->active_mode.vdisplay, 707 crtc_state->crtc->active_mode.vrefresh); 708 return -ENODEV; 709 } 710 711 if (crtc_funcs->preinit) { 712 ret = crtc_funcs->preinit(state); 713 if (ret) 714 return ret; 715 } 716 717 if (state->enabled_at_spl == false) { 718 ret = rockchip_connector_init(state); 719 if (ret) 720 goto deinit; 721 } 722 723 /* 724 * support hotplug, but not connect; 725 */ 726 #ifdef CONFIG_DRM_ROCKCHIP_TVE 727 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 728 printf("hdmi plugin ,skip tve\n"); 729 goto deinit; 730 } 731 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 732 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 733 printf("hdmi plugin ,skip tve\n"); 734 goto deinit; 735 } 736 #endif 737 738 ret = rockchip_connector_detect(state); 739 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 740 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 741 crtc->hdmi_hpd = ret; 742 if (state->enabled_at_spl) 743 crtc->hdmi_hpd = true; 744 #endif 745 if (!ret && !state->force_output) 746 goto deinit; 747 748 ret = 0; 749 if (state->enabled_at_spl == true) { 750 #ifdef CONFIG_SPL_BUILD 751 struct drm_display_mode *mode = &conn_state->mode; 752 753 memcpy(mode, &spl_disp_info->mode, sizeof(*mode)); 754 conn_state->bus_format = spl_disp_info->bus_format; 755 756 printf("%s get display mode from spl:%dx%d, bus format:0x%x\n", 757 conn->dev->name, mode->hdisplay, mode->vdisplay, conn_state->bus_format); 758 #endif 759 } else if (conn->panel) { 760 ret = display_get_timing(state); 761 if (!ret) 762 conn_state->bpc = conn->panel->bpc; 763 #if defined(CONFIG_I2C_EDID) 764 if (ret < 0 && conn->funcs->get_edid) { 765 rockchip_panel_prepare(conn->panel); 766 ret = conn->funcs->get_edid(conn, state); 767 if (!ret) 768 display_get_edid_mode(state); 769 } 770 #endif 771 } else if (conn->bridge) { 772 ret = video_bridge_read_edid(conn->bridge->dev, 773 conn_state->edid, EDID_SIZE); 774 if (ret > 0) { 775 #if defined(CONFIG_I2C_EDID) 776 ret = display_get_edid_mode(state); 777 #endif 778 } else { 779 ret = video_bridge_get_timing(conn->bridge->dev); 780 } 781 } else if (conn->funcs->get_timing) { 782 ret = conn->funcs->get_timing(conn, state); 783 } else if (conn->funcs->get_edid) { 784 ret = conn->funcs->get_edid(conn, state); 785 #if defined(CONFIG_I2C_EDID) 786 if (!ret) 787 display_get_edid_mode(state); 788 #endif 789 } 790 791 if (!ret && conn_state->secondary) { 792 struct rockchip_connector *connector = conn_state->secondary; 793 794 if (connector->panel) { 795 if (connector->panel->funcs->get_mode) { 796 struct drm_display_mode *_mode = drm_mode_create(); 797 798 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 799 if (!ret && !drm_mode_equal(_mode, mode)) 800 ret = -EINVAL; 801 802 drm_mode_destroy(_mode); 803 } 804 } 805 } 806 807 if (ret && !state->force_output) 808 goto deinit; 809 if (state->force_output) 810 display_use_force_mode(state); 811 812 if (display_mode_valid(state)) 813 goto deinit; 814 815 /* rk356x series drive mipi pixdata on posedge */ 816 compatible = dev_read_string(conn->dev, "compatible"); 817 if (compatible && !strcmp(compatible, "rockchip,rk3568-mipi-dsi")) { 818 conn_state->bus_flags &= ~DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 819 conn_state->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 820 } 821 822 if (display_mode_fixup(state)) 823 goto deinit; 824 825 if (conn->bridge) 826 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 827 828 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 829 " H: %04d %04d %04d %04d\n" 830 " V: %04d %04d %04d %04d\n" 831 "bus_format: %x\n", 832 conn->dev->name, 833 state->force_output ? "use force output" : "", 834 mode->clock, mode->flags, 835 mode->hdisplay, mode->hsync_start, 836 mode->hsync_end, mode->htotal, 837 mode->vdisplay, mode->vsync_start, 838 mode->vsync_end, mode->vtotal, 839 conn_state->bus_format); 840 841 if (crtc_funcs->init && state->enabled_at_spl == false) { 842 ret = crtc_funcs->init(state); 843 if (ret) 844 goto deinit; 845 } 846 state->is_init = 1; 847 848 crtc_state->crtc->active = true; 849 memcpy(&crtc_state->crtc->active_mode, 850 &conn_state->mode, sizeof(struct drm_display_mode)); 851 852 return 0; 853 854 deinit: 855 rockchip_connector_deinit(state); 856 return ret; 857 } 858 859 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 860 { 861 struct crtc_state *crtc_state = &state->crtc_state; 862 const struct rockchip_crtc *crtc = crtc_state->crtc; 863 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 864 int ret; 865 866 if (!state->is_init) 867 return -EINVAL; 868 869 if (crtc_funcs->send_mcu_cmd) { 870 ret = crtc_funcs->send_mcu_cmd(state, type, val); 871 if (ret) 872 return ret; 873 } 874 875 return 0; 876 } 877 878 static int display_set_plane(struct display_state *state) 879 { 880 struct crtc_state *crtc_state = &state->crtc_state; 881 const struct rockchip_crtc *crtc = crtc_state->crtc; 882 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 883 int ret; 884 885 if (!state->is_init) 886 return -EINVAL; 887 888 if (crtc_funcs->set_plane) { 889 ret = crtc_funcs->set_plane(state); 890 if (ret) 891 return ret; 892 } 893 894 return 0; 895 } 896 897 static int display_enable(struct display_state *state) 898 { 899 struct crtc_state *crtc_state = &state->crtc_state; 900 const struct rockchip_crtc *crtc = crtc_state->crtc; 901 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 902 903 if (!state->is_init) 904 return -EINVAL; 905 906 if (state->is_enable) 907 return 0; 908 909 if (crtc_funcs->prepare) 910 crtc_funcs->prepare(state); 911 912 if (state->enabled_at_spl == false) 913 rockchip_connector_pre_enable(state); 914 915 if (crtc_funcs->enable) 916 crtc_funcs->enable(state); 917 918 if (state->enabled_at_spl == false) 919 rockchip_connector_enable(state); 920 921 #ifdef CONFIG_DRM_ROCKCHIP_RK628 922 /* 923 * trigger .probe helper of U_BOOT_DRIVER(rk628) in ./rk628/rk628.c 924 */ 925 struct udevice * dev; 926 int phandle, ret; 927 928 phandle = ofnode_read_u32_default(state->node, "bridge", -1); 929 if (phandle < 0) 930 printf("%s failed to find bridge phandle\n", ofnode_get_name(state->node)); 931 932 ret = uclass_get_device_by_phandle_id(UCLASS_I2C_GENERIC, phandle, &dev); 933 if (ret && ret != -ENOENT) 934 printf("%s:%d failed to get rk628 device ret:%d\n", __func__, __LINE__, ret); 935 936 #endif 937 938 if (crtc_state->soft_te) 939 crtc_funcs->apply_soft_te(state); 940 941 state->is_enable = true; 942 943 return 0; 944 } 945 946 static int display_disable(struct display_state *state) 947 { 948 struct crtc_state *crtc_state = &state->crtc_state; 949 const struct rockchip_crtc *crtc = crtc_state->crtc; 950 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 951 952 if (!state->is_init) 953 return 0; 954 955 if (!state->is_enable) 956 return 0; 957 958 rockchip_connector_disable(state); 959 960 if (crtc_funcs->disable) 961 crtc_funcs->disable(state); 962 963 rockchip_connector_post_disable(state); 964 965 state->is_enable = 0; 966 state->is_init = 0; 967 968 return 0; 969 } 970 971 static int display_check(struct display_state *state) 972 { 973 struct connector_state *conn_state = &state->conn_state; 974 struct rockchip_connector *conn = conn_state->connector; 975 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 976 struct crtc_state *crtc_state = &state->crtc_state; 977 const struct rockchip_crtc *crtc = crtc_state->crtc; 978 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 979 int ret; 980 981 if (!state->is_init) 982 return 0; 983 984 if (conn_funcs->check) { 985 ret = conn_funcs->check(conn, state); 986 if (ret) 987 goto check_fail; 988 } 989 990 if (crtc_funcs->check) { 991 ret = crtc_funcs->check(state); 992 if (ret) 993 goto check_fail; 994 } 995 996 if (crtc_funcs->plane_check) { 997 ret = crtc_funcs->plane_check(state); 998 if (ret) 999 goto check_fail; 1000 } 1001 1002 return 0; 1003 1004 check_fail: 1005 state->is_init = false; 1006 return ret; 1007 } 1008 1009 static int display_logo(struct display_state *state) 1010 { 1011 struct crtc_state *crtc_state = &state->crtc_state; 1012 struct connector_state *conn_state = &state->conn_state; 1013 struct logo_info *logo = &state->logo; 1014 int hdisplay, vdisplay, ret; 1015 1016 ret = display_init(state); 1017 if (!state->is_init || ret) 1018 return -ENODEV; 1019 1020 switch (logo->bpp) { 1021 case 16: 1022 crtc_state->format = ROCKCHIP_FMT_RGB565; 1023 break; 1024 case 24: 1025 crtc_state->format = ROCKCHIP_FMT_RGB888; 1026 break; 1027 case 32: 1028 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1029 break; 1030 default: 1031 printf("can't support bmp bits[%d]\n", logo->bpp); 1032 return -EINVAL; 1033 } 1034 hdisplay = conn_state->mode.crtc_hdisplay; 1035 vdisplay = conn_state->mode.vdisplay; 1036 crtc_state->src_rect.w = logo->width; 1037 crtc_state->src_rect.h = logo->height; 1038 crtc_state->src_rect.x = 0; 1039 crtc_state->src_rect.y = 0; 1040 crtc_state->ymirror = logo->ymirror; 1041 crtc_state->rb_swap = 0; 1042 1043 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1044 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1045 1046 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1047 crtc_state->crtc_rect.x = 0; 1048 crtc_state->crtc_rect.y = 0; 1049 crtc_state->crtc_rect.w = hdisplay; 1050 crtc_state->crtc_rect.h = vdisplay; 1051 } else { 1052 if (crtc_state->src_rect.w >= hdisplay) { 1053 crtc_state->crtc_rect.x = 0; 1054 crtc_state->crtc_rect.w = hdisplay; 1055 } else { 1056 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1057 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1058 } 1059 1060 if (crtc_state->src_rect.h >= vdisplay) { 1061 crtc_state->crtc_rect.y = 0; 1062 crtc_state->crtc_rect.h = vdisplay; 1063 } else { 1064 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1065 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1066 } 1067 } 1068 1069 display_check(state); 1070 ret = display_set_plane(state); 1071 if (ret) 1072 return ret; 1073 display_enable(state); 1074 1075 return 0; 1076 } 1077 1078 static int get_crtc_id(ofnode connect, bool is_ports_node) 1079 { 1080 struct device_node *port_node; 1081 struct device_node *remote; 1082 int phandle; 1083 int val; 1084 1085 if (is_ports_node) { 1086 port_node = of_get_parent(connect.np); 1087 if (!port_node) 1088 goto err; 1089 1090 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1091 if (val < 0) 1092 goto err; 1093 } else { 1094 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1095 if (phandle < 0) 1096 goto err; 1097 1098 remote = of_find_node_by_phandle(phandle); 1099 if (!remote) 1100 goto err; 1101 1102 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1103 if (val < 0) 1104 goto err; 1105 } 1106 1107 return val; 1108 err: 1109 printf("Can't get crtc id, default set to id = 0\n"); 1110 return 0; 1111 } 1112 1113 static int get_crtc_mcu_mode(struct crtc_state *crtc_state, struct device_node *port_node, 1114 bool is_ports_node) 1115 { 1116 ofnode mcu_node, vp_node; 1117 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1118 1119 if (is_ports_node) { 1120 vp_node = np_to_ofnode(port_node); 1121 mcu_node = ofnode_find_subnode(vp_node, "mcu-timing"); 1122 if (!ofnode_valid(mcu_node)) 1123 return -ENODEV; 1124 } else { 1125 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1126 if (!ofnode_valid(mcu_node)) 1127 return -ENODEV; 1128 } 1129 1130 #define FDT_GET_MCU_INT(val, name) \ 1131 do { \ 1132 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1133 if (val < 0) { \ 1134 printf("Can't get %s\n", name); \ 1135 return -ENXIO; \ 1136 } \ 1137 } while (0) 1138 1139 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1140 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1141 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1142 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1143 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1144 1145 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1146 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1147 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1148 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1149 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1150 1151 return 0; 1152 } 1153 1154 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp, int rotate) 1155 { 1156 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1157 1158 list_for_each_entry(tmp, &logo_cache_list, head) { 1159 if ((!strcmp(tmp->name, bmp) && rotate == tmp->logo_rotate) || 1160 (soc_is_rk3566() && tmp->logo_rotate)) { 1161 logo_cache = tmp; 1162 break; 1163 } 1164 } 1165 1166 if (!logo_cache) { 1167 logo_cache = malloc(sizeof(*logo_cache)); 1168 if (!logo_cache) { 1169 printf("failed to alloc memory for logo cache\n"); 1170 return NULL; 1171 } 1172 memset(logo_cache, 0, sizeof(*logo_cache)); 1173 strcpy(logo_cache->name, bmp); 1174 INIT_LIST_HEAD(&logo_cache->head); 1175 list_add_tail(&logo_cache->head, &logo_cache_list); 1176 } 1177 1178 return logo_cache; 1179 } 1180 1181 /* Note: used only for rkfb kernel driver */ 1182 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1183 { 1184 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1185 void *dst = NULL; 1186 int len, size; 1187 struct bmp_header *header; 1188 1189 if (!logo || !bmp_name) 1190 return -EINVAL; 1191 1192 header = malloc(RK_BLK_SIZE); 1193 if (!header) 1194 return -ENOMEM; 1195 1196 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1197 if (len != RK_BLK_SIZE) { 1198 free(header); 1199 return -EINVAL; 1200 } 1201 size = get_unaligned_le32(&header->file_size); 1202 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1203 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1204 if (len != size) { 1205 printf("failed to load bmp %s\n", bmp_name); 1206 free(header); 1207 return -ENOENT; 1208 } 1209 1210 logo->mem = dst; 1211 #endif 1212 1213 return 0; 1214 } 1215 1216 #ifdef BMP_DECODEER_LEGACY 1217 static int load_bmp_logo_legacy(struct logo_info *logo, const char *bmp_name) 1218 { 1219 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1220 struct rockchip_logo_cache *logo_cache; 1221 struct bmp_header *header; 1222 void *dst = NULL, *pdst; 1223 int size, len; 1224 int ret = 0; 1225 int reserved = 0; 1226 int dst_size; 1227 1228 if (!logo || !bmp_name) 1229 return -EINVAL; 1230 logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate); 1231 if (!logo_cache) 1232 return -ENOMEM; 1233 1234 if (logo_cache->logo.mem) { 1235 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1236 return 0; 1237 } 1238 1239 header = malloc(RK_BLK_SIZE); 1240 if (!header) 1241 return -ENOMEM; 1242 1243 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1244 if (len != RK_BLK_SIZE) { 1245 ret = -EINVAL; 1246 goto free_header; 1247 } 1248 1249 logo->bpp = get_unaligned_le16(&header->bit_count); 1250 logo->width = get_unaligned_le32(&header->width); 1251 logo->height = get_unaligned_le32(&header->height); 1252 dst_size = logo->width * logo->height * logo->bpp >> 3; 1253 reserved = get_unaligned_le32(&header->reserved); 1254 if (logo->height < 0) 1255 logo->height = -logo->height; 1256 size = get_unaligned_le32(&header->file_size); 1257 if (!can_direct_logo(logo->bpp)) { 1258 if (size > MEMORY_POOL_SIZE) { 1259 printf("failed to use boot buf as temp bmp buffer\n"); 1260 ret = -ENOMEM; 1261 goto free_header; 1262 } 1263 pdst = get_display_buffer(size); 1264 1265 } else { 1266 pdst = get_display_buffer(size); 1267 dst = pdst; 1268 } 1269 1270 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1271 if (len != size) { 1272 printf("failed to load bmp %s\n", bmp_name); 1273 ret = -ENOENT; 1274 goto free_header; 1275 } 1276 1277 if (!can_direct_logo(logo->bpp)) { 1278 /* 1279 * TODO: force use 16bpp if bpp less than 16; 1280 */ 1281 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1282 dst_size = logo->width * logo->height * logo->bpp >> 3; 1283 dst = get_display_buffer(dst_size); 1284 if (!dst) { 1285 ret = -ENOMEM; 1286 goto free_header; 1287 } 1288 if (bmpdecoder(pdst, dst, logo->bpp)) { 1289 printf("failed to decode bmp %s\n", bmp_name); 1290 ret = -EINVAL; 1291 goto free_header; 1292 } 1293 1294 logo->offset = 0; 1295 logo->ymirror = 0; 1296 } else { 1297 logo->offset = get_unaligned_le32(&header->data_offset); 1298 if (reserved == BMP_PROCESSED_FLAG) 1299 logo->ymirror = 0; 1300 else 1301 logo->ymirror = 1; 1302 } 1303 logo->mem = dst; 1304 1305 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1306 1307 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1308 1309 free_header: 1310 1311 free(header); 1312 1313 return ret; 1314 #else 1315 return -EINVAL; 1316 #endif 1317 } 1318 #endif 1319 1320 static void *bitmap_create(int width, int height, unsigned int state) 1321 { 1322 /* Ensure a stupidly large bitmap is not created */ 1323 if (width > 4096 || height > 4096) 1324 return NULL; 1325 1326 return calloc(width * height, BYTES_PER_PIXEL); 1327 } 1328 1329 static unsigned char *bitmap_get_buffer(void *bitmap) 1330 { 1331 return bitmap; 1332 } 1333 1334 static void bitmap_destroy(void *bitmap) 1335 { 1336 free(bitmap); 1337 } 1338 1339 static void bmp_copy(void *dst, bmp_image *bmp) 1340 { 1341 u16 row, col; 1342 u8 *image; 1343 u8 *pdst = (u8 *)dst; 1344 1345 image = (u8 *)bmp->bitmap; 1346 for (row = 0; row != bmp->height; row++) { 1347 for (col = 0; col != bmp->width; col++) { 1348 size_t z = (row * bmp->width + col) * BYTES_PER_PIXEL; 1349 1350 *pdst++ = image[z + 2]; 1351 *pdst++ = image[z + 1]; 1352 *pdst++ = image[z + 0]; 1353 *pdst++ = image[z + 3]; 1354 } 1355 } 1356 } 1357 1358 static void *rockchip_logo_rotate(struct logo_info *logo, void *src) 1359 { 1360 void *dst_rotate; 1361 int width = logo->width; 1362 int height = logo->height; 1363 int width_rotate = logo->height & 0x3 ? (logo->height & ~0x3) + 4 : logo->height; 1364 int height_rotate = logo->width; 1365 int dst_size = width * height * logo->bpp >> 3; 1366 int dst_size_rotate = width_rotate * height_rotate * logo->bpp >> 3; 1367 int bytes_per_pixel = logo->bpp >> 3; 1368 int padded_width; 1369 int i, j; 1370 char *img_data; 1371 1372 if (!(logo->rotate == 90 || logo->rotate == 180 || logo->rotate == 270)) { 1373 printf("Unsupported rotation angle\n"); 1374 return NULL; 1375 } 1376 1377 img_data = (char *)malloc(dst_size); 1378 if (!img_data) { 1379 printf("failed to alloc memory for image data\n"); 1380 return NULL; 1381 } 1382 memcpy(img_data, src, dst_size); 1383 1384 dst_rotate = get_display_buffer(dst_size_rotate); 1385 if (!dst_rotate) 1386 return NULL; 1387 memset(dst_rotate, 0, dst_size_rotate); 1388 1389 switch (logo->rotate) { 1390 case 90: 1391 logo->width = width_rotate; 1392 logo->height = height_rotate; 1393 padded_width = height & 0x3 ? (height & ~0x3) + 4 : height; 1394 for (i = 0; i < height; i++) { 1395 for (j = 0; j < width; j++) { 1396 memcpy(dst_rotate + (j * padded_width * bytes_per_pixel) + 1397 (height - i - 1) * bytes_per_pixel, 1398 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1399 bytes_per_pixel); 1400 } 1401 } 1402 break; 1403 case 180: 1404 for (i = 0; i < height; i++) { 1405 for (j = 0; j < width; j++) { 1406 memcpy(dst_rotate + (height - i - 1) * width * bytes_per_pixel + 1407 (width - j - 1) * bytes_per_pixel, 1408 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1409 bytes_per_pixel); 1410 } 1411 } 1412 break; 1413 case 270: 1414 logo->width = width_rotate; 1415 logo->height = height_rotate; 1416 padded_width = height & 0x3 ? (height & ~0x3) + 4 : height; 1417 for (i = 0; i < height; i++) { 1418 for (j = 0; j < width; j++) { 1419 memcpy(dst_rotate + (width - j - 1) * padded_width * bytes_per_pixel + 1420 i * bytes_per_pixel, 1421 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1422 bytes_per_pixel); 1423 } 1424 } 1425 break; 1426 default: 1427 break; 1428 } 1429 1430 free(img_data); 1431 1432 return dst_rotate; 1433 } 1434 1435 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1436 { 1437 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1438 struct rockchip_logo_cache *logo_cache; 1439 bmp_bitmap_callback_vt bitmap_callbacks = { 1440 bitmap_create, 1441 bitmap_destroy, 1442 bitmap_get_buffer, 1443 }; 1444 bmp_result code; 1445 bmp_image bmp; 1446 void *bmp_data; 1447 void *dst = NULL; 1448 void *dst_rotate = NULL; 1449 int len, dst_size; 1450 int ret = 0; 1451 1452 if (!logo || !bmp_name) 1453 return -EINVAL; 1454 1455 logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate); 1456 if (!logo_cache) 1457 return -ENOMEM; 1458 1459 if (logo_cache->logo.mem) { 1460 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1461 return 0; 1462 } 1463 1464 bmp_data = malloc(MAX_IMAGE_BYTES); 1465 if (!bmp_data) { 1466 printf("failed to alloc bmp data\n"); 1467 return -ENOMEM; 1468 } 1469 1470 bmp_create(&bmp, &bitmap_callbacks); 1471 1472 len = rockchip_read_resource_file(bmp_data, bmp_name, 0, MAX_IMAGE_BYTES); 1473 if (len < 0) { 1474 ret = -EINVAL; 1475 goto free_bmp_data; 1476 } 1477 1478 /* analyse the BMP */ 1479 code = bmp_analyse(&bmp, len, bmp_data); 1480 if (code != BMP_OK) { 1481 printf("failed to parse bmp:%s header\n", bmp_name); 1482 ret = -EINVAL; 1483 goto free_bmp_data; 1484 } 1485 1486 if (bmp.buffer_size > MAX_IMAGE_BYTES) { 1487 printf("bmp[%s] data size[%dKB] is over the limitation MAX_IMAGE_BYTES[%dKB]\n", 1488 bmp_name, bmp.buffer_size / 1024, MAX_IMAGE_BYTES / 1024); 1489 ret = -EINVAL; 1490 goto free_bmp_data; 1491 } 1492 1493 /* fix bpp to 32 */ 1494 logo->bpp = 32; 1495 logo->offset = 0; 1496 logo->ymirror = 0; 1497 logo->width = get_unaligned_le32(&bmp.width); 1498 logo->height = get_unaligned_le32(&bmp.height); 1499 dst_size = logo->width * logo->height * logo->bpp >> 3; 1500 /* decode the image to RGBA8888 format */ 1501 code = bmp_decode(&bmp); 1502 if (code != BMP_OK) { 1503 /* allow partially decoded images */ 1504 if (code != BMP_INSUFFICIENT_DATA && code != BMP_DATA_ERROR) { 1505 printf("failed to allocate the buffer of bmp:%s\n", bmp_name); 1506 ret = -EINVAL; 1507 goto free_bmp_data; 1508 } 1509 } 1510 1511 dst = get_display_buffer(dst_size); 1512 if (!dst) { 1513 ret = -ENOMEM; 1514 goto free_bmp_data; 1515 } 1516 bmp_copy(dst, &bmp); 1517 1518 if (logo->rotate) { 1519 dst_rotate = rockchip_logo_rotate(logo, dst); 1520 if (dst_rotate) { 1521 dst = dst_rotate; 1522 dst_size = logo->width * logo->height * logo->bpp >> 3; 1523 } 1524 printf("logo ratate %d\n", logo->rotate); 1525 } 1526 logo->mem = dst; 1527 1528 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1529 logo_cache->logo_rotate = logo->rotate; 1530 1531 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1532 free_bmp_data: 1533 /* clean up */ 1534 bmp_finalise(&bmp); 1535 free(bmp_data); 1536 1537 return ret; 1538 #else 1539 return -EINVAL; 1540 #endif 1541 } 1542 1543 void rockchip_show_fbbase(ulong fbbase) 1544 { 1545 struct display_state *s; 1546 1547 list_for_each_entry(s, &rockchip_display_list, head) { 1548 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1549 s->logo.mem = (char *)fbbase; 1550 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1551 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1552 s->logo.bpp = 32; 1553 s->logo.ymirror = 0; 1554 1555 display_logo(s); 1556 } 1557 } 1558 1559 int rockchip_show_bmp(const char *bmp) 1560 { 1561 struct display_state *s; 1562 int ret = 0; 1563 1564 if (!bmp) { 1565 list_for_each_entry(s, &rockchip_display_list, head) 1566 display_disable(s); 1567 return -ENOENT; 1568 } 1569 1570 list_for_each_entry(s, &rockchip_display_list, head) { 1571 s->logo.mode = s->charge_logo_mode; 1572 if (load_bmp_logo(&s->logo, bmp)) 1573 continue; 1574 ret = display_logo(s); 1575 } 1576 1577 return ret; 1578 } 1579 1580 int rockchip_show_logo(void) 1581 { 1582 struct display_state *s; 1583 struct display_state *ms = NULL; 1584 int ret = 0; 1585 int count = 0; 1586 1587 list_for_each_entry(s, &rockchip_display_list, head) { 1588 s->logo.mode = s->logo_mode; 1589 s->logo.rotate = s->logo_rotate; 1590 if (load_bmp_logo(&s->logo, s->ulogo_name)) { 1591 printf("failed to display uboot logo\n"); 1592 } else { 1593 ret = display_logo(s); 1594 if (ret == -EAGAIN) 1595 ms = s; 1596 } 1597 /* Load kernel bmp in rockchip_display_fixup() later */ 1598 } 1599 1600 /* 1601 * For rk3566, the mirror win must be enabled after the related 1602 * source win. If error code is EAGAIN, the mirror win may be 1603 * first enabled unexpectedly, and we will move the enabling process 1604 * as follows. 1605 */ 1606 if (ms) { 1607 while (count < 5) { 1608 ret = display_logo(ms); 1609 if (ret != -EAGAIN) 1610 break; 1611 mdelay(10); 1612 count++; 1613 } 1614 } 1615 1616 return ret; 1617 } 1618 1619 int rockchip_vop_dump(const char *cmd) 1620 { 1621 struct display_state *state; 1622 struct crtc_state *crtc_state; 1623 struct rockchip_crtc *crtc; 1624 const struct rockchip_crtc_funcs *crtc_funcs; 1625 int ret = -EINVAL; 1626 1627 list_for_each_entry(state, &rockchip_display_list, head) { 1628 if (!state->is_init) 1629 continue; 1630 crtc_state = &state->crtc_state; 1631 crtc = crtc_state->crtc; 1632 crtc_funcs = crtc->funcs; 1633 1634 if (!cmd) 1635 ret = crtc_funcs->active_regs_dump(state); 1636 else if (!strcmp(cmd, "a") || !strcmp(cmd, "all")) 1637 ret = crtc_funcs->regs_dump(state); 1638 if (!ret) 1639 break; 1640 } 1641 1642 if (ret) 1643 ret = CMD_RET_USAGE; 1644 1645 return ret; 1646 } 1647 1648 enum { 1649 PORT_DIR_IN, 1650 PORT_DIR_OUT, 1651 }; 1652 1653 const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1654 { 1655 ofnode ports, port; 1656 u32 reg; 1657 1658 ports = ofnode_find_subnode(node, "ports"); 1659 if (!ofnode_valid(ports)) 1660 return NULL; 1661 1662 ofnode_for_each_subnode(port, ports) { 1663 if (ofnode_read_u32(port, "reg", ®)) 1664 continue; 1665 1666 if (reg == id) 1667 break; 1668 } 1669 1670 if (reg == id) 1671 return ofnode_to_np(port); 1672 1673 return NULL; 1674 } 1675 1676 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1677 { 1678 ofnode parent; 1679 int is_ports_node; 1680 1681 parent = ofnode_get_parent(port); 1682 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1683 if (is_ports_node) 1684 parent = ofnode_get_parent(parent); 1685 1686 return ofnode_to_np(parent); 1687 } 1688 1689 const struct device_node * 1690 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint) 1691 { 1692 const struct device_node *port_node; 1693 ofnode ep; 1694 u32 reg; 1695 1696 port_node = rockchip_of_graph_get_port_by_id(node, port); 1697 if (!port_node) 1698 return NULL; 1699 1700 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1701 if (ofnode_read_u32(ep, "reg", ®)) 1702 break; 1703 if (reg == endpoint) 1704 break; 1705 } 1706 1707 if (!ofnode_valid(ep)) 1708 return NULL; 1709 1710 return ofnode_to_np(ep); 1711 } 1712 1713 static const struct device_node * 1714 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint) 1715 { 1716 const struct device_node *ep_node; 1717 ofnode ep; 1718 uint phandle; 1719 1720 ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint); 1721 if (!ep_node) 1722 return NULL; 1723 1724 if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle)) 1725 return NULL; 1726 1727 ep = ofnode_get_by_phandle(phandle); 1728 if (!ofnode_valid(ep)) 1729 return NULL; 1730 1731 return ofnode_to_np(ep); 1732 } 1733 1734 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1735 { 1736 const struct device_node *ep_node, *panel_node; 1737 ofnode panel_ofnode, port; 1738 struct udevice *panel_dev; 1739 int ret = 0; 1740 1741 *panel = NULL; 1742 panel_ofnode = dev_read_subnode(dev, "panel"); 1743 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1744 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1745 &panel_dev); 1746 if (!ret) 1747 goto found; 1748 } 1749 1750 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1751 if (!ep_node) 1752 return -ENODEV; 1753 1754 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1755 if (!ofnode_valid(port)) 1756 return -ENODEV; 1757 1758 panel_node = rockchip_of_graph_get_port_parent(port); 1759 if (!panel_node) 1760 return -ENODEV; 1761 1762 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1763 if (!ret) 1764 goto found; 1765 1766 return -ENODEV; 1767 1768 found: 1769 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1770 return 0; 1771 } 1772 1773 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1774 { 1775 const struct device_node *ep_node, *bridge_node; 1776 ofnode port; 1777 struct udevice *bridge_dev; 1778 int ret = 0; 1779 1780 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1781 if (!ep_node) 1782 return -ENODEV; 1783 1784 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1785 if (!ofnode_valid(port)) 1786 return -ENODEV; 1787 1788 bridge_node = rockchip_of_graph_get_port_parent(port); 1789 if (!bridge_node) 1790 return -ENODEV; 1791 1792 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1793 &bridge_dev); 1794 if (!ret) 1795 goto found; 1796 1797 return -ENODEV; 1798 1799 found: 1800 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1801 return 0; 1802 } 1803 1804 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1805 struct rockchip_bridge **bridge) 1806 { 1807 int ret = 0; 1808 1809 if (*panel) 1810 return 0; 1811 1812 *panel = NULL; 1813 *bridge = NULL; 1814 1815 if (panel) { 1816 ret = rockchip_of_find_panel(dev, panel); 1817 if (!ret) 1818 return 0; 1819 } 1820 1821 if (ret) { 1822 ret = rockchip_of_find_bridge(dev, bridge); 1823 if (!ret) 1824 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1825 &(*bridge)->next_bridge); 1826 } 1827 1828 return ret; 1829 } 1830 1831 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1832 { 1833 struct udevice *phy_dev; 1834 int ret; 1835 1836 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1837 if (ret) 1838 return NULL; 1839 1840 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1841 } 1842 1843 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1844 { 1845 ofnode ep, port, ports, conn; 1846 uint phandle; 1847 struct udevice *dev; 1848 int ret; 1849 1850 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1851 return NULL; 1852 1853 ep = ofnode_get_by_phandle(phandle); 1854 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1855 return NULL; 1856 1857 port = ofnode_get_parent(ep); 1858 if (!ofnode_valid(port)) 1859 return NULL; 1860 1861 ports = ofnode_get_parent(port); 1862 if (!ofnode_valid(ports)) 1863 return NULL; 1864 1865 conn = ofnode_get_parent(ports); 1866 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1867 return NULL; 1868 1869 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1870 if (ret) 1871 return NULL; 1872 1873 return dev; 1874 } 1875 1876 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1877 { 1878 struct rockchip_connector *conn; 1879 struct udevice *dev; 1880 int ret; 1881 1882 dev = rockchip_of_find_connector_device(endpoint); 1883 if (!dev) { 1884 printf("Warn: can't find connect driver\n"); 1885 return NULL; 1886 } 1887 1888 conn = get_rockchip_connector_by_device(dev); 1889 if (!conn) 1890 return NULL; 1891 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1892 if (ret) 1893 debug("Warn: no find panel or bridge\n"); 1894 1895 conn->phy = rockchip_of_find_phy(dev); 1896 1897 return conn; 1898 } 1899 1900 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1901 { 1902 char *conn_name; 1903 struct device_node *split_node; 1904 struct udevice *split_dev; 1905 struct rockchip_connector *split_conn; 1906 int ret; 1907 1908 conn->split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1909 conn->dual_channel_mode = ofnode_read_bool(conn->dev->node, "dual-channel"); 1910 if (!conn->split_mode && !conn->dual_channel_mode) 1911 return NULL; 1912 1913 switch (conn->type) { 1914 case DRM_MODE_CONNECTOR_DisplayPort: 1915 conn_name = "dp"; 1916 break; 1917 case DRM_MODE_CONNECTOR_eDP: 1918 conn_name = "edp"; 1919 break; 1920 case DRM_MODE_CONNECTOR_HDMIA: 1921 conn_name = "hdmi"; 1922 break; 1923 case DRM_MODE_CONNECTOR_LVDS: 1924 conn_name = "lvds"; 1925 break; 1926 default: 1927 return NULL; 1928 } 1929 1930 split_node = of_alias_get_dev(conn_name, !conn->id); 1931 if (!split_node || !of_device_is_available(split_node)) 1932 return NULL; 1933 1934 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1935 if (ret) 1936 return NULL; 1937 1938 split_conn = get_rockchip_connector_by_device(split_dev); 1939 if (!split_conn) 1940 return NULL; 1941 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1942 if (ret) 1943 debug("Warn: no find panel or bridge\n"); 1944 1945 split_conn->phy = rockchip_of_find_phy(split_dev); 1946 split_conn->split_mode = conn->split_mode; 1947 split_conn->dual_channel_mode = conn->dual_channel_mode; 1948 1949 return split_conn; 1950 } 1951 1952 static bool rockchip_get_display_path_status(ofnode endpoint) 1953 { 1954 ofnode ep; 1955 uint phandle; 1956 1957 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1958 return false; 1959 1960 ep = ofnode_get_by_phandle(phandle); 1961 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1962 return false; 1963 1964 return true; 1965 } 1966 1967 #if defined(CONFIG_ROCKCHIP_RK3568) 1968 static int rockchip_display_fixup_dts(void *blob) 1969 { 1970 ofnode route_node, route_subnode, conn_ep, conn_port; 1971 const struct device_node *route_sub_devnode; 1972 const struct device_node *ep_node, *conn_ep_dev_node; 1973 u32 phandle; 1974 int conn_ep_offset; 1975 const char *route_sub_path, *path; 1976 1977 /* Don't go further if new variant after 1978 * reading PMUGRF_SOC_CON15 1979 */ 1980 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1981 return 0; 1982 1983 route_node = ofnode_path("/display-subsystem/route"); 1984 if (!ofnode_valid(route_node)) 1985 return -EINVAL; 1986 1987 ofnode_for_each_subnode(route_subnode, route_node) { 1988 if (!ofnode_is_available(route_subnode)) 1989 continue; 1990 1991 route_sub_devnode = ofnode_to_np(route_subnode); 1992 route_sub_path = route_sub_devnode->full_name; 1993 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1994 !strstr(ofnode_get_name(route_subnode), "edp")) 1995 return 0; 1996 1997 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1998 if (phandle < 0) { 1999 printf("Warn: can't find connect node's handle\n"); 2000 continue; 2001 } 2002 2003 ep_node = of_find_node_by_phandle(phandle); 2004 if (!ofnode_valid(np_to_ofnode(ep_node))) { 2005 printf("Warn: can't find endpoint node from phandle\n"); 2006 continue; 2007 } 2008 2009 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 2010 conn_ep = ofnode_get_by_phandle(phandle); 2011 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 2012 return -ENODEV; 2013 2014 conn_port = ofnode_get_parent(conn_ep); 2015 if (!ofnode_valid(conn_port)) 2016 return -ENODEV; 2017 2018 ofnode_for_each_subnode(conn_ep, conn_port) { 2019 conn_ep_dev_node = ofnode_to_np(conn_ep); 2020 path = conn_ep_dev_node->full_name; 2021 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 2022 conn_ep_offset = fdt_path_offset(blob, path); 2023 2024 if (!ofnode_is_available(conn_ep) && 2025 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 2026 do_fixup_by_path_u32(blob, route_sub_path, 2027 "connect", phandle, 1); 2028 fdt_status_okay(blob, conn_ep_offset); 2029 2030 } else if (ofnode_is_available(conn_ep) && 2031 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 2032 fdt_status_disabled(blob, conn_ep_offset); 2033 } 2034 } 2035 } 2036 2037 return 0; 2038 } 2039 #endif 2040 2041 static int rockchip_display_probe(struct udevice *dev) 2042 { 2043 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 2044 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2045 const void *blob = gd->fdt_blob; 2046 int phandle; 2047 struct udevice *crtc_dev; 2048 struct rockchip_crtc *crtc; 2049 struct rockchip_connector *conn, *split_conn; 2050 struct display_state *s; 2051 const char *name; 2052 int ret; 2053 ofnode node, route_node, timing_node; 2054 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 2055 struct public_phy_data *data; 2056 bool is_ports_node = false; 2057 2058 #if defined(CONFIG_ROCKCHIP_RK3568) 2059 rockchip_display_fixup_dts((void *)blob); 2060 #endif 2061 /* Before relocation we don't need to do anything */ 2062 if (!(gd->flags & GD_FLG_RELOC)) 2063 return 0; 2064 2065 data = malloc(sizeof(struct public_phy_data)); 2066 if (!data) { 2067 printf("failed to alloc phy data\n"); 2068 return -ENOMEM; 2069 } 2070 data->phy_init = false; 2071 2072 init_display_buffer(plat->base); 2073 2074 route_node = dev_read_subnode(dev, "route"); 2075 if (!ofnode_valid(route_node)) 2076 return -ENODEV; 2077 2078 ofnode_for_each_subnode(node, route_node) { 2079 if (!ofnode_is_available(node)) 2080 continue; 2081 phandle = ofnode_read_u32_default(node, "connect", -1); 2082 if (phandle < 0) { 2083 printf("Warn: can't find connect node's handle\n"); 2084 continue; 2085 } 2086 ep_node = of_find_node_by_phandle(phandle); 2087 if (!ofnode_valid(np_to_ofnode(ep_node))) { 2088 printf("Warn: can't find endpoint node from phandle\n"); 2089 continue; 2090 } 2091 port_node = of_get_parent(ep_node); 2092 if (!ofnode_valid(np_to_ofnode(port_node))) { 2093 printf("Warn: can't find port node from phandle\n"); 2094 continue; 2095 } 2096 2097 port_parent_node = of_get_parent(port_node); 2098 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 2099 printf("Warn: can't find port parent node from phandle\n"); 2100 continue; 2101 } 2102 2103 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 2104 if (is_ports_node) { 2105 vop_node = of_get_parent(port_parent_node); 2106 if (!ofnode_valid(np_to_ofnode(vop_node))) { 2107 printf("Warn: can't find crtc node from phandle\n"); 2108 continue; 2109 } 2110 } else { 2111 vop_node = port_parent_node; 2112 } 2113 2114 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 2115 np_to_ofnode(vop_node), 2116 &crtc_dev); 2117 if (ret) { 2118 printf("Warn: can't find crtc driver %d\n", ret); 2119 continue; 2120 } 2121 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 2122 2123 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 2124 if (!conn) { 2125 printf("Warn: can't get connect driver\n"); 2126 continue; 2127 } 2128 split_conn = rockchip_get_split_connector(conn); 2129 2130 s = malloc(sizeof(*s)); 2131 if (!s) 2132 continue; 2133 2134 memset(s, 0, sizeof(*s)); 2135 2136 INIT_LIST_HEAD(&s->head); 2137 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 2138 if (!ret) 2139 memcpy(s->ulogo_name, name, strlen(name)); 2140 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 2141 if (!ret) 2142 memcpy(s->klogo_name, name, strlen(name)); 2143 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 2144 if (!strcmp(name, "fullscreen")) 2145 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2146 else 2147 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 2148 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 2149 if (!strcmp(name, "fullscreen")) 2150 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2151 else 2152 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 2153 2154 s->logo_rotate = ofnode_read_u32_default(node, "logo,rotate", 0); 2155 2156 s->force_output = ofnode_read_bool(node, "force-output"); 2157 2158 if (s->force_output) { 2159 timing_node = ofnode_find_subnode(node, "force_timing"); 2160 ret = display_get_force_timing_from_dts(timing_node, 2161 &s->force_mode, 2162 &s->conn_state.bus_flags); 2163 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 2164 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 2165 } 2166 2167 s->blob = blob; 2168 s->conn_state.connector = conn; 2169 s->conn_state.secondary = NULL; 2170 s->conn_state.type = conn->type; 2171 if (split_conn) { 2172 s->conn_state.secondary = split_conn; 2173 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 2174 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 2175 } 2176 s->conn_state.overscan.left_margin = 100; 2177 s->conn_state.overscan.right_margin = 100; 2178 s->conn_state.overscan.top_margin = 100; 2179 s->conn_state.overscan.bottom_margin = 100; 2180 s->crtc_state.node = np_to_ofnode(vop_node); 2181 s->crtc_state.port_node = port_node; 2182 s->crtc_state.dev = crtc_dev; 2183 s->crtc_state.crtc = crtc; 2184 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 2185 s->node = node; 2186 2187 if (is_ports_node) { /* only vop2 will get into here */ 2188 ofnode vp_node = np_to_ofnode(port_node); 2189 static bool get_plane_mask_from_dts; 2190 2191 s->crtc_state.ports_node = port_parent_node; 2192 if (!get_plane_mask_from_dts) { 2193 ofnode vp_sub_node; 2194 int vp_id = 0; 2195 bool vp_enable = false; 2196 2197 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 2198 int cursor_plane = -1; 2199 2200 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 2201 2202 s->crtc_state.crtc->vps[vp_id].xmirror_en = 2203 ofnode_read_bool(vp_node, "xmirror-enable"); 2204 2205 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 2206 2207 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2208 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2209 if (ret) { 2210 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2211 s->crtc_state.crtc->assign_plane |= true; 2212 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2213 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX); 2214 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2215 vp_id, 2216 s->crtc_state.crtc->vps[vp_id].plane_mask, 2217 s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 : 2218 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2219 cursor_plane); 2220 } 2221 2222 /* To check current vp status */ 2223 vp_enable = false; 2224 ofnode_for_each_subnode(vp_sub_node, vp_node) 2225 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2226 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2227 } 2228 get_plane_mask_from_dts = true; 2229 } 2230 } 2231 2232 get_crtc_mcu_mode(&s->crtc_state, port_node, is_ports_node); 2233 2234 ret = ofnode_read_u32_default(s->crtc_state.node, 2235 "rockchip,dual-channel-swap", 0); 2236 s->crtc_state.dual_channel_swap = ret; 2237 2238 if (connector_phy_init(conn, data)) { 2239 printf("Warn: Failed to init phy drivers\n"); 2240 free(s); 2241 continue; 2242 } 2243 list_add_tail(&s->head, &rockchip_display_list); 2244 } 2245 2246 if (list_empty(&rockchip_display_list)) { 2247 debug("Failed to found available display route\n"); 2248 return -ENODEV; 2249 } 2250 rockchip_get_baseparameter(); 2251 display_pre_init(); 2252 2253 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2254 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2255 uc_priv->bpix = VIDEO_BPP32; 2256 2257 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2258 rockchip_show_fbbase(plat->base); 2259 video_set_flush_dcache(dev, true); 2260 #endif 2261 2262 return 0; 2263 } 2264 2265 void rockchip_display_fixup(void *blob) 2266 { 2267 const struct rockchip_connector_funcs *conn_funcs; 2268 const struct rockchip_crtc_funcs *crtc_funcs; 2269 struct rockchip_connector *conn; 2270 const struct rockchip_crtc *crtc; 2271 struct display_state *s; 2272 int offset; 2273 int ret; 2274 const struct device_node *np; 2275 const char *path; 2276 const char *cacm_header; 2277 u64 aligned_memory_size; 2278 2279 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2280 list_for_each_entry(s, &rockchip_display_list, head) { 2281 ret = load_bmp_logo(&s->logo, s->klogo_name); 2282 if (ret < 0) { 2283 s->is_klogo_valid = false; 2284 printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id); 2285 } else { 2286 s->is_klogo_valid = true; 2287 } 2288 } 2289 2290 if (!get_display_size()) 2291 return; 2292 2293 aligned_memory_size = (u64)ALIGN(get_display_size(), align_size); 2294 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2295 (u64)memory_start, 2296 aligned_memory_size); 2297 if (offset < 0) 2298 printf("failed to reserve drm-loader-logo memory\n"); 2299 2300 if (get_cubic_memory_size()) { 2301 aligned_memory_size = (u64)ALIGN(get_cubic_memory_size(), align_size); 2302 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2303 (u64)cubic_lut_memory_start, 2304 aligned_memory_size); 2305 if (offset < 0) 2306 printf("failed to reserve drm-cubic-lut memory\n"); 2307 } 2308 } else { 2309 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2310 /* Compatible with rkfb display, only need reserve memory */ 2311 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2312 (u64)memory_start, 2313 MEMORY_POOL_SIZE); 2314 if (offset < 0) 2315 printf("failed to reserve fb-loader-logo memory\n"); 2316 else 2317 list_for_each_entry(s, &rockchip_display_list, head) 2318 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2319 return; 2320 } 2321 2322 list_for_each_entry(s, &rockchip_display_list, head) { 2323 /* 2324 * If plane mask is not set in dts, fixup dts to assign it 2325 * whether crtc is initialized or not. 2326 */ 2327 if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane) 2328 s->crtc_state.crtc->funcs->fixup_dts(s, blob); 2329 2330 if (!s->is_init || !s->is_klogo_valid) 2331 continue; 2332 2333 conn = s->conn_state.connector; 2334 if (!conn) 2335 continue; 2336 conn_funcs = conn->funcs; 2337 if (!conn_funcs) { 2338 printf("failed to get exist connector\n"); 2339 continue; 2340 } 2341 2342 crtc = s->crtc_state.crtc; 2343 if (!crtc) 2344 continue; 2345 2346 crtc_funcs = crtc->funcs; 2347 if (!crtc_funcs) { 2348 printf("failed to get exist crtc\n"); 2349 continue; 2350 } 2351 2352 np = ofnode_to_np(s->node); 2353 path = np->full_name; 2354 fdt_increase_size(blob, 0x400); 2355 #define FDT_SET_U32(name, val) \ 2356 do_fixup_by_path_u32(blob, path, name, val, 1); 2357 2358 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2359 - memory_start; 2360 FDT_SET_U32("logo,offset", offset); 2361 FDT_SET_U32("logo,width", s->logo.width); 2362 FDT_SET_U32("logo,height", s->logo.height); 2363 FDT_SET_U32("logo,bpp", s->logo.bpp); 2364 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2365 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2366 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2367 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2368 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2369 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2370 FDT_SET_U32("video,vrefresh", 2371 drm_mode_vrefresh(&s->conn_state.mode)); 2372 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2373 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2374 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2375 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2376 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2377 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2378 2379 if (s->conn_state.disp_info) { 2380 cacm_header = (const char*)&s->conn_state.disp_info->cacm_header; 2381 2382 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2383 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2384 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2385 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2386 2387 if (!strncasecmp(cacm_header, "CACM", 4)) { 2388 FDT_SET_U32("post-csc,hue", 2389 s->conn_state.disp_info->csc_info.hue); 2390 FDT_SET_U32("post-csc,saturation", 2391 s->conn_state.disp_info->csc_info.saturation); 2392 FDT_SET_U32("post-csc,contrast", 2393 s->conn_state.disp_info->csc_info.contrast); 2394 FDT_SET_U32("post-csc,brightness", 2395 s->conn_state.disp_info->csc_info.brightness); 2396 FDT_SET_U32("post-csc,r-gain", 2397 s->conn_state.disp_info->csc_info.r_gain); 2398 FDT_SET_U32("post-csc,g-gain", 2399 s->conn_state.disp_info->csc_info.g_gain); 2400 FDT_SET_U32("post-csc,b-gain", 2401 s->conn_state.disp_info->csc_info.b_gain); 2402 FDT_SET_U32("post-csc,r-offset", 2403 s->conn_state.disp_info->csc_info.r_offset); 2404 FDT_SET_U32("post-csc,g-offset", 2405 s->conn_state.disp_info->csc_info.g_offset); 2406 FDT_SET_U32("post-csc,b-offset", 2407 s->conn_state.disp_info->csc_info.b_offset); 2408 FDT_SET_U32("post-csc,enable", 2409 s->conn_state.disp_info->csc_info.csc_enable); 2410 } 2411 } 2412 2413 if (s->conn_state.disp_info->cubic_lut_data.size && 2414 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2415 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2416 2417 #undef FDT_SET_U32 2418 } 2419 } 2420 2421 int rockchip_display_bind(struct udevice *dev) 2422 { 2423 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2424 2425 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2426 2427 return 0; 2428 } 2429 2430 static const struct udevice_id rockchip_display_ids[] = { 2431 { .compatible = "rockchip,display-subsystem" }, 2432 { } 2433 }; 2434 2435 U_BOOT_DRIVER(rockchip_display) = { 2436 .name = "rockchip_display", 2437 .id = UCLASS_VIDEO, 2438 .of_match = rockchip_display_ids, 2439 .bind = rockchip_display_bind, 2440 .probe = rockchip_display_probe, 2441 }; 2442 2443 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2444 char *const argv[]) 2445 { 2446 if (argc != 1) 2447 return CMD_RET_USAGE; 2448 2449 rockchip_show_logo(); 2450 2451 return 0; 2452 } 2453 2454 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2455 char *const argv[]) 2456 { 2457 if (argc != 2) 2458 return CMD_RET_USAGE; 2459 2460 rockchip_show_bmp(argv[1]); 2461 2462 return 0; 2463 } 2464 2465 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc, 2466 char *const argv[]) 2467 { 2468 int ret; 2469 2470 if (argc < 1 || argc > 2) 2471 return CMD_RET_USAGE; 2472 2473 ret = rockchip_vop_dump(argv[1]); 2474 2475 return ret; 2476 } 2477 2478 U_BOOT_CMD( 2479 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2480 "load and display log from resource partition", 2481 NULL 2482 ); 2483 2484 U_BOOT_CMD( 2485 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2486 "load and display bmp from resource partition", 2487 " <bmp_name>" 2488 ); 2489 2490 U_BOOT_CMD( 2491 vop_dump, 2, 1, do_rockchip_vop_dump, 2492 "dump vop regs", 2493 " [a/all]" 2494 ); 2495