1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 27 #include "bmp_helper.h" 28 #include "rockchip_display.h" 29 #include "rockchip_crtc.h" 30 #include "rockchip_connector.h" 31 #include "rockchip_bridge.h" 32 #include "rockchip_phy.h" 33 #include "rockchip_panel.h" 34 #include <dm.h> 35 #include <dm/of_access.h> 36 #include <dm/ofnode.h> 37 #include <asm/io.h> 38 39 #define DRIVER_VERSION "v1.0.1" 40 41 /*********************************************************************** 42 * Rockchip UBOOT DRM driver version 43 * 44 * v1.0.0 : add basic version for rockchip drm driver(hjc) 45 * v1.0.1 : add much dsi update(hjc) 46 * 47 **********************************************************************/ 48 49 #define RK_BLK_SIZE 512 50 #define BMP_PROCESSED_FLAG 8399 51 52 DECLARE_GLOBAL_DATA_PTR; 53 static LIST_HEAD(rockchip_display_list); 54 static LIST_HEAD(logo_cache_list); 55 56 static unsigned long memory_start; 57 static unsigned long cubic_lut_memory_start; 58 static unsigned long memory_end; 59 static struct base2_info base_parameter; 60 static uint32_t crc32_table[256]; 61 62 /* 63 * the phy types are used by different connectors in public. 64 * The current version only has inno hdmi phy for hdmi and tve. 65 */ 66 enum public_use_phy { 67 NONE, 68 INNO_HDMI_PHY 69 }; 70 71 /* save public phy data */ 72 struct public_phy_data { 73 const struct rockchip_phy *phy_drv; 74 int phy_node; 75 int public_phy_type; 76 bool phy_init; 77 }; 78 79 void rockchip_display_make_crc32_table(void) 80 { 81 uint32_t c; 82 int n, k; 83 unsigned long poly; /* polynomial exclusive-or pattern */ 84 /* terms of polynomial defining this crc (except x^32): */ 85 static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 86 87 /* make exclusive-or pattern from polynomial (0xedb88320L) */ 88 poly = 0L; 89 for (n = 0; n < sizeof(p) / sizeof(char); n++) 90 poly |= 1L << (31 - p[n]); 91 92 for (n = 0; n < 256; n++) { 93 c = (unsigned long)n; 94 for (k = 0; k < 8; k++) 95 c = c & 1 ? poly ^ (c >> 1) : c >> 1; 96 crc32_table[n] = cpu_to_le32(c); 97 } 98 } 99 100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 101 { 102 int i; 103 uint32_t crc; 104 crc = 0xFFFFFFFF; 105 106 for (i = 0; i < length; i++) { 107 crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 108 data++; 109 } 110 111 return crc ^ 0xffffffff; 112 } 113 114 int rockchip_get_baseparameter(void) 115 { 116 struct blk_desc *dev_desc; 117 disk_partition_t part_info; 118 int block_num = 2048; 119 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 120 int ret = 0; 121 122 dev_desc = rockchip_get_bootdev(); 123 if (!dev_desc) { 124 printf("%s: Could not find device\n", __func__); 125 return -ENOENT; 126 } 127 128 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 129 printf("Could not find baseparameter partition\n"); 130 return -ENOENT; 131 } 132 133 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 134 if (ret < 0) { 135 printf("read baseparameter failed\n"); 136 return ret; 137 } 138 139 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 140 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 141 printf("warning: bad baseparameter\n"); 142 memset(&base_parameter, 0, sizeof(base_parameter)); 143 } 144 rockchip_display_make_crc32_table(); 145 146 return ret; 147 } 148 149 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 150 { 151 struct base2_disp_info *disp_info; 152 struct base2_disp_header *disp_header; 153 int i = 0, offset = -1; 154 u32 crc_val; 155 u32 base2_length; 156 void *base_parameter_addr = (void *)&base_parameter; 157 158 for (i = 0; i < 8; i++) { 159 disp_header = &base_parameter.disp_header[i]; 160 if (disp_header->connector_type == type && 161 disp_header->connector_id == id) { 162 printf("disp info %d, type:%d, id:%d\n", i, type, id); 163 offset = disp_header->offset; 164 break; 165 } 166 } 167 168 if (offset < 0) 169 return NULL; 170 disp_info = base_parameter_addr + offset; 171 if (disp_info->screen_info[0].type != type || 172 disp_info->screen_info[0].id != id) { 173 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 174 disp_info->screen_info[0].type, 175 disp_info->screen_info[0].id); 176 return NULL; 177 } 178 179 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 180 return NULL; 181 182 if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) { 183 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, 184 sizeof(struct base2_disp_info) - 4); 185 if (crc_val != disp_info->crc2) { 186 printf("error: connector type[%d], id[%d] disp info crc2 check error\n", 187 type, id); 188 return NULL; 189 } 190 } else { 191 base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) - 192 sizeof(struct acm_data) - 10 * 1024 - 4; 193 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4); 194 if (crc_val != disp_info->crc) { 195 printf("error: connector type[%d], id[%d] disp info crc check error\n", 196 type, id); 197 return NULL; 198 } 199 } 200 201 return disp_info; 202 } 203 204 /* check which kind of public phy does connector use */ 205 static int check_public_use_phy(struct rockchip_connector *conn) 206 { 207 int ret = NONE; 208 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 209 210 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 211 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 212 ret = INNO_HDMI_PHY; 213 #endif 214 215 return ret; 216 } 217 218 /* 219 * get public phy driver and initialize it. 220 * The current version only has inno hdmi phy for hdmi and tve. 221 */ 222 static int get_public_phy(struct rockchip_connector *conn, 223 struct public_phy_data *data) 224 { 225 struct rockchip_phy *phy; 226 struct udevice *dev; 227 int ret = 0; 228 229 switch (data->public_phy_type) { 230 case INNO_HDMI_PHY: 231 #if defined(CONFIG_ROCKCHIP_RK3328) 232 ret = uclass_get_device_by_name(UCLASS_PHY, 233 "hdmiphy@ff430000", &dev); 234 #elif defined(CONFIG_ROCKCHIP_RK322X) 235 ret = uclass_get_device_by_name(UCLASS_PHY, 236 "hdmi-phy@12030000", &dev); 237 #else 238 ret = -EINVAL; 239 #endif 240 if (ret) { 241 printf("Warn: can't find phy driver\n"); 242 return 0; 243 } 244 245 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 246 if (!phy) { 247 printf("failed to get phy driver\n"); 248 return 0; 249 } 250 251 ret = rockchip_phy_init(phy); 252 if (ret) { 253 printf("failed to init phy driver\n"); 254 return ret; 255 } 256 conn->phy = phy; 257 258 debug("inno hdmi phy init success, save it\n"); 259 data->phy_drv = conn->phy; 260 data->phy_init = true; 261 return 0; 262 default: 263 return -EINVAL; 264 } 265 } 266 267 static void init_display_buffer(ulong base) 268 { 269 memory_start = base + DRM_ROCKCHIP_FB_SIZE; 270 memory_end = memory_start; 271 cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 272 } 273 274 void *get_display_buffer(int size) 275 { 276 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 277 void *buf; 278 279 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 280 printf("failed to alloc %dbyte memory to display\n", size); 281 return NULL; 282 } 283 buf = (void *)roundup_memory; 284 285 memory_end = roundup_memory + size; 286 287 return buf; 288 } 289 290 static unsigned long get_display_size(void) 291 { 292 return memory_end - memory_start; 293 } 294 295 static unsigned long get_single_cubic_lut_size(void) 296 { 297 ulong cubic_lut_size; 298 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 299 300 /* This is depend on IC designed */ 301 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 302 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 303 304 return cubic_lut_size; 305 } 306 307 static unsigned long get_cubic_lut_offset(int crtc_id) 308 { 309 return crtc_id * get_single_cubic_lut_size(); 310 } 311 312 unsigned long get_cubic_lut_buffer(int crtc_id) 313 { 314 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 315 } 316 317 static unsigned long get_cubic_memory_size(void) 318 { 319 /* Max support 4 cubic lut */ 320 return get_single_cubic_lut_size() * 4; 321 } 322 323 bool can_direct_logo(int bpp) 324 { 325 return bpp == 16 || bpp == 32; 326 } 327 328 static int connector_phy_init(struct rockchip_connector *conn, 329 struct public_phy_data *data) 330 { 331 int type; 332 333 /* does this connector use public phy with others */ 334 type = check_public_use_phy(conn); 335 if (type == INNO_HDMI_PHY) { 336 /* there is no public phy was initialized */ 337 if (!data->phy_init) { 338 debug("start get public phy\n"); 339 data->public_phy_type = type; 340 if (get_public_phy(conn, data)) { 341 printf("can't find correct public phy type\n"); 342 free(data); 343 return -EINVAL; 344 } 345 return 0; 346 } 347 348 /* if this phy has been initialized, get it directly */ 349 conn->phy = (struct rockchip_phy *)data->phy_drv; 350 return 0; 351 } 352 353 return 0; 354 } 355 356 int drm_mode_vrefresh(const struct drm_display_mode *mode) 357 { 358 int refresh = 0; 359 unsigned int calc_val; 360 361 if (mode->vrefresh > 0) { 362 refresh = mode->vrefresh; 363 } else if (mode->htotal > 0 && mode->vtotal > 0) { 364 int vtotal; 365 366 vtotal = mode->vtotal; 367 /* work out vrefresh the value will be x1000 */ 368 calc_val = (mode->clock * 1000); 369 calc_val /= mode->htotal; 370 refresh = (calc_val + vtotal / 2) / vtotal; 371 372 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 373 refresh *= 2; 374 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 375 refresh /= 2; 376 if (mode->vscan > 1) 377 refresh /= mode->vscan; 378 } 379 return refresh; 380 } 381 382 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode) 383 { 384 int hactive, vactive, pixelclock; 385 int hfront_porch, hback_porch, hsync_len; 386 int vfront_porch, vback_porch, vsync_len; 387 int val, flags = 0; 388 389 #define FDT_GET_INT(val, name) \ 390 val = ofnode_read_s32_default(node, name, -1); \ 391 if (val < 0) { \ 392 printf("Can't get %s\n", name); \ 393 return -ENXIO; \ 394 } 395 396 #define FDT_GET_INT_DEFAULT(val, name, default) \ 397 val = ofnode_read_s32_default(node, name, default); 398 399 FDT_GET_INT(hactive, "hactive"); 400 FDT_GET_INT(vactive, "vactive"); 401 FDT_GET_INT(pixelclock, "clock-frequency"); 402 FDT_GET_INT(hsync_len, "hsync-len"); 403 FDT_GET_INT(hfront_porch, "hfront-porch"); 404 FDT_GET_INT(hback_porch, "hback-porch"); 405 FDT_GET_INT(vsync_len, "vsync-len"); 406 FDT_GET_INT(vfront_porch, "vfront-porch"); 407 FDT_GET_INT(vback_porch, "vback-porch"); 408 FDT_GET_INT(val, "hsync-active"); 409 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 410 FDT_GET_INT(val, "vsync-active"); 411 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 412 FDT_GET_INT(val, "pixelclk-active"); 413 flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 414 415 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 416 if (val == DRM_MODE_FLAG_XMIRROR) { 417 flags |= DRM_MODE_FLAG_XMIRROR; 418 } else if (val == DRM_MODE_FLAG_YMIRROR) { 419 flags |= DRM_MODE_FLAG_YMIRROR; 420 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 421 flags |= DRM_MODE_FLAG_XMIRROR; 422 flags |= DRM_MODE_FLAG_YMIRROR; 423 } 424 mode->hdisplay = hactive; 425 mode->hsync_start = mode->hdisplay + hfront_porch; 426 mode->hsync_end = mode->hsync_start + hsync_len; 427 mode->htotal = mode->hsync_end + hback_porch; 428 429 mode->vdisplay = vactive; 430 mode->vsync_start = mode->vdisplay + vfront_porch; 431 mode->vsync_end = mode->vsync_start + vsync_len; 432 mode->vtotal = mode->vsync_end + vback_porch; 433 434 mode->clock = pixelclock / 1000; 435 mode->flags = flags; 436 mode->vrefresh = drm_mode_vrefresh(mode); 437 438 return 0; 439 } 440 441 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 442 { 443 int ret = 0; 444 445 ret = rockchip_ofnode_get_display_mode(node, mode); 446 447 if (ret) { 448 mode->clock = 74250; 449 mode->flags = 0x5; 450 mode->hdisplay = 1280; 451 mode->hsync_start = 1390; 452 mode->hsync_end = 1430; 453 mode->htotal = 1650; 454 mode->hskew = 0; 455 mode->vdisplay = 720; 456 mode->vsync_start = 725; 457 mode->vsync_end = 730; 458 mode->vtotal = 750; 459 mode->vrefresh = 60; 460 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 461 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 462 } 463 464 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 465 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 466 mode->vscan); 467 468 return 0; 469 } 470 471 static int display_get_timing_from_dts(struct rockchip_panel *panel, 472 struct drm_display_mode *mode) 473 { 474 struct ofnode_phandle_args args; 475 ofnode dt, timing; 476 int ret; 477 478 dt = dev_read_subnode(panel->dev, "display-timings"); 479 if (ofnode_valid(dt)) { 480 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 481 0, 0, &args); 482 if (ret) 483 return ret; 484 485 timing = args.node; 486 } else { 487 timing = dev_read_subnode(panel->dev, "panel-timing"); 488 } 489 490 if (!ofnode_valid(timing)) { 491 printf("failed to get display timings from DT\n"); 492 return -ENXIO; 493 } 494 495 rockchip_ofnode_get_display_mode(timing, mode); 496 497 return 0; 498 } 499 500 /** 501 * drm_mode_max_resolution_filter - mark modes out of vop max resolution 502 * @edid_data: structure store mode list 503 * @max_output: vop max output resolution 504 */ 505 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 506 struct vop_rect *max_output) 507 { 508 int i; 509 510 for (i = 0; i < edid_data->modes; i++) { 511 if (edid_data->mode_buf[i].hdisplay > max_output->width || 512 edid_data->mode_buf[i].vdisplay > max_output->height) 513 edid_data->mode_buf[i].invalid = true; 514 } 515 } 516 517 /** 518 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 519 * @p: mode 520 * @adjust_flags: a combination of adjustment flags 521 * 522 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 523 * 524 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 525 * interlaced modes. 526 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 527 * buffers containing two eyes (only adjust the timings when needed, eg. for 528 * "frame packing" or "side by side full"). 529 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 530 * be performed for doublescan and vscan > 1 modes respectively. 531 */ 532 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 533 { 534 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 535 return; 536 537 if (p->flags & DRM_MODE_FLAG_DBLCLK) 538 p->crtc_clock = 2 * p->clock; 539 else 540 p->crtc_clock = p->clock; 541 p->crtc_hdisplay = p->hdisplay; 542 p->crtc_hsync_start = p->hsync_start; 543 p->crtc_hsync_end = p->hsync_end; 544 p->crtc_htotal = p->htotal; 545 p->crtc_hskew = p->hskew; 546 p->crtc_vdisplay = p->vdisplay; 547 p->crtc_vsync_start = p->vsync_start; 548 p->crtc_vsync_end = p->vsync_end; 549 p->crtc_vtotal = p->vtotal; 550 551 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 552 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 553 p->crtc_vdisplay /= 2; 554 p->crtc_vsync_start /= 2; 555 p->crtc_vsync_end /= 2; 556 p->crtc_vtotal /= 2; 557 } 558 } 559 560 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 561 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 562 p->crtc_vdisplay *= 2; 563 p->crtc_vsync_start *= 2; 564 p->crtc_vsync_end *= 2; 565 p->crtc_vtotal *= 2; 566 } 567 } 568 569 if (!(adjust_flags & CRTC_NO_VSCAN)) { 570 if (p->vscan > 1) { 571 p->crtc_vdisplay *= p->vscan; 572 p->crtc_vsync_start *= p->vscan; 573 p->crtc_vsync_end *= p->vscan; 574 p->crtc_vtotal *= p->vscan; 575 } 576 } 577 578 if (adjust_flags & CRTC_STEREO_DOUBLE) { 579 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 580 581 switch (layout) { 582 case DRM_MODE_FLAG_3D_FRAME_PACKING: 583 p->crtc_clock *= 2; 584 p->crtc_vdisplay += p->crtc_vtotal; 585 p->crtc_vsync_start += p->crtc_vtotal; 586 p->crtc_vsync_end += p->crtc_vtotal; 587 p->crtc_vtotal += p->crtc_vtotal; 588 break; 589 } 590 } 591 592 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 593 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 594 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 595 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 596 } 597 598 /** 599 * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 600 * output format 601 * 602 * @connector: drm connector under action. 603 * @mode: video mode to be tested. 604 * 605 * Returns: 606 * true if the mode can be supported in YCBCR420 format 607 * false if not. 608 */ 609 bool drm_mode_is_420_only(const struct drm_display_info *display, 610 struct drm_display_mode *mode) 611 { 612 u8 vic = drm_match_cea_mode(mode); 613 614 return test_bit(vic, display->hdmi.y420_vdb_modes); 615 } 616 617 /** 618 * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 619 * output format also (along with RGB/YCBCR444/422) 620 * 621 * @display: display under action. 622 * @mode: video mode to be tested. 623 * 624 * Returns: 625 * true if the mode can be support YCBCR420 format 626 * false if not. 627 */ 628 bool drm_mode_is_420_also(const struct drm_display_info *display, 629 struct drm_display_mode *mode) 630 { 631 u8 vic = drm_match_cea_mode(mode); 632 633 return test_bit(vic, display->hdmi.y420_cmdb_modes); 634 } 635 636 /** 637 * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 638 * output format 639 * 640 * @display: display under action. 641 * @mode: video mode to be tested. 642 * 643 * Returns: 644 * true if the mode can be supported in YCBCR420 format 645 * false if not. 646 */ 647 bool drm_mode_is_420(const struct drm_display_info *display, 648 struct drm_display_mode *mode) 649 { 650 return drm_mode_is_420_only(display, mode) || 651 drm_mode_is_420_also(display, mode); 652 } 653 654 static int display_get_timing(struct display_state *state) 655 { 656 struct connector_state *conn_state = &state->conn_state; 657 struct drm_display_mode *mode = &conn_state->mode; 658 const struct drm_display_mode *m; 659 struct rockchip_panel *panel = conn_state->connector->panel; 660 661 if (panel->funcs->get_mode) 662 return panel->funcs->get_mode(panel, mode); 663 664 if (dev_of_valid(panel->dev) && 665 !display_get_timing_from_dts(panel, mode)) { 666 printf("Using display timing dts\n"); 667 return 0; 668 } 669 670 if (panel->data) { 671 m = (const struct drm_display_mode *)panel->data; 672 memcpy(mode, m, sizeof(*m)); 673 printf("Using display timing from compatible panel driver\n"); 674 return 0; 675 } 676 677 return -ENODEV; 678 } 679 680 static int display_pre_init(void) 681 { 682 struct display_state *state; 683 int ret = 0; 684 685 list_for_each_entry(state, &rockchip_display_list, head) { 686 struct connector_state *conn_state = &state->conn_state; 687 struct crtc_state *crtc_state = &state->crtc_state; 688 struct rockchip_crtc *crtc = crtc_state->crtc; 689 690 ret = rockchip_connector_pre_init(state); 691 if (ret) 692 printf("pre init conn error\n"); 693 694 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 695 } 696 return ret; 697 } 698 699 static int display_use_force_mode(struct display_state *state) 700 { 701 struct connector_state *conn_state = &state->conn_state; 702 struct drm_display_mode *mode = &conn_state->mode; 703 704 conn_state->bpc = 8; 705 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 706 conn_state->bus_format = state->force_bus_format; 707 708 return 0; 709 } 710 711 static int display_get_edid_mode(struct display_state *state) 712 { 713 int ret = 0; 714 struct connector_state *conn_state = &state->conn_state; 715 struct drm_display_mode *mode = &conn_state->mode; 716 int bpc; 717 718 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 719 if (!ret) { 720 conn_state->bpc = bpc; 721 edid_print_info((void *)&conn_state->edid); 722 } else { 723 conn_state->bpc = 8; 724 mode->clock = 74250; 725 mode->flags = 0x5; 726 mode->hdisplay = 1280; 727 mode->hsync_start = 1390; 728 mode->hsync_end = 1430; 729 mode->htotal = 1650; 730 mode->hskew = 0; 731 mode->vdisplay = 720; 732 mode->vsync_start = 725; 733 mode->vsync_end = 730; 734 mode->vtotal = 750; 735 mode->vrefresh = 60; 736 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 737 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 738 739 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 740 state->conn_state.connector->dev->name); 741 } 742 743 return ret; 744 } 745 746 static int display_mode_valid(struct display_state *state) 747 { 748 struct connector_state *conn_state = &state->conn_state; 749 struct rockchip_connector *conn = conn_state->connector; 750 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 751 struct crtc_state *crtc_state = &state->crtc_state; 752 const struct rockchip_crtc *crtc = crtc_state->crtc; 753 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 754 int ret; 755 756 if (conn_funcs->mode_valid) { 757 ret = conn_funcs->mode_valid(conn, state); 758 if (ret) 759 return ret; 760 } 761 762 if (crtc_funcs->mode_valid) { 763 ret = crtc_funcs->mode_valid(state); 764 if (ret) 765 return ret; 766 } 767 768 return 0; 769 } 770 771 static int display_init(struct display_state *state) 772 { 773 struct connector_state *conn_state = &state->conn_state; 774 struct rockchip_connector *conn = conn_state->connector; 775 struct crtc_state *crtc_state = &state->crtc_state; 776 struct rockchip_crtc *crtc = crtc_state->crtc; 777 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 778 struct drm_display_mode *mode = &conn_state->mode; 779 const char *compatible; 780 int ret = 0; 781 static bool __print_once = false; 782 783 if (!__print_once) { 784 __print_once = true; 785 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 786 } 787 788 if (state->is_init) 789 return 0; 790 791 if (!crtc_funcs) { 792 printf("failed to find crtc functions\n"); 793 return -ENXIO; 794 } 795 796 if (crtc_state->crtc->active && !crtc_state->ports_node && 797 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 798 sizeof(struct drm_display_mode))) { 799 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 800 crtc_state->dev->name, 801 crtc_state->crtc->active_mode.type, 802 crtc_state->crtc->active_mode.hdisplay, 803 crtc_state->crtc->active_mode.vdisplay, 804 crtc_state->crtc->active_mode.vrefresh); 805 return -ENODEV; 806 } 807 808 if (crtc_funcs->preinit) { 809 ret = crtc_funcs->preinit(state); 810 if (ret) 811 return ret; 812 } 813 814 ret = rockchip_connector_init(state); 815 if (ret) 816 goto deinit; 817 818 /* 819 * support hotplug, but not connect; 820 */ 821 #ifdef CONFIG_DRM_ROCKCHIP_TVE 822 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 823 printf("hdmi plugin ,skip tve\n"); 824 goto deinit; 825 } 826 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 827 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 828 printf("hdmi plugin ,skip tve\n"); 829 goto deinit; 830 } 831 #endif 832 833 ret = rockchip_connector_detect(state); 834 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 835 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 836 crtc->hdmi_hpd = ret; 837 #endif 838 if (!ret && !state->force_output) 839 goto deinit; 840 841 if (conn->panel) { 842 ret = display_get_timing(state); 843 if (!ret) 844 conn_state->bpc = conn->panel->bpc; 845 #if defined(CONFIG_I2C_EDID) 846 if (ret < 0 && conn->funcs->get_edid) { 847 rockchip_panel_prepare(conn->panel); 848 ret = conn->funcs->get_edid(conn, state); 849 if (!ret) 850 display_get_edid_mode(state); 851 } 852 #endif 853 } else if (conn->bridge) { 854 ret = video_bridge_read_edid(conn->bridge->dev, 855 conn_state->edid, EDID_SIZE); 856 if (ret > 0) { 857 #if defined(CONFIG_I2C_EDID) 858 display_get_edid_mode(state); 859 #endif 860 } else { 861 ret = video_bridge_get_timing(conn->bridge->dev); 862 } 863 } else if (conn->funcs->get_timing) { 864 ret = conn->funcs->get_timing(conn, state); 865 } else if (conn->funcs->get_edid) { 866 ret = conn->funcs->get_edid(conn, state); 867 #if defined(CONFIG_I2C_EDID) 868 if (!ret) 869 display_get_edid_mode(state); 870 #endif 871 } 872 873 if (!ret && conn_state->secondary) { 874 struct rockchip_connector *connector = conn_state->secondary; 875 876 if (connector->panel) { 877 if (connector->panel->funcs->get_mode) { 878 struct drm_display_mode *_mode = drm_mode_create(); 879 880 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 881 if (!ret && !drm_mode_equal(_mode, mode)) 882 ret = -EINVAL; 883 884 drm_mode_destroy(_mode); 885 } 886 } 887 } 888 889 if (ret && !state->force_output) 890 goto deinit; 891 if (state->force_output) 892 display_use_force_mode(state); 893 894 if (display_mode_valid(state)) 895 goto deinit; 896 897 /* rk356x series drive mipi pixdata on posedge */ 898 compatible = dev_read_string(conn->dev, "compatible"); 899 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 900 conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 901 902 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 903 " H: %04d %04d %04d %04d\n" 904 " V: %04d %04d %04d %04d\n" 905 "bus_format: %x\n", 906 conn->dev->name, 907 state->force_output ? "use force output" : "", 908 mode->clock, mode->flags, 909 mode->hdisplay, mode->hsync_start, 910 mode->hsync_end, mode->htotal, 911 mode->vdisplay, mode->vsync_start, 912 mode->vsync_end, mode->vtotal, 913 conn_state->bus_format); 914 915 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 916 917 if (conn_state->secondary) { 918 mode->crtc_clock *= 2; 919 mode->crtc_hdisplay *= 2; 920 mode->crtc_hsync_start *= 2; 921 mode->crtc_hsync_end *= 2; 922 mode->crtc_htotal *= 2; 923 } 924 925 if (conn->bridge) 926 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 927 928 if (crtc_funcs->init) { 929 ret = crtc_funcs->init(state); 930 if (ret) 931 goto deinit; 932 } 933 state->is_init = 1; 934 935 crtc_state->crtc->active = true; 936 memcpy(&crtc_state->crtc->active_mode, 937 &conn_state->mode, sizeof(struct drm_display_mode)); 938 939 return 0; 940 941 deinit: 942 rockchip_connector_deinit(state); 943 return ret; 944 } 945 946 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 947 { 948 struct crtc_state *crtc_state = &state->crtc_state; 949 const struct rockchip_crtc *crtc = crtc_state->crtc; 950 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 951 int ret; 952 953 if (!state->is_init) 954 return -EINVAL; 955 956 if (crtc_funcs->send_mcu_cmd) { 957 ret = crtc_funcs->send_mcu_cmd(state, type, val); 958 if (ret) 959 return ret; 960 } 961 962 return 0; 963 } 964 965 static int display_set_plane(struct display_state *state) 966 { 967 struct crtc_state *crtc_state = &state->crtc_state; 968 const struct rockchip_crtc *crtc = crtc_state->crtc; 969 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 970 int ret; 971 972 if (!state->is_init) 973 return -EINVAL; 974 975 if (crtc_funcs->set_plane) { 976 ret = crtc_funcs->set_plane(state); 977 if (ret) 978 return ret; 979 } 980 981 return 0; 982 } 983 984 static int display_enable(struct display_state *state) 985 { 986 struct crtc_state *crtc_state = &state->crtc_state; 987 const struct rockchip_crtc *crtc = crtc_state->crtc; 988 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 989 990 if (!state->is_init) 991 return -EINVAL; 992 993 if (state->is_enable) 994 return 0; 995 996 if (crtc_funcs->prepare) 997 crtc_funcs->prepare(state); 998 999 rockchip_connector_pre_enable(state); 1000 1001 if (crtc_funcs->enable) 1002 crtc_funcs->enable(state); 1003 1004 rockchip_connector_enable(state); 1005 1006 state->is_enable = true; 1007 1008 return 0; 1009 } 1010 1011 static int display_disable(struct display_state *state) 1012 { 1013 struct crtc_state *crtc_state = &state->crtc_state; 1014 const struct rockchip_crtc *crtc = crtc_state->crtc; 1015 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1016 1017 if (!state->is_init) 1018 return 0; 1019 1020 if (!state->is_enable) 1021 return 0; 1022 1023 rockchip_connector_disable(state); 1024 1025 if (crtc_funcs->disable) 1026 crtc_funcs->disable(state); 1027 1028 rockchip_connector_post_disable(state); 1029 1030 state->is_enable = 0; 1031 state->is_init = 0; 1032 1033 return 0; 1034 } 1035 1036 static int display_rect_calc_scale(int src, int dst) 1037 { 1038 int scale = 0; 1039 1040 if (WARN_ON(src < 0 || dst < 0)) 1041 return -EINVAL; 1042 1043 if (dst == 0) 1044 return 0; 1045 1046 src <<= 16; 1047 1048 if (src > (dst << 16)) 1049 return DIV_ROUND_UP(src, dst); 1050 else 1051 scale = src / dst; 1052 1053 return scale; 1054 } 1055 1056 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst, 1057 int min_hscale, int max_hscale) 1058 { 1059 int hscale = display_rect_calc_scale(src->w, dst->w); 1060 1061 if (hscale < 0 || dst->w == 0) 1062 return hscale; 1063 1064 if (hscale < min_hscale || hscale > max_hscale) 1065 return -ERANGE; 1066 1067 return hscale; 1068 } 1069 1070 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst, 1071 int min_vscale, int max_vscale) 1072 { 1073 int vscale = display_rect_calc_scale(src->h, dst->h); 1074 1075 if (vscale < 0 || dst->h == 0) 1076 return vscale; 1077 1078 if (vscale < min_vscale || vscale > max_vscale) 1079 return -ERANGE; 1080 1081 return vscale; 1082 } 1083 1084 static int display_check(struct display_state *state) 1085 { 1086 struct connector_state *conn_state = &state->conn_state; 1087 struct rockchip_connector *conn = conn_state->connector; 1088 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1089 struct crtc_state *crtc_state = &state->crtc_state; 1090 const struct rockchip_crtc *crtc = crtc_state->crtc; 1091 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 1092 int ret; 1093 1094 if (!state->is_init) 1095 return 0; 1096 1097 if (conn_funcs->check) { 1098 ret = conn_funcs->check(conn, state); 1099 if (ret) 1100 goto check_fail; 1101 } 1102 1103 if (crtc_funcs->check) { 1104 ret = crtc_funcs->check(state); 1105 if (ret) 1106 goto check_fail; 1107 } 1108 1109 if (crtc_funcs->plane_check) { 1110 ret = crtc_funcs->plane_check(state); 1111 if (ret) 1112 goto check_fail; 1113 } 1114 1115 return 0; 1116 1117 check_fail: 1118 state->is_init = false; 1119 return ret; 1120 } 1121 1122 static int display_logo(struct display_state *state) 1123 { 1124 struct crtc_state *crtc_state = &state->crtc_state; 1125 struct connector_state *conn_state = &state->conn_state; 1126 struct logo_info *logo = &state->logo; 1127 int hdisplay, vdisplay, ret; 1128 1129 ret = display_init(state); 1130 if (!state->is_init || ret) 1131 return -ENODEV; 1132 1133 switch (logo->bpp) { 1134 case 16: 1135 crtc_state->format = ROCKCHIP_FMT_RGB565; 1136 break; 1137 case 24: 1138 crtc_state->format = ROCKCHIP_FMT_RGB888; 1139 break; 1140 case 32: 1141 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1142 break; 1143 default: 1144 printf("can't support bmp bits[%d]\n", logo->bpp); 1145 return -EINVAL; 1146 } 1147 hdisplay = conn_state->mode.crtc_hdisplay; 1148 vdisplay = conn_state->mode.vdisplay; 1149 crtc_state->src_rect.w = logo->width; 1150 crtc_state->src_rect.h = logo->height; 1151 crtc_state->src_rect.x = 0; 1152 crtc_state->src_rect.y = 0; 1153 crtc_state->ymirror = logo->ymirror; 1154 crtc_state->rb_swap = 0; 1155 1156 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1157 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1158 1159 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1160 crtc_state->crtc_rect.x = 0; 1161 crtc_state->crtc_rect.y = 0; 1162 crtc_state->crtc_rect.w = hdisplay; 1163 crtc_state->crtc_rect.h = vdisplay; 1164 } else { 1165 if (crtc_state->src_rect.w >= hdisplay) { 1166 crtc_state->crtc_rect.x = 0; 1167 crtc_state->crtc_rect.w = hdisplay; 1168 } else { 1169 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1170 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1171 } 1172 1173 if (crtc_state->src_rect.h >= vdisplay) { 1174 crtc_state->crtc_rect.y = 0; 1175 crtc_state->crtc_rect.h = vdisplay; 1176 } else { 1177 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1178 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1179 } 1180 } 1181 1182 display_check(state); 1183 display_set_plane(state); 1184 display_enable(state); 1185 1186 return 0; 1187 } 1188 1189 static int get_crtc_id(ofnode connect, bool is_ports_node) 1190 { 1191 struct device_node *port_node; 1192 struct device_node *remote; 1193 int phandle; 1194 int val; 1195 1196 if (is_ports_node) { 1197 port_node = of_get_parent(connect.np); 1198 if (!port_node) 1199 goto err; 1200 1201 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1202 if (val < 0) 1203 goto err; 1204 } else { 1205 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1206 if (phandle < 0) 1207 goto err; 1208 1209 remote = of_find_node_by_phandle(phandle); 1210 if (!remote) 1211 goto err; 1212 1213 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1214 if (val < 0) 1215 goto err; 1216 } 1217 1218 return val; 1219 err: 1220 printf("Can't get crtc id, default set to id = 0\n"); 1221 return 0; 1222 } 1223 1224 static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 1225 { 1226 ofnode mcu_node; 1227 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1228 1229 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1230 if (!ofnode_valid(mcu_node)) 1231 return -ENODEV; 1232 1233 #define FDT_GET_MCU_INT(val, name) \ 1234 do { \ 1235 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1236 if (val < 0) { \ 1237 printf("Can't get %s\n", name); \ 1238 return -ENXIO; \ 1239 } \ 1240 } while (0) 1241 1242 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1243 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1244 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1245 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1246 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1247 1248 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1249 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1250 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1251 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1252 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1253 1254 return 0; 1255 } 1256 1257 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1258 { 1259 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1260 1261 list_for_each_entry(tmp, &logo_cache_list, head) { 1262 if (!strcmp(tmp->name, bmp)) { 1263 logo_cache = tmp; 1264 break; 1265 } 1266 } 1267 1268 if (!logo_cache) { 1269 logo_cache = malloc(sizeof(*logo_cache)); 1270 if (!logo_cache) { 1271 printf("failed to alloc memory for logo cache\n"); 1272 return NULL; 1273 } 1274 memset(logo_cache, 0, sizeof(*logo_cache)); 1275 strcpy(logo_cache->name, bmp); 1276 INIT_LIST_HEAD(&logo_cache->head); 1277 list_add_tail(&logo_cache->head, &logo_cache_list); 1278 } 1279 1280 return logo_cache; 1281 } 1282 1283 /* Note: used only for rkfb kernel driver */ 1284 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1285 { 1286 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1287 void *dst = NULL; 1288 int len, size; 1289 struct bmp_header *header; 1290 1291 if (!logo || !bmp_name) 1292 return -EINVAL; 1293 1294 header = malloc(RK_BLK_SIZE); 1295 if (!header) 1296 return -ENOMEM; 1297 1298 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1299 if (len != RK_BLK_SIZE) { 1300 free(header); 1301 return -EINVAL; 1302 } 1303 size = get_unaligned_le32(&header->file_size); 1304 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1305 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1306 if (len != size) { 1307 printf("failed to load bmp %s\n", bmp_name); 1308 free(header); 1309 return -ENOENT; 1310 } 1311 1312 logo->mem = dst; 1313 #endif 1314 1315 return 0; 1316 } 1317 1318 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1319 { 1320 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1321 struct rockchip_logo_cache *logo_cache; 1322 struct bmp_header *header; 1323 void *dst = NULL, *pdst; 1324 int size, len; 1325 int ret = 0; 1326 int reserved = 0; 1327 int dst_size; 1328 1329 if (!logo || !bmp_name) 1330 return -EINVAL; 1331 logo_cache = find_or_alloc_logo_cache(bmp_name); 1332 if (!logo_cache) 1333 return -ENOMEM; 1334 1335 if (logo_cache->logo.mem) { 1336 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1337 return 0; 1338 } 1339 1340 header = malloc(RK_BLK_SIZE); 1341 if (!header) 1342 return -ENOMEM; 1343 1344 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1345 if (len != RK_BLK_SIZE) { 1346 ret = -EINVAL; 1347 goto free_header; 1348 } 1349 1350 logo->bpp = get_unaligned_le16(&header->bit_count); 1351 logo->width = get_unaligned_le32(&header->width); 1352 logo->height = get_unaligned_le32(&header->height); 1353 dst_size = logo->width * logo->height * logo->bpp >> 3; 1354 reserved = get_unaligned_le32(&header->reserved); 1355 if (logo->height < 0) 1356 logo->height = -logo->height; 1357 size = get_unaligned_le32(&header->file_size); 1358 if (!can_direct_logo(logo->bpp)) { 1359 if (size > MEMORY_POOL_SIZE) { 1360 printf("failed to use boot buf as temp bmp buffer\n"); 1361 ret = -ENOMEM; 1362 goto free_header; 1363 } 1364 pdst = get_display_buffer(size); 1365 1366 } else { 1367 pdst = get_display_buffer(size); 1368 dst = pdst; 1369 } 1370 1371 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1372 if (len != size) { 1373 printf("failed to load bmp %s\n", bmp_name); 1374 ret = -ENOENT; 1375 goto free_header; 1376 } 1377 1378 if (!can_direct_logo(logo->bpp)) { 1379 /* 1380 * TODO: force use 16bpp if bpp less than 16; 1381 */ 1382 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1383 dst_size = logo->width * logo->height * logo->bpp >> 3; 1384 dst = get_display_buffer(dst_size); 1385 if (!dst) { 1386 ret = -ENOMEM; 1387 goto free_header; 1388 } 1389 if (bmpdecoder(pdst, dst, logo->bpp)) { 1390 printf("failed to decode bmp %s\n", bmp_name); 1391 ret = -EINVAL; 1392 goto free_header; 1393 } 1394 1395 logo->offset = 0; 1396 logo->ymirror = 0; 1397 } else { 1398 logo->offset = get_unaligned_le32(&header->data_offset); 1399 if (reserved == BMP_PROCESSED_FLAG) 1400 logo->ymirror = 0; 1401 else 1402 logo->ymirror = 1; 1403 } 1404 logo->mem = dst; 1405 1406 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1407 1408 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1409 1410 free_header: 1411 1412 free(header); 1413 1414 return ret; 1415 #else 1416 return -EINVAL; 1417 #endif 1418 } 1419 1420 void rockchip_show_fbbase(ulong fbbase) 1421 { 1422 struct display_state *s; 1423 1424 list_for_each_entry(s, &rockchip_display_list, head) { 1425 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1426 s->logo.mem = (char *)fbbase; 1427 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1428 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1429 s->logo.bpp = 32; 1430 s->logo.ymirror = 0; 1431 1432 display_logo(s); 1433 } 1434 } 1435 1436 int rockchip_show_bmp(const char *bmp) 1437 { 1438 struct display_state *s; 1439 int ret = 0; 1440 1441 if (!bmp) { 1442 list_for_each_entry(s, &rockchip_display_list, head) 1443 display_disable(s); 1444 return -ENOENT; 1445 } 1446 1447 list_for_each_entry(s, &rockchip_display_list, head) { 1448 s->logo.mode = s->charge_logo_mode; 1449 if (load_bmp_logo(&s->logo, bmp)) 1450 continue; 1451 ret = display_logo(s); 1452 } 1453 1454 return ret; 1455 } 1456 1457 int rockchip_show_logo(void) 1458 { 1459 struct display_state *s; 1460 int ret = 0; 1461 1462 list_for_each_entry(s, &rockchip_display_list, head) { 1463 s->logo.mode = s->logo_mode; 1464 if (load_bmp_logo(&s->logo, s->ulogo_name)) 1465 printf("failed to display uboot logo\n"); 1466 else 1467 ret = display_logo(s); 1468 1469 /* Load kernel bmp in rockchip_display_fixup() later */ 1470 } 1471 1472 return ret; 1473 } 1474 1475 enum { 1476 PORT_DIR_IN, 1477 PORT_DIR_OUT, 1478 }; 1479 1480 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1481 { 1482 ofnode ports, port; 1483 u32 reg; 1484 1485 ports = ofnode_find_subnode(node, "ports"); 1486 if (!ofnode_valid(ports)) 1487 return NULL; 1488 1489 ofnode_for_each_subnode(port, ports) { 1490 if (ofnode_read_u32(port, "reg", ®)) 1491 continue; 1492 1493 if (reg == id) 1494 break; 1495 } 1496 1497 if (reg == id) 1498 return ofnode_to_np(port); 1499 1500 return NULL; 1501 } 1502 1503 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1504 { 1505 ofnode parent; 1506 int is_ports_node; 1507 1508 parent = ofnode_get_parent(port); 1509 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1510 if (is_ports_node) 1511 parent = ofnode_get_parent(parent); 1512 1513 return ofnode_to_np(parent); 1514 } 1515 1516 static const struct device_node *rockchip_of_graph_get_remote_node(ofnode node, int port, 1517 int endpoint) 1518 { 1519 const struct device_node *port_node; 1520 ofnode ep; 1521 u32 reg; 1522 uint phandle; 1523 1524 port_node = rockchip_of_graph_get_port_by_id(node, port); 1525 if (!port_node) 1526 return NULL; 1527 1528 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1529 if (ofnode_read_u32(ep, "reg", ®)) 1530 break; 1531 if (reg == endpoint) 1532 break; 1533 } 1534 1535 if (!ofnode_valid(ep)) 1536 return NULL; 1537 1538 if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 1539 return NULL; 1540 1541 ep = ofnode_get_by_phandle(phandle); 1542 if (!ofnode_valid(ep)) 1543 return NULL; 1544 1545 return ofnode_to_np(ep); 1546 } 1547 1548 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1549 { 1550 const struct device_node *ep_node, *panel_node; 1551 ofnode panel_ofnode, port; 1552 struct udevice *panel_dev; 1553 int ret = 0; 1554 1555 *panel = NULL; 1556 panel_ofnode = dev_read_subnode(dev, "panel"); 1557 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1558 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1559 &panel_dev); 1560 if (!ret) 1561 goto found; 1562 } 1563 1564 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1565 if (!ep_node) 1566 return -ENODEV; 1567 1568 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1569 if (!ofnode_valid(port)) 1570 return -ENODEV; 1571 1572 panel_node = rockchip_of_graph_get_port_parent(port); 1573 if (!panel_node) 1574 return -ENODEV; 1575 1576 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1577 if (!ret) 1578 goto found; 1579 1580 return -ENODEV; 1581 1582 found: 1583 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1584 return 0; 1585 } 1586 1587 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1588 { 1589 const struct device_node *ep_node, *bridge_node; 1590 ofnode port; 1591 struct udevice *bridge_dev; 1592 int ret = 0; 1593 1594 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1595 if (!ep_node) 1596 return -ENODEV; 1597 1598 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1599 if (!ofnode_valid(port)) 1600 return -ENODEV; 1601 1602 bridge_node = rockchip_of_graph_get_port_parent(port); 1603 if (!bridge_node) 1604 return -ENODEV; 1605 1606 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1607 &bridge_dev); 1608 if (!ret) 1609 goto found; 1610 1611 return -ENODEV; 1612 1613 found: 1614 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1615 return 0; 1616 } 1617 1618 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1619 struct rockchip_bridge **bridge) 1620 { 1621 int ret = 0; 1622 *panel = NULL; 1623 *bridge = NULL; 1624 1625 if (panel) { 1626 ret = rockchip_of_find_panel(dev, panel); 1627 if (!ret) 1628 return 0; 1629 } 1630 1631 if (ret) { 1632 ret = rockchip_of_find_bridge(dev, bridge); 1633 if (!ret) 1634 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1635 &(*bridge)->next_bridge); 1636 } 1637 1638 return ret; 1639 } 1640 1641 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1642 { 1643 struct udevice *phy_dev; 1644 int ret; 1645 1646 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1647 if (ret) 1648 return NULL; 1649 1650 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1651 } 1652 1653 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1654 { 1655 ofnode ep, port, ports, conn; 1656 uint phandle; 1657 struct udevice *dev; 1658 int ret; 1659 1660 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1661 return NULL; 1662 1663 ep = ofnode_get_by_phandle(phandle); 1664 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1665 return NULL; 1666 1667 port = ofnode_get_parent(ep); 1668 if (!ofnode_valid(port)) 1669 return NULL; 1670 1671 ports = ofnode_get_parent(port); 1672 if (!ofnode_valid(ports)) 1673 return NULL; 1674 1675 conn = ofnode_get_parent(ports); 1676 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1677 return NULL; 1678 1679 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1680 if (ret) 1681 return NULL; 1682 1683 return dev; 1684 } 1685 1686 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1687 { 1688 struct rockchip_connector *conn; 1689 struct udevice *dev; 1690 int ret; 1691 1692 dev = rockchip_of_find_connector_device(endpoint); 1693 if (!dev) { 1694 printf("Warn: can't find connect driver\n"); 1695 return NULL; 1696 } 1697 1698 conn = get_rockchip_connector_by_device(dev); 1699 if (!conn) 1700 return NULL; 1701 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1702 if (ret) 1703 debug("Warn: no find panel or bridge\n"); 1704 1705 conn->phy = rockchip_of_find_phy(dev); 1706 1707 return conn; 1708 } 1709 1710 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1711 { 1712 char *conn_name; 1713 struct device_node *split_node; 1714 struct udevice *split_dev; 1715 struct rockchip_connector *split_conn; 1716 bool split_mode; 1717 int ret; 1718 1719 split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1720 if (!split_mode) 1721 return NULL; 1722 1723 switch (conn->type) { 1724 case DRM_MODE_CONNECTOR_DisplayPort: 1725 conn_name = "dp"; 1726 break; 1727 case DRM_MODE_CONNECTOR_eDP: 1728 conn_name = "edp"; 1729 break; 1730 case DRM_MODE_CONNECTOR_HDMIA: 1731 conn_name = "hdmi"; 1732 break; 1733 default: 1734 return NULL; 1735 } 1736 1737 split_node = of_alias_get_dev(conn_name, !conn->id); 1738 if (!split_node || !of_device_is_available(split_node)) 1739 return NULL; 1740 1741 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1742 if (ret) 1743 return NULL; 1744 1745 split_conn = get_rockchip_connector_by_device(split_dev); 1746 if (!split_conn) 1747 return NULL; 1748 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1749 if (ret) 1750 debug("Warn: no find panel or bridge\n"); 1751 1752 split_conn->phy = rockchip_of_find_phy(split_dev); 1753 1754 return split_conn; 1755 } 1756 1757 static bool rockchip_get_display_path_status(ofnode endpoint) 1758 { 1759 ofnode ep; 1760 uint phandle; 1761 1762 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1763 return false; 1764 1765 ep = ofnode_get_by_phandle(phandle); 1766 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1767 return false; 1768 1769 return true; 1770 } 1771 1772 #if defined(CONFIG_ROCKCHIP_RK3568) 1773 static int rockchip_display_fixup_dts(void *blob) 1774 { 1775 ofnode route_node, route_subnode, conn_ep, conn_port; 1776 const struct device_node *route_sub_devnode; 1777 const struct device_node *ep_node, *conn_ep_dev_node; 1778 u32 phandle; 1779 int conn_ep_offset; 1780 const char *route_sub_path, *path; 1781 1782 /* Don't go further if new variant after 1783 * reading PMUGRF_SOC_CON15 1784 */ 1785 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1786 return 0; 1787 1788 route_node = ofnode_path("/display-subsystem/route"); 1789 if (!ofnode_valid(route_node)) 1790 return -EINVAL; 1791 1792 ofnode_for_each_subnode(route_subnode, route_node) { 1793 if (!ofnode_is_available(route_subnode)) 1794 continue; 1795 1796 route_sub_devnode = ofnode_to_np(route_subnode); 1797 route_sub_path = route_sub_devnode->full_name; 1798 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1799 !strstr(ofnode_get_name(route_subnode), "edp")) 1800 return 0; 1801 1802 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1803 if (phandle < 0) { 1804 printf("Warn: can't find connect node's handle\n"); 1805 continue; 1806 } 1807 1808 ep_node = of_find_node_by_phandle(phandle); 1809 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1810 printf("Warn: can't find endpoint node from phandle\n"); 1811 continue; 1812 } 1813 1814 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 1815 conn_ep = ofnode_get_by_phandle(phandle); 1816 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 1817 return -ENODEV; 1818 1819 conn_port = ofnode_get_parent(conn_ep); 1820 if (!ofnode_valid(conn_port)) 1821 return -ENODEV; 1822 1823 ofnode_for_each_subnode(conn_ep, conn_port) { 1824 conn_ep_dev_node = ofnode_to_np(conn_ep); 1825 path = conn_ep_dev_node->full_name; 1826 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 1827 conn_ep_offset = fdt_path_offset(blob, path); 1828 1829 if (!ofnode_is_available(conn_ep) && 1830 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 1831 do_fixup_by_path_u32(blob, route_sub_path, 1832 "connect", phandle, 1); 1833 fdt_status_okay(blob, conn_ep_offset); 1834 1835 } else if (ofnode_is_available(conn_ep) && 1836 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 1837 fdt_status_disabled(blob, conn_ep_offset); 1838 } 1839 } 1840 } 1841 1842 return 0; 1843 } 1844 #endif 1845 1846 static int rockchip_display_probe(struct udevice *dev) 1847 { 1848 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1849 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1850 const void *blob = gd->fdt_blob; 1851 int phandle; 1852 struct udevice *crtc_dev; 1853 struct rockchip_crtc *crtc; 1854 struct rockchip_connector *conn, *split_conn; 1855 struct display_state *s; 1856 const char *name; 1857 int ret; 1858 ofnode node, route_node, timing_node; 1859 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 1860 struct public_phy_data *data; 1861 bool is_ports_node = false; 1862 1863 #if defined(CONFIG_ROCKCHIP_RK3568) 1864 rockchip_display_fixup_dts((void *)blob); 1865 #endif 1866 /* Before relocation we don't need to do anything */ 1867 if (!(gd->flags & GD_FLG_RELOC)) 1868 return 0; 1869 1870 data = malloc(sizeof(struct public_phy_data)); 1871 if (!data) { 1872 printf("failed to alloc phy data\n"); 1873 return -ENOMEM; 1874 } 1875 data->phy_init = false; 1876 1877 init_display_buffer(plat->base); 1878 1879 route_node = dev_read_subnode(dev, "route"); 1880 if (!ofnode_valid(route_node)) 1881 return -ENODEV; 1882 1883 ofnode_for_each_subnode(node, route_node) { 1884 if (!ofnode_is_available(node)) 1885 continue; 1886 phandle = ofnode_read_u32_default(node, "connect", -1); 1887 if (phandle < 0) { 1888 printf("Warn: can't find connect node's handle\n"); 1889 continue; 1890 } 1891 ep_node = of_find_node_by_phandle(phandle); 1892 if (!ofnode_valid(np_to_ofnode(ep_node))) { 1893 printf("Warn: can't find endpoint node from phandle\n"); 1894 continue; 1895 } 1896 port_node = of_get_parent(ep_node); 1897 if (!ofnode_valid(np_to_ofnode(port_node))) { 1898 printf("Warn: can't find port node from phandle\n"); 1899 continue; 1900 } 1901 1902 port_parent_node = of_get_parent(port_node); 1903 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1904 printf("Warn: can't find port parent node from phandle\n"); 1905 continue; 1906 } 1907 1908 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1909 if (is_ports_node) { 1910 vop_node = of_get_parent(port_parent_node); 1911 if (!ofnode_valid(np_to_ofnode(vop_node))) { 1912 printf("Warn: can't find crtc node from phandle\n"); 1913 continue; 1914 } 1915 } else { 1916 vop_node = port_parent_node; 1917 } 1918 1919 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1920 np_to_ofnode(vop_node), 1921 &crtc_dev); 1922 if (ret) { 1923 printf("Warn: can't find crtc driver %d\n", ret); 1924 continue; 1925 } 1926 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1927 1928 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 1929 if (!conn) { 1930 printf("Warn: can't get connect driver\n"); 1931 continue; 1932 } 1933 split_conn = rockchip_get_split_connector(conn); 1934 1935 s = malloc(sizeof(*s)); 1936 if (!s) 1937 continue; 1938 1939 memset(s, 0, sizeof(*s)); 1940 1941 INIT_LIST_HEAD(&s->head); 1942 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 1943 if (!ret) 1944 memcpy(s->ulogo_name, name, strlen(name)); 1945 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 1946 if (!ret) 1947 memcpy(s->klogo_name, name, strlen(name)); 1948 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1949 if (!strcmp(name, "fullscreen")) 1950 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1951 else 1952 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1953 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1954 if (!strcmp(name, "fullscreen")) 1955 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1956 else 1957 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1958 1959 s->force_output = ofnode_read_bool(node, "force-output"); 1960 1961 if (s->force_output) { 1962 timing_node = ofnode_find_subnode(node, "force_timing"); 1963 ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 1964 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 1965 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 1966 } 1967 1968 s->blob = blob; 1969 s->conn_state.connector = conn; 1970 s->conn_state.secondary = NULL; 1971 s->conn_state.type = conn->type; 1972 if (split_conn) { 1973 s->conn_state.secondary = split_conn; 1974 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 1975 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 1976 } 1977 s->conn_state.overscan.left_margin = 100; 1978 s->conn_state.overscan.right_margin = 100; 1979 s->conn_state.overscan.top_margin = 100; 1980 s->conn_state.overscan.bottom_margin = 100; 1981 s->crtc_state.node = np_to_ofnode(vop_node); 1982 s->crtc_state.dev = crtc_dev; 1983 s->crtc_state.crtc = crtc; 1984 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 1985 s->node = node; 1986 1987 if (is_ports_node) { /* only vop2 will get into here */ 1988 ofnode vp_node = np_to_ofnode(port_node); 1989 static bool get_plane_mask_from_dts; 1990 1991 s->crtc_state.ports_node = port_parent_node; 1992 if (!get_plane_mask_from_dts) { 1993 ofnode vp_sub_node; 1994 int vp_id = 0; 1995 bool vp_enable = false; 1996 1997 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1998 int cursor_plane = -1; 1999 2000 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 2001 2002 s->crtc_state.crtc->vps[vp_id].xmirror_en = 2003 ofnode_read_bool(vp_node, "xmirror-enable"); 2004 2005 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 2006 2007 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2008 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2009 if (ret) { 2010 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2011 s->crtc_state.crtc->assign_plane |= true; 2012 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2013 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX); 2014 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2015 vp_id, 2016 s->crtc_state.crtc->vps[vp_id].plane_mask, 2017 s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 : 2018 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2019 cursor_plane); 2020 } 2021 2022 /* To check current vp status */ 2023 vp_enable = false; 2024 ofnode_for_each_subnode(vp_sub_node, vp_node) 2025 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2026 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2027 } 2028 get_plane_mask_from_dts = true; 2029 } 2030 } 2031 2032 get_crtc_mcu_mode(&s->crtc_state); 2033 2034 ret = ofnode_read_u32_default(s->crtc_state.node, 2035 "rockchip,dual-channel-swap", 0); 2036 s->crtc_state.dual_channel_swap = ret; 2037 2038 if (connector_phy_init(conn, data)) { 2039 printf("Warn: Failed to init phy drivers\n"); 2040 free(s); 2041 continue; 2042 } 2043 list_add_tail(&s->head, &rockchip_display_list); 2044 } 2045 2046 if (list_empty(&rockchip_display_list)) { 2047 debug("Failed to found available display route\n"); 2048 return -ENODEV; 2049 } 2050 rockchip_get_baseparameter(); 2051 display_pre_init(); 2052 2053 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2054 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2055 uc_priv->bpix = VIDEO_BPP32; 2056 2057 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2058 rockchip_show_fbbase(plat->base); 2059 video_set_flush_dcache(dev, true); 2060 #endif 2061 2062 return 0; 2063 } 2064 2065 void rockchip_display_fixup(void *blob) 2066 { 2067 const struct rockchip_connector_funcs *conn_funcs; 2068 const struct rockchip_crtc_funcs *crtc_funcs; 2069 struct rockchip_connector *conn; 2070 const struct rockchip_crtc *crtc; 2071 struct display_state *s; 2072 int offset; 2073 int ret; 2074 const struct device_node *np; 2075 const char *path; 2076 const char *cacm_header; 2077 2078 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2079 list_for_each_entry(s, &rockchip_display_list, head) { 2080 ret = load_bmp_logo(&s->logo, s->klogo_name); 2081 if (ret < 0) { 2082 s->is_klogo_valid = false; 2083 printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id); 2084 } else { 2085 s->is_klogo_valid = true; 2086 } 2087 } 2088 2089 if (!get_display_size()) 2090 return; 2091 2092 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2093 (u64)memory_start, 2094 (u64)get_display_size()); 2095 if (offset < 0) 2096 printf("failed to reserve drm-loader-logo memory\n"); 2097 2098 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2099 (u64)cubic_lut_memory_start, 2100 (u64)get_cubic_memory_size()); 2101 if (offset < 0) 2102 printf("failed to reserve drm-cubic-lut memory\n"); 2103 } else { 2104 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2105 /* Compatible with rkfb display, only need reserve memory */ 2106 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2107 (u64)memory_start, 2108 MEMORY_POOL_SIZE); 2109 if (offset < 0) 2110 printf("failed to reserve fb-loader-logo memory\n"); 2111 else 2112 list_for_each_entry(s, &rockchip_display_list, head) 2113 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2114 return; 2115 } 2116 2117 list_for_each_entry(s, &rockchip_display_list, head) { 2118 if (!s->is_init || !s->is_klogo_valid) 2119 continue; 2120 2121 conn = s->conn_state.connector; 2122 if (!conn) 2123 continue; 2124 conn_funcs = conn->funcs; 2125 if (!conn_funcs) { 2126 printf("failed to get exist connector\n"); 2127 continue; 2128 } 2129 2130 if (s->conn_state.secondary) { 2131 s->conn_state.mode.clock *= 2; 2132 s->conn_state.mode.hdisplay *= 2; 2133 } 2134 2135 crtc = s->crtc_state.crtc; 2136 if (!crtc) 2137 continue; 2138 2139 crtc_funcs = crtc->funcs; 2140 if (!crtc_funcs) { 2141 printf("failed to get exist crtc\n"); 2142 continue; 2143 } 2144 2145 if (crtc_funcs->fixup_dts) 2146 crtc_funcs->fixup_dts(s, blob); 2147 2148 np = ofnode_to_np(s->node); 2149 path = np->full_name; 2150 fdt_increase_size(blob, 0x400); 2151 #define FDT_SET_U32(name, val) \ 2152 do_fixup_by_path_u32(blob, path, name, val, 1); 2153 2154 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2155 - memory_start; 2156 FDT_SET_U32("logo,offset", offset); 2157 FDT_SET_U32("logo,width", s->logo.width); 2158 FDT_SET_U32("logo,height", s->logo.height); 2159 FDT_SET_U32("logo,bpp", s->logo.bpp); 2160 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2161 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2162 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2163 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2164 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2165 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2166 FDT_SET_U32("video,vrefresh", 2167 drm_mode_vrefresh(&s->conn_state.mode)); 2168 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2169 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2170 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2171 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2172 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2173 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2174 2175 if (s->conn_state.disp_info) { 2176 cacm_header = (const char*)&s->conn_state.disp_info->cacm_header; 2177 2178 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2179 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2180 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2181 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2182 2183 if (!strncasecmp(cacm_header, "CACM", 4)) { 2184 FDT_SET_U32("post_csc,hue", 2185 s->conn_state.disp_info->csc_info.hue); 2186 FDT_SET_U32("post_csc,saturation", 2187 s->conn_state.disp_info->csc_info.saturation); 2188 FDT_SET_U32("post_csc,contrast", 2189 s->conn_state.disp_info->csc_info.contrast); 2190 FDT_SET_U32("post_csc,brightness", 2191 s->conn_state.disp_info->csc_info.brightness); 2192 FDT_SET_U32("post_csc,r_gain", 2193 s->conn_state.disp_info->csc_info.r_gain); 2194 FDT_SET_U32("post_csc,g_gain", 2195 s->conn_state.disp_info->csc_info.g_gain); 2196 FDT_SET_U32("post_csc,b_gain", 2197 s->conn_state.disp_info->csc_info.b_gain); 2198 FDT_SET_U32("post_csc,r_offset", 2199 s->conn_state.disp_info->csc_info.r_offset); 2200 FDT_SET_U32("post_csc,g_offset", 2201 s->conn_state.disp_info->csc_info.g_offset); 2202 FDT_SET_U32("post_csc,b_offset", 2203 s->conn_state.disp_info->csc_info.b_offset); 2204 FDT_SET_U32("post_csc,csc_enable", 2205 s->conn_state.disp_info->csc_info.csc_enable); 2206 } 2207 } 2208 2209 if (s->conn_state.disp_info->cubic_lut_data.size && 2210 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2211 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2212 2213 #undef FDT_SET_U32 2214 } 2215 } 2216 2217 int rockchip_display_bind(struct udevice *dev) 2218 { 2219 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2220 2221 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2222 2223 return 0; 2224 } 2225 2226 static const struct udevice_id rockchip_display_ids[] = { 2227 { .compatible = "rockchip,display-subsystem" }, 2228 { } 2229 }; 2230 2231 U_BOOT_DRIVER(rockchip_display) = { 2232 .name = "rockchip_display", 2233 .id = UCLASS_VIDEO, 2234 .of_match = rockchip_display_ids, 2235 .bind = rockchip_display_bind, 2236 .probe = rockchip_display_probe, 2237 }; 2238 2239 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2240 char *const argv[]) 2241 { 2242 if (argc != 1) 2243 return CMD_RET_USAGE; 2244 2245 rockchip_show_logo(); 2246 2247 return 0; 2248 } 2249 2250 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2251 char *const argv[]) 2252 { 2253 if (argc != 2) 2254 return CMD_RET_USAGE; 2255 2256 rockchip_show_bmp(argv[1]); 2257 2258 return 0; 2259 } 2260 2261 U_BOOT_CMD( 2262 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2263 "load and display log from resource partition", 2264 NULL 2265 ); 2266 2267 U_BOOT_CMD( 2268 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2269 "load and display bmp from resource partition", 2270 " <bmp_name>" 2271 ); 2272