1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <memalign.h> 21 #include <video.h> 22 #include <video_rockchip.h> 23 #include <video_bridge.h> 24 #include <dm/device.h> 25 #include <dm/uclass-internal.h> 26 #include <asm/arch-rockchip/resource_img.h> 27 #include <asm/arch-rockchip/cpu.h> 28 29 #include "bmp_helper.h" 30 #include "libnsbmp.h" 31 #include "rockchip_display.h" 32 #include "rockchip_crtc.h" 33 #include "rockchip_connector.h" 34 #include "rockchip_bridge.h" 35 #include "rockchip_phy.h" 36 #include "rockchip_panel.h" 37 #include <dm.h> 38 #include <dm/of_access.h> 39 #include <dm/ofnode.h> 40 #include <asm/io.h> 41 42 #define DRIVER_VERSION "v1.0.1" 43 44 /*********************************************************************** 45 * Rockchip UBOOT DRM driver version 46 * 47 * v1.0.0 : add basic version for rockchip drm driver(hjc) 48 * v1.0.1 : add much dsi update(hjc) 49 * 50 **********************************************************************/ 51 52 #define RK_BLK_SIZE 512 53 #define BMP_PROCESSED_FLAG 8399 54 #define BYTES_PER_PIXEL sizeof(uint32_t) 55 #define MAX_IMAGE_BYTES (8 * 1024 * 1024) 56 57 DECLARE_GLOBAL_DATA_PTR; 58 static LIST_HEAD(rockchip_display_list); 59 static LIST_HEAD(logo_cache_list); 60 61 static unsigned long memory_start; 62 static unsigned long cubic_lut_memory_start; 63 static unsigned long memory_end; 64 static struct base2_info base_parameter; 65 static u32 align_size = PAGE_SIZE; 66 67 /* 68 * the phy types are used by different connectors in public. 69 * The current version only has inno hdmi phy for hdmi and tve. 70 */ 71 enum public_use_phy { 72 NONE, 73 INNO_HDMI_PHY 74 }; 75 76 /* save public phy data */ 77 struct public_phy_data { 78 const struct rockchip_phy *phy_drv; 79 int phy_node; 80 int public_phy_type; 81 bool phy_init; 82 }; 83 84 char* rockchip_get_output_if_name(u32 output_if, char *name) 85 { 86 if (output_if & VOP_OUTPUT_IF_RGB) 87 strcat(name, " RGB"); 88 if (output_if & VOP_OUTPUT_IF_BT1120) 89 strcat(name, " BT1120"); 90 if (output_if & VOP_OUTPUT_IF_BT656) 91 strcat(name, " BT656"); 92 if (output_if & VOP_OUTPUT_IF_LVDS0) 93 strcat(name, " LVDS0"); 94 if (output_if & VOP_OUTPUT_IF_LVDS1) 95 strcat(name, " LVDS1"); 96 if (output_if & VOP_OUTPUT_IF_MIPI0) 97 strcat(name, " MIPI0"); 98 if (output_if & VOP_OUTPUT_IF_MIPI1) 99 strcat(name, " MIPI1"); 100 if (output_if & VOP_OUTPUT_IF_eDP0) 101 strcat(name, " eDP0"); 102 if (output_if & VOP_OUTPUT_IF_eDP1) 103 strcat(name, " eDP1"); 104 if (output_if & VOP_OUTPUT_IF_DP0) 105 strcat(name, " DP0"); 106 if (output_if & VOP_OUTPUT_IF_DP1) 107 strcat(name, " DP1"); 108 if (output_if & VOP_OUTPUT_IF_HDMI0) 109 strcat(name, " HDMI0"); 110 if (output_if & VOP_OUTPUT_IF_HDMI1) 111 strcat(name, " HDMI1"); 112 113 return name; 114 } 115 116 u32 rockchip_drm_get_cycles_per_pixel(u32 bus_format) 117 { 118 switch (bus_format) { 119 case MEDIA_BUS_FMT_RGB565_1X16: 120 case MEDIA_BUS_FMT_RGB666_1X18: 121 case MEDIA_BUS_FMT_RGB888_1X24: 122 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 123 return 1; 124 case MEDIA_BUS_FMT_RGB565_2X8_LE: 125 case MEDIA_BUS_FMT_BGR565_2X8_LE: 126 return 2; 127 case MEDIA_BUS_FMT_RGB666_3X6: 128 case MEDIA_BUS_FMT_RGB888_3X8: 129 case MEDIA_BUS_FMT_BGR888_3X8: 130 return 3; 131 case MEDIA_BUS_FMT_RGB888_DUMMY_4X8: 132 case MEDIA_BUS_FMT_BGR888_DUMMY_4X8: 133 return 4; 134 default: 135 return 1; 136 } 137 } 138 139 int rockchip_get_baseparameter(void) 140 { 141 struct blk_desc *dev_desc; 142 disk_partition_t part_info; 143 int block_num; 144 char *baseparameter_buf; 145 int ret = 0; 146 147 dev_desc = rockchip_get_bootdev(); 148 if (!dev_desc) { 149 printf("%s: Could not find device\n", __func__); 150 return -ENOENT; 151 } 152 153 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 154 printf("Could not find baseparameter partition\n"); 155 return -ENOENT; 156 } 157 158 block_num = BLOCK_CNT(sizeof(base_parameter), dev_desc); 159 baseparameter_buf = memalign(ARCH_DMA_MINALIGN, block_num * dev_desc->blksz); 160 if (!baseparameter_buf) { 161 printf("failed to alloc memory for baseparameter buffer\n"); 162 return -ENOMEM; 163 } 164 165 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 166 if (ret < 0) { 167 printf("read baseparameter failed\n"); 168 goto out; 169 } 170 171 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 172 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 173 printf("warning: bad baseparameter\n"); 174 memset(&base_parameter, 0, sizeof(base_parameter)); 175 } 176 rockchip_display_make_crc32_table(); 177 178 out: 179 free(baseparameter_buf); 180 return ret; 181 } 182 183 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 184 { 185 struct base2_disp_info *disp_info; 186 struct base2_disp_header *disp_header; 187 int i = 0, offset = -1; 188 u32 crc_val; 189 u32 base2_length; 190 void *base_parameter_addr = (void *)&base_parameter; 191 192 for (i = 0; i < 8; i++) { 193 disp_header = &base_parameter.disp_header[i]; 194 if (disp_header->connector_type == type && 195 disp_header->connector_id == id) { 196 printf("disp info %d, type:%d, id:%d\n", i, type, id); 197 offset = disp_header->offset; 198 break; 199 } 200 } 201 202 if (offset < 0) 203 return NULL; 204 disp_info = base_parameter_addr + offset; 205 if (disp_info->screen_info[0].type != type || 206 disp_info->screen_info[0].id != id) { 207 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 208 disp_info->screen_info[0].type, 209 disp_info->screen_info[0].id); 210 return NULL; 211 } 212 213 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 214 return NULL; 215 216 if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) { 217 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, 218 sizeof(struct base2_disp_info) - 4); 219 if (crc_val != disp_info->crc2) { 220 printf("error: connector type[%d], id[%d] disp info crc2 check error\n", 221 type, id); 222 return NULL; 223 } 224 } else { 225 base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) - 226 sizeof(struct acm_data) - 10 * 1024 - 4; 227 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4); 228 if (crc_val != disp_info->crc) { 229 printf("error: connector type[%d], id[%d] disp info crc check error\n", 230 type, id); 231 return NULL; 232 } 233 } 234 235 return disp_info; 236 } 237 238 /* check which kind of public phy does connector use */ 239 static int check_public_use_phy(struct rockchip_connector *conn) 240 { 241 int ret = NONE; 242 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 243 244 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 245 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 246 ret = INNO_HDMI_PHY; 247 #endif 248 249 return ret; 250 } 251 252 /* 253 * get public phy driver and initialize it. 254 * The current version only has inno hdmi phy for hdmi and tve. 255 */ 256 static int get_public_phy(struct rockchip_connector *conn, 257 struct public_phy_data *data) 258 { 259 struct rockchip_phy *phy; 260 struct udevice *dev; 261 int ret = 0; 262 263 switch (data->public_phy_type) { 264 case INNO_HDMI_PHY: 265 #if defined(CONFIG_ROCKCHIP_RK3328) 266 ret = uclass_get_device_by_name(UCLASS_PHY, 267 "hdmiphy@ff430000", &dev); 268 #elif defined(CONFIG_ROCKCHIP_RK322X) 269 ret = uclass_get_device_by_name(UCLASS_PHY, 270 "hdmi-phy@12030000", &dev); 271 #else 272 ret = -EINVAL; 273 #endif 274 if (ret) { 275 printf("Warn: can't find phy driver\n"); 276 return 0; 277 } 278 279 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 280 if (!phy) { 281 printf("failed to get phy driver\n"); 282 return 0; 283 } 284 285 ret = rockchip_phy_init(phy); 286 if (ret) { 287 printf("failed to init phy driver\n"); 288 return ret; 289 } 290 conn->phy = phy; 291 292 debug("inno hdmi phy init success, save it\n"); 293 data->phy_drv = conn->phy; 294 data->phy_init = true; 295 return 0; 296 default: 297 return -EINVAL; 298 } 299 } 300 301 static void init_display_buffer(ulong base) 302 { 303 memory_start = ALIGN(base + DRM_ROCKCHIP_FB_SIZE, align_size); 304 memory_end = memory_start; 305 cubic_lut_memory_start = ALIGN(memory_start + MEMORY_POOL_SIZE, align_size); 306 } 307 308 void *get_display_buffer(int size) 309 { 310 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 311 void *buf; 312 313 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 314 printf("failed to alloc %dbyte memory to display\n", size); 315 return NULL; 316 } 317 buf = (void *)roundup_memory; 318 319 memory_end = roundup_memory + size; 320 321 return buf; 322 } 323 324 static unsigned long get_display_size(void) 325 { 326 return memory_end - memory_start; 327 } 328 329 static unsigned long get_single_cubic_lut_size(void) 330 { 331 ulong cubic_lut_size; 332 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 333 334 /* This is depend on IC designed */ 335 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 336 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 337 338 return cubic_lut_size; 339 } 340 341 static unsigned long get_cubic_lut_offset(int crtc_id) 342 { 343 return crtc_id * get_single_cubic_lut_size(); 344 } 345 346 unsigned long get_cubic_lut_buffer(int crtc_id) 347 { 348 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 349 } 350 351 static unsigned long get_cubic_memory_size(void) 352 { 353 /* Max support 4 cubic lut */ 354 return get_single_cubic_lut_size() * 4; 355 } 356 357 bool can_direct_logo(int bpp) 358 { 359 return bpp == 16 || bpp == 32; 360 } 361 362 static int connector_phy_init(struct rockchip_connector *conn, 363 struct public_phy_data *data) 364 { 365 int type; 366 367 /* does this connector use public phy with others */ 368 type = check_public_use_phy(conn); 369 if (type == INNO_HDMI_PHY) { 370 /* there is no public phy was initialized */ 371 if (!data->phy_init) { 372 debug("start get public phy\n"); 373 data->public_phy_type = type; 374 if (get_public_phy(conn, data)) { 375 printf("can't find correct public phy type\n"); 376 free(data); 377 return -EINVAL; 378 } 379 return 0; 380 } 381 382 /* if this phy has been initialized, get it directly */ 383 conn->phy = (struct rockchip_phy *)data->phy_drv; 384 return 0; 385 } 386 387 return 0; 388 } 389 390 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode, u32 *bus_flags) 391 { 392 int hactive, vactive, pixelclock; 393 int hfront_porch, hback_porch, hsync_len; 394 int vfront_porch, vback_porch, vsync_len; 395 int val, flags = 0; 396 397 #define FDT_GET_BOOL(val, name) \ 398 val = ofnode_read_bool(node, name); 399 400 #define FDT_GET_INT(val, name) \ 401 val = ofnode_read_s32_default(node, name, -1); \ 402 if (val < 0) { \ 403 printf("Can't get %s\n", name); \ 404 return -ENXIO; \ 405 } 406 407 #define FDT_GET_INT_DEFAULT(val, name, default) \ 408 val = ofnode_read_s32_default(node, name, default); 409 410 FDT_GET_INT(hactive, "hactive"); 411 FDT_GET_INT(vactive, "vactive"); 412 FDT_GET_INT(pixelclock, "clock-frequency"); 413 FDT_GET_INT(hsync_len, "hsync-len"); 414 FDT_GET_INT(hfront_porch, "hfront-porch"); 415 FDT_GET_INT(hback_porch, "hback-porch"); 416 FDT_GET_INT(vsync_len, "vsync-len"); 417 FDT_GET_INT(vfront_porch, "vfront-porch"); 418 FDT_GET_INT(vback_porch, "vback-porch"); 419 FDT_GET_INT(val, "hsync-active"); 420 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 421 FDT_GET_INT(val, "vsync-active"); 422 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 423 424 FDT_GET_BOOL(val, "interlaced"); 425 flags |= val ? DRM_MODE_FLAG_INTERLACE : 0; 426 FDT_GET_BOOL(val, "doublescan"); 427 flags |= val ? DRM_MODE_FLAG_DBLSCAN : 0; 428 FDT_GET_BOOL(val, "doubleclk"); 429 flags |= val ? DRM_MODE_FLAG_DBLCLK : 0; 430 431 FDT_GET_INT(val, "de-active"); 432 *bus_flags |= val ? DRM_BUS_FLAG_DE_HIGH : DRM_BUS_FLAG_DE_LOW; 433 FDT_GET_INT(val, "pixelclk-active"); 434 *bus_flags |= val ? DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE : DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 435 436 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 437 if (val == DRM_MODE_FLAG_XMIRROR) { 438 flags |= DRM_MODE_FLAG_XMIRROR; 439 } else if (val == DRM_MODE_FLAG_YMIRROR) { 440 flags |= DRM_MODE_FLAG_YMIRROR; 441 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 442 flags |= DRM_MODE_FLAG_XMIRROR; 443 flags |= DRM_MODE_FLAG_YMIRROR; 444 } 445 mode->hdisplay = hactive; 446 mode->hsync_start = mode->hdisplay + hfront_porch; 447 mode->hsync_end = mode->hsync_start + hsync_len; 448 mode->htotal = mode->hsync_end + hback_porch; 449 450 mode->vdisplay = vactive; 451 mode->vsync_start = mode->vdisplay + vfront_porch; 452 mode->vsync_end = mode->vsync_start + vsync_len; 453 mode->vtotal = mode->vsync_end + vback_porch; 454 455 mode->clock = pixelclock / 1000; 456 mode->flags = flags; 457 mode->vrefresh = drm_mode_vrefresh(mode); 458 459 return 0; 460 } 461 462 static int display_get_force_timing_from_dts(ofnode node, 463 struct drm_display_mode *mode, 464 u32 *bus_flags) 465 { 466 int ret = 0; 467 468 ret = rockchip_ofnode_get_display_mode(node, mode, bus_flags); 469 470 if (ret) { 471 mode->clock = 74250; 472 mode->flags = 0x5; 473 mode->hdisplay = 1280; 474 mode->hsync_start = 1390; 475 mode->hsync_end = 1430; 476 mode->htotal = 1650; 477 mode->hskew = 0; 478 mode->vdisplay = 720; 479 mode->vsync_start = 725; 480 mode->vsync_end = 730; 481 mode->vtotal = 750; 482 mode->vrefresh = 60; 483 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 484 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 485 } 486 487 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 488 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 489 mode->vscan); 490 491 return 0; 492 } 493 494 static int display_get_timing_from_dts(struct rockchip_panel *panel, 495 struct drm_display_mode *mode, 496 u32 *bus_flags) 497 { 498 struct ofnode_phandle_args args; 499 ofnode dt, timing, mcu_panel; 500 int ret; 501 502 mcu_panel = dev_read_subnode(panel->dev, "mcu-panel"); 503 dt = dev_read_subnode(panel->dev, "display-timings"); 504 if (ofnode_valid(dt)) { 505 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 506 0, 0, &args); 507 if (ret) 508 return ret; 509 510 timing = args.node; 511 } else if (ofnode_valid(mcu_panel)) { 512 dt = ofnode_find_subnode(mcu_panel, "display-timings"); 513 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 514 0, 0, &args); 515 if (ret) 516 return ret; 517 518 timing = args.node; 519 } else { 520 timing = dev_read_subnode(panel->dev, "panel-timing"); 521 } 522 523 if (!ofnode_valid(timing)) { 524 printf("failed to get display timings from DT\n"); 525 return -ENXIO; 526 } 527 528 rockchip_ofnode_get_display_mode(timing, mode, bus_flags); 529 530 return 0; 531 } 532 533 static int display_get_timing(struct display_state *state) 534 { 535 struct connector_state *conn_state = &state->conn_state; 536 struct drm_display_mode *mode = &conn_state->mode; 537 const struct drm_display_mode *m; 538 struct rockchip_panel *panel = conn_state->connector->panel; 539 540 if (panel->funcs->get_mode) 541 return panel->funcs->get_mode(panel, mode); 542 543 if (dev_of_valid(panel->dev) && 544 !display_get_timing_from_dts(panel, mode, &conn_state->bus_flags)) { 545 printf("Using display timing dts\n"); 546 return 0; 547 } 548 549 if (panel->data) { 550 m = (const struct drm_display_mode *)panel->data; 551 memcpy(mode, m, sizeof(*m)); 552 printf("Using display timing from compatible panel driver\n"); 553 return 0; 554 } 555 556 return -ENODEV; 557 } 558 559 static int display_pre_init(void) 560 { 561 struct display_state *state; 562 int ret = 0; 563 564 list_for_each_entry(state, &rockchip_display_list, head) { 565 struct connector_state *conn_state = &state->conn_state; 566 struct crtc_state *crtc_state = &state->crtc_state; 567 struct rockchip_crtc *crtc = crtc_state->crtc; 568 569 ret = rockchip_connector_pre_init(state); 570 if (ret) 571 printf("pre init conn error\n"); 572 573 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 574 } 575 return ret; 576 } 577 578 static int display_use_force_mode(struct display_state *state) 579 { 580 struct connector_state *conn_state = &state->conn_state; 581 struct drm_display_mode *mode = &conn_state->mode; 582 583 conn_state->bpc = 8; 584 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 585 conn_state->bus_format = state->force_bus_format; 586 587 return 0; 588 } 589 590 static int display_get_edid_mode(struct display_state *state) 591 { 592 int ret = 0; 593 struct connector_state *conn_state = &state->conn_state; 594 struct drm_display_mode *mode = &conn_state->mode; 595 int bpc; 596 597 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 598 if (!ret) { 599 conn_state->bpc = bpc; 600 edid_print_info((void *)&conn_state->edid); 601 } else { 602 conn_state->bpc = 8; 603 mode->clock = 74250; 604 mode->flags = 0x5; 605 mode->hdisplay = 1280; 606 mode->hsync_start = 1390; 607 mode->hsync_end = 1430; 608 mode->htotal = 1650; 609 mode->hskew = 0; 610 mode->vdisplay = 720; 611 mode->vsync_start = 725; 612 mode->vsync_end = 730; 613 mode->vtotal = 750; 614 mode->vrefresh = 60; 615 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 616 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 617 618 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 619 state->conn_state.connector->dev->name); 620 } 621 622 return ret; 623 } 624 625 static int display_mode_valid(struct display_state *state) 626 { 627 struct connector_state *conn_state = &state->conn_state; 628 struct rockchip_connector *conn = conn_state->connector; 629 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 630 struct crtc_state *crtc_state = &state->crtc_state; 631 const struct rockchip_crtc *crtc = crtc_state->crtc; 632 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 633 int ret; 634 635 if (conn_funcs->mode_valid && state->enabled_at_spl == false) { 636 ret = conn_funcs->mode_valid(conn, state); 637 if (ret) 638 return ret; 639 } 640 641 if (crtc_funcs->mode_valid) { 642 ret = crtc_funcs->mode_valid(state); 643 if (ret) 644 return ret; 645 } 646 647 return 0; 648 } 649 650 static int display_mode_fixup(struct display_state *state) 651 { 652 struct crtc_state *crtc_state = &state->crtc_state; 653 const struct rockchip_crtc *crtc = crtc_state->crtc; 654 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 655 int ret; 656 657 if (crtc_funcs->mode_fixup) { 658 ret = crtc_funcs->mode_fixup(state); 659 if (ret) 660 return ret; 661 } 662 663 return 0; 664 } 665 666 static int display_init(struct display_state *state) 667 { 668 struct connector_state *conn_state = &state->conn_state; 669 struct rockchip_connector *conn = conn_state->connector; 670 struct crtc_state *crtc_state = &state->crtc_state; 671 struct rockchip_crtc *crtc = crtc_state->crtc; 672 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 673 struct drm_display_mode *mode = &conn_state->mode; 674 const char *compatible; 675 int ret = 0; 676 static bool __print_once = false; 677 #ifdef CONFIG_SPL_BUILD 678 struct spl_display_info *spl_disp_info = (struct spl_display_info *)CONFIG_SPL_VIDEO_BUF; 679 #endif 680 if (!__print_once) { 681 __print_once = true; 682 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 683 } 684 685 if (state->is_init) 686 return 0; 687 688 if (!crtc_funcs) { 689 printf("failed to find crtc functions\n"); 690 return -ENXIO; 691 } 692 693 #ifdef CONFIG_SPL_BUILD 694 if (state->conn_state.type == DRM_MODE_CONNECTOR_HDMIA) 695 state->enabled_at_spl = spl_disp_info->enabled == 1 ? true : false; 696 if (state->enabled_at_spl) 697 printf("HDMI enabled at SPL\n"); 698 #endif 699 if (crtc_state->crtc->active && !crtc_state->ports_node && 700 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 701 sizeof(struct drm_display_mode))) { 702 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 703 crtc_state->dev->name, 704 crtc_state->crtc->active_mode.type, 705 crtc_state->crtc->active_mode.hdisplay, 706 crtc_state->crtc->active_mode.vdisplay, 707 crtc_state->crtc->active_mode.vrefresh); 708 return -ENODEV; 709 } 710 711 if (crtc_funcs->preinit) { 712 ret = crtc_funcs->preinit(state); 713 if (ret) 714 return ret; 715 } 716 717 if (state->enabled_at_spl == false) { 718 ret = rockchip_connector_init(state); 719 if (ret) 720 goto deinit; 721 } 722 723 /* 724 * support hotplug, but not connect; 725 */ 726 #ifdef CONFIG_DRM_ROCKCHIP_TVE 727 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 728 printf("hdmi plugin ,skip tve\n"); 729 goto deinit; 730 } 731 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 732 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 733 printf("hdmi plugin ,skip tve\n"); 734 goto deinit; 735 } 736 #endif 737 738 ret = rockchip_connector_detect(state); 739 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 740 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 741 crtc->hdmi_hpd = ret; 742 if (state->enabled_at_spl) 743 crtc->hdmi_hpd = true; 744 #endif 745 if (!ret && !state->force_output) 746 goto deinit; 747 748 ret = 0; 749 if (state->enabled_at_spl == true) { 750 #ifdef CONFIG_SPL_BUILD 751 struct drm_display_mode *mode = &conn_state->mode; 752 753 memcpy(mode, &spl_disp_info->mode, sizeof(*mode)); 754 conn_state->bus_format = spl_disp_info->bus_format; 755 756 printf("%s get display mode from spl:%dx%d, bus format:0x%x\n", 757 conn->dev->name, mode->hdisplay, mode->vdisplay, conn_state->bus_format); 758 #endif 759 } else if (conn->panel) { 760 ret = display_get_timing(state); 761 if (!ret) 762 conn_state->bpc = conn->panel->bpc; 763 #if defined(CONFIG_I2C_EDID) 764 if (ret < 0 && conn->funcs->get_edid) { 765 rockchip_panel_prepare(conn->panel); 766 ret = conn->funcs->get_edid(conn, state); 767 if (!ret) 768 display_get_edid_mode(state); 769 } 770 #endif 771 } else if (conn->bridge) { 772 ret = video_bridge_read_edid(conn->bridge->dev, 773 conn_state->edid, EDID_SIZE); 774 if (ret > 0) { 775 #if defined(CONFIG_I2C_EDID) 776 ret = display_get_edid_mode(state); 777 #endif 778 } else { 779 ret = video_bridge_get_timing(conn->bridge->dev); 780 } 781 } else if (conn->funcs->get_timing) { 782 ret = conn->funcs->get_timing(conn, state); 783 } else if (conn->funcs->get_edid) { 784 ret = conn->funcs->get_edid(conn, state); 785 #if defined(CONFIG_I2C_EDID) 786 if (!ret) 787 display_get_edid_mode(state); 788 #endif 789 } 790 791 if (!ret && conn_state->secondary) { 792 struct rockchip_connector *connector = conn_state->secondary; 793 794 if (connector->panel) { 795 if (connector->panel->funcs->get_mode) { 796 struct drm_display_mode *_mode = drm_mode_create(); 797 798 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 799 if (!ret && !drm_mode_equal(_mode, mode)) 800 ret = -EINVAL; 801 802 drm_mode_destroy(_mode); 803 } 804 } 805 } 806 807 if (ret && !state->force_output) 808 goto deinit; 809 if (state->force_output) 810 display_use_force_mode(state); 811 812 if (display_mode_valid(state)) 813 goto deinit; 814 815 /* rk356x series drive mipi pixdata on posedge */ 816 compatible = dev_read_string(conn->dev, "compatible"); 817 if (compatible && !strcmp(compatible, "rockchip,rk3568-mipi-dsi")) { 818 conn_state->bus_flags &= ~DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 819 conn_state->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 820 } 821 822 if (display_mode_fixup(state)) 823 goto deinit; 824 825 if (conn->bridge) 826 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 827 828 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 829 " H: %04d %04d %04d %04d\n" 830 " V: %04d %04d %04d %04d\n" 831 "bus_format: %x\n", 832 conn->dev->name, 833 state->force_output ? "use force output" : "", 834 mode->clock, mode->flags, 835 mode->hdisplay, mode->hsync_start, 836 mode->hsync_end, mode->htotal, 837 mode->vdisplay, mode->vsync_start, 838 mode->vsync_end, mode->vtotal, 839 conn_state->bus_format); 840 841 if (crtc_funcs->init && state->enabled_at_spl == false) { 842 ret = crtc_funcs->init(state); 843 if (ret) 844 goto deinit; 845 } 846 state->is_init = 1; 847 848 crtc_state->crtc->active = true; 849 memcpy(&crtc_state->crtc->active_mode, 850 &conn_state->mode, sizeof(struct drm_display_mode)); 851 852 return 0; 853 854 deinit: 855 rockchip_connector_deinit(state); 856 return ret; 857 } 858 859 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 860 { 861 struct crtc_state *crtc_state = &state->crtc_state; 862 const struct rockchip_crtc *crtc = crtc_state->crtc; 863 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 864 int ret; 865 866 if (!state->is_init) 867 return -EINVAL; 868 869 if (crtc_funcs->send_mcu_cmd) { 870 ret = crtc_funcs->send_mcu_cmd(state, type, val); 871 if (ret) 872 return ret; 873 } 874 875 return 0; 876 } 877 878 static int display_set_plane(struct display_state *state) 879 { 880 struct crtc_state *crtc_state = &state->crtc_state; 881 const struct rockchip_crtc *crtc = crtc_state->crtc; 882 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 883 int ret; 884 885 if (!state->is_init) 886 return -EINVAL; 887 888 if (crtc_funcs->set_plane) { 889 ret = crtc_funcs->set_plane(state); 890 if (ret) 891 return ret; 892 } 893 894 return 0; 895 } 896 897 static int display_enable(struct display_state *state) 898 { 899 struct crtc_state *crtc_state = &state->crtc_state; 900 const struct rockchip_crtc *crtc = crtc_state->crtc; 901 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 902 903 if (!state->is_init) 904 return -EINVAL; 905 906 if (state->is_enable) 907 return 0; 908 909 if (crtc_funcs->prepare) 910 crtc_funcs->prepare(state); 911 912 if (state->enabled_at_spl == false) 913 rockchip_connector_pre_enable(state); 914 915 if (crtc_funcs->enable) 916 crtc_funcs->enable(state); 917 918 if (state->enabled_at_spl == false) 919 rockchip_connector_enable(state); 920 921 if (crtc_funcs->post_enable) 922 crtc_funcs->post_enable(state); 923 924 #ifdef CONFIG_DRM_ROCKCHIP_RK628 925 /* 926 * trigger .probe helper of U_BOOT_DRIVER(rk628) in ./rk628/rk628.c 927 */ 928 struct udevice * dev; 929 int phandle, ret; 930 931 phandle = ofnode_read_u32_default(state->node, "bridge", -1); 932 if (phandle < 0) 933 printf("%s failed to find bridge phandle\n", ofnode_get_name(state->node)); 934 935 ret = uclass_get_device_by_phandle_id(UCLASS_I2C_GENERIC, phandle, &dev); 936 if (ret && ret != -ENOENT) 937 printf("%s:%d failed to get rk628 device ret:%d\n", __func__, __LINE__, ret); 938 939 #endif 940 941 if (crtc_state->soft_te) 942 crtc_funcs->apply_soft_te(state); 943 944 state->is_enable = true; 945 946 return 0; 947 } 948 949 static int display_disable(struct display_state *state) 950 { 951 struct crtc_state *crtc_state = &state->crtc_state; 952 const struct rockchip_crtc *crtc = crtc_state->crtc; 953 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 954 955 if (!state->is_init) 956 return 0; 957 958 if (!state->is_enable) 959 return 0; 960 961 rockchip_connector_disable(state); 962 963 if (crtc_funcs->disable) 964 crtc_funcs->disable(state); 965 966 rockchip_connector_post_disable(state); 967 968 state->is_enable = 0; 969 state->is_init = 0; 970 971 return 0; 972 } 973 974 static int display_check(struct display_state *state) 975 { 976 struct connector_state *conn_state = &state->conn_state; 977 struct rockchip_connector *conn = conn_state->connector; 978 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 979 struct crtc_state *crtc_state = &state->crtc_state; 980 const struct rockchip_crtc *crtc = crtc_state->crtc; 981 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 982 int ret; 983 984 if (!state->is_init) 985 return 0; 986 987 if (conn_funcs->check) { 988 ret = conn_funcs->check(conn, state); 989 if (ret) 990 goto check_fail; 991 } 992 993 if (crtc_funcs->check) { 994 ret = crtc_funcs->check(state); 995 if (ret) 996 goto check_fail; 997 } 998 999 if (crtc_funcs->plane_check) { 1000 ret = crtc_funcs->plane_check(state); 1001 if (ret) 1002 goto check_fail; 1003 } 1004 1005 return 0; 1006 1007 check_fail: 1008 state->is_init = false; 1009 return ret; 1010 } 1011 1012 static int display_logo(struct display_state *state) 1013 { 1014 struct crtc_state *crtc_state = &state->crtc_state; 1015 struct connector_state *conn_state = &state->conn_state; 1016 struct logo_info *logo = &state->logo; 1017 int hdisplay, vdisplay, ret; 1018 1019 ret = display_init(state); 1020 if (!state->is_init || ret) 1021 return -ENODEV; 1022 1023 switch (logo->bpp) { 1024 case 16: 1025 crtc_state->format = ROCKCHIP_FMT_RGB565; 1026 break; 1027 case 24: 1028 crtc_state->format = ROCKCHIP_FMT_RGB888; 1029 break; 1030 case 32: 1031 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1032 break; 1033 default: 1034 printf("can't support bmp bits[%d]\n", logo->bpp); 1035 return -EINVAL; 1036 } 1037 hdisplay = conn_state->mode.crtc_hdisplay; 1038 vdisplay = conn_state->mode.vdisplay; 1039 crtc_state->src_rect.w = logo->width; 1040 crtc_state->src_rect.h = logo->height; 1041 crtc_state->src_rect.x = 0; 1042 crtc_state->src_rect.y = 0; 1043 crtc_state->ymirror = logo->ymirror; 1044 crtc_state->rb_swap = 0; 1045 1046 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1047 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1048 1049 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1050 crtc_state->crtc_rect.x = 0; 1051 crtc_state->crtc_rect.y = 0; 1052 crtc_state->crtc_rect.w = hdisplay; 1053 crtc_state->crtc_rect.h = vdisplay; 1054 } else { 1055 if (crtc_state->src_rect.w >= hdisplay) { 1056 crtc_state->crtc_rect.x = 0; 1057 crtc_state->crtc_rect.w = hdisplay; 1058 } else { 1059 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1060 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1061 } 1062 1063 if (crtc_state->src_rect.h >= vdisplay) { 1064 crtc_state->crtc_rect.y = 0; 1065 crtc_state->crtc_rect.h = vdisplay; 1066 } else { 1067 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1068 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1069 } 1070 } 1071 1072 display_check(state); 1073 ret = display_set_plane(state); 1074 if (ret) 1075 return ret; 1076 display_enable(state); 1077 1078 return 0; 1079 } 1080 1081 static int get_crtc_id(ofnode connect, bool is_ports_node) 1082 { 1083 struct device_node *port_node; 1084 struct device_node *remote; 1085 int phandle; 1086 int val; 1087 1088 if (is_ports_node) { 1089 port_node = of_get_parent(connect.np); 1090 if (!port_node) 1091 goto err; 1092 1093 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1094 if (val < 0) 1095 goto err; 1096 } else { 1097 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1098 if (phandle < 0) 1099 goto err; 1100 1101 remote = of_find_node_by_phandle(phandle); 1102 if (!remote) 1103 goto err; 1104 1105 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1106 if (val < 0) 1107 goto err; 1108 } 1109 1110 return val; 1111 err: 1112 printf("Can't get crtc id, default set to id = 0\n"); 1113 return 0; 1114 } 1115 1116 static int get_crtc_mcu_mode(struct crtc_state *crtc_state, struct device_node *port_node, 1117 bool is_ports_node) 1118 { 1119 ofnode mcu_node, vp_node; 1120 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1121 1122 if (is_ports_node) { 1123 vp_node = np_to_ofnode(port_node); 1124 mcu_node = ofnode_find_subnode(vp_node, "mcu-timing"); 1125 if (!ofnode_valid(mcu_node)) 1126 return -ENODEV; 1127 } else { 1128 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1129 if (!ofnode_valid(mcu_node)) 1130 return -ENODEV; 1131 } 1132 1133 #define FDT_GET_MCU_INT(val, name) \ 1134 do { \ 1135 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1136 if (val < 0) { \ 1137 printf("Can't get %s\n", name); \ 1138 return -ENXIO; \ 1139 } \ 1140 } while (0) 1141 1142 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1143 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1144 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1145 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1146 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1147 1148 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1149 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1150 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1151 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1152 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1153 1154 return 0; 1155 } 1156 1157 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp, int rotate) 1158 { 1159 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1160 1161 list_for_each_entry(tmp, &logo_cache_list, head) { 1162 if ((!strcmp(tmp->name, bmp) && rotate == tmp->logo_rotate) || 1163 (soc_is_rk3566() && tmp->logo_rotate)) { 1164 logo_cache = tmp; 1165 break; 1166 } 1167 } 1168 1169 if (!logo_cache) { 1170 logo_cache = malloc(sizeof(*logo_cache)); 1171 if (!logo_cache) { 1172 printf("failed to alloc memory for logo cache\n"); 1173 return NULL; 1174 } 1175 memset(logo_cache, 0, sizeof(*logo_cache)); 1176 strcpy(logo_cache->name, bmp); 1177 INIT_LIST_HEAD(&logo_cache->head); 1178 list_add_tail(&logo_cache->head, &logo_cache_list); 1179 } 1180 1181 return logo_cache; 1182 } 1183 1184 /* Note: used only for rkfb kernel driver */ 1185 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1186 { 1187 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1188 void *dst = NULL; 1189 int len, size; 1190 struct bmp_header *header; 1191 1192 if (!logo || !bmp_name) 1193 return -EINVAL; 1194 1195 header = malloc(RK_BLK_SIZE); 1196 if (!header) 1197 return -ENOMEM; 1198 1199 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1200 if (len != RK_BLK_SIZE) { 1201 free(header); 1202 return -EINVAL; 1203 } 1204 size = get_unaligned_le32(&header->file_size); 1205 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1206 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1207 if (len != size) { 1208 printf("failed to load bmp %s\n", bmp_name); 1209 free(header); 1210 return -ENOENT; 1211 } 1212 1213 logo->mem = dst; 1214 #endif 1215 1216 return 0; 1217 } 1218 1219 #ifdef BMP_DECODEER_LEGACY 1220 static int load_bmp_logo_legacy(struct logo_info *logo, const char *bmp_name) 1221 { 1222 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1223 struct rockchip_logo_cache *logo_cache; 1224 struct bmp_header *header; 1225 void *dst = NULL, *pdst; 1226 int size, len; 1227 int ret = 0; 1228 int reserved = 0; 1229 int dst_size; 1230 1231 if (!logo || !bmp_name) 1232 return -EINVAL; 1233 logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate); 1234 if (!logo_cache) 1235 return -ENOMEM; 1236 1237 if (logo_cache->logo.mem) { 1238 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1239 return 0; 1240 } 1241 1242 header = malloc(RK_BLK_SIZE); 1243 if (!header) 1244 return -ENOMEM; 1245 1246 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1247 if (len != RK_BLK_SIZE) { 1248 ret = -EINVAL; 1249 goto free_header; 1250 } 1251 1252 logo->bpp = get_unaligned_le16(&header->bit_count); 1253 logo->width = get_unaligned_le32(&header->width); 1254 logo->height = get_unaligned_le32(&header->height); 1255 dst_size = logo->width * logo->height * logo->bpp >> 3; 1256 reserved = get_unaligned_le32(&header->reserved); 1257 if (logo->height < 0) 1258 logo->height = -logo->height; 1259 size = get_unaligned_le32(&header->file_size); 1260 if (!can_direct_logo(logo->bpp)) { 1261 if (size > MEMORY_POOL_SIZE) { 1262 printf("failed to use boot buf as temp bmp buffer\n"); 1263 ret = -ENOMEM; 1264 goto free_header; 1265 } 1266 pdst = get_display_buffer(size); 1267 1268 } else { 1269 pdst = get_display_buffer(size); 1270 dst = pdst; 1271 } 1272 1273 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1274 if (len != size) { 1275 printf("failed to load bmp %s\n", bmp_name); 1276 ret = -ENOENT; 1277 goto free_header; 1278 } 1279 1280 if (!can_direct_logo(logo->bpp)) { 1281 /* 1282 * TODO: force use 16bpp if bpp less than 16; 1283 */ 1284 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1285 dst_size = logo->width * logo->height * logo->bpp >> 3; 1286 dst = get_display_buffer(dst_size); 1287 if (!dst) { 1288 ret = -ENOMEM; 1289 goto free_header; 1290 } 1291 if (bmpdecoder(pdst, dst, logo->bpp)) { 1292 printf("failed to decode bmp %s\n", bmp_name); 1293 ret = -EINVAL; 1294 goto free_header; 1295 } 1296 1297 logo->offset = 0; 1298 logo->ymirror = 0; 1299 } else { 1300 logo->offset = get_unaligned_le32(&header->data_offset); 1301 if (reserved == BMP_PROCESSED_FLAG) 1302 logo->ymirror = 0; 1303 else 1304 logo->ymirror = 1; 1305 } 1306 logo->mem = dst; 1307 1308 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1309 1310 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1311 1312 free_header: 1313 1314 free(header); 1315 1316 return ret; 1317 #else 1318 return -EINVAL; 1319 #endif 1320 } 1321 #endif 1322 1323 static void *bitmap_create(int width, int height, unsigned int state) 1324 { 1325 /* Ensure a stupidly large bitmap is not created */ 1326 if (width > 4096 || height > 4096) 1327 return NULL; 1328 1329 return calloc(width * height, BYTES_PER_PIXEL); 1330 } 1331 1332 static unsigned char *bitmap_get_buffer(void *bitmap) 1333 { 1334 return bitmap; 1335 } 1336 1337 static void bitmap_destroy(void *bitmap) 1338 { 1339 free(bitmap); 1340 } 1341 1342 static void bmp_copy(void *dst, bmp_image *bmp) 1343 { 1344 u16 row, col; 1345 u8 *image; 1346 u8 *pdst = (u8 *)dst; 1347 1348 image = (u8 *)bmp->bitmap; 1349 for (row = 0; row != bmp->height; row++) { 1350 for (col = 0; col != bmp->width; col++) { 1351 size_t z = (row * bmp->width + col) * BYTES_PER_PIXEL; 1352 1353 *pdst++ = image[z + 2]; 1354 *pdst++ = image[z + 1]; 1355 *pdst++ = image[z + 0]; 1356 *pdst++ = image[z + 3]; 1357 } 1358 } 1359 } 1360 1361 static void *rockchip_logo_rotate(struct logo_info *logo, void *src) 1362 { 1363 void *dst_rotate; 1364 int width = logo->width; 1365 int height = logo->height; 1366 int width_rotate = logo->height & 0x3 ? (logo->height & ~0x3) + 4 : logo->height; 1367 int height_rotate = logo->width; 1368 int dst_size = width * height * logo->bpp >> 3; 1369 int dst_size_rotate = width_rotate * height_rotate * logo->bpp >> 3; 1370 int bytes_per_pixel = logo->bpp >> 3; 1371 int padded_width; 1372 int i, j; 1373 char *img_data; 1374 1375 if (!(logo->rotate == 90 || logo->rotate == 180 || logo->rotate == 270)) { 1376 printf("Unsupported rotation angle\n"); 1377 return NULL; 1378 } 1379 1380 img_data = (char *)malloc(dst_size); 1381 if (!img_data) { 1382 printf("failed to alloc memory for image data\n"); 1383 return NULL; 1384 } 1385 memcpy(img_data, src, dst_size); 1386 1387 dst_rotate = get_display_buffer(dst_size_rotate); 1388 if (!dst_rotate) 1389 return NULL; 1390 memset(dst_rotate, 0, dst_size_rotate); 1391 1392 switch (logo->rotate) { 1393 case 90: 1394 logo->width = width_rotate; 1395 logo->height = height_rotate; 1396 padded_width = height & 0x3 ? (height & ~0x3) + 4 : height; 1397 for (i = 0; i < height; i++) { 1398 for (j = 0; j < width; j++) { 1399 memcpy(dst_rotate + (j * padded_width * bytes_per_pixel) + 1400 (height - i - 1) * bytes_per_pixel, 1401 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1402 bytes_per_pixel); 1403 } 1404 } 1405 break; 1406 case 180: 1407 for (i = 0; i < height; i++) { 1408 for (j = 0; j < width; j++) { 1409 memcpy(dst_rotate + (height - i - 1) * width * bytes_per_pixel + 1410 (width - j - 1) * bytes_per_pixel, 1411 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1412 bytes_per_pixel); 1413 } 1414 } 1415 break; 1416 case 270: 1417 logo->width = width_rotate; 1418 logo->height = height_rotate; 1419 padded_width = height & 0x3 ? (height & ~0x3) + 4 : height; 1420 for (i = 0; i < height; i++) { 1421 for (j = 0; j < width; j++) { 1422 memcpy(dst_rotate + (width - j - 1) * padded_width * bytes_per_pixel + 1423 i * bytes_per_pixel, 1424 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1425 bytes_per_pixel); 1426 } 1427 } 1428 break; 1429 default: 1430 break; 1431 } 1432 1433 free(img_data); 1434 1435 return dst_rotate; 1436 } 1437 1438 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1439 { 1440 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1441 struct rockchip_logo_cache *logo_cache; 1442 bmp_bitmap_callback_vt bitmap_callbacks = { 1443 bitmap_create, 1444 bitmap_destroy, 1445 bitmap_get_buffer, 1446 }; 1447 bmp_result code; 1448 bmp_image bmp; 1449 void *bmp_data; 1450 void *dst = NULL; 1451 void *dst_rotate = NULL; 1452 int len, dst_size; 1453 int ret = 0; 1454 1455 if (!logo || !bmp_name) 1456 return -EINVAL; 1457 1458 logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate); 1459 if (!logo_cache) 1460 return -ENOMEM; 1461 1462 if (logo_cache->logo.mem) { 1463 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1464 return 0; 1465 } 1466 1467 bmp_data = malloc(MAX_IMAGE_BYTES); 1468 if (!bmp_data) { 1469 printf("failed to alloc bmp data\n"); 1470 return -ENOMEM; 1471 } 1472 1473 bmp_create(&bmp, &bitmap_callbacks); 1474 1475 len = rockchip_read_resource_file(bmp_data, bmp_name, 0, MAX_IMAGE_BYTES); 1476 if (len < 0) { 1477 ret = -EINVAL; 1478 goto free_bmp_data; 1479 } 1480 1481 /* analyse the BMP */ 1482 code = bmp_analyse(&bmp, len, bmp_data); 1483 if (code != BMP_OK) { 1484 printf("failed to parse bmp:%s header\n", bmp_name); 1485 ret = -EINVAL; 1486 goto free_bmp_data; 1487 } 1488 1489 if (bmp.buffer_size > MAX_IMAGE_BYTES) { 1490 printf("bmp[%s] data size[%dKB] is over the limitation MAX_IMAGE_BYTES[%dKB]\n", 1491 bmp_name, bmp.buffer_size / 1024, MAX_IMAGE_BYTES / 1024); 1492 ret = -EINVAL; 1493 goto free_bmp_data; 1494 } 1495 1496 /* fix bpp to 32 */ 1497 logo->bpp = 32; 1498 logo->offset = 0; 1499 logo->ymirror = 0; 1500 logo->width = get_unaligned_le32(&bmp.width); 1501 logo->height = get_unaligned_le32(&bmp.height); 1502 dst_size = logo->width * logo->height * logo->bpp >> 3; 1503 /* decode the image to RGBA8888 format */ 1504 code = bmp_decode(&bmp); 1505 if (code != BMP_OK) { 1506 /* allow partially decoded images */ 1507 if (code != BMP_INSUFFICIENT_DATA && code != BMP_DATA_ERROR) { 1508 printf("failed to allocate the buffer of bmp:%s\n", bmp_name); 1509 ret = -EINVAL; 1510 goto free_bmp_data; 1511 } 1512 } 1513 1514 dst = get_display_buffer(dst_size); 1515 if (!dst) { 1516 ret = -ENOMEM; 1517 goto free_bmp_data; 1518 } 1519 bmp_copy(dst, &bmp); 1520 1521 if (logo->rotate) { 1522 dst_rotate = rockchip_logo_rotate(logo, dst); 1523 if (dst_rotate) { 1524 dst = dst_rotate; 1525 dst_size = logo->width * logo->height * logo->bpp >> 3; 1526 } 1527 printf("logo ratate %d\n", logo->rotate); 1528 } 1529 logo->mem = dst; 1530 1531 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1532 logo_cache->logo_rotate = logo->rotate; 1533 1534 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1535 free_bmp_data: 1536 /* clean up */ 1537 bmp_finalise(&bmp); 1538 free(bmp_data); 1539 1540 return ret; 1541 #else 1542 return -EINVAL; 1543 #endif 1544 } 1545 1546 void rockchip_show_fbbase(ulong fbbase) 1547 { 1548 struct display_state *s; 1549 1550 list_for_each_entry(s, &rockchip_display_list, head) { 1551 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1552 s->logo.mem = (char *)fbbase; 1553 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1554 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1555 s->logo.bpp = 32; 1556 s->logo.ymirror = 0; 1557 1558 display_logo(s); 1559 } 1560 } 1561 1562 int rockchip_show_bmp(const char *bmp) 1563 { 1564 struct display_state *s; 1565 int ret = 0; 1566 1567 if (!bmp) { 1568 list_for_each_entry(s, &rockchip_display_list, head) 1569 display_disable(s); 1570 return -ENOENT; 1571 } 1572 1573 list_for_each_entry(s, &rockchip_display_list, head) { 1574 s->logo.mode = s->charge_logo_mode; 1575 if (load_bmp_logo(&s->logo, bmp)) 1576 continue; 1577 ret = display_logo(s); 1578 } 1579 1580 return ret; 1581 } 1582 1583 int rockchip_show_logo(void) 1584 { 1585 struct display_state *s; 1586 struct display_state *ms = NULL; 1587 int ret = 0; 1588 int count = 0; 1589 1590 list_for_each_entry(s, &rockchip_display_list, head) { 1591 s->logo.mode = s->logo_mode; 1592 s->logo.rotate = s->logo_rotate; 1593 if (load_bmp_logo(&s->logo, s->ulogo_name)) { 1594 printf("failed to display uboot logo\n"); 1595 } else { 1596 ret = display_logo(s); 1597 if (ret == -EAGAIN) 1598 ms = s; 1599 } 1600 /* Load kernel bmp in rockchip_display_fixup() later */ 1601 } 1602 1603 /* 1604 * For rk3566, the mirror win must be enabled after the related 1605 * source win. If error code is EAGAIN, the mirror win may be 1606 * first enabled unexpectedly, and we will move the enabling process 1607 * as follows. 1608 */ 1609 if (ms) { 1610 while (count < 5) { 1611 ret = display_logo(ms); 1612 if (ret != -EAGAIN) 1613 break; 1614 mdelay(10); 1615 count++; 1616 } 1617 } 1618 1619 return ret; 1620 } 1621 1622 int rockchip_vop_dump(const char *cmd) 1623 { 1624 struct display_state *state; 1625 struct crtc_state *crtc_state; 1626 struct rockchip_crtc *crtc; 1627 const struct rockchip_crtc_funcs *crtc_funcs; 1628 int ret = -EINVAL; 1629 1630 list_for_each_entry(state, &rockchip_display_list, head) { 1631 if (!state->is_init) 1632 continue; 1633 crtc_state = &state->crtc_state; 1634 crtc = crtc_state->crtc; 1635 crtc_funcs = crtc->funcs; 1636 1637 if (!cmd) 1638 ret = crtc_funcs->active_regs_dump(state); 1639 else if (!strcmp(cmd, "a") || !strcmp(cmd, "all")) 1640 ret = crtc_funcs->regs_dump(state); 1641 if (!ret) 1642 break; 1643 } 1644 1645 if (ret) 1646 ret = CMD_RET_USAGE; 1647 1648 return ret; 1649 } 1650 1651 enum { 1652 PORT_DIR_IN, 1653 PORT_DIR_OUT, 1654 }; 1655 1656 const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1657 { 1658 ofnode ports, port; 1659 u32 reg; 1660 1661 ports = ofnode_find_subnode(node, "ports"); 1662 if (!ofnode_valid(ports)) 1663 return NULL; 1664 1665 ofnode_for_each_subnode(port, ports) { 1666 if (ofnode_read_u32(port, "reg", ®)) 1667 continue; 1668 1669 if (reg == id) 1670 break; 1671 } 1672 1673 if (reg == id) 1674 return ofnode_to_np(port); 1675 1676 return NULL; 1677 } 1678 1679 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1680 { 1681 ofnode parent; 1682 int is_ports_node; 1683 1684 parent = ofnode_get_parent(port); 1685 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1686 if (is_ports_node) 1687 parent = ofnode_get_parent(parent); 1688 1689 return ofnode_to_np(parent); 1690 } 1691 1692 const struct device_node * 1693 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint) 1694 { 1695 const struct device_node *port_node; 1696 ofnode ep; 1697 u32 reg; 1698 1699 port_node = rockchip_of_graph_get_port_by_id(node, port); 1700 if (!port_node) 1701 return NULL; 1702 1703 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1704 if (ofnode_read_u32(ep, "reg", ®)) 1705 break; 1706 if (reg == endpoint) 1707 break; 1708 } 1709 1710 if (!ofnode_valid(ep)) 1711 return NULL; 1712 1713 return ofnode_to_np(ep); 1714 } 1715 1716 static const struct device_node * 1717 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint) 1718 { 1719 const struct device_node *ep_node; 1720 ofnode ep; 1721 uint phandle; 1722 1723 ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint); 1724 if (!ep_node) 1725 return NULL; 1726 1727 if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle)) 1728 return NULL; 1729 1730 ep = ofnode_get_by_phandle(phandle); 1731 if (!ofnode_valid(ep)) 1732 return NULL; 1733 1734 return ofnode_to_np(ep); 1735 } 1736 1737 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1738 { 1739 const struct device_node *ep_node, *panel_node; 1740 ofnode panel_ofnode, port; 1741 struct udevice *panel_dev; 1742 int ret = 0; 1743 1744 *panel = NULL; 1745 panel_ofnode = dev_read_subnode(dev, "panel"); 1746 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1747 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1748 &panel_dev); 1749 if (!ret) 1750 goto found; 1751 } 1752 1753 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1754 if (!ep_node) 1755 return -ENODEV; 1756 1757 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1758 if (!ofnode_valid(port)) 1759 return -ENODEV; 1760 1761 panel_node = rockchip_of_graph_get_port_parent(port); 1762 if (!panel_node) 1763 return -ENODEV; 1764 1765 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1766 if (!ret) 1767 goto found; 1768 1769 return -ENODEV; 1770 1771 found: 1772 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1773 return 0; 1774 } 1775 1776 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1777 { 1778 const struct device_node *ep_node, *bridge_node; 1779 ofnode port; 1780 struct udevice *bridge_dev; 1781 int ret = 0; 1782 1783 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1784 if (!ep_node) 1785 return -ENODEV; 1786 1787 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1788 if (!ofnode_valid(port)) 1789 return -ENODEV; 1790 1791 bridge_node = rockchip_of_graph_get_port_parent(port); 1792 if (!bridge_node) 1793 return -ENODEV; 1794 1795 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1796 &bridge_dev); 1797 if (!ret) 1798 goto found; 1799 1800 return -ENODEV; 1801 1802 found: 1803 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1804 return 0; 1805 } 1806 1807 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1808 struct rockchip_bridge **bridge) 1809 { 1810 int ret = 0; 1811 1812 if (*panel) 1813 return 0; 1814 1815 *panel = NULL; 1816 *bridge = NULL; 1817 1818 if (panel) { 1819 ret = rockchip_of_find_panel(dev, panel); 1820 if (!ret) 1821 return 0; 1822 } 1823 1824 if (ret) { 1825 ret = rockchip_of_find_bridge(dev, bridge); 1826 if (!ret) 1827 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1828 &(*bridge)->next_bridge); 1829 } 1830 1831 return ret; 1832 } 1833 1834 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1835 { 1836 struct udevice *phy_dev; 1837 int ret; 1838 1839 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1840 if (ret) 1841 return NULL; 1842 1843 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1844 } 1845 1846 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1847 { 1848 ofnode ep, port, ports, conn; 1849 uint phandle; 1850 struct udevice *dev; 1851 int ret; 1852 1853 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1854 return NULL; 1855 1856 ep = ofnode_get_by_phandle(phandle); 1857 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1858 return NULL; 1859 1860 port = ofnode_get_parent(ep); 1861 if (!ofnode_valid(port)) 1862 return NULL; 1863 1864 ports = ofnode_get_parent(port); 1865 if (!ofnode_valid(ports)) 1866 return NULL; 1867 1868 conn = ofnode_get_parent(ports); 1869 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1870 return NULL; 1871 1872 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1873 if (ret) 1874 return NULL; 1875 1876 return dev; 1877 } 1878 1879 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1880 { 1881 struct rockchip_connector *conn; 1882 struct udevice *dev; 1883 int ret; 1884 1885 dev = rockchip_of_find_connector_device(endpoint); 1886 if (!dev) { 1887 printf("Warn: can't find connect driver\n"); 1888 return NULL; 1889 } 1890 1891 conn = get_rockchip_connector_by_device(dev); 1892 if (!conn) 1893 return NULL; 1894 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1895 if (ret) 1896 debug("Warn: no find panel or bridge\n"); 1897 1898 conn->phy = rockchip_of_find_phy(dev); 1899 1900 return conn; 1901 } 1902 1903 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1904 { 1905 char *conn_name; 1906 struct device_node *split_node; 1907 struct udevice *split_dev; 1908 struct rockchip_connector *split_conn; 1909 int ret; 1910 1911 conn->split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1912 conn->dual_channel_mode = ofnode_read_bool(conn->dev->node, "dual-channel"); 1913 if (!conn->split_mode && !conn->dual_channel_mode) 1914 return NULL; 1915 1916 switch (conn->type) { 1917 case DRM_MODE_CONNECTOR_DisplayPort: 1918 conn_name = "dp"; 1919 break; 1920 case DRM_MODE_CONNECTOR_eDP: 1921 conn_name = "edp"; 1922 break; 1923 case DRM_MODE_CONNECTOR_HDMIA: 1924 conn_name = "hdmi"; 1925 break; 1926 case DRM_MODE_CONNECTOR_LVDS: 1927 conn_name = "lvds"; 1928 break; 1929 default: 1930 return NULL; 1931 } 1932 1933 split_node = of_alias_get_dev(conn_name, !conn->id); 1934 if (!split_node || !of_device_is_available(split_node)) 1935 return NULL; 1936 1937 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1938 if (ret) 1939 return NULL; 1940 1941 split_conn = get_rockchip_connector_by_device(split_dev); 1942 if (!split_conn) 1943 return NULL; 1944 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1945 if (ret) 1946 debug("Warn: no find panel or bridge\n"); 1947 1948 split_conn->phy = rockchip_of_find_phy(split_dev); 1949 split_conn->split_mode = conn->split_mode; 1950 split_conn->dual_channel_mode = conn->dual_channel_mode; 1951 1952 return split_conn; 1953 } 1954 1955 static bool rockchip_get_display_path_status(ofnode endpoint) 1956 { 1957 ofnode ep; 1958 uint phandle; 1959 1960 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1961 return false; 1962 1963 ep = ofnode_get_by_phandle(phandle); 1964 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1965 return false; 1966 1967 return true; 1968 } 1969 1970 #if defined(CONFIG_ROCKCHIP_RK3568) 1971 static int rockchip_display_fixup_dts(void *blob) 1972 { 1973 ofnode route_node, route_subnode, conn_ep, conn_port; 1974 const struct device_node *route_sub_devnode; 1975 const struct device_node *ep_node, *conn_ep_dev_node; 1976 u32 phandle; 1977 int conn_ep_offset; 1978 const char *route_sub_path, *path; 1979 1980 /* Don't go further if new variant after 1981 * reading PMUGRF_SOC_CON15 1982 */ 1983 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1984 return 0; 1985 1986 route_node = ofnode_path("/display-subsystem/route"); 1987 if (!ofnode_valid(route_node)) 1988 return -EINVAL; 1989 1990 ofnode_for_each_subnode(route_subnode, route_node) { 1991 if (!ofnode_is_available(route_subnode)) 1992 continue; 1993 1994 route_sub_devnode = ofnode_to_np(route_subnode); 1995 route_sub_path = route_sub_devnode->full_name; 1996 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1997 !strstr(ofnode_get_name(route_subnode), "edp")) 1998 return 0; 1999 2000 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 2001 if (phandle < 0) { 2002 printf("Warn: can't find connect node's handle\n"); 2003 continue; 2004 } 2005 2006 ep_node = of_find_node_by_phandle(phandle); 2007 if (!ofnode_valid(np_to_ofnode(ep_node))) { 2008 printf("Warn: can't find endpoint node from phandle\n"); 2009 continue; 2010 } 2011 2012 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 2013 conn_ep = ofnode_get_by_phandle(phandle); 2014 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 2015 return -ENODEV; 2016 2017 conn_port = ofnode_get_parent(conn_ep); 2018 if (!ofnode_valid(conn_port)) 2019 return -ENODEV; 2020 2021 ofnode_for_each_subnode(conn_ep, conn_port) { 2022 conn_ep_dev_node = ofnode_to_np(conn_ep); 2023 path = conn_ep_dev_node->full_name; 2024 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 2025 conn_ep_offset = fdt_path_offset(blob, path); 2026 2027 if (!ofnode_is_available(conn_ep) && 2028 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 2029 do_fixup_by_path_u32(blob, route_sub_path, 2030 "connect", phandle, 1); 2031 fdt_status_okay(blob, conn_ep_offset); 2032 2033 } else if (ofnode_is_available(conn_ep) && 2034 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 2035 fdt_status_disabled(blob, conn_ep_offset); 2036 } 2037 } 2038 } 2039 2040 return 0; 2041 } 2042 #endif 2043 2044 static int rockchip_display_probe(struct udevice *dev) 2045 { 2046 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 2047 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2048 const void *blob = gd->fdt_blob; 2049 int phandle; 2050 struct udevice *crtc_dev; 2051 struct rockchip_crtc *crtc; 2052 struct rockchip_connector *conn, *split_conn; 2053 struct display_state *s; 2054 const char *name; 2055 int ret; 2056 ofnode node, route_node, timing_node; 2057 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 2058 struct public_phy_data *data; 2059 bool is_ports_node = false; 2060 2061 #if defined(CONFIG_ROCKCHIP_RK3568) 2062 rockchip_display_fixup_dts((void *)blob); 2063 #endif 2064 /* Before relocation we don't need to do anything */ 2065 if (!(gd->flags & GD_FLG_RELOC)) 2066 return 0; 2067 2068 data = malloc(sizeof(struct public_phy_data)); 2069 if (!data) { 2070 printf("failed to alloc phy data\n"); 2071 return -ENOMEM; 2072 } 2073 data->phy_init = false; 2074 2075 init_display_buffer(plat->base); 2076 2077 route_node = dev_read_subnode(dev, "route"); 2078 if (!ofnode_valid(route_node)) 2079 return -ENODEV; 2080 2081 ofnode_for_each_subnode(node, route_node) { 2082 if (!ofnode_is_available(node)) 2083 continue; 2084 phandle = ofnode_read_u32_default(node, "connect", -1); 2085 if (phandle < 0) { 2086 printf("Warn: can't find connect node's handle\n"); 2087 continue; 2088 } 2089 ep_node = of_find_node_by_phandle(phandle); 2090 if (!ofnode_valid(np_to_ofnode(ep_node))) { 2091 printf("Warn: can't find endpoint node from phandle\n"); 2092 continue; 2093 } 2094 port_node = of_get_parent(ep_node); 2095 if (!ofnode_valid(np_to_ofnode(port_node))) { 2096 printf("Warn: can't find port node from phandle\n"); 2097 continue; 2098 } 2099 2100 port_parent_node = of_get_parent(port_node); 2101 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 2102 printf("Warn: can't find port parent node from phandle\n"); 2103 continue; 2104 } 2105 2106 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 2107 if (is_ports_node) { 2108 vop_node = of_get_parent(port_parent_node); 2109 if (!ofnode_valid(np_to_ofnode(vop_node))) { 2110 printf("Warn: can't find crtc node from phandle\n"); 2111 continue; 2112 } 2113 } else { 2114 vop_node = port_parent_node; 2115 } 2116 2117 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 2118 np_to_ofnode(vop_node), 2119 &crtc_dev); 2120 if (ret) { 2121 printf("Warn: can't find crtc driver %d\n", ret); 2122 continue; 2123 } 2124 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 2125 2126 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 2127 if (!conn) { 2128 printf("Warn: can't get connect driver\n"); 2129 continue; 2130 } 2131 split_conn = rockchip_get_split_connector(conn); 2132 2133 s = malloc(sizeof(*s)); 2134 if (!s) 2135 continue; 2136 2137 memset(s, 0, sizeof(*s)); 2138 2139 INIT_LIST_HEAD(&s->head); 2140 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 2141 if (!ret) 2142 memcpy(s->ulogo_name, name, strlen(name)); 2143 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 2144 if (!ret) 2145 memcpy(s->klogo_name, name, strlen(name)); 2146 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 2147 if (!strcmp(name, "fullscreen")) 2148 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2149 else 2150 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 2151 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 2152 if (!strcmp(name, "fullscreen")) 2153 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2154 else 2155 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 2156 2157 s->logo_rotate = ofnode_read_u32_default(node, "logo,rotate", 0); 2158 2159 s->force_output = ofnode_read_bool(node, "force-output"); 2160 2161 if (s->force_output) { 2162 timing_node = ofnode_find_subnode(node, "force_timing"); 2163 ret = display_get_force_timing_from_dts(timing_node, 2164 &s->force_mode, 2165 &s->conn_state.bus_flags); 2166 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 2167 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 2168 } 2169 2170 s->blob = blob; 2171 s->conn_state.connector = conn; 2172 s->conn_state.secondary = NULL; 2173 s->conn_state.type = conn->type; 2174 if (split_conn) { 2175 s->conn_state.secondary = split_conn; 2176 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 2177 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 2178 } 2179 s->conn_state.overscan.left_margin = 100; 2180 s->conn_state.overscan.right_margin = 100; 2181 s->conn_state.overscan.top_margin = 100; 2182 s->conn_state.overscan.bottom_margin = 100; 2183 s->crtc_state.node = np_to_ofnode(vop_node); 2184 s->crtc_state.port_node = port_node; 2185 s->crtc_state.dev = crtc_dev; 2186 s->crtc_state.crtc = crtc; 2187 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 2188 s->node = node; 2189 2190 if (is_ports_node) { /* only vop2 will get into here */ 2191 ofnode vp_node = np_to_ofnode(port_node); 2192 static bool get_plane_mask_from_dts; 2193 2194 s->crtc_state.ports_node = port_parent_node; 2195 if (!get_plane_mask_from_dts) { 2196 ofnode vp_sub_node; 2197 int vp_id = 0; 2198 bool vp_enable = false; 2199 2200 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 2201 int cursor_plane = -1; 2202 2203 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 2204 2205 s->crtc_state.crtc->vps[vp_id].xmirror_en = 2206 ofnode_read_bool(vp_node, "xmirror-enable"); 2207 2208 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 2209 2210 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2211 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2212 if (ret) { 2213 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2214 s->crtc_state.crtc->assign_plane |= true; 2215 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2216 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", -1); 2217 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2218 vp_id, 2219 s->crtc_state.crtc->vps[vp_id].plane_mask, 2220 (int8_t)s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2221 cursor_plane); 2222 } 2223 2224 /* To check current vp status */ 2225 vp_enable = false; 2226 ofnode_for_each_subnode(vp_sub_node, vp_node) 2227 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2228 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2229 } 2230 get_plane_mask_from_dts = true; 2231 } 2232 } 2233 2234 get_crtc_mcu_mode(&s->crtc_state, port_node, is_ports_node); 2235 2236 ret = ofnode_read_u32_default(s->crtc_state.node, 2237 "rockchip,dual-channel-swap", 0); 2238 s->crtc_state.dual_channel_swap = ret; 2239 2240 if (connector_phy_init(conn, data)) { 2241 printf("Warn: Failed to init phy drivers\n"); 2242 free(s); 2243 continue; 2244 } 2245 list_add_tail(&s->head, &rockchip_display_list); 2246 } 2247 2248 if (list_empty(&rockchip_display_list)) { 2249 debug("Failed to found available display route\n"); 2250 return -ENODEV; 2251 } 2252 rockchip_get_baseparameter(); 2253 display_pre_init(); 2254 2255 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2256 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2257 uc_priv->bpix = VIDEO_BPP32; 2258 2259 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2260 rockchip_show_fbbase(plat->base); 2261 video_set_flush_dcache(dev, true); 2262 #endif 2263 2264 return 0; 2265 } 2266 2267 void rockchip_display_fixup(void *blob) 2268 { 2269 const struct rockchip_connector_funcs *conn_funcs; 2270 const struct rockchip_crtc_funcs *crtc_funcs; 2271 struct rockchip_connector *conn; 2272 const struct rockchip_crtc *crtc; 2273 struct display_state *s; 2274 int offset; 2275 int ret; 2276 const struct device_node *np; 2277 const char *path; 2278 const char *cacm_header; 2279 u64 aligned_memory_size; 2280 bool is_logo_init = 0; 2281 2282 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2283 list_for_each_entry(s, &rockchip_display_list, head) { 2284 if (s->is_init) { 2285 ret = load_bmp_logo(&s->logo, s->klogo_name); 2286 if (ret < 0) { 2287 s->is_klogo_valid = false; 2288 printf("VP%d fail to load kernel logo\n", 2289 s->crtc_state.crtc_id); 2290 } else { 2291 s->is_klogo_valid = true; 2292 } 2293 } 2294 is_logo_init |= s->is_init; 2295 } 2296 2297 if (!is_logo_init) { 2298 printf("The display is not initialized, skip display fixup\n"); 2299 return; 2300 } 2301 2302 if (!get_display_size()) 2303 return; 2304 2305 aligned_memory_size = (u64)ALIGN(get_display_size(), align_size); 2306 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2307 (u64)memory_start, 2308 aligned_memory_size); 2309 if (offset < 0) 2310 printf("failed to reserve drm-loader-logo memory\n"); 2311 2312 if (get_cubic_memory_size()) { 2313 aligned_memory_size = (u64)ALIGN(get_cubic_memory_size(), align_size); 2314 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2315 (u64)cubic_lut_memory_start, 2316 aligned_memory_size); 2317 if (offset < 0) 2318 printf("failed to reserve drm-cubic-lut memory\n"); 2319 } 2320 } else { 2321 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2322 /* Compatible with rkfb display, only need reserve memory */ 2323 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2324 (u64)memory_start, 2325 MEMORY_POOL_SIZE); 2326 if (offset < 0) 2327 printf("failed to reserve fb-loader-logo memory\n"); 2328 else 2329 list_for_each_entry(s, &rockchip_display_list, head) 2330 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2331 return; 2332 } 2333 2334 list_for_each_entry(s, &rockchip_display_list, head) { 2335 /* 2336 * If plane mask is not set in dts, fixup dts to assign it 2337 * whether crtc is initialized or not. 2338 */ 2339 if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane) 2340 s->crtc_state.crtc->funcs->fixup_dts(s, blob); 2341 2342 if (!s->is_init || !s->is_klogo_valid) 2343 continue; 2344 2345 conn = s->conn_state.connector; 2346 if (!conn) 2347 continue; 2348 conn_funcs = conn->funcs; 2349 if (!conn_funcs) { 2350 printf("failed to get exist connector\n"); 2351 continue; 2352 } 2353 2354 crtc = s->crtc_state.crtc; 2355 if (!crtc) 2356 continue; 2357 2358 crtc_funcs = crtc->funcs; 2359 if (!crtc_funcs) { 2360 printf("failed to get exist crtc\n"); 2361 continue; 2362 } 2363 2364 np = ofnode_to_np(s->node); 2365 path = np->full_name; 2366 fdt_increase_size(blob, 0x400); 2367 #define FDT_SET_U32(name, val) \ 2368 do_fixup_by_path_u32(blob, path, name, val, 1); 2369 2370 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2371 - memory_start; 2372 FDT_SET_U32("logo,offset", offset); 2373 FDT_SET_U32("logo,width", s->logo.width); 2374 FDT_SET_U32("logo,height", s->logo.height); 2375 FDT_SET_U32("logo,bpp", s->logo.bpp); 2376 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2377 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2378 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2379 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2380 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2381 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2382 FDT_SET_U32("video,vrefresh", 2383 drm_mode_vrefresh(&s->conn_state.mode)); 2384 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2385 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2386 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2387 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2388 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2389 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2390 2391 if (s->conn_state.disp_info) { 2392 cacm_header = (const char*)&s->conn_state.disp_info->cacm_header; 2393 2394 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2395 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2396 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2397 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2398 2399 if (!strncasecmp(cacm_header, "CACM", 4)) { 2400 FDT_SET_U32("post-csc,hue", 2401 s->conn_state.disp_info->csc_info.hue); 2402 FDT_SET_U32("post-csc,saturation", 2403 s->conn_state.disp_info->csc_info.saturation); 2404 FDT_SET_U32("post-csc,contrast", 2405 s->conn_state.disp_info->csc_info.contrast); 2406 FDT_SET_U32("post-csc,brightness", 2407 s->conn_state.disp_info->csc_info.brightness); 2408 FDT_SET_U32("post-csc,r-gain", 2409 s->conn_state.disp_info->csc_info.r_gain); 2410 FDT_SET_U32("post-csc,g-gain", 2411 s->conn_state.disp_info->csc_info.g_gain); 2412 FDT_SET_U32("post-csc,b-gain", 2413 s->conn_state.disp_info->csc_info.b_gain); 2414 FDT_SET_U32("post-csc,r-offset", 2415 s->conn_state.disp_info->csc_info.r_offset); 2416 FDT_SET_U32("post-csc,g-offset", 2417 s->conn_state.disp_info->csc_info.g_offset); 2418 FDT_SET_U32("post-csc,b-offset", 2419 s->conn_state.disp_info->csc_info.b_offset); 2420 FDT_SET_U32("post-csc,enable", 2421 s->conn_state.disp_info->csc_info.csc_enable); 2422 } 2423 } 2424 2425 if (s->conn_state.disp_info->cubic_lut_data.size && 2426 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2427 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2428 2429 #undef FDT_SET_U32 2430 } 2431 } 2432 2433 int rockchip_display_bind(struct udevice *dev) 2434 { 2435 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2436 2437 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2438 2439 return 0; 2440 } 2441 2442 static const struct udevice_id rockchip_display_ids[] = { 2443 { .compatible = "rockchip,display-subsystem" }, 2444 { } 2445 }; 2446 2447 U_BOOT_DRIVER(rockchip_display) = { 2448 .name = "rockchip_display", 2449 .id = UCLASS_VIDEO, 2450 .of_match = rockchip_display_ids, 2451 .bind = rockchip_display_bind, 2452 .probe = rockchip_display_probe, 2453 }; 2454 2455 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2456 char *const argv[]) 2457 { 2458 if (argc != 1) 2459 return CMD_RET_USAGE; 2460 2461 rockchip_show_logo(); 2462 2463 return 0; 2464 } 2465 2466 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2467 char *const argv[]) 2468 { 2469 if (argc != 2) 2470 return CMD_RET_USAGE; 2471 2472 rockchip_show_bmp(argv[1]); 2473 2474 return 0; 2475 } 2476 2477 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc, 2478 char *const argv[]) 2479 { 2480 int ret; 2481 2482 if (argc < 1 || argc > 2) 2483 return CMD_RET_USAGE; 2484 2485 ret = rockchip_vop_dump(argv[1]); 2486 2487 return ret; 2488 } 2489 2490 U_BOOT_CMD( 2491 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2492 "load and display log from resource partition", 2493 NULL 2494 ); 2495 2496 U_BOOT_CMD( 2497 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2498 "load and display bmp from resource partition", 2499 " <bmp_name>" 2500 ); 2501 2502 U_BOOT_CMD( 2503 vop_dump, 2, 1, do_rockchip_vop_dump, 2504 "dump vop regs", 2505 " [a/all]" 2506 ); 2507