1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/unaligned.h> 8 #include <boot_rkimg.h> 9 #include <config.h> 10 #include <common.h> 11 #include <errno.h> 12 #include <linux/libfdt.h> 13 #include <fdtdec.h> 14 #include <fdt_support.h> 15 #include <linux/hdmi.h> 16 #include <linux/list.h> 17 #include <linux/compat.h> 18 #include <linux/media-bus-format.h> 19 #include <malloc.h> 20 #include <video.h> 21 #include <video_rockchip.h> 22 #include <video_bridge.h> 23 #include <dm/device.h> 24 #include <dm/uclass-internal.h> 25 #include <asm/arch-rockchip/resource_img.h> 26 #include <asm/arch-rockchip/cpu.h> 27 28 #include "bmp_helper.h" 29 #include "libnsbmp.h" 30 #include "rockchip_display.h" 31 #include "rockchip_crtc.h" 32 #include "rockchip_connector.h" 33 #include "rockchip_bridge.h" 34 #include "rockchip_phy.h" 35 #include "rockchip_panel.h" 36 #include <dm.h> 37 #include <dm/of_access.h> 38 #include <dm/ofnode.h> 39 #include <asm/io.h> 40 41 #define DRIVER_VERSION "v1.0.1" 42 43 /*********************************************************************** 44 * Rockchip UBOOT DRM driver version 45 * 46 * v1.0.0 : add basic version for rockchip drm driver(hjc) 47 * v1.0.1 : add much dsi update(hjc) 48 * 49 **********************************************************************/ 50 51 #define RK_BLK_SIZE 512 52 #define BMP_PROCESSED_FLAG 8399 53 #define BYTES_PER_PIXEL sizeof(uint32_t) 54 #define MAX_IMAGE_BYTES (8 * 1024 * 1024) 55 56 DECLARE_GLOBAL_DATA_PTR; 57 static LIST_HEAD(rockchip_display_list); 58 static LIST_HEAD(logo_cache_list); 59 60 static unsigned long memory_start; 61 static unsigned long cubic_lut_memory_start; 62 static unsigned long memory_end; 63 static struct base2_info base_parameter; 64 static u32 align_size = PAGE_SIZE; 65 66 /* 67 * the phy types are used by different connectors in public. 68 * The current version only has inno hdmi phy for hdmi and tve. 69 */ 70 enum public_use_phy { 71 NONE, 72 INNO_HDMI_PHY 73 }; 74 75 /* save public phy data */ 76 struct public_phy_data { 77 const struct rockchip_phy *phy_drv; 78 int phy_node; 79 int public_phy_type; 80 bool phy_init; 81 }; 82 83 char* rockchip_get_output_if_name(u32 output_if, char *name) 84 { 85 if (output_if & VOP_OUTPUT_IF_RGB) 86 strcat(name, " RGB"); 87 if (output_if & VOP_OUTPUT_IF_BT1120) 88 strcat(name, " BT1120"); 89 if (output_if & VOP_OUTPUT_IF_BT656) 90 strcat(name, " BT656"); 91 if (output_if & VOP_OUTPUT_IF_LVDS0) 92 strcat(name, " LVDS0"); 93 if (output_if & VOP_OUTPUT_IF_LVDS1) 94 strcat(name, " LVDS1"); 95 if (output_if & VOP_OUTPUT_IF_MIPI0) 96 strcat(name, " MIPI0"); 97 if (output_if & VOP_OUTPUT_IF_MIPI1) 98 strcat(name, " MIPI1"); 99 if (output_if & VOP_OUTPUT_IF_eDP0) 100 strcat(name, " eDP0"); 101 if (output_if & VOP_OUTPUT_IF_eDP1) 102 strcat(name, " eDP1"); 103 if (output_if & VOP_OUTPUT_IF_DP0) 104 strcat(name, " DP0"); 105 if (output_if & VOP_OUTPUT_IF_DP1) 106 strcat(name, " DP1"); 107 if (output_if & VOP_OUTPUT_IF_HDMI0) 108 strcat(name, " HDMI0"); 109 if (output_if & VOP_OUTPUT_IF_HDMI1) 110 strcat(name, " HDMI1"); 111 112 return name; 113 } 114 115 u32 rockchip_drm_get_cycles_per_pixel(u32 bus_format) 116 { 117 switch (bus_format) { 118 case MEDIA_BUS_FMT_RGB565_1X16: 119 case MEDIA_BUS_FMT_RGB666_1X18: 120 case MEDIA_BUS_FMT_RGB888_1X24: 121 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 122 return 1; 123 case MEDIA_BUS_FMT_RGB565_2X8_LE: 124 case MEDIA_BUS_FMT_BGR565_2X8_LE: 125 return 2; 126 case MEDIA_BUS_FMT_RGB666_3X6: 127 case MEDIA_BUS_FMT_RGB888_3X8: 128 case MEDIA_BUS_FMT_BGR888_3X8: 129 return 3; 130 case MEDIA_BUS_FMT_RGB888_DUMMY_4X8: 131 case MEDIA_BUS_FMT_BGR888_DUMMY_4X8: 132 return 4; 133 default: 134 return 1; 135 } 136 } 137 138 int rockchip_get_baseparameter(void) 139 { 140 struct blk_desc *dev_desc; 141 disk_partition_t part_info; 142 int block_num = 2048; 143 char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 144 int ret = 0; 145 146 dev_desc = rockchip_get_bootdev(); 147 if (!dev_desc) { 148 printf("%s: Could not find device\n", __func__); 149 return -ENOENT; 150 } 151 152 if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 153 printf("Could not find baseparameter partition\n"); 154 return -ENOENT; 155 } 156 157 ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 158 if (ret < 0) { 159 printf("read baseparameter failed\n"); 160 return ret; 161 } 162 163 memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 164 if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 165 printf("warning: bad baseparameter\n"); 166 memset(&base_parameter, 0, sizeof(base_parameter)); 167 } 168 rockchip_display_make_crc32_table(); 169 170 return ret; 171 } 172 173 struct base2_disp_info *rockchip_get_disp_info(int type, int id) 174 { 175 struct base2_disp_info *disp_info; 176 struct base2_disp_header *disp_header; 177 int i = 0, offset = -1; 178 u32 crc_val; 179 u32 base2_length; 180 void *base_parameter_addr = (void *)&base_parameter; 181 182 for (i = 0; i < 8; i++) { 183 disp_header = &base_parameter.disp_header[i]; 184 if (disp_header->connector_type == type && 185 disp_header->connector_id == id) { 186 printf("disp info %d, type:%d, id:%d\n", i, type, id); 187 offset = disp_header->offset; 188 break; 189 } 190 } 191 192 if (offset < 0) 193 return NULL; 194 disp_info = base_parameter_addr + offset; 195 if (disp_info->screen_info[0].type != type || 196 disp_info->screen_info[0].id != id) { 197 printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n", 198 disp_info->screen_info[0].type, 199 disp_info->screen_info[0].id); 200 return NULL; 201 } 202 203 if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 204 return NULL; 205 206 if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) { 207 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, 208 sizeof(struct base2_disp_info) - 4); 209 if (crc_val != disp_info->crc2) { 210 printf("error: connector type[%d], id[%d] disp info crc2 check error\n", 211 type, id); 212 return NULL; 213 } 214 } else { 215 base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) - 216 sizeof(struct acm_data) - 10 * 1024 - 4; 217 crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4); 218 if (crc_val != disp_info->crc) { 219 printf("error: connector type[%d], id[%d] disp info crc check error\n", 220 type, id); 221 return NULL; 222 } 223 } 224 225 return disp_info; 226 } 227 228 /* check which kind of public phy does connector use */ 229 static int check_public_use_phy(struct rockchip_connector *conn) 230 { 231 int ret = NONE; 232 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 233 234 if (!strncmp(dev_read_name(conn->dev), "tve", 3) || 235 !strncmp(dev_read_name(conn->dev), "hdmi", 4)) 236 ret = INNO_HDMI_PHY; 237 #endif 238 239 return ret; 240 } 241 242 /* 243 * get public phy driver and initialize it. 244 * The current version only has inno hdmi phy for hdmi and tve. 245 */ 246 static int get_public_phy(struct rockchip_connector *conn, 247 struct public_phy_data *data) 248 { 249 struct rockchip_phy *phy; 250 struct udevice *dev; 251 int ret = 0; 252 253 switch (data->public_phy_type) { 254 case INNO_HDMI_PHY: 255 #if defined(CONFIG_ROCKCHIP_RK3328) 256 ret = uclass_get_device_by_name(UCLASS_PHY, 257 "hdmiphy@ff430000", &dev); 258 #elif defined(CONFIG_ROCKCHIP_RK322X) 259 ret = uclass_get_device_by_name(UCLASS_PHY, 260 "hdmi-phy@12030000", &dev); 261 #else 262 ret = -EINVAL; 263 #endif 264 if (ret) { 265 printf("Warn: can't find phy driver\n"); 266 return 0; 267 } 268 269 phy = (struct rockchip_phy *)dev_get_driver_data(dev); 270 if (!phy) { 271 printf("failed to get phy driver\n"); 272 return 0; 273 } 274 275 ret = rockchip_phy_init(phy); 276 if (ret) { 277 printf("failed to init phy driver\n"); 278 return ret; 279 } 280 conn->phy = phy; 281 282 debug("inno hdmi phy init success, save it\n"); 283 data->phy_drv = conn->phy; 284 data->phy_init = true; 285 return 0; 286 default: 287 return -EINVAL; 288 } 289 } 290 291 static void init_display_buffer(ulong base) 292 { 293 memory_start = ALIGN(base + DRM_ROCKCHIP_FB_SIZE, align_size); 294 memory_end = memory_start; 295 cubic_lut_memory_start = ALIGN(memory_start + MEMORY_POOL_SIZE, align_size); 296 } 297 298 void *get_display_buffer(int size) 299 { 300 unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 301 void *buf; 302 303 if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 304 printf("failed to alloc %dbyte memory to display\n", size); 305 return NULL; 306 } 307 buf = (void *)roundup_memory; 308 309 memory_end = roundup_memory + size; 310 311 return buf; 312 } 313 314 static unsigned long get_display_size(void) 315 { 316 return memory_end - memory_start; 317 } 318 319 static unsigned long get_single_cubic_lut_size(void) 320 { 321 ulong cubic_lut_size; 322 int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 323 324 /* This is depend on IC designed */ 325 cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 326 cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 327 328 return cubic_lut_size; 329 } 330 331 static unsigned long get_cubic_lut_offset(int crtc_id) 332 { 333 return crtc_id * get_single_cubic_lut_size(); 334 } 335 336 unsigned long get_cubic_lut_buffer(int crtc_id) 337 { 338 return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 339 } 340 341 static unsigned long get_cubic_memory_size(void) 342 { 343 /* Max support 4 cubic lut */ 344 return get_single_cubic_lut_size() * 4; 345 } 346 347 bool can_direct_logo(int bpp) 348 { 349 return bpp == 16 || bpp == 32; 350 } 351 352 static int connector_phy_init(struct rockchip_connector *conn, 353 struct public_phy_data *data) 354 { 355 int type; 356 357 /* does this connector use public phy with others */ 358 type = check_public_use_phy(conn); 359 if (type == INNO_HDMI_PHY) { 360 /* there is no public phy was initialized */ 361 if (!data->phy_init) { 362 debug("start get public phy\n"); 363 data->public_phy_type = type; 364 if (get_public_phy(conn, data)) { 365 printf("can't find correct public phy type\n"); 366 free(data); 367 return -EINVAL; 368 } 369 return 0; 370 } 371 372 /* if this phy has been initialized, get it directly */ 373 conn->phy = (struct rockchip_phy *)data->phy_drv; 374 return 0; 375 } 376 377 return 0; 378 } 379 380 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode, u32 *bus_flags) 381 { 382 int hactive, vactive, pixelclock; 383 int hfront_porch, hback_porch, hsync_len; 384 int vfront_porch, vback_porch, vsync_len; 385 int val, flags = 0; 386 387 #define FDT_GET_BOOL(val, name) \ 388 val = ofnode_read_bool(node, name); 389 390 #define FDT_GET_INT(val, name) \ 391 val = ofnode_read_s32_default(node, name, -1); \ 392 if (val < 0) { \ 393 printf("Can't get %s\n", name); \ 394 return -ENXIO; \ 395 } 396 397 #define FDT_GET_INT_DEFAULT(val, name, default) \ 398 val = ofnode_read_s32_default(node, name, default); 399 400 FDT_GET_INT(hactive, "hactive"); 401 FDT_GET_INT(vactive, "vactive"); 402 FDT_GET_INT(pixelclock, "clock-frequency"); 403 FDT_GET_INT(hsync_len, "hsync-len"); 404 FDT_GET_INT(hfront_porch, "hfront-porch"); 405 FDT_GET_INT(hback_porch, "hback-porch"); 406 FDT_GET_INT(vsync_len, "vsync-len"); 407 FDT_GET_INT(vfront_porch, "vfront-porch"); 408 FDT_GET_INT(vback_porch, "vback-porch"); 409 FDT_GET_INT(val, "hsync-active"); 410 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 411 FDT_GET_INT(val, "vsync-active"); 412 flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 413 414 FDT_GET_BOOL(val, "interlaced"); 415 flags |= val ? DRM_MODE_FLAG_INTERLACE : 0; 416 FDT_GET_BOOL(val, "doublescan"); 417 flags |= val ? DRM_MODE_FLAG_DBLSCAN : 0; 418 FDT_GET_BOOL(val, "doubleclk"); 419 flags |= val ? DISPLAY_FLAGS_DOUBLECLK : 0; 420 421 FDT_GET_INT(val, "de-active"); 422 *bus_flags |= val ? DRM_BUS_FLAG_DE_HIGH : DRM_BUS_FLAG_DE_LOW; 423 FDT_GET_INT(val, "pixelclk-active"); 424 *bus_flags |= val ? DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE : DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 425 426 FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 427 if (val == DRM_MODE_FLAG_XMIRROR) { 428 flags |= DRM_MODE_FLAG_XMIRROR; 429 } else if (val == DRM_MODE_FLAG_YMIRROR) { 430 flags |= DRM_MODE_FLAG_YMIRROR; 431 } else if (val == DRM_MODE_FLAG_XYMIRROR) { 432 flags |= DRM_MODE_FLAG_XMIRROR; 433 flags |= DRM_MODE_FLAG_YMIRROR; 434 } 435 mode->hdisplay = hactive; 436 mode->hsync_start = mode->hdisplay + hfront_porch; 437 mode->hsync_end = mode->hsync_start + hsync_len; 438 mode->htotal = mode->hsync_end + hback_porch; 439 440 mode->vdisplay = vactive; 441 mode->vsync_start = mode->vdisplay + vfront_porch; 442 mode->vsync_end = mode->vsync_start + vsync_len; 443 mode->vtotal = mode->vsync_end + vback_porch; 444 445 mode->clock = pixelclock / 1000; 446 mode->flags = flags; 447 mode->vrefresh = drm_mode_vrefresh(mode); 448 449 return 0; 450 } 451 452 static int display_get_force_timing_from_dts(ofnode node, 453 struct drm_display_mode *mode, 454 u32 *bus_flags) 455 { 456 int ret = 0; 457 458 ret = rockchip_ofnode_get_display_mode(node, mode, bus_flags); 459 460 if (ret) { 461 mode->clock = 74250; 462 mode->flags = 0x5; 463 mode->hdisplay = 1280; 464 mode->hsync_start = 1390; 465 mode->hsync_end = 1430; 466 mode->htotal = 1650; 467 mode->hskew = 0; 468 mode->vdisplay = 720; 469 mode->vsync_start = 725; 470 mode->vsync_end = 730; 471 mode->vtotal = 750; 472 mode->vrefresh = 60; 473 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 474 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 475 } 476 477 printf("route node %s force_timing, use %dx%dp%d as default mode\n", 478 ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 479 mode->vscan); 480 481 return 0; 482 } 483 484 static int display_get_timing_from_dts(struct rockchip_panel *panel, 485 struct drm_display_mode *mode, 486 u32 *bus_flags) 487 { 488 struct ofnode_phandle_args args; 489 ofnode dt, timing, mcu_panel; 490 int ret; 491 492 mcu_panel = dev_read_subnode(panel->dev, "mcu-panel"); 493 dt = dev_read_subnode(panel->dev, "display-timings"); 494 if (ofnode_valid(dt)) { 495 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 496 0, 0, &args); 497 if (ret) 498 return ret; 499 500 timing = args.node; 501 } else if (ofnode_valid(mcu_panel)) { 502 dt = ofnode_find_subnode(mcu_panel, "display-timings"); 503 ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 504 0, 0, &args); 505 if (ret) 506 return ret; 507 508 timing = args.node; 509 } else { 510 timing = dev_read_subnode(panel->dev, "panel-timing"); 511 } 512 513 if (!ofnode_valid(timing)) { 514 printf("failed to get display timings from DT\n"); 515 return -ENXIO; 516 } 517 518 rockchip_ofnode_get_display_mode(timing, mode, bus_flags); 519 520 if (IS_ENABLED(CONFIG_ROCKCHIP_RK3568) || IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) { 521 if (mode->hdisplay % 4) { 522 int old_hdisplay = mode->hdisplay; 523 int align = 4 - (mode->hdisplay % 4); 524 525 mode->hdisplay += align; 526 mode->hsync_start += align; 527 mode->hsync_end += align; 528 mode->htotal += align; 529 530 ofnode_write_u32_array(timing, "hactive", (u32 *)&mode->hdisplay, 1); 531 532 printf("WARN: hactive need to be aligned with 4-pixel, %d -> %d\n", 533 old_hdisplay, mode->hdisplay); 534 } 535 } 536 537 return 0; 538 } 539 540 static int display_get_timing(struct display_state *state) 541 { 542 struct connector_state *conn_state = &state->conn_state; 543 struct drm_display_mode *mode = &conn_state->mode; 544 const struct drm_display_mode *m; 545 struct rockchip_panel *panel = conn_state->connector->panel; 546 547 if (panel->funcs->get_mode) 548 return panel->funcs->get_mode(panel, mode); 549 550 if (dev_of_valid(panel->dev) && 551 !display_get_timing_from_dts(panel, mode, &conn_state->bus_flags)) { 552 printf("Using display timing dts\n"); 553 return 0; 554 } 555 556 if (panel->data) { 557 m = (const struct drm_display_mode *)panel->data; 558 memcpy(mode, m, sizeof(*m)); 559 printf("Using display timing from compatible panel driver\n"); 560 return 0; 561 } 562 563 return -ENODEV; 564 } 565 566 static int display_pre_init(void) 567 { 568 struct display_state *state; 569 int ret = 0; 570 571 list_for_each_entry(state, &rockchip_display_list, head) { 572 struct connector_state *conn_state = &state->conn_state; 573 struct crtc_state *crtc_state = &state->crtc_state; 574 struct rockchip_crtc *crtc = crtc_state->crtc; 575 576 ret = rockchip_connector_pre_init(state); 577 if (ret) 578 printf("pre init conn error\n"); 579 580 crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 581 } 582 return ret; 583 } 584 585 static int display_use_force_mode(struct display_state *state) 586 { 587 struct connector_state *conn_state = &state->conn_state; 588 struct drm_display_mode *mode = &conn_state->mode; 589 590 conn_state->bpc = 8; 591 memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 592 conn_state->bus_format = state->force_bus_format; 593 594 return 0; 595 } 596 597 static int display_get_edid_mode(struct display_state *state) 598 { 599 int ret = 0; 600 struct connector_state *conn_state = &state->conn_state; 601 struct drm_display_mode *mode = &conn_state->mode; 602 int bpc; 603 604 ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc); 605 if (!ret) { 606 conn_state->bpc = bpc; 607 edid_print_info((void *)&conn_state->edid); 608 } else { 609 conn_state->bpc = 8; 610 mode->clock = 74250; 611 mode->flags = 0x5; 612 mode->hdisplay = 1280; 613 mode->hsync_start = 1390; 614 mode->hsync_end = 1430; 615 mode->htotal = 1650; 616 mode->hskew = 0; 617 mode->vdisplay = 720; 618 mode->vsync_start = 725; 619 mode->vsync_end = 730; 620 mode->vtotal = 750; 621 mode->vrefresh = 60; 622 mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 623 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 624 625 printf("error: %s get mode from edid failed, use 720p60 as default mode\n", 626 state->conn_state.connector->dev->name); 627 } 628 629 return ret; 630 } 631 632 static int display_mode_valid(struct display_state *state) 633 { 634 struct connector_state *conn_state = &state->conn_state; 635 struct rockchip_connector *conn = conn_state->connector; 636 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 637 struct crtc_state *crtc_state = &state->crtc_state; 638 const struct rockchip_crtc *crtc = crtc_state->crtc; 639 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 640 int ret; 641 642 if (conn_funcs->mode_valid && state->enabled_at_spl == false) { 643 ret = conn_funcs->mode_valid(conn, state); 644 if (ret) 645 return ret; 646 } 647 648 if (crtc_funcs->mode_valid) { 649 ret = crtc_funcs->mode_valid(state); 650 if (ret) 651 return ret; 652 } 653 654 return 0; 655 } 656 657 static int display_mode_fixup(struct display_state *state) 658 { 659 struct crtc_state *crtc_state = &state->crtc_state; 660 const struct rockchip_crtc *crtc = crtc_state->crtc; 661 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 662 int ret; 663 664 if (crtc_funcs->mode_fixup) { 665 ret = crtc_funcs->mode_fixup(state); 666 if (ret) 667 return ret; 668 } 669 670 return 0; 671 } 672 673 static int display_init(struct display_state *state) 674 { 675 struct connector_state *conn_state = &state->conn_state; 676 struct rockchip_connector *conn = conn_state->connector; 677 struct crtc_state *crtc_state = &state->crtc_state; 678 struct rockchip_crtc *crtc = crtc_state->crtc; 679 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 680 struct drm_display_mode *mode = &conn_state->mode; 681 const char *compatible; 682 int ret = 0; 683 static bool __print_once = false; 684 #ifdef CONFIG_SPL_BUILD 685 struct spl_display_info *spl_disp_info = (struct spl_display_info *)CONFIG_SPL_VIDEO_BUF; 686 #endif 687 if (!__print_once) { 688 __print_once = true; 689 printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 690 } 691 692 if (state->is_init) 693 return 0; 694 695 if (!crtc_funcs) { 696 printf("failed to find crtc functions\n"); 697 return -ENXIO; 698 } 699 700 #ifdef CONFIG_SPL_BUILD 701 if (state->conn_state.type == DRM_MODE_CONNECTOR_HDMIA) 702 state->enabled_at_spl = spl_disp_info->enabled == 1 ? true : false; 703 if (state->enabled_at_spl) 704 printf("HDMI enabled at SPL\n"); 705 #endif 706 if (crtc_state->crtc->active && !crtc_state->ports_node && 707 memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 708 sizeof(struct drm_display_mode))) { 709 printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 710 crtc_state->dev->name, 711 crtc_state->crtc->active_mode.type, 712 crtc_state->crtc->active_mode.hdisplay, 713 crtc_state->crtc->active_mode.vdisplay, 714 crtc_state->crtc->active_mode.vrefresh); 715 return -ENODEV; 716 } 717 718 if (crtc_funcs->preinit) { 719 ret = crtc_funcs->preinit(state); 720 if (ret) 721 return ret; 722 } 723 724 if (state->enabled_at_spl == false) { 725 ret = rockchip_connector_init(state); 726 if (ret) 727 goto deinit; 728 } 729 730 /* 731 * support hotplug, but not connect; 732 */ 733 #ifdef CONFIG_DRM_ROCKCHIP_TVE 734 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 735 printf("hdmi plugin ,skip tve\n"); 736 goto deinit; 737 } 738 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 739 if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 740 printf("hdmi plugin ,skip tve\n"); 741 goto deinit; 742 } 743 #endif 744 745 ret = rockchip_connector_detect(state); 746 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 747 if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 748 crtc->hdmi_hpd = ret; 749 if (state->enabled_at_spl) 750 crtc->hdmi_hpd = true; 751 #endif 752 if (!ret && !state->force_output) 753 goto deinit; 754 755 ret = 0; 756 if (state->enabled_at_spl == true) { 757 #ifdef CONFIG_SPL_BUILD 758 struct drm_display_mode *mode = &conn_state->mode; 759 760 memcpy(mode, &spl_disp_info->mode, sizeof(*mode)); 761 conn_state->bus_format = spl_disp_info->bus_format; 762 763 printf("%s get display mode from spl:%dx%d, bus format:0x%x\n", 764 conn->dev->name, mode->hdisplay, mode->vdisplay, conn_state->bus_format); 765 #endif 766 } else if (conn->panel) { 767 ret = display_get_timing(state); 768 if (!ret) 769 conn_state->bpc = conn->panel->bpc; 770 #if defined(CONFIG_I2C_EDID) 771 if (ret < 0 && conn->funcs->get_edid) { 772 rockchip_panel_prepare(conn->panel); 773 ret = conn->funcs->get_edid(conn, state); 774 if (!ret) 775 display_get_edid_mode(state); 776 } 777 #endif 778 } else if (conn->bridge) { 779 ret = video_bridge_read_edid(conn->bridge->dev, 780 conn_state->edid, EDID_SIZE); 781 if (ret > 0) { 782 #if defined(CONFIG_I2C_EDID) 783 display_get_edid_mode(state); 784 #endif 785 } else { 786 ret = video_bridge_get_timing(conn->bridge->dev); 787 } 788 } else if (conn->funcs->get_timing) { 789 ret = conn->funcs->get_timing(conn, state); 790 } else if (conn->funcs->get_edid) { 791 ret = conn->funcs->get_edid(conn, state); 792 #if defined(CONFIG_I2C_EDID) 793 if (!ret) 794 display_get_edid_mode(state); 795 #endif 796 } 797 798 if (!ret && conn_state->secondary) { 799 struct rockchip_connector *connector = conn_state->secondary; 800 801 if (connector->panel) { 802 if (connector->panel->funcs->get_mode) { 803 struct drm_display_mode *_mode = drm_mode_create(); 804 805 ret = connector->panel->funcs->get_mode(connector->panel, _mode); 806 if (!ret && !drm_mode_equal(_mode, mode)) 807 ret = -EINVAL; 808 809 drm_mode_destroy(_mode); 810 } 811 } 812 } 813 814 if (ret && !state->force_output) 815 goto deinit; 816 if (state->force_output) 817 display_use_force_mode(state); 818 819 if (display_mode_valid(state)) 820 goto deinit; 821 822 /* rk356x series drive mipi pixdata on posedge */ 823 compatible = dev_read_string(conn->dev, "compatible"); 824 if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) { 825 conn_state->bus_flags &= ~DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE; 826 conn_state->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE; 827 } 828 829 printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 830 " H: %04d %04d %04d %04d\n" 831 " V: %04d %04d %04d %04d\n" 832 "bus_format: %x\n", 833 conn->dev->name, 834 state->force_output ? "use force output" : "", 835 mode->clock, mode->flags, 836 mode->hdisplay, mode->hsync_start, 837 mode->hsync_end, mode->htotal, 838 mode->vdisplay, mode->vsync_start, 839 mode->vsync_end, mode->vtotal, 840 conn_state->bus_format); 841 842 if (display_mode_fixup(state)) 843 goto deinit; 844 845 if (conn->bridge) 846 rockchip_bridge_mode_set(conn->bridge, &conn_state->mode); 847 848 if (crtc_funcs->init && state->enabled_at_spl == false) { 849 ret = crtc_funcs->init(state); 850 if (ret) 851 goto deinit; 852 } 853 state->is_init = 1; 854 855 crtc_state->crtc->active = true; 856 memcpy(&crtc_state->crtc->active_mode, 857 &conn_state->mode, sizeof(struct drm_display_mode)); 858 859 return 0; 860 861 deinit: 862 rockchip_connector_deinit(state); 863 return ret; 864 } 865 866 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 867 { 868 struct crtc_state *crtc_state = &state->crtc_state; 869 const struct rockchip_crtc *crtc = crtc_state->crtc; 870 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 871 int ret; 872 873 if (!state->is_init) 874 return -EINVAL; 875 876 if (crtc_funcs->send_mcu_cmd) { 877 ret = crtc_funcs->send_mcu_cmd(state, type, val); 878 if (ret) 879 return ret; 880 } 881 882 return 0; 883 } 884 885 static int display_set_plane(struct display_state *state) 886 { 887 struct crtc_state *crtc_state = &state->crtc_state; 888 const struct rockchip_crtc *crtc = crtc_state->crtc; 889 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 890 int ret; 891 892 if (!state->is_init) 893 return -EINVAL; 894 895 if (crtc_funcs->set_plane) { 896 ret = crtc_funcs->set_plane(state); 897 if (ret) 898 return ret; 899 } 900 901 return 0; 902 } 903 904 static int display_enable(struct display_state *state) 905 { 906 struct crtc_state *crtc_state = &state->crtc_state; 907 const struct rockchip_crtc *crtc = crtc_state->crtc; 908 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 909 910 if (!state->is_init) 911 return -EINVAL; 912 913 if (state->is_enable) 914 return 0; 915 916 if (crtc_funcs->prepare) 917 crtc_funcs->prepare(state); 918 919 if (state->enabled_at_spl == false) 920 rockchip_connector_pre_enable(state); 921 922 if (crtc_funcs->enable) 923 crtc_funcs->enable(state); 924 925 if (state->enabled_at_spl == false) 926 rockchip_connector_enable(state); 927 928 if (crtc_state->soft_te) 929 crtc_funcs->apply_soft_te(state); 930 931 state->is_enable = true; 932 933 return 0; 934 } 935 936 static int display_disable(struct display_state *state) 937 { 938 struct crtc_state *crtc_state = &state->crtc_state; 939 const struct rockchip_crtc *crtc = crtc_state->crtc; 940 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 941 942 if (!state->is_init) 943 return 0; 944 945 if (!state->is_enable) 946 return 0; 947 948 rockchip_connector_disable(state); 949 950 if (crtc_funcs->disable) 951 crtc_funcs->disable(state); 952 953 rockchip_connector_post_disable(state); 954 955 state->is_enable = 0; 956 state->is_init = 0; 957 958 return 0; 959 } 960 961 static int display_check(struct display_state *state) 962 { 963 struct connector_state *conn_state = &state->conn_state; 964 struct rockchip_connector *conn = conn_state->connector; 965 const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 966 struct crtc_state *crtc_state = &state->crtc_state; 967 const struct rockchip_crtc *crtc = crtc_state->crtc; 968 const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 969 int ret; 970 971 if (!state->is_init) 972 return 0; 973 974 if (conn_funcs->check) { 975 ret = conn_funcs->check(conn, state); 976 if (ret) 977 goto check_fail; 978 } 979 980 if (crtc_funcs->check) { 981 ret = crtc_funcs->check(state); 982 if (ret) 983 goto check_fail; 984 } 985 986 if (crtc_funcs->plane_check) { 987 ret = crtc_funcs->plane_check(state); 988 if (ret) 989 goto check_fail; 990 } 991 992 return 0; 993 994 check_fail: 995 state->is_init = false; 996 return ret; 997 } 998 999 static int display_logo(struct display_state *state) 1000 { 1001 struct crtc_state *crtc_state = &state->crtc_state; 1002 struct connector_state *conn_state = &state->conn_state; 1003 struct logo_info *logo = &state->logo; 1004 int hdisplay, vdisplay, ret; 1005 1006 ret = display_init(state); 1007 if (!state->is_init || ret) 1008 return -ENODEV; 1009 1010 switch (logo->bpp) { 1011 case 16: 1012 crtc_state->format = ROCKCHIP_FMT_RGB565; 1013 break; 1014 case 24: 1015 crtc_state->format = ROCKCHIP_FMT_RGB888; 1016 break; 1017 case 32: 1018 crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1019 break; 1020 default: 1021 printf("can't support bmp bits[%d]\n", logo->bpp); 1022 return -EINVAL; 1023 } 1024 hdisplay = conn_state->mode.crtc_hdisplay; 1025 vdisplay = conn_state->mode.vdisplay; 1026 crtc_state->src_rect.w = logo->width; 1027 crtc_state->src_rect.h = logo->height; 1028 crtc_state->src_rect.x = 0; 1029 crtc_state->src_rect.y = 0; 1030 crtc_state->ymirror = logo->ymirror; 1031 crtc_state->rb_swap = 0; 1032 1033 crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1034 crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5; 1035 1036 if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1037 crtc_state->crtc_rect.x = 0; 1038 crtc_state->crtc_rect.y = 0; 1039 crtc_state->crtc_rect.w = hdisplay; 1040 crtc_state->crtc_rect.h = vdisplay; 1041 } else { 1042 if (crtc_state->src_rect.w >= hdisplay) { 1043 crtc_state->crtc_rect.x = 0; 1044 crtc_state->crtc_rect.w = hdisplay; 1045 } else { 1046 crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2; 1047 crtc_state->crtc_rect.w = crtc_state->src_rect.w; 1048 } 1049 1050 if (crtc_state->src_rect.h >= vdisplay) { 1051 crtc_state->crtc_rect.y = 0; 1052 crtc_state->crtc_rect.h = vdisplay; 1053 } else { 1054 crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2; 1055 crtc_state->crtc_rect.h = crtc_state->src_rect.h; 1056 } 1057 } 1058 1059 display_check(state); 1060 ret = display_set_plane(state); 1061 if (ret) 1062 return ret; 1063 display_enable(state); 1064 1065 return 0; 1066 } 1067 1068 static int get_crtc_id(ofnode connect, bool is_ports_node) 1069 { 1070 struct device_node *port_node; 1071 struct device_node *remote; 1072 int phandle; 1073 int val; 1074 1075 if (is_ports_node) { 1076 port_node = of_get_parent(connect.np); 1077 if (!port_node) 1078 goto err; 1079 1080 val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1081 if (val < 0) 1082 goto err; 1083 } else { 1084 phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1085 if (phandle < 0) 1086 goto err; 1087 1088 remote = of_find_node_by_phandle(phandle); 1089 if (!remote) 1090 goto err; 1091 1092 val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1093 if (val < 0) 1094 goto err; 1095 } 1096 1097 return val; 1098 err: 1099 printf("Can't get crtc id, default set to id = 0\n"); 1100 return 0; 1101 } 1102 1103 static int get_crtc_mcu_mode(struct crtc_state *crtc_state, struct device_node *port_node, 1104 bool is_ports_node) 1105 { 1106 ofnode mcu_node, vp_node; 1107 int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 1108 1109 if (is_ports_node) { 1110 vp_node = np_to_ofnode(port_node); 1111 mcu_node = ofnode_find_subnode(vp_node, "mcu-timing"); 1112 if (!ofnode_valid(mcu_node)) 1113 return -ENODEV; 1114 } else { 1115 mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1116 if (!ofnode_valid(mcu_node)) 1117 return -ENODEV; 1118 } 1119 1120 #define FDT_GET_MCU_INT(val, name) \ 1121 do { \ 1122 val = ofnode_read_s32_default(mcu_node, name, -1); \ 1123 if (val < 0) { \ 1124 printf("Can't get %s\n", name); \ 1125 return -ENXIO; \ 1126 } \ 1127 } while (0) 1128 1129 FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 1130 FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 1131 FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 1132 FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 1133 FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 1134 1135 crtc_state->mcu_timing.mcu_pix_total = total_pixel; 1136 crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 1137 crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 1138 crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 1139 crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 1140 1141 return 0; 1142 } 1143 1144 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp, int rotate) 1145 { 1146 struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1147 1148 list_for_each_entry(tmp, &logo_cache_list, head) { 1149 if ((!strcmp(tmp->name, bmp) && rotate == tmp->logo_rotate) || 1150 (soc_is_rk3566() && tmp->logo_rotate)) { 1151 logo_cache = tmp; 1152 break; 1153 } 1154 } 1155 1156 if (!logo_cache) { 1157 logo_cache = malloc(sizeof(*logo_cache)); 1158 if (!logo_cache) { 1159 printf("failed to alloc memory for logo cache\n"); 1160 return NULL; 1161 } 1162 memset(logo_cache, 0, sizeof(*logo_cache)); 1163 strcpy(logo_cache->name, bmp); 1164 INIT_LIST_HEAD(&logo_cache->head); 1165 list_add_tail(&logo_cache->head, &logo_cache_list); 1166 } 1167 1168 return logo_cache; 1169 } 1170 1171 /* Note: used only for rkfb kernel driver */ 1172 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 1173 { 1174 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1175 void *dst = NULL; 1176 int len, size; 1177 struct bmp_header *header; 1178 1179 if (!logo || !bmp_name) 1180 return -EINVAL; 1181 1182 header = malloc(RK_BLK_SIZE); 1183 if (!header) 1184 return -ENOMEM; 1185 1186 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1187 if (len != RK_BLK_SIZE) { 1188 free(header); 1189 return -EINVAL; 1190 } 1191 size = get_unaligned_le32(&header->file_size); 1192 dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 1193 len = rockchip_read_resource_file(dst, bmp_name, 0, size); 1194 if (len != size) { 1195 printf("failed to load bmp %s\n", bmp_name); 1196 free(header); 1197 return -ENOENT; 1198 } 1199 1200 logo->mem = dst; 1201 #endif 1202 1203 return 0; 1204 } 1205 1206 #ifdef BMP_DECODEER_LEGACY 1207 static int load_bmp_logo_legacy(struct logo_info *logo, const char *bmp_name) 1208 { 1209 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1210 struct rockchip_logo_cache *logo_cache; 1211 struct bmp_header *header; 1212 void *dst = NULL, *pdst; 1213 int size, len; 1214 int ret = 0; 1215 int reserved = 0; 1216 int dst_size; 1217 1218 if (!logo || !bmp_name) 1219 return -EINVAL; 1220 logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate); 1221 if (!logo_cache) 1222 return -ENOMEM; 1223 1224 if (logo_cache->logo.mem) { 1225 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1226 return 0; 1227 } 1228 1229 header = malloc(RK_BLK_SIZE); 1230 if (!header) 1231 return -ENOMEM; 1232 1233 len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 1234 if (len != RK_BLK_SIZE) { 1235 ret = -EINVAL; 1236 goto free_header; 1237 } 1238 1239 logo->bpp = get_unaligned_le16(&header->bit_count); 1240 logo->width = get_unaligned_le32(&header->width); 1241 logo->height = get_unaligned_le32(&header->height); 1242 dst_size = logo->width * logo->height * logo->bpp >> 3; 1243 reserved = get_unaligned_le32(&header->reserved); 1244 if (logo->height < 0) 1245 logo->height = -logo->height; 1246 size = get_unaligned_le32(&header->file_size); 1247 if (!can_direct_logo(logo->bpp)) { 1248 if (size > MEMORY_POOL_SIZE) { 1249 printf("failed to use boot buf as temp bmp buffer\n"); 1250 ret = -ENOMEM; 1251 goto free_header; 1252 } 1253 pdst = get_display_buffer(size); 1254 1255 } else { 1256 pdst = get_display_buffer(size); 1257 dst = pdst; 1258 } 1259 1260 len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 1261 if (len != size) { 1262 printf("failed to load bmp %s\n", bmp_name); 1263 ret = -ENOENT; 1264 goto free_header; 1265 } 1266 1267 if (!can_direct_logo(logo->bpp)) { 1268 /* 1269 * TODO: force use 16bpp if bpp less than 16; 1270 */ 1271 logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1272 dst_size = logo->width * logo->height * logo->bpp >> 3; 1273 dst = get_display_buffer(dst_size); 1274 if (!dst) { 1275 ret = -ENOMEM; 1276 goto free_header; 1277 } 1278 if (bmpdecoder(pdst, dst, logo->bpp)) { 1279 printf("failed to decode bmp %s\n", bmp_name); 1280 ret = -EINVAL; 1281 goto free_header; 1282 } 1283 1284 logo->offset = 0; 1285 logo->ymirror = 0; 1286 } else { 1287 logo->offset = get_unaligned_le32(&header->data_offset); 1288 if (reserved == BMP_PROCESSED_FLAG) 1289 logo->ymirror = 0; 1290 else 1291 logo->ymirror = 1; 1292 } 1293 logo->mem = dst; 1294 1295 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1296 1297 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1298 1299 free_header: 1300 1301 free(header); 1302 1303 return ret; 1304 #else 1305 return -EINVAL; 1306 #endif 1307 } 1308 #endif 1309 1310 static void *bitmap_create(int width, int height, unsigned int state) 1311 { 1312 /* Ensure a stupidly large bitmap is not created */ 1313 if (width > 4096 || height > 4096) 1314 return NULL; 1315 1316 return calloc(width * height, BYTES_PER_PIXEL); 1317 } 1318 1319 static unsigned char *bitmap_get_buffer(void *bitmap) 1320 { 1321 return bitmap; 1322 } 1323 1324 static void bitmap_destroy(void *bitmap) 1325 { 1326 free(bitmap); 1327 } 1328 1329 static void bmp_copy(void *dst, bmp_image *bmp) 1330 { 1331 u16 row, col; 1332 u8 *image; 1333 u8 *pdst = (u8 *)dst; 1334 1335 image = (u8 *)bmp->bitmap; 1336 for (row = 0; row != bmp->height; row++) { 1337 for (col = 0; col != bmp->width; col++) { 1338 size_t z = (row * bmp->width + col) * BYTES_PER_PIXEL; 1339 1340 *pdst++ = image[z + 2]; 1341 *pdst++ = image[z + 1]; 1342 *pdst++ = image[z + 0]; 1343 *pdst++ = image[z + 3]; 1344 } 1345 } 1346 } 1347 1348 static void *rockchip_logo_rotate(struct logo_info *logo, void *src) 1349 { 1350 void *dst_rotate; 1351 int width = logo->width; 1352 int height = logo->height; 1353 int width_rotate = logo->height & 0x3 ? (logo->height & ~0x3) + 4 : logo->height; 1354 int height_rotate = logo->width; 1355 int dst_size = width * height * logo->bpp >> 3; 1356 int dst_size_rotate = width_rotate * height_rotate * logo->bpp >> 3; 1357 int bytes_per_pixel = logo->bpp >> 3; 1358 int padded_width; 1359 int i, j; 1360 char *img_data; 1361 1362 if (!(logo->rotate == 90 || logo->rotate == 180 || logo->rotate == 270)) { 1363 printf("Unsupported rotation angle\n"); 1364 return NULL; 1365 } 1366 1367 img_data = (char *)malloc(dst_size); 1368 if (!img_data) { 1369 printf("failed to alloc memory for image data\n"); 1370 return NULL; 1371 } 1372 memcpy(img_data, src, dst_size); 1373 1374 dst_rotate = get_display_buffer(dst_size_rotate); 1375 if (!dst_rotate) 1376 return NULL; 1377 memset(dst_rotate, 0, dst_size_rotate); 1378 1379 switch (logo->rotate) { 1380 case 90: 1381 logo->width = width_rotate; 1382 logo->height = height_rotate; 1383 padded_width = height & 0x3 ? (height & ~0x3) + 4 : height; 1384 for (i = 0; i < height; i++) { 1385 for (j = 0; j < width; j++) { 1386 memcpy(dst_rotate + (j * padded_width * bytes_per_pixel) + 1387 (height - i - 1) * bytes_per_pixel, 1388 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1389 bytes_per_pixel); 1390 } 1391 } 1392 break; 1393 case 180: 1394 for (i = 0; i < height; i++) { 1395 for (j = 0; j < width; j++) { 1396 memcpy(dst_rotate + (height - i - 1) * width * bytes_per_pixel + 1397 (width - j - 1) * bytes_per_pixel, 1398 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1399 bytes_per_pixel); 1400 } 1401 } 1402 break; 1403 case 270: 1404 logo->width = width_rotate; 1405 logo->height = height_rotate; 1406 padded_width = height & 0x3 ? (height & ~0x3) + 4 : height; 1407 for (i = 0; i < height; i++) { 1408 for (j = 0; j < width; j++) { 1409 memcpy(dst_rotate + (width - j - 1) * padded_width * bytes_per_pixel + 1410 i * bytes_per_pixel, 1411 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, 1412 bytes_per_pixel); 1413 } 1414 } 1415 break; 1416 default: 1417 break; 1418 } 1419 1420 free(img_data); 1421 1422 return dst_rotate; 1423 } 1424 1425 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1426 { 1427 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1428 struct rockchip_logo_cache *logo_cache; 1429 bmp_bitmap_callback_vt bitmap_callbacks = { 1430 bitmap_create, 1431 bitmap_destroy, 1432 bitmap_get_buffer, 1433 }; 1434 bmp_result code; 1435 bmp_image bmp; 1436 void *bmp_data; 1437 void *dst = NULL; 1438 void *dst_rotate = NULL; 1439 int len, dst_size; 1440 int ret = 0; 1441 1442 if (!logo || !bmp_name) 1443 return -EINVAL; 1444 1445 logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate); 1446 if (!logo_cache) 1447 return -ENOMEM; 1448 1449 if (logo_cache->logo.mem) { 1450 memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1451 return 0; 1452 } 1453 1454 bmp_data = malloc(MAX_IMAGE_BYTES); 1455 if (!bmp_data) 1456 return -ENOMEM; 1457 1458 bmp_create(&bmp, &bitmap_callbacks); 1459 1460 len = rockchip_read_resource_file(bmp_data, bmp_name, 0, MAX_IMAGE_BYTES); 1461 if (len < 0) { 1462 ret = -EINVAL; 1463 goto free_bmp_data; 1464 } 1465 1466 /* analyse the BMP */ 1467 code = bmp_analyse(&bmp, len, bmp_data); 1468 if (code != BMP_OK) { 1469 printf("failed to parse bmp:%s header\n", bmp_name); 1470 ret = -EINVAL; 1471 goto free_bmp_data; 1472 } 1473 /* fix bpp to 32 */ 1474 logo->bpp = 32; 1475 logo->offset = 0; 1476 logo->ymirror = 0; 1477 logo->width = get_unaligned_le32(&bmp.width); 1478 logo->height = get_unaligned_le32(&bmp.height); 1479 dst_size = logo->width * logo->height * logo->bpp >> 3; 1480 /* decode the image to RGBA8888 format */ 1481 code = bmp_decode(&bmp); 1482 if (code != BMP_OK) { 1483 /* allow partially decoded images */ 1484 if (code != BMP_INSUFFICIENT_DATA && code != BMP_DATA_ERROR) { 1485 printf("failed to allocate the buffer of bmp:%s\n", bmp_name); 1486 ret = -EINVAL; 1487 goto free_bmp_data; 1488 } 1489 1490 /* skip if the partially decoded image would be ridiculously large */ 1491 if ((bmp.width * bmp.height) > 200000) { 1492 printf("partially decoded bmp:%s can not be too large\n", bmp_name); 1493 ret = -EINVAL; 1494 goto free_bmp_data; 1495 } 1496 } 1497 1498 dst = get_display_buffer(dst_size); 1499 if (!dst) { 1500 ret = -ENOMEM; 1501 goto free_bmp_data; 1502 } 1503 bmp_copy(dst, &bmp); 1504 1505 if (logo->rotate) { 1506 dst_rotate = rockchip_logo_rotate(logo, dst); 1507 if (dst_rotate) { 1508 dst = dst_rotate; 1509 dst_size = logo->width * logo->height * logo->bpp >> 3; 1510 } 1511 printf("logo ratate %d\n", logo->rotate); 1512 } 1513 logo->mem = dst; 1514 1515 memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1516 logo_cache->logo_rotate = logo->rotate; 1517 1518 flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 1519 free_bmp_data: 1520 /* clean up */ 1521 bmp_finalise(&bmp); 1522 free(bmp_data); 1523 1524 return ret; 1525 #else 1526 return -EINVAL; 1527 #endif 1528 } 1529 1530 void rockchip_show_fbbase(ulong fbbase) 1531 { 1532 struct display_state *s; 1533 1534 list_for_each_entry(s, &rockchip_display_list, head) { 1535 s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1536 s->logo.mem = (char *)fbbase; 1537 s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1538 s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1539 s->logo.bpp = 32; 1540 s->logo.ymirror = 0; 1541 1542 display_logo(s); 1543 } 1544 } 1545 1546 int rockchip_show_bmp(const char *bmp) 1547 { 1548 struct display_state *s; 1549 int ret = 0; 1550 1551 if (!bmp) { 1552 list_for_each_entry(s, &rockchip_display_list, head) 1553 display_disable(s); 1554 return -ENOENT; 1555 } 1556 1557 list_for_each_entry(s, &rockchip_display_list, head) { 1558 s->logo.mode = s->charge_logo_mode; 1559 if (load_bmp_logo(&s->logo, bmp)) 1560 continue; 1561 ret = display_logo(s); 1562 } 1563 1564 return ret; 1565 } 1566 1567 int rockchip_show_logo(void) 1568 { 1569 struct display_state *s; 1570 struct display_state *ms = NULL; 1571 int ret = 0; 1572 int count = 0; 1573 1574 list_for_each_entry(s, &rockchip_display_list, head) { 1575 s->logo.mode = s->logo_mode; 1576 s->logo.rotate = s->logo_rotate; 1577 if (load_bmp_logo(&s->logo, s->ulogo_name)) { 1578 printf("failed to display uboot logo\n"); 1579 } else { 1580 ret = display_logo(s); 1581 if (ret == -EAGAIN) 1582 ms = s; 1583 } 1584 /* Load kernel bmp in rockchip_display_fixup() later */ 1585 } 1586 1587 /* 1588 * For rk3566, the mirror win must be enabled after the related 1589 * source win. If error code is EAGAIN, the mirror win may be 1590 * first enabled unexpectedly, and we will move the enabling process 1591 * as follows. 1592 */ 1593 if (ms) { 1594 while (count < 5) { 1595 ret = display_logo(ms); 1596 if (ret != -EAGAIN) 1597 break; 1598 mdelay(10); 1599 count++; 1600 } 1601 } 1602 1603 return ret; 1604 } 1605 1606 int rockchip_vop_dump(const char *cmd) 1607 { 1608 struct display_state *state; 1609 struct crtc_state *crtc_state; 1610 struct rockchip_crtc *crtc; 1611 const struct rockchip_crtc_funcs *crtc_funcs; 1612 int ret = -EINVAL; 1613 1614 list_for_each_entry(state, &rockchip_display_list, head) { 1615 if (!state->is_init) 1616 continue; 1617 crtc_state = &state->crtc_state; 1618 crtc = crtc_state->crtc; 1619 crtc_funcs = crtc->funcs; 1620 1621 if (!cmd) 1622 ret = crtc_funcs->active_regs_dump(state); 1623 else if (!strcmp(cmd, "a") || !strcmp(cmd, "all")) 1624 ret = crtc_funcs->regs_dump(state); 1625 if (!ret) 1626 break; 1627 } 1628 1629 if (ret) 1630 ret = CMD_RET_USAGE; 1631 1632 return ret; 1633 } 1634 1635 enum { 1636 PORT_DIR_IN, 1637 PORT_DIR_OUT, 1638 }; 1639 1640 const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id) 1641 { 1642 ofnode ports, port; 1643 u32 reg; 1644 1645 ports = ofnode_find_subnode(node, "ports"); 1646 if (!ofnode_valid(ports)) 1647 return NULL; 1648 1649 ofnode_for_each_subnode(port, ports) { 1650 if (ofnode_read_u32(port, "reg", ®)) 1651 continue; 1652 1653 if (reg == id) 1654 break; 1655 } 1656 1657 if (reg == id) 1658 return ofnode_to_np(port); 1659 1660 return NULL; 1661 } 1662 1663 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port) 1664 { 1665 ofnode parent; 1666 int is_ports_node; 1667 1668 parent = ofnode_get_parent(port); 1669 is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0; 1670 if (is_ports_node) 1671 parent = ofnode_get_parent(parent); 1672 1673 return ofnode_to_np(parent); 1674 } 1675 1676 const struct device_node * 1677 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint) 1678 { 1679 const struct device_node *port_node; 1680 ofnode ep; 1681 u32 reg; 1682 1683 port_node = rockchip_of_graph_get_port_by_id(node, port); 1684 if (!port_node) 1685 return NULL; 1686 1687 ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) { 1688 if (ofnode_read_u32(ep, "reg", ®)) 1689 break; 1690 if (reg == endpoint) 1691 break; 1692 } 1693 1694 if (!ofnode_valid(ep)) 1695 return NULL; 1696 1697 return ofnode_to_np(ep); 1698 } 1699 1700 static const struct device_node * 1701 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint) 1702 { 1703 const struct device_node *ep_node; 1704 ofnode ep; 1705 uint phandle; 1706 1707 ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint); 1708 if (!ep_node) 1709 return NULL; 1710 1711 if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle)) 1712 return NULL; 1713 1714 ep = ofnode_get_by_phandle(phandle); 1715 if (!ofnode_valid(ep)) 1716 return NULL; 1717 1718 return ofnode_to_np(ep); 1719 } 1720 1721 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel) 1722 { 1723 const struct device_node *ep_node, *panel_node; 1724 ofnode panel_ofnode, port; 1725 struct udevice *panel_dev; 1726 int ret = 0; 1727 1728 *panel = NULL; 1729 panel_ofnode = dev_read_subnode(dev, "panel"); 1730 if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) { 1731 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode, 1732 &panel_dev); 1733 if (!ret) 1734 goto found; 1735 } 1736 1737 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1738 if (!ep_node) 1739 return -ENODEV; 1740 1741 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1742 if (!ofnode_valid(port)) 1743 return -ENODEV; 1744 1745 panel_node = rockchip_of_graph_get_port_parent(port); 1746 if (!panel_node) 1747 return -ENODEV; 1748 1749 ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev); 1750 if (!ret) 1751 goto found; 1752 1753 return -ENODEV; 1754 1755 found: 1756 *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev); 1757 return 0; 1758 } 1759 1760 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge) 1761 { 1762 const struct device_node *ep_node, *bridge_node; 1763 ofnode port; 1764 struct udevice *bridge_dev; 1765 int ret = 0; 1766 1767 ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0); 1768 if (!ep_node) 1769 return -ENODEV; 1770 1771 port = ofnode_get_parent(np_to_ofnode(ep_node)); 1772 if (!ofnode_valid(port)) 1773 return -ENODEV; 1774 1775 bridge_node = rockchip_of_graph_get_port_parent(port); 1776 if (!bridge_node) 1777 return -ENODEV; 1778 1779 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node), 1780 &bridge_dev); 1781 if (!ret) 1782 goto found; 1783 1784 return -ENODEV; 1785 1786 found: 1787 *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev); 1788 return 0; 1789 } 1790 1791 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel, 1792 struct rockchip_bridge **bridge) 1793 { 1794 int ret = 0; 1795 1796 if (*panel) 1797 return 0; 1798 1799 *panel = NULL; 1800 *bridge = NULL; 1801 1802 if (panel) { 1803 ret = rockchip_of_find_panel(dev, panel); 1804 if (!ret) 1805 return 0; 1806 } 1807 1808 if (ret) { 1809 ret = rockchip_of_find_bridge(dev, bridge); 1810 if (!ret) 1811 ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel, 1812 &(*bridge)->next_bridge); 1813 } 1814 1815 return ret; 1816 } 1817 1818 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 1819 { 1820 struct udevice *phy_dev; 1821 int ret; 1822 1823 ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 1824 if (ret) 1825 return NULL; 1826 1827 return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 1828 } 1829 1830 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint) 1831 { 1832 ofnode ep, port, ports, conn; 1833 uint phandle; 1834 struct udevice *dev; 1835 int ret; 1836 1837 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1838 return NULL; 1839 1840 ep = ofnode_get_by_phandle(phandle); 1841 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1842 return NULL; 1843 1844 port = ofnode_get_parent(ep); 1845 if (!ofnode_valid(port)) 1846 return NULL; 1847 1848 ports = ofnode_get_parent(port); 1849 if (!ofnode_valid(ports)) 1850 return NULL; 1851 1852 conn = ofnode_get_parent(ports); 1853 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1854 return NULL; 1855 1856 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1857 if (ret) { 1858 /* 1859 * for DP-MST, ports node->parent node->parent node is the device node */ 1860 conn = ofnode_get_parent(conn); 1861 if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1862 return NULL; 1863 1864 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1865 if (ret) 1866 return NULL; 1867 1868 } 1869 1870 return dev; 1871 } 1872 1873 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint) 1874 { 1875 struct rockchip_connector *conn; 1876 struct udevice *dev; 1877 int ret; 1878 1879 dev = rockchip_of_find_connector_device(endpoint); 1880 if (!dev) { 1881 printf("Warn: can't find connect driver\n"); 1882 return NULL; 1883 } 1884 1885 conn = get_rockchip_connector_by_device(dev); 1886 if (!conn) 1887 return NULL; 1888 ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge); 1889 if (ret) 1890 debug("Warn: no find panel or bridge\n"); 1891 1892 conn->phy = rockchip_of_find_phy(dev); 1893 1894 return conn; 1895 } 1896 1897 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn) 1898 { 1899 char *conn_name; 1900 struct device_node *split_node; 1901 struct udevice *split_dev; 1902 struct rockchip_connector *split_conn; 1903 bool split_mode; 1904 int ret; 1905 1906 split_mode = ofnode_read_bool(conn->dev->node, "split-mode"); 1907 split_mode |= ofnode_read_bool(conn->dev->node, "dual-channel"); 1908 if (!split_mode) 1909 return NULL; 1910 1911 switch (conn->type) { 1912 case DRM_MODE_CONNECTOR_DisplayPort: 1913 conn_name = "dp"; 1914 break; 1915 case DRM_MODE_CONNECTOR_eDP: 1916 conn_name = "edp"; 1917 break; 1918 case DRM_MODE_CONNECTOR_HDMIA: 1919 conn_name = "hdmi"; 1920 break; 1921 case DRM_MODE_CONNECTOR_LVDS: 1922 conn_name = "lvds"; 1923 break; 1924 default: 1925 return NULL; 1926 } 1927 1928 split_node = of_alias_get_dev(conn_name, !conn->id); 1929 if (!split_node || !of_device_is_available(split_node)) 1930 return NULL; 1931 1932 ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev); 1933 if (ret) 1934 return NULL; 1935 1936 split_conn = get_rockchip_connector_by_device(split_dev); 1937 if (!split_conn) 1938 return NULL; 1939 ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge); 1940 if (ret) 1941 debug("Warn: no find panel or bridge\n"); 1942 1943 split_conn->phy = rockchip_of_find_phy(split_dev); 1944 1945 return split_conn; 1946 } 1947 1948 static bool rockchip_get_display_path_status(ofnode endpoint) 1949 { 1950 ofnode ep; 1951 uint phandle; 1952 1953 if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1954 return false; 1955 1956 ep = ofnode_get_by_phandle(phandle); 1957 if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1958 return false; 1959 1960 return true; 1961 } 1962 1963 #if defined(CONFIG_ROCKCHIP_RK3568) 1964 static int rockchip_display_fixup_dts(void *blob) 1965 { 1966 ofnode route_node, route_subnode, conn_ep, conn_port; 1967 const struct device_node *route_sub_devnode; 1968 const struct device_node *ep_node, *conn_ep_dev_node; 1969 u32 phandle; 1970 int conn_ep_offset; 1971 const char *route_sub_path, *path; 1972 1973 /* Don't go further if new variant after 1974 * reading PMUGRF_SOC_CON15 1975 */ 1976 if ((readl(0xfdc20100) & GENMASK(15, 14))) 1977 return 0; 1978 1979 route_node = ofnode_path("/display-subsystem/route"); 1980 if (!ofnode_valid(route_node)) 1981 return -EINVAL; 1982 1983 ofnode_for_each_subnode(route_subnode, route_node) { 1984 if (!ofnode_is_available(route_subnode)) 1985 continue; 1986 1987 route_sub_devnode = ofnode_to_np(route_subnode); 1988 route_sub_path = route_sub_devnode->full_name; 1989 if (!strstr(ofnode_get_name(route_subnode), "dsi") && 1990 !strstr(ofnode_get_name(route_subnode), "edp")) 1991 return 0; 1992 1993 phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 1994 if (phandle < 0) { 1995 printf("Warn: can't find connect node's handle\n"); 1996 continue; 1997 } 1998 1999 ep_node = of_find_node_by_phandle(phandle); 2000 if (!ofnode_valid(np_to_ofnode(ep_node))) { 2001 printf("Warn: can't find endpoint node from phandle\n"); 2002 continue; 2003 } 2004 2005 ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 2006 conn_ep = ofnode_get_by_phandle(phandle); 2007 if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 2008 return -ENODEV; 2009 2010 conn_port = ofnode_get_parent(conn_ep); 2011 if (!ofnode_valid(conn_port)) 2012 return -ENODEV; 2013 2014 ofnode_for_each_subnode(conn_ep, conn_port) { 2015 conn_ep_dev_node = ofnode_to_np(conn_ep); 2016 path = conn_ep_dev_node->full_name; 2017 ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 2018 conn_ep_offset = fdt_path_offset(blob, path); 2019 2020 if (!ofnode_is_available(conn_ep) && 2021 strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 2022 do_fixup_by_path_u32(blob, route_sub_path, 2023 "connect", phandle, 1); 2024 fdt_status_okay(blob, conn_ep_offset); 2025 2026 } else if (ofnode_is_available(conn_ep) && 2027 strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 2028 fdt_status_disabled(blob, conn_ep_offset); 2029 } 2030 } 2031 } 2032 2033 return 0; 2034 } 2035 #endif 2036 2037 static int rockchip_display_probe(struct udevice *dev) 2038 { 2039 struct video_priv *uc_priv = dev_get_uclass_priv(dev); 2040 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2041 const void *blob = gd->fdt_blob; 2042 int phandle; 2043 struct udevice *crtc_dev; 2044 struct rockchip_crtc *crtc; 2045 struct rockchip_connector *conn, *split_conn; 2046 struct display_state *s; 2047 const char *name; 2048 int ret; 2049 ofnode node, route_node, timing_node; 2050 struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 2051 struct public_phy_data *data; 2052 bool is_ports_node = false; 2053 2054 #if defined(CONFIG_ROCKCHIP_RK3568) 2055 rockchip_display_fixup_dts((void *)blob); 2056 #endif 2057 /* Before relocation we don't need to do anything */ 2058 if (!(gd->flags & GD_FLG_RELOC)) 2059 return 0; 2060 2061 data = malloc(sizeof(struct public_phy_data)); 2062 if (!data) { 2063 printf("failed to alloc phy data\n"); 2064 return -ENOMEM; 2065 } 2066 data->phy_init = false; 2067 2068 init_display_buffer(plat->base); 2069 2070 route_node = dev_read_subnode(dev, "route"); 2071 if (!ofnode_valid(route_node)) 2072 return -ENODEV; 2073 2074 ofnode_for_each_subnode(node, route_node) { 2075 if (!ofnode_is_available(node)) 2076 continue; 2077 phandle = ofnode_read_u32_default(node, "connect", -1); 2078 if (phandle < 0) { 2079 printf("Warn: can't find connect node's handle\n"); 2080 continue; 2081 } 2082 ep_node = of_find_node_by_phandle(phandle); 2083 if (!ofnode_valid(np_to_ofnode(ep_node))) { 2084 printf("Warn: can't find endpoint node from phandle\n"); 2085 continue; 2086 } 2087 port_node = of_get_parent(ep_node); 2088 if (!ofnode_valid(np_to_ofnode(port_node))) { 2089 printf("Warn: can't find port node from phandle\n"); 2090 continue; 2091 } 2092 2093 port_parent_node = of_get_parent(port_node); 2094 if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 2095 printf("Warn: can't find port parent node from phandle\n"); 2096 continue; 2097 } 2098 2099 is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 2100 if (is_ports_node) { 2101 vop_node = of_get_parent(port_parent_node); 2102 if (!ofnode_valid(np_to_ofnode(vop_node))) { 2103 printf("Warn: can't find crtc node from phandle\n"); 2104 continue; 2105 } 2106 } else { 2107 vop_node = port_parent_node; 2108 } 2109 2110 ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 2111 np_to_ofnode(vop_node), 2112 &crtc_dev); 2113 if (ret) { 2114 printf("Warn: can't find crtc driver %d\n", ret); 2115 continue; 2116 } 2117 crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 2118 2119 conn = rockchip_of_get_connector(np_to_ofnode(ep_node)); 2120 if (!conn) { 2121 printf("Warn: can't get connect driver\n"); 2122 continue; 2123 } 2124 split_conn = rockchip_get_split_connector(conn); 2125 2126 s = malloc(sizeof(*s)); 2127 if (!s) 2128 continue; 2129 2130 memset(s, 0, sizeof(*s)); 2131 2132 INIT_LIST_HEAD(&s->head); 2133 ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 2134 if (!ret) 2135 memcpy(s->ulogo_name, name, strlen(name)); 2136 ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 2137 if (!ret) 2138 memcpy(s->klogo_name, name, strlen(name)); 2139 ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 2140 if (!strcmp(name, "fullscreen")) 2141 s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2142 else 2143 s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 2144 ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 2145 if (!strcmp(name, "fullscreen")) 2146 s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 2147 else 2148 s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 2149 2150 s->logo_rotate = ofnode_read_u32_default(node, "logo,rotate", 0); 2151 2152 s->force_output = ofnode_read_bool(node, "force-output"); 2153 2154 if (s->force_output) { 2155 timing_node = ofnode_find_subnode(node, "force_timing"); 2156 ret = display_get_force_timing_from_dts(timing_node, 2157 &s->force_mode, 2158 &s->conn_state.bus_flags); 2159 if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 2160 s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 2161 } 2162 2163 s->blob = blob; 2164 s->conn_state.connector = conn; 2165 s->conn_state.secondary = NULL; 2166 s->conn_state.type = conn->type; 2167 if (split_conn) { 2168 s->conn_state.secondary = split_conn; 2169 s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE; 2170 s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0; 2171 } 2172 s->conn_state.overscan.left_margin = 100; 2173 s->conn_state.overscan.right_margin = 100; 2174 s->conn_state.overscan.top_margin = 100; 2175 s->conn_state.overscan.bottom_margin = 100; 2176 s->crtc_state.node = np_to_ofnode(vop_node); 2177 s->crtc_state.dev = crtc_dev; 2178 s->crtc_state.crtc = crtc; 2179 s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node); 2180 s->node = node; 2181 2182 if (is_ports_node) { /* only vop2 will get into here */ 2183 ofnode vp_node = np_to_ofnode(port_node); 2184 static bool get_plane_mask_from_dts; 2185 2186 s->crtc_state.ports_node = port_parent_node; 2187 if (!get_plane_mask_from_dts) { 2188 ofnode vp_sub_node; 2189 int vp_id = 0; 2190 bool vp_enable = false; 2191 2192 ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 2193 int cursor_plane = -1; 2194 2195 vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 2196 2197 s->crtc_state.crtc->vps[vp_id].xmirror_en = 2198 ofnode_read_bool(vp_node, "xmirror-enable"); 2199 2200 ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 2201 2202 cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 2203 s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 2204 if (ret) { 2205 s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 2206 s->crtc_state.crtc->assign_plane |= true; 2207 s->crtc_state.crtc->vps[vp_id].primary_plane_id = 2208 ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX); 2209 printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 2210 vp_id, 2211 s->crtc_state.crtc->vps[vp_id].plane_mask, 2212 s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 : 2213 s->crtc_state.crtc->vps[vp_id].primary_plane_id, 2214 cursor_plane); 2215 } 2216 2217 /* To check current vp status */ 2218 vp_enable = false; 2219 ofnode_for_each_subnode(vp_sub_node, vp_node) 2220 vp_enable |= rockchip_get_display_path_status(vp_sub_node); 2221 s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 2222 } 2223 get_plane_mask_from_dts = true; 2224 } 2225 } 2226 2227 get_crtc_mcu_mode(&s->crtc_state, port_node, is_ports_node); 2228 2229 ret = ofnode_read_u32_default(s->crtc_state.node, 2230 "rockchip,dual-channel-swap", 0); 2231 s->crtc_state.dual_channel_swap = ret; 2232 2233 if (connector_phy_init(conn, data)) { 2234 printf("Warn: Failed to init phy drivers\n"); 2235 free(s); 2236 continue; 2237 } 2238 list_add_tail(&s->head, &rockchip_display_list); 2239 } 2240 2241 if (list_empty(&rockchip_display_list)) { 2242 debug("Failed to found available display route\n"); 2243 return -ENODEV; 2244 } 2245 rockchip_get_baseparameter(); 2246 display_pre_init(); 2247 2248 uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 2249 uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 2250 uc_priv->bpix = VIDEO_BPP32; 2251 2252 #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 2253 rockchip_show_fbbase(plat->base); 2254 video_set_flush_dcache(dev, true); 2255 #endif 2256 2257 return 0; 2258 } 2259 2260 void rockchip_display_fixup(void *blob) 2261 { 2262 const struct rockchip_connector_funcs *conn_funcs; 2263 const struct rockchip_crtc_funcs *crtc_funcs; 2264 struct rockchip_connector *conn; 2265 const struct rockchip_crtc *crtc; 2266 struct display_state *s; 2267 int offset; 2268 int ret; 2269 const struct device_node *np; 2270 const char *path; 2271 const char *cacm_header; 2272 u64 aligned_memory_size; 2273 2274 if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 2275 list_for_each_entry(s, &rockchip_display_list, head) { 2276 ret = load_bmp_logo(&s->logo, s->klogo_name); 2277 if (ret < 0) { 2278 s->is_klogo_valid = false; 2279 printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id); 2280 } else { 2281 s->is_klogo_valid = true; 2282 } 2283 } 2284 2285 if (!get_display_size()) 2286 return; 2287 2288 aligned_memory_size = (u64)ALIGN(get_display_size(), align_size); 2289 offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 2290 (u64)memory_start, 2291 aligned_memory_size); 2292 if (offset < 0) 2293 printf("failed to reserve drm-loader-logo memory\n"); 2294 2295 if (get_cubic_memory_size()) { 2296 aligned_memory_size = (u64)ALIGN(get_cubic_memory_size(), align_size); 2297 offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 2298 (u64)cubic_lut_memory_start, 2299 aligned_memory_size); 2300 if (offset < 0) 2301 printf("failed to reserve drm-cubic-lut memory\n"); 2302 } 2303 } else { 2304 printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 2305 /* Compatible with rkfb display, only need reserve memory */ 2306 offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 2307 (u64)memory_start, 2308 MEMORY_POOL_SIZE); 2309 if (offset < 0) 2310 printf("failed to reserve fb-loader-logo memory\n"); 2311 else 2312 list_for_each_entry(s, &rockchip_display_list, head) 2313 load_kernel_bmp_logo(&s->logo, s->klogo_name); 2314 return; 2315 } 2316 2317 list_for_each_entry(s, &rockchip_display_list, head) { 2318 /* 2319 * If plane mask is not set in dts, fixup dts to assign it 2320 * whether crtc is initialized or not. 2321 */ 2322 if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane) 2323 s->crtc_state.crtc->funcs->fixup_dts(s, blob); 2324 2325 if (!s->is_init || !s->is_klogo_valid) 2326 continue; 2327 2328 conn = s->conn_state.connector; 2329 if (!conn) 2330 continue; 2331 conn_funcs = conn->funcs; 2332 if (!conn_funcs) { 2333 printf("failed to get exist connector\n"); 2334 continue; 2335 } 2336 2337 if (s->conn_state.secondary && 2338 s->conn_state.secondary->type != DRM_MODE_CONNECTOR_LVDS) { 2339 s->conn_state.mode.clock *= 2; 2340 s->conn_state.mode.hdisplay *= 2; 2341 } 2342 2343 crtc = s->crtc_state.crtc; 2344 if (!crtc) 2345 continue; 2346 2347 crtc_funcs = crtc->funcs; 2348 if (!crtc_funcs) { 2349 printf("failed to get exist crtc\n"); 2350 continue; 2351 } 2352 2353 np = ofnode_to_np(s->node); 2354 path = np->full_name; 2355 fdt_increase_size(blob, 0x400); 2356 #define FDT_SET_U32(name, val) \ 2357 do_fixup_by_path_u32(blob, path, name, val, 1); 2358 2359 offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 2360 - memory_start; 2361 FDT_SET_U32("logo,offset", offset); 2362 FDT_SET_U32("logo,width", s->logo.width); 2363 FDT_SET_U32("logo,height", s->logo.height); 2364 FDT_SET_U32("logo,bpp", s->logo.bpp); 2365 FDT_SET_U32("logo,ymirror", s->logo.ymirror); 2366 FDT_SET_U32("video,clock", s->conn_state.mode.clock); 2367 FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 2368 FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 2369 FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 2370 FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 2371 FDT_SET_U32("video,vrefresh", 2372 drm_mode_vrefresh(&s->conn_state.mode)); 2373 FDT_SET_U32("video,flags", s->conn_state.mode.flags); 2374 FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 2375 FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 2376 FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 2377 FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 2378 FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 2379 2380 if (s->conn_state.disp_info) { 2381 cacm_header = (const char*)&s->conn_state.disp_info->cacm_header; 2382 2383 FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 2384 FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 2385 FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 2386 FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 2387 2388 if (!strncasecmp(cacm_header, "CACM", 4)) { 2389 FDT_SET_U32("post-csc,hue", 2390 s->conn_state.disp_info->csc_info.hue); 2391 FDT_SET_U32("post-csc,saturation", 2392 s->conn_state.disp_info->csc_info.saturation); 2393 FDT_SET_U32("post-csc,contrast", 2394 s->conn_state.disp_info->csc_info.contrast); 2395 FDT_SET_U32("post-csc,brightness", 2396 s->conn_state.disp_info->csc_info.brightness); 2397 FDT_SET_U32("post-csc,r-gain", 2398 s->conn_state.disp_info->csc_info.r_gain); 2399 FDT_SET_U32("post-csc,g-gain", 2400 s->conn_state.disp_info->csc_info.g_gain); 2401 FDT_SET_U32("post-csc,b-gain", 2402 s->conn_state.disp_info->csc_info.b_gain); 2403 FDT_SET_U32("post-csc,r-offset", 2404 s->conn_state.disp_info->csc_info.r_offset); 2405 FDT_SET_U32("post-csc,g-offset", 2406 s->conn_state.disp_info->csc_info.g_offset); 2407 FDT_SET_U32("post-csc,b-offset", 2408 s->conn_state.disp_info->csc_info.b_offset); 2409 FDT_SET_U32("post-csc,enable", 2410 s->conn_state.disp_info->csc_info.csc_enable); 2411 } 2412 } 2413 2414 if (s->conn_state.disp_info->cubic_lut_data.size && 2415 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 2416 FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 2417 2418 #undef FDT_SET_U32 2419 } 2420 } 2421 2422 int rockchip_display_bind(struct udevice *dev) 2423 { 2424 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2425 2426 plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2427 2428 return 0; 2429 } 2430 2431 static const struct udevice_id rockchip_display_ids[] = { 2432 { .compatible = "rockchip,display-subsystem" }, 2433 { } 2434 }; 2435 2436 U_BOOT_DRIVER(rockchip_display) = { 2437 .name = "rockchip_display", 2438 .id = UCLASS_VIDEO, 2439 .of_match = rockchip_display_ids, 2440 .bind = rockchip_display_bind, 2441 .probe = rockchip_display_probe, 2442 }; 2443 2444 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 2445 char *const argv[]) 2446 { 2447 if (argc != 1) 2448 return CMD_RET_USAGE; 2449 2450 rockchip_show_logo(); 2451 2452 return 0; 2453 } 2454 2455 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 2456 char *const argv[]) 2457 { 2458 if (argc != 2) 2459 return CMD_RET_USAGE; 2460 2461 rockchip_show_bmp(argv[1]); 2462 2463 return 0; 2464 } 2465 2466 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc, 2467 char *const argv[]) 2468 { 2469 int ret; 2470 2471 if (argc < 1 || argc > 2) 2472 return CMD_RET_USAGE; 2473 2474 ret = rockchip_vop_dump(argv[1]); 2475 2476 return ret; 2477 } 2478 2479 U_BOOT_CMD( 2480 rockchip_show_logo, 1, 1, do_rockchip_logo_show, 2481 "load and display log from resource partition", 2482 NULL 2483 ); 2484 2485 U_BOOT_CMD( 2486 rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 2487 "load and display bmp from resource partition", 2488 " <bmp_name>" 2489 ); 2490 2491 U_BOOT_CMD( 2492 vop_dump, 2, 1, do_rockchip_vop_dump, 2493 "dump vop regs", 2494 " [a/all]" 2495 ); 2496