1186f8572SMark Yao /* 2186f8572SMark Yao * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3186f8572SMark Yao * 4186f8572SMark Yao * SPDX-License-Identifier: GPL-2.0+ 5186f8572SMark Yao */ 6186f8572SMark Yao 7186f8572SMark Yao #include <asm/unaligned.h> 850a9508eSSandy Huang #include <boot_rkimg.h> 9186f8572SMark Yao #include <config.h> 10186f8572SMark Yao #include <common.h> 11186f8572SMark Yao #include <errno.h> 120e00a84cSMasahiro Yamada #include <linux/libfdt.h> 13186f8572SMark Yao #include <fdtdec.h> 14186f8572SMark Yao #include <fdt_support.h> 158e2bab3fSAlgea Cao #include <linux/hdmi.h> 16186f8572SMark Yao #include <linux/list.h> 17186f8572SMark Yao #include <linux/compat.h> 18186f8572SMark Yao #include <linux/media-bus-format.h> 19186f8572SMark Yao #include <malloc.h> 20186f8572SMark Yao #include <video.h> 21f8a3e587SJoseph Chen #include <video_rockchip.h> 221a8d717cSWyon Bi #include <video_bridge.h> 23186f8572SMark Yao #include <dm/device.h> 24186f8572SMark Yao #include <dm/uclass-internal.h> 254b8c2ef1SMark Yao #include <asm/arch-rockchip/resource_img.h> 26186f8572SMark Yao 27186f8572SMark Yao #include "bmp_helper.h" 28186f8572SMark Yao #include "rockchip_display.h" 29186f8572SMark Yao #include "rockchip_crtc.h" 30186f8572SMark Yao #include "rockchip_connector.h" 311a8d717cSWyon Bi #include "rockchip_bridge.h" 32186f8572SMark Yao #include "rockchip_phy.h" 33186f8572SMark Yao #include "rockchip_panel.h" 34e2bce6e4SKever Yang #include <dm.h> 35e2bce6e4SKever Yang #include <dm/of_access.h> 36e2bce6e4SKever Yang #include <dm/ofnode.h> 3720618a45SGuochun Huang #include <asm/io.h> 38186f8572SMark Yao 391e4c51caSSandy Huang #define DRIVER_VERSION "v1.0.1" 40e559407dSSandy Huang 41e559407dSSandy Huang /*********************************************************************** 42e559407dSSandy Huang * Rockchip UBOOT DRM driver version 43e559407dSSandy Huang * 44e559407dSSandy Huang * v1.0.0 : add basic version for rockchip drm driver(hjc) 451e4c51caSSandy Huang * v1.0.1 : add much dsi update(hjc) 46e559407dSSandy Huang * 47e559407dSSandy Huang **********************************************************************/ 48e559407dSSandy Huang 494b8c2ef1SMark Yao #define RK_BLK_SIZE 512 507e72214dSShixiang Zheng #define BMP_PROCESSED_FLAG 8399 514b8c2ef1SMark Yao 52186f8572SMark Yao DECLARE_GLOBAL_DATA_PTR; 53186f8572SMark Yao static LIST_HEAD(rockchip_display_list); 54186f8572SMark Yao static LIST_HEAD(logo_cache_list); 55186f8572SMark Yao 56186f8572SMark Yao static unsigned long memory_start; 57*6414e3bcSSandy Huang static unsigned long cubic_lut_memory_start; 58186f8572SMark Yao static unsigned long memory_end; 5950a9508eSSandy Huang static struct base2_info base_parameter; 6050a9508eSSandy Huang static uint32_t crc32_table[256]; 61186f8572SMark Yao 622a48727aSAlgea Cao /* 632a48727aSAlgea Cao * the phy types are used by different connectors in public. 642a48727aSAlgea Cao * The current version only has inno hdmi phy for hdmi and tve. 652a48727aSAlgea Cao */ 662a48727aSAlgea Cao enum public_use_phy { 672a48727aSAlgea Cao NONE, 682a48727aSAlgea Cao INNO_HDMI_PHY 692a48727aSAlgea Cao }; 702a48727aSAlgea Cao 712a48727aSAlgea Cao /* save public phy data */ 722a48727aSAlgea Cao struct public_phy_data { 732a48727aSAlgea Cao const struct rockchip_phy *phy_drv; 742a48727aSAlgea Cao int phy_node; 752a48727aSAlgea Cao int public_phy_type; 762a48727aSAlgea Cao bool phy_init; 772a48727aSAlgea Cao }; 782a48727aSAlgea Cao 7950a9508eSSandy Huang void rockchip_display_make_crc32_table(void) 8050a9508eSSandy Huang { 8150a9508eSSandy Huang uint32_t c; 8250a9508eSSandy Huang int n, k; 8350a9508eSSandy Huang unsigned long poly; /* polynomial exclusive-or pattern */ 8450a9508eSSandy Huang /* terms of polynomial defining this crc (except x^32): */ 8550a9508eSSandy Huang static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 8650a9508eSSandy Huang 8750a9508eSSandy Huang /* make exclusive-or pattern from polynomial (0xedb88320L) */ 8850a9508eSSandy Huang poly = 0L; 8950a9508eSSandy Huang for (n = 0; n < sizeof(p) / sizeof(char); n++) 9050a9508eSSandy Huang poly |= 1L << (31 - p[n]); 9150a9508eSSandy Huang 9250a9508eSSandy Huang for (n = 0; n < 256; n++) { 9350a9508eSSandy Huang c = (unsigned long)n; 9450a9508eSSandy Huang for (k = 0; k < 8; k++) 9550a9508eSSandy Huang c = c & 1 ? poly ^ (c >> 1) : c >> 1; 9650a9508eSSandy Huang crc32_table[n] = cpu_to_le32(c); 9750a9508eSSandy Huang } 9850a9508eSSandy Huang } 9950a9508eSSandy Huang 10050a9508eSSandy Huang uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 10150a9508eSSandy Huang { 10250a9508eSSandy Huang int i; 10350a9508eSSandy Huang uint32_t crc; 10450a9508eSSandy Huang crc = 0xFFFFFFFF; 10550a9508eSSandy Huang 10650a9508eSSandy Huang for (i = 0; i < length; i++) { 10750a9508eSSandy Huang crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 10850a9508eSSandy Huang data++; 10950a9508eSSandy Huang } 11050a9508eSSandy Huang 11150a9508eSSandy Huang return crc ^ 0xffffffff; 11250a9508eSSandy Huang } 11350a9508eSSandy Huang 11450a9508eSSandy Huang int rockchip_get_baseparameter(void) 11550a9508eSSandy Huang { 11650a9508eSSandy Huang struct blk_desc *dev_desc; 11750a9508eSSandy Huang disk_partition_t part_info; 11850a9508eSSandy Huang int block_num = 2048; 11950a9508eSSandy Huang char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 12050a9508eSSandy Huang int ret = 0; 12150a9508eSSandy Huang 12250a9508eSSandy Huang dev_desc = rockchip_get_bootdev(); 12350a9508eSSandy Huang if (!dev_desc) { 12450a9508eSSandy Huang printf("%s: Could not find device\n", __func__); 12550a9508eSSandy Huang return -ENOENT; 12650a9508eSSandy Huang } 12750a9508eSSandy Huang 12850a9508eSSandy Huang if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 12950a9508eSSandy Huang printf("Could not find baseparameter partition\n"); 13050a9508eSSandy Huang return -ENOENT; 13150a9508eSSandy Huang } 13250a9508eSSandy Huang 13350a9508eSSandy Huang ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 13450a9508eSSandy Huang if (ret < 0) { 13550a9508eSSandy Huang printf("read baseparameter failed\n"); 13650a9508eSSandy Huang return ret; 13750a9508eSSandy Huang } 13850a9508eSSandy Huang 13950a9508eSSandy Huang memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 14050a9508eSSandy Huang if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 14150a9508eSSandy Huang printf("warning: bad baseparameter\n"); 14250a9508eSSandy Huang memset(&base_parameter, 0, sizeof(base_parameter)); 14350a9508eSSandy Huang } 14450a9508eSSandy Huang rockchip_display_make_crc32_table(); 14550a9508eSSandy Huang 14650a9508eSSandy Huang return ret; 14750a9508eSSandy Huang } 14850a9508eSSandy Huang 14950a9508eSSandy Huang struct base2_disp_info *rockchip_get_disp_info(int type, int id) 15050a9508eSSandy Huang { 15150a9508eSSandy Huang struct base2_disp_info *disp_info; 15250a9508eSSandy Huang int i = 0; 15350a9508eSSandy Huang u32 crc_val; 15450a9508eSSandy Huang 15550a9508eSSandy Huang for (i = 0; i < 8; i++) { 15650a9508eSSandy Huang disp_info = &base_parameter.disp_info[i]; 15750a9508eSSandy Huang if (disp_info->screen_info[0].type == type && 15850a9508eSSandy Huang disp_info->screen_info[0].id == id) { 15950a9508eSSandy Huang printf("disp info %d, type:%d, id:%d\n", i, type, id); 16050a9508eSSandy Huang break; 16150a9508eSSandy Huang } 16250a9508eSSandy Huang } 16350a9508eSSandy Huang if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 16450a9508eSSandy Huang return NULL; 16550a9508eSSandy Huang 16650a9508eSSandy Huang crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 16750a9508eSSandy Huang 16850a9508eSSandy Huang if (crc_val != disp_info->crc) { 16950a9508eSSandy Huang printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 17050a9508eSSandy Huang return NULL; 17150a9508eSSandy Huang } 17250a9508eSSandy Huang 17350a9508eSSandy Huang return disp_info; 17450a9508eSSandy Huang } 17550a9508eSSandy Huang 1762a48727aSAlgea Cao /* check which kind of public phy does connector use */ 1772a48727aSAlgea Cao static int check_public_use_phy(struct display_state *state) 1782a48727aSAlgea Cao { 1792a48727aSAlgea Cao int ret = NONE; 1802a48727aSAlgea Cao #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 1812a48727aSAlgea Cao struct connector_state *conn_state = &state->conn_state; 1822a48727aSAlgea Cao 1832a48727aSAlgea Cao if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 1842a48727aSAlgea Cao !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 1852a48727aSAlgea Cao ret = INNO_HDMI_PHY; 1862a48727aSAlgea Cao #endif 1872a48727aSAlgea Cao 1882a48727aSAlgea Cao return ret; 1892a48727aSAlgea Cao } 1902a48727aSAlgea Cao 1912a48727aSAlgea Cao /* 1922a48727aSAlgea Cao * get public phy driver and initialize it. 1932a48727aSAlgea Cao * The current version only has inno hdmi phy for hdmi and tve. 1942a48727aSAlgea Cao */ 1952a48727aSAlgea Cao static int get_public_phy(struct display_state *state, 1962a48727aSAlgea Cao struct public_phy_data *data) 1972a48727aSAlgea Cao { 1982a48727aSAlgea Cao struct connector_state *conn_state = &state->conn_state; 19915081c50SWyon Bi struct rockchip_phy *phy; 2002a48727aSAlgea Cao struct udevice *dev; 2012a48727aSAlgea Cao int ret = 0; 2022a48727aSAlgea Cao 2032a48727aSAlgea Cao switch (data->public_phy_type) { 2042a48727aSAlgea Cao case INNO_HDMI_PHY: 2052a48727aSAlgea Cao #if defined(CONFIG_ROCKCHIP_RK3328) 20615081c50SWyon Bi ret = uclass_get_device_by_name(UCLASS_PHY, 2072a48727aSAlgea Cao "hdmiphy@ff430000", &dev); 2082a48727aSAlgea Cao #elif defined(CONFIG_ROCKCHIP_RK322X) 20915081c50SWyon Bi ret = uclass_get_device_by_name(UCLASS_PHY, 2102a48727aSAlgea Cao "hdmi-phy@12030000", &dev); 2112a48727aSAlgea Cao #else 2122a48727aSAlgea Cao ret = -EINVAL; 2132a48727aSAlgea Cao #endif 2142a48727aSAlgea Cao if (ret) { 2152a48727aSAlgea Cao printf("Warn: can't find phy driver\n"); 2162a48727aSAlgea Cao return 0; 2172a48727aSAlgea Cao } 2182a48727aSAlgea Cao 21915081c50SWyon Bi phy = (struct rockchip_phy *)dev_get_driver_data(dev); 2202a48727aSAlgea Cao if (!phy) { 2212a48727aSAlgea Cao printf("failed to get phy driver\n"); 2222a48727aSAlgea Cao return 0; 2232a48727aSAlgea Cao } 2242a48727aSAlgea Cao 22515081c50SWyon Bi ret = rockchip_phy_init(phy); 22615081c50SWyon Bi if (ret) { 2272a48727aSAlgea Cao printf("failed to init phy driver\n"); 22815081c50SWyon Bi return ret; 2292a48727aSAlgea Cao } 2302a48727aSAlgea Cao conn_state->phy = phy; 2312a48727aSAlgea Cao 2324ba1647cSKever Yang debug("inno hdmi phy init success, save it\n"); 2332a48727aSAlgea Cao data->phy_drv = conn_state->phy; 2342a48727aSAlgea Cao data->phy_init = true; 2352a48727aSAlgea Cao return 0; 2362a48727aSAlgea Cao default: 2372a48727aSAlgea Cao return -EINVAL; 2382a48727aSAlgea Cao } 2392a48727aSAlgea Cao } 2402a48727aSAlgea Cao 2414b8c2ef1SMark Yao static void init_display_buffer(ulong base) 242186f8572SMark Yao { 2434b8c2ef1SMark Yao memory_start = base + DRM_ROCKCHIP_FB_SIZE; 244186f8572SMark Yao memory_end = memory_start; 245*6414e3bcSSandy Huang cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 246186f8572SMark Yao } 247186f8572SMark Yao 24823b55d3dSJoseph Chen void *get_display_buffer(int size) 249186f8572SMark Yao { 250186f8572SMark Yao unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 251186f8572SMark Yao void *buf; 252186f8572SMark Yao 253186f8572SMark Yao if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 254186f8572SMark Yao printf("failed to alloc %dbyte memory to display\n", size); 255186f8572SMark Yao return NULL; 256186f8572SMark Yao } 257186f8572SMark Yao buf = (void *)roundup_memory; 258186f8572SMark Yao 259186f8572SMark Yao memory_end = roundup_memory + size; 260186f8572SMark Yao 261186f8572SMark Yao return buf; 262186f8572SMark Yao } 263186f8572SMark Yao 264186f8572SMark Yao static unsigned long get_display_size(void) 265186f8572SMark Yao { 266186f8572SMark Yao return memory_end - memory_start; 267186f8572SMark Yao } 268186f8572SMark Yao 269*6414e3bcSSandy Huang static unsigned long get_single_cubic_lut_size(void) 270*6414e3bcSSandy Huang { 271*6414e3bcSSandy Huang ulong cubic_lut_size; 272*6414e3bcSSandy Huang int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 273*6414e3bcSSandy Huang 274*6414e3bcSSandy Huang /* This is depend on IC designed */ 275*6414e3bcSSandy Huang cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 276*6414e3bcSSandy Huang cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 277*6414e3bcSSandy Huang 278*6414e3bcSSandy Huang return cubic_lut_size; 279*6414e3bcSSandy Huang } 280*6414e3bcSSandy Huang 281*6414e3bcSSandy Huang static unsigned long get_cubic_lut_offset(int crtc_id) 282*6414e3bcSSandy Huang { 283*6414e3bcSSandy Huang return crtc_id * get_single_cubic_lut_size(); 284*6414e3bcSSandy Huang } 285*6414e3bcSSandy Huang 286*6414e3bcSSandy Huang unsigned long get_cubic_lut_buffer(int crtc_id) 287*6414e3bcSSandy Huang { 288*6414e3bcSSandy Huang return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 289*6414e3bcSSandy Huang } 290*6414e3bcSSandy Huang 291*6414e3bcSSandy Huang static unsigned long get_cubic_memory_size(void) 292*6414e3bcSSandy Huang { 293*6414e3bcSSandy Huang /* Max support 4 cubic lut */ 294*6414e3bcSSandy Huang return get_single_cubic_lut_size() * 4; 295*6414e3bcSSandy Huang } 296*6414e3bcSSandy Huang 29723b55d3dSJoseph Chen bool can_direct_logo(int bpp) 298186f8572SMark Yao { 299861ce1a0SSandy Huang return bpp == 24 || bpp == 32; 300186f8572SMark Yao } 301186f8572SMark Yao 3022a48727aSAlgea Cao static int connector_phy_init(struct display_state *state, 3032a48727aSAlgea Cao struct public_phy_data *data) 304186f8572SMark Yao { 305186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 3067cacd0a8SWyon Bi int type; 307186f8572SMark Yao 3082a48727aSAlgea Cao /* does this connector use public phy with others */ 3092a48727aSAlgea Cao type = check_public_use_phy(state); 3102a48727aSAlgea Cao if (type == INNO_HDMI_PHY) { 3112a48727aSAlgea Cao /* there is no public phy was initialized */ 3122a48727aSAlgea Cao if (!data->phy_init) { 3134ba1647cSKever Yang debug("start get public phy\n"); 3142a48727aSAlgea Cao data->public_phy_type = type; 3152a48727aSAlgea Cao if (get_public_phy(state, data)) { 3162a48727aSAlgea Cao printf("can't find correct public phy type\n"); 3172a48727aSAlgea Cao free(data); 3182a48727aSAlgea Cao return -EINVAL; 3192a48727aSAlgea Cao } 3202a48727aSAlgea Cao return 0; 3212a48727aSAlgea Cao } 3222a48727aSAlgea Cao 3232a48727aSAlgea Cao /* if this phy has been initialized, get it directly */ 32415081c50SWyon Bi conn_state->phy = (struct rockchip_phy *)data->phy_drv; 3252a48727aSAlgea Cao return 0; 3262a48727aSAlgea Cao } 3272a48727aSAlgea Cao 328186f8572SMark Yao return 0; 329186f8572SMark Yao } 330186f8572SMark Yao 331186f8572SMark Yao static int connector_panel_init(struct display_state *state) 332186f8572SMark Yao { 333186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 334186f8572SMark Yao struct panel_state *panel_state = &state->panel_state; 3351a8d717cSWyon Bi const struct rockchip_panel *panel = panel_state->panel; 336e2bce6e4SKever Yang ofnode dsp_lut_node; 337186f8572SMark Yao int ret, len; 338186f8572SMark Yao 3391a8d717cSWyon Bi if (!panel) 3404b8c2ef1SMark Yao return 0; 341186f8572SMark Yao 3421a8d717cSWyon Bi dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 343e2bce6e4SKever Yang if (!ofnode_valid(dsp_lut_node)) { 344861ce1a0SSandy Huang debug("%s can not find dsp-lut node\n", __func__); 3451e44acfcSWyon Bi return 0; 346e2bce6e4SKever Yang } 3471e44acfcSWyon Bi 348e2bce6e4SKever Yang ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 349186f8572SMark Yao if (len > 0) { 350186f8572SMark Yao conn_state->gamma.size = len / sizeof(u32); 351186f8572SMark Yao conn_state->gamma.lut = malloc(len); 352186f8572SMark Yao if (!conn_state->gamma.lut) { 353186f8572SMark Yao printf("malloc gamma lut failed\n"); 354186f8572SMark Yao return -ENOMEM; 355186f8572SMark Yao } 356e2bce6e4SKever Yang ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 357186f8572SMark Yao conn_state->gamma.lut, 358e2bce6e4SKever Yang conn_state->gamma.size); 359e2bce6e4SKever Yang if (ret) { 360186f8572SMark Yao printf("Cannot decode gamma_lut\n"); 361186f8572SMark Yao conn_state->gamma.lut = NULL; 362186f8572SMark Yao return -EINVAL; 363186f8572SMark Yao } 364186f8572SMark Yao panel_state->dsp_lut_node = dsp_lut_node; 365186f8572SMark Yao } 366186f8572SMark Yao 367186f8572SMark Yao return 0; 368186f8572SMark Yao } 369186f8572SMark Yao 370186f8572SMark Yao int drm_mode_vrefresh(const struct drm_display_mode *mode) 371186f8572SMark Yao { 372186f8572SMark Yao int refresh = 0; 373186f8572SMark Yao unsigned int calc_val; 374186f8572SMark Yao 375186f8572SMark Yao if (mode->vrefresh > 0) { 376186f8572SMark Yao refresh = mode->vrefresh; 377186f8572SMark Yao } else if (mode->htotal > 0 && mode->vtotal > 0) { 378186f8572SMark Yao int vtotal; 379186f8572SMark Yao 380186f8572SMark Yao vtotal = mode->vtotal; 381186f8572SMark Yao /* work out vrefresh the value will be x1000 */ 382186f8572SMark Yao calc_val = (mode->clock * 1000); 383186f8572SMark Yao calc_val /= mode->htotal; 384186f8572SMark Yao refresh = (calc_val + vtotal / 2) / vtotal; 385186f8572SMark Yao 386186f8572SMark Yao if (mode->flags & DRM_MODE_FLAG_INTERLACE) 387186f8572SMark Yao refresh *= 2; 388186f8572SMark Yao if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 389186f8572SMark Yao refresh /= 2; 390186f8572SMark Yao if (mode->vscan > 1) 391186f8572SMark Yao refresh /= mode->vscan; 392186f8572SMark Yao } 393186f8572SMark Yao return refresh; 394186f8572SMark Yao } 395186f8572SMark Yao 396e2bce6e4SKever Yang static int display_get_timing_from_dts(struct panel_state *panel_state, 397186f8572SMark Yao struct drm_display_mode *mode) 398186f8572SMark Yao { 3991a8d717cSWyon Bi struct rockchip_panel *panel = panel_state->panel; 400e2bce6e4SKever Yang int phandle; 401186f8572SMark Yao int hactive, vactive, pixelclock; 402186f8572SMark Yao int hfront_porch, hback_porch, hsync_len; 403186f8572SMark Yao int vfront_porch, vback_porch, vsync_len; 404186f8572SMark Yao int val, flags = 0; 405e2bce6e4SKever Yang ofnode timing, native_mode; 406186f8572SMark Yao 4071a8d717cSWyon Bi timing = dev_read_subnode(panel->dev, "display-timings"); 408e2bce6e4SKever Yang if (!ofnode_valid(timing)) 409186f8572SMark Yao return -ENODEV; 410186f8572SMark Yao 411e2bce6e4SKever Yang native_mode = ofnode_find_subnode(timing, "timing"); 412e2bce6e4SKever Yang if (!ofnode_valid(native_mode)) { 413e2bce6e4SKever Yang phandle = ofnode_read_u32_default(timing, "native-mode", -1); 414e2bce6e4SKever Yang native_mode = np_to_ofnode(of_find_node_by_phandle(phandle)); 415e2bce6e4SKever Yang if (!ofnode_valid(native_mode)) { 416186f8572SMark Yao printf("failed to get display timings from DT\n"); 417186f8572SMark Yao return -ENXIO; 418186f8572SMark Yao } 419186f8572SMark Yao } 420186f8572SMark Yao 421186f8572SMark Yao #define FDT_GET_INT(val, name) \ 422e2bce6e4SKever Yang val = ofnode_read_s32_default(native_mode, name, -1); \ 423186f8572SMark Yao if (val < 0) { \ 424186f8572SMark Yao printf("Can't get %s\n", name); \ 425186f8572SMark Yao return -ENXIO; \ 426186f8572SMark Yao } 427186f8572SMark Yao 428ffa55e18SShixiang Zheng #define FDT_GET_INT_DEFAULT(val, name, default) \ 429ffa55e18SShixiang Zheng val = ofnode_read_s32_default(native_mode, name, default); 430ffa55e18SShixiang Zheng 431186f8572SMark Yao FDT_GET_INT(hactive, "hactive"); 432186f8572SMark Yao FDT_GET_INT(vactive, "vactive"); 433186f8572SMark Yao FDT_GET_INT(pixelclock, "clock-frequency"); 434186f8572SMark Yao FDT_GET_INT(hsync_len, "hsync-len"); 435186f8572SMark Yao FDT_GET_INT(hfront_porch, "hfront-porch"); 436186f8572SMark Yao FDT_GET_INT(hback_porch, "hback-porch"); 437186f8572SMark Yao FDT_GET_INT(vsync_len, "vsync-len"); 438186f8572SMark Yao FDT_GET_INT(vfront_porch, "vfront-porch"); 439186f8572SMark Yao FDT_GET_INT(vback_porch, "vback-porch"); 440186f8572SMark Yao FDT_GET_INT(val, "hsync-active"); 441186f8572SMark Yao flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 442186f8572SMark Yao FDT_GET_INT(val, "vsync-active"); 443186f8572SMark Yao flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 4443a06149eSSandy Huang FDT_GET_INT(val, "pixelclk-active"); 4453a06149eSSandy Huang flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 446186f8572SMark Yao 447ffa55e18SShixiang Zheng FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 448ffa55e18SShixiang Zheng if (val == DRM_MODE_FLAG_XMIRROR) { 449ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_XMIRROR; 450ffa55e18SShixiang Zheng } else if (val == DRM_MODE_FLAG_YMIRROR) { 451ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_YMIRROR; 452ffa55e18SShixiang Zheng } else if (val == DRM_MODE_FLAG_XYMIRROR) { 453ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_XMIRROR; 454ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_YMIRROR; 455ffa55e18SShixiang Zheng } 456186f8572SMark Yao mode->hdisplay = hactive; 457186f8572SMark Yao mode->hsync_start = mode->hdisplay + hfront_porch; 458186f8572SMark Yao mode->hsync_end = mode->hsync_start + hsync_len; 459186f8572SMark Yao mode->htotal = mode->hsync_end + hback_porch; 460186f8572SMark Yao 461186f8572SMark Yao mode->vdisplay = vactive; 462186f8572SMark Yao mode->vsync_start = mode->vdisplay + vfront_porch; 463186f8572SMark Yao mode->vsync_end = mode->vsync_start + vsync_len; 464186f8572SMark Yao mode->vtotal = mode->vsync_end + vback_porch; 465186f8572SMark Yao 466186f8572SMark Yao mode->clock = pixelclock / 1000; 467186f8572SMark Yao mode->flags = flags; 468186f8572SMark Yao 469186f8572SMark Yao return 0; 470186f8572SMark Yao } 471186f8572SMark Yao 472ccd843b9SSandy Huang /** 473cf53642aSSandy Huang * drm_mode_max_resolution_filter - mark modes out of vop max resolution 474cf53642aSSandy Huang * @edid_data: structure store mode list 475cf53642aSSandy Huang * @max_output: vop max output resolution 476cf53642aSSandy Huang */ 477cf53642aSSandy Huang void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 478cf53642aSSandy Huang struct vop_rect *max_output) 479cf53642aSSandy Huang { 480cf53642aSSandy Huang int i; 481cf53642aSSandy Huang 482cf53642aSSandy Huang for (i = 0; i < edid_data->modes; i++) { 483cf53642aSSandy Huang if (edid_data->mode_buf[i].hdisplay > max_output->width || 484cf53642aSSandy Huang edid_data->mode_buf[i].vdisplay > max_output->height) 485cf53642aSSandy Huang edid_data->mode_buf[i].invalid = true; 486cf53642aSSandy Huang } 487cf53642aSSandy Huang } 488cf53642aSSandy Huang 489cf53642aSSandy Huang /** 490ccd843b9SSandy Huang * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 491ccd843b9SSandy Huang * @p: mode 492ccd843b9SSandy Huang * @adjust_flags: a combination of adjustment flags 493ccd843b9SSandy Huang * 494ccd843b9SSandy Huang * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 495ccd843b9SSandy Huang * 496ccd843b9SSandy Huang * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 497ccd843b9SSandy Huang * interlaced modes. 498ccd843b9SSandy Huang * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 499ccd843b9SSandy Huang * buffers containing two eyes (only adjust the timings when needed, eg. for 500ccd843b9SSandy Huang * "frame packing" or "side by side full"). 501ccd843b9SSandy Huang * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 502ccd843b9SSandy Huang * be performed for doublescan and vscan > 1 modes respectively. 503ccd843b9SSandy Huang */ 504ccd843b9SSandy Huang void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 505ccd843b9SSandy Huang { 506ccd843b9SSandy Huang if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 507ccd843b9SSandy Huang return; 508ccd843b9SSandy Huang 509ccd843b9SSandy Huang if (p->flags & DRM_MODE_FLAG_DBLCLK) 510ccd843b9SSandy Huang p->crtc_clock = 2 * p->clock; 511ccd843b9SSandy Huang else 512ccd843b9SSandy Huang p->crtc_clock = p->clock; 513ccd843b9SSandy Huang p->crtc_hdisplay = p->hdisplay; 514ccd843b9SSandy Huang p->crtc_hsync_start = p->hsync_start; 515ccd843b9SSandy Huang p->crtc_hsync_end = p->hsync_end; 516ccd843b9SSandy Huang p->crtc_htotal = p->htotal; 517ccd843b9SSandy Huang p->crtc_hskew = p->hskew; 518ccd843b9SSandy Huang p->crtc_vdisplay = p->vdisplay; 519ccd843b9SSandy Huang p->crtc_vsync_start = p->vsync_start; 520ccd843b9SSandy Huang p->crtc_vsync_end = p->vsync_end; 521ccd843b9SSandy Huang p->crtc_vtotal = p->vtotal; 522ccd843b9SSandy Huang 523ccd843b9SSandy Huang if (p->flags & DRM_MODE_FLAG_INTERLACE) { 524ccd843b9SSandy Huang if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 525ccd843b9SSandy Huang p->crtc_vdisplay /= 2; 526ccd843b9SSandy Huang p->crtc_vsync_start /= 2; 527ccd843b9SSandy Huang p->crtc_vsync_end /= 2; 528ccd843b9SSandy Huang p->crtc_vtotal /= 2; 529ccd843b9SSandy Huang } 530ccd843b9SSandy Huang } 531ccd843b9SSandy Huang 532ccd843b9SSandy Huang if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 533ccd843b9SSandy Huang if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 534ccd843b9SSandy Huang p->crtc_vdisplay *= 2; 535ccd843b9SSandy Huang p->crtc_vsync_start *= 2; 536ccd843b9SSandy Huang p->crtc_vsync_end *= 2; 537ccd843b9SSandy Huang p->crtc_vtotal *= 2; 538ccd843b9SSandy Huang } 539ccd843b9SSandy Huang } 540ccd843b9SSandy Huang 541ccd843b9SSandy Huang if (!(adjust_flags & CRTC_NO_VSCAN)) { 542ccd843b9SSandy Huang if (p->vscan > 1) { 543ccd843b9SSandy Huang p->crtc_vdisplay *= p->vscan; 544ccd843b9SSandy Huang p->crtc_vsync_start *= p->vscan; 545ccd843b9SSandy Huang p->crtc_vsync_end *= p->vscan; 546ccd843b9SSandy Huang p->crtc_vtotal *= p->vscan; 547ccd843b9SSandy Huang } 548ccd843b9SSandy Huang } 549ccd843b9SSandy Huang 550ccd843b9SSandy Huang if (adjust_flags & CRTC_STEREO_DOUBLE) { 551ccd843b9SSandy Huang unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 552ccd843b9SSandy Huang 553ccd843b9SSandy Huang switch (layout) { 554ccd843b9SSandy Huang case DRM_MODE_FLAG_3D_FRAME_PACKING: 555ccd843b9SSandy Huang p->crtc_clock *= 2; 556ccd843b9SSandy Huang p->crtc_vdisplay += p->crtc_vtotal; 557ccd843b9SSandy Huang p->crtc_vsync_start += p->crtc_vtotal; 558ccd843b9SSandy Huang p->crtc_vsync_end += p->crtc_vtotal; 559ccd843b9SSandy Huang p->crtc_vtotal += p->crtc_vtotal; 560ccd843b9SSandy Huang break; 561ccd843b9SSandy Huang } 562ccd843b9SSandy Huang } 563ccd843b9SSandy Huang 564ccd843b9SSandy Huang p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 565ccd843b9SSandy Huang p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 566ccd843b9SSandy Huang p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 567ccd843b9SSandy Huang p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 568ccd843b9SSandy Huang } 569ccd843b9SSandy Huang 5708e2bab3fSAlgea Cao /** 5718e2bab3fSAlgea Cao * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 5728e2bab3fSAlgea Cao * output format 5738e2bab3fSAlgea Cao * 5748e2bab3fSAlgea Cao * @connector: drm connector under action. 5758e2bab3fSAlgea Cao * @mode: video mode to be tested. 5768e2bab3fSAlgea Cao * 5778e2bab3fSAlgea Cao * Returns: 5788e2bab3fSAlgea Cao * true if the mode can be supported in YCBCR420 format 5798e2bab3fSAlgea Cao * false if not. 5808e2bab3fSAlgea Cao */ 5818e2bab3fSAlgea Cao bool drm_mode_is_420_only(const struct drm_display_info *display, 5828e2bab3fSAlgea Cao struct drm_display_mode *mode) 5838e2bab3fSAlgea Cao { 5848e2bab3fSAlgea Cao u8 vic = drm_match_cea_mode(mode); 5858e2bab3fSAlgea Cao 5868e2bab3fSAlgea Cao return test_bit(vic, display->hdmi.y420_vdb_modes); 5878e2bab3fSAlgea Cao } 5888e2bab3fSAlgea Cao 5898e2bab3fSAlgea Cao /** 5908e2bab3fSAlgea Cao * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 5918e2bab3fSAlgea Cao * output format also (along with RGB/YCBCR444/422) 5928e2bab3fSAlgea Cao * 5938e2bab3fSAlgea Cao * @display: display under action. 5948e2bab3fSAlgea Cao * @mode: video mode to be tested. 5958e2bab3fSAlgea Cao * 5968e2bab3fSAlgea Cao * Returns: 5978e2bab3fSAlgea Cao * true if the mode can be support YCBCR420 format 5988e2bab3fSAlgea Cao * false if not. 5998e2bab3fSAlgea Cao */ 6008e2bab3fSAlgea Cao bool drm_mode_is_420_also(const struct drm_display_info *display, 6018e2bab3fSAlgea Cao struct drm_display_mode *mode) 6028e2bab3fSAlgea Cao { 6038e2bab3fSAlgea Cao u8 vic = drm_match_cea_mode(mode); 6048e2bab3fSAlgea Cao 6058e2bab3fSAlgea Cao return test_bit(vic, display->hdmi.y420_cmdb_modes); 6068e2bab3fSAlgea Cao } 6078e2bab3fSAlgea Cao 6088e2bab3fSAlgea Cao /** 6098e2bab3fSAlgea Cao * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 6108e2bab3fSAlgea Cao * output format 6118e2bab3fSAlgea Cao * 6128e2bab3fSAlgea Cao * @display: display under action. 6138e2bab3fSAlgea Cao * @mode: video mode to be tested. 6148e2bab3fSAlgea Cao * 6158e2bab3fSAlgea Cao * Returns: 6168e2bab3fSAlgea Cao * true if the mode can be supported in YCBCR420 format 6178e2bab3fSAlgea Cao * false if not. 6188e2bab3fSAlgea Cao */ 6198e2bab3fSAlgea Cao bool drm_mode_is_420(const struct drm_display_info *display, 6208e2bab3fSAlgea Cao struct drm_display_mode *mode) 6218e2bab3fSAlgea Cao { 6228e2bab3fSAlgea Cao return drm_mode_is_420_only(display, mode) || 6238e2bab3fSAlgea Cao drm_mode_is_420_also(display, mode); 6248e2bab3fSAlgea Cao } 6258e2bab3fSAlgea Cao 626186f8572SMark Yao static int display_get_timing(struct display_state *state) 627186f8572SMark Yao { 628186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 629186f8572SMark Yao struct drm_display_mode *mode = &conn_state->mode; 630186f8572SMark Yao const struct drm_display_mode *m; 6314b8c2ef1SMark Yao struct panel_state *panel_state = &state->panel_state; 632c493d00eSWyon Bi const struct rockchip_panel *panel = panel_state->panel; 633186f8572SMark Yao 6341a8d717cSWyon Bi if (dev_of_valid(panel->dev) && 6351a8d717cSWyon Bi !display_get_timing_from_dts(panel_state, mode)) { 636186f8572SMark Yao printf("Using display timing dts\n"); 63734d0c224SWyon Bi return 0; 638186f8572SMark Yao } 639186f8572SMark Yao 640c493d00eSWyon Bi if (panel->data) { 641c493d00eSWyon Bi m = (const struct drm_display_mode *)panel->data; 642186f8572SMark Yao memcpy(mode, m, sizeof(*m)); 643c493d00eSWyon Bi printf("Using display timing from compatible panel driver\n"); 64434d0c224SWyon Bi return 0; 645186f8572SMark Yao } 646186f8572SMark Yao 647186f8572SMark Yao return -ENODEV; 648186f8572SMark Yao } 649186f8572SMark Yao 65058c17f51SSandy Huang static int display_pre_init(void) 65158c17f51SSandy Huang { 65258c17f51SSandy Huang struct display_state *state; 65358c17f51SSandy Huang int ret = 0; 65458c17f51SSandy Huang 65558c17f51SSandy Huang list_for_each_entry(state, &rockchip_display_list, head) { 65658c17f51SSandy Huang struct connector_state *conn_state = &state->conn_state; 65758c17f51SSandy Huang const struct rockchip_connector *conn = conn_state->connector; 65858c17f51SSandy Huang const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 65958c17f51SSandy Huang struct crtc_state *crtc_state = &state->crtc_state; 66058c17f51SSandy Huang struct rockchip_crtc *crtc = crtc_state->crtc; 66158c17f51SSandy Huang 66258c17f51SSandy Huang if (conn_funcs->pre_init) { 66358c17f51SSandy Huang ret = conn_funcs->pre_init(state); 66458c17f51SSandy Huang if (ret) 66558c17f51SSandy Huang printf("pre init conn error\n"); 66658c17f51SSandy Huang } 66758c17f51SSandy Huang crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 66858c17f51SSandy Huang } 66958c17f51SSandy Huang return ret; 67058c17f51SSandy Huang } 67158c17f51SSandy Huang 672186f8572SMark Yao static int display_init(struct display_state *state) 673186f8572SMark Yao { 674186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 6751a8d717cSWyon Bi struct panel_state *panel_state = &state->panel_state; 676186f8572SMark Yao const struct rockchip_connector *conn = conn_state->connector; 677186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 678186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 6792a48727aSAlgea Cao struct rockchip_crtc *crtc = crtc_state->crtc; 680186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 681ccd843b9SSandy Huang struct drm_display_mode *mode = &conn_state->mode; 682b014c5e2SGuochun Huang const char *compatible; 683186f8572SMark Yao int ret = 0; 68452015e97SSandy Huang static bool __print_once = false; 685081dec1bSAndy Yan #if defined(CONFIG_I2C_EDID) 686081dec1bSAndy Yan int bpc; 687081dec1bSAndy Yan #endif 68852015e97SSandy Huang if (!__print_once) { 68952015e97SSandy Huang __print_once = true; 690e559407dSSandy Huang printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 69152015e97SSandy Huang } 692e559407dSSandy Huang 693186f8572SMark Yao if (state->is_init) 694186f8572SMark Yao return 0; 695186f8572SMark Yao 696186f8572SMark Yao if (!conn_funcs || !crtc_funcs) { 697186f8572SMark Yao printf("failed to find connector or crtc functions\n"); 698186f8572SMark Yao return -ENXIO; 699186f8572SMark Yao } 700186f8572SMark Yao 701a5afbabdSSandy Huang if (crtc_state->crtc->active && !crtc_state->ports_node && 7022d7c136fSSandy Huang memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 7032d7c136fSSandy Huang sizeof(struct drm_display_mode))) { 7042d7c136fSSandy Huang printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 7052d7c136fSSandy Huang crtc_state->dev->name, 7062d7c136fSSandy Huang crtc_state->crtc->active_mode.type, 7072d7c136fSSandy Huang crtc_state->crtc->active_mode.hdisplay, 7082d7c136fSSandy Huang crtc_state->crtc->active_mode.vdisplay, 7092d7c136fSSandy Huang crtc_state->crtc->active_mode.vrefresh); 7102d7c136fSSandy Huang return -ENODEV; 7112d7c136fSSandy Huang } 7122d7c136fSSandy Huang 713cf53642aSSandy Huang if (crtc_funcs->preinit) { 714cf53642aSSandy Huang ret = crtc_funcs->preinit(state); 715cf53642aSSandy Huang if (ret) 716cf53642aSSandy Huang return ret; 717cf53642aSSandy Huang } 718cf53642aSSandy Huang 7197cacd0a8SWyon Bi if (panel_state->panel) 7207cacd0a8SWyon Bi rockchip_panel_init(panel_state->panel); 7217cacd0a8SWyon Bi 722186f8572SMark Yao if (conn_funcs->init) { 723186f8572SMark Yao ret = conn_funcs->init(state); 724186f8572SMark Yao if (ret) 7254b8c2ef1SMark Yao goto deinit; 726186f8572SMark Yao } 7277cacd0a8SWyon Bi 7287cacd0a8SWyon Bi if (conn_state->phy) 7297cacd0a8SWyon Bi rockchip_phy_init(conn_state->phy); 7307cacd0a8SWyon Bi 731186f8572SMark Yao /* 732186f8572SMark Yao * support hotplug, but not connect; 733186f8572SMark Yao */ 7342a48727aSAlgea Cao #ifdef CONFIG_ROCKCHIP_DRM_TVE 7352a48727aSAlgea Cao if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 7362a48727aSAlgea Cao printf("hdmi plugin ,skip tve\n"); 7372a48727aSAlgea Cao goto deinit; 7382a48727aSAlgea Cao } 7399c9eff43SAlgea Cao #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 7402a48727aSAlgea Cao if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 7412a48727aSAlgea Cao printf("hdmi plugin ,skip tve\n"); 7422a48727aSAlgea Cao goto deinit; 7432a48727aSAlgea Cao } 7442a48727aSAlgea Cao #endif 745186f8572SMark Yao if (conn_funcs->detect) { 746186f8572SMark Yao ret = conn_funcs->detect(state); 7479c9eff43SAlgea Cao #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 7482a48727aSAlgea Cao if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 7492a48727aSAlgea Cao crtc->hdmi_hpd = ret; 7502a48727aSAlgea Cao #endif 751186f8572SMark Yao if (!ret) 752186f8572SMark Yao goto deinit; 753186f8572SMark Yao } 754186f8572SMark Yao 755005d29a7SWyon Bi if (panel_state->panel) { 756186f8572SMark Yao ret = display_get_timing(state); 7572a74799bSJianqun Xu if (!ret) 7582a74799bSJianqun Xu conn_state->bpc = panel_state->panel->bpc; 75934d0c224SWyon Bi #if defined(CONFIG_I2C_EDID) 76034d0c224SWyon Bi if (ret < 0 && conn_funcs->get_edid) { 76134d0c224SWyon Bi rockchip_panel_prepare(panel_state->panel); 76234d0c224SWyon Bi 76334d0c224SWyon Bi ret = conn_funcs->get_edid(state); 76434d0c224SWyon Bi if (!ret) { 76534d0c224SWyon Bi ret = edid_get_drm_mode((void *)&conn_state->edid, 76634d0c224SWyon Bi sizeof(conn_state->edid), 76734d0c224SWyon Bi mode, &bpc); 7682a74799bSJianqun Xu if (!ret) { 7692a74799bSJianqun Xu conn_state->bpc = bpc; 77034d0c224SWyon Bi edid_print_info((void *)&conn_state->edid); 77134d0c224SWyon Bi } 77234d0c224SWyon Bi } 7732a74799bSJianqun Xu } 77434d0c224SWyon Bi #endif 7751a8d717cSWyon Bi } else if (conn_state->bridge) { 7761a8d717cSWyon Bi ret = video_bridge_read_edid(conn_state->bridge->dev, 7771a8d717cSWyon Bi conn_state->edid, EDID_SIZE); 7781a8d717cSWyon Bi if (ret > 0) { 779081dec1bSAndy Yan #if defined(CONFIG_I2C_EDID) 7801a8d717cSWyon Bi ret = edid_get_drm_mode(conn_state->edid, ret, mode, 7811a8d717cSWyon Bi &bpc); 7822a74799bSJianqun Xu if (!ret) { 7832a74799bSJianqun Xu conn_state->bpc = bpc; 7841a8d717cSWyon Bi edid_print_info((void *)&conn_state->edid); 7852a74799bSJianqun Xu } 786081dec1bSAndy Yan #endif 78775eb6fceSAlgea Cao } else { 78875eb6fceSAlgea Cao ret = video_bridge_get_timing(conn_state->bridge->dev); 7891a8d717cSWyon Bi } 790005d29a7SWyon Bi } else if (conn_funcs->get_timing) { 791005d29a7SWyon Bi ret = conn_funcs->get_timing(state); 792005d29a7SWyon Bi } else if (conn_funcs->get_edid) { 793005d29a7SWyon Bi ret = conn_funcs->get_edid(state); 794081dec1bSAndy Yan #if defined(CONFIG_I2C_EDID) 795005d29a7SWyon Bi if (!ret) { 796005d29a7SWyon Bi ret = edid_get_drm_mode((void *)&conn_state->edid, 797005d29a7SWyon Bi sizeof(conn_state->edid), mode, 798005d29a7SWyon Bi &bpc); 7992a74799bSJianqun Xu if (!ret) { 8002a74799bSJianqun Xu conn_state->bpc = bpc; 801005d29a7SWyon Bi edid_print_info((void *)&conn_state->edid); 802005d29a7SWyon Bi } 8032a74799bSJianqun Xu } 804081dec1bSAndy Yan #endif 8051a8d717cSWyon Bi } 8061a8d717cSWyon Bi 807186f8572SMark Yao if (ret) 808186f8572SMark Yao goto deinit; 8091a8d717cSWyon Bi 810b014c5e2SGuochun Huang /* rk356x series drive mipi pixdata on posedge */ 811b014c5e2SGuochun Huang compatible = dev_read_string(conn_state->dev, "compatible"); 812b014c5e2SGuochun Huang if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 813b014c5e2SGuochun Huang conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 814b014c5e2SGuochun Huang 81534d0c224SWyon Bi printf("Detailed mode clock %u kHz, flags[%x]\n" 81634d0c224SWyon Bi " H: %04d %04d %04d %04d\n" 81734d0c224SWyon Bi " V: %04d %04d %04d %04d\n" 81834d0c224SWyon Bi "bus_format: %x\n", 81934d0c224SWyon Bi mode->clock, mode->flags, 82034d0c224SWyon Bi mode->hdisplay, mode->hsync_start, 82134d0c224SWyon Bi mode->hsync_end, mode->htotal, 82234d0c224SWyon Bi mode->vdisplay, mode->vsync_start, 82334d0c224SWyon Bi mode->vsync_end, mode->vtotal, 82434d0c224SWyon Bi conn_state->bus_format); 82534d0c224SWyon Bi 826ccd843b9SSandy Huang drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 827186f8572SMark Yao 828ee937701SWyon Bi if (conn_state->bridge) 829ee937701SWyon Bi rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 830ee937701SWyon Bi 831186f8572SMark Yao if (crtc_funcs->init) { 832186f8572SMark Yao ret = crtc_funcs->init(state); 833186f8572SMark Yao if (ret) 834186f8572SMark Yao goto deinit; 835186f8572SMark Yao } 836186f8572SMark Yao state->is_init = 1; 837186f8572SMark Yao 8382d7c136fSSandy Huang crtc_state->crtc->active = true; 8392d7c136fSSandy Huang memcpy(&crtc_state->crtc->active_mode, 8402d7c136fSSandy Huang &conn_state->mode, sizeof(struct drm_display_mode)); 8412d7c136fSSandy Huang 842186f8572SMark Yao return 0; 843186f8572SMark Yao 844186f8572SMark Yao deinit: 845186f8572SMark Yao if (conn_funcs->deinit) 846186f8572SMark Yao conn_funcs->deinit(state); 847186f8572SMark Yao return ret; 848186f8572SMark Yao } 849186f8572SMark Yao 85067b9012cSSandy Huang int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 85167b9012cSSandy Huang { 85267b9012cSSandy Huang struct crtc_state *crtc_state = &state->crtc_state; 85367b9012cSSandy Huang const struct rockchip_crtc *crtc = crtc_state->crtc; 85467b9012cSSandy Huang const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 85567b9012cSSandy Huang int ret; 85667b9012cSSandy Huang 85767b9012cSSandy Huang if (!state->is_init) 85867b9012cSSandy Huang return -EINVAL; 85967b9012cSSandy Huang 86067b9012cSSandy Huang if (crtc_funcs->send_mcu_cmd) { 86167b9012cSSandy Huang ret = crtc_funcs->send_mcu_cmd(state, type, val); 86267b9012cSSandy Huang if (ret) 86367b9012cSSandy Huang return ret; 86467b9012cSSandy Huang } 86567b9012cSSandy Huang 86667b9012cSSandy Huang return 0; 86767b9012cSSandy Huang } 86867b9012cSSandy Huang 869186f8572SMark Yao static int display_set_plane(struct display_state *state) 870186f8572SMark Yao { 871186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 872186f8572SMark Yao const struct rockchip_crtc *crtc = crtc_state->crtc; 873186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 874186f8572SMark Yao int ret; 875186f8572SMark Yao 876186f8572SMark Yao if (!state->is_init) 877186f8572SMark Yao return -EINVAL; 878186f8572SMark Yao 879186f8572SMark Yao if (crtc_funcs->set_plane) { 880186f8572SMark Yao ret = crtc_funcs->set_plane(state); 881186f8572SMark Yao if (ret) 882186f8572SMark Yao return ret; 883186f8572SMark Yao } 884186f8572SMark Yao 885186f8572SMark Yao return 0; 886186f8572SMark Yao } 887186f8572SMark Yao 888186f8572SMark Yao static int display_enable(struct display_state *state) 889186f8572SMark Yao { 890186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 891186f8572SMark Yao const struct rockchip_connector *conn = conn_state->connector; 892186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 893186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 894186f8572SMark Yao const struct rockchip_crtc *crtc = crtc_state->crtc; 895186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 8967cacd0a8SWyon Bi struct panel_state *panel_state = &state->panel_state; 897186f8572SMark Yao 898186f8572SMark Yao if (!state->is_init) 899186f8572SMark Yao return -EINVAL; 900186f8572SMark Yao 901186f8572SMark Yao if (state->is_enable) 902186f8572SMark Yao return 0; 903186f8572SMark Yao 90449ae8667SWyon Bi if (crtc_funcs->prepare) 90549ae8667SWyon Bi crtc_funcs->prepare(state); 906186f8572SMark Yao 90749ae8667SWyon Bi if (conn_funcs->prepare) 90849ae8667SWyon Bi conn_funcs->prepare(state); 909186f8572SMark Yao 9101a8d717cSWyon Bi if (conn_state->bridge) 9111a8d717cSWyon Bi rockchip_bridge_pre_enable(conn_state->bridge); 9121a8d717cSWyon Bi 9137cacd0a8SWyon Bi if (panel_state->panel) 9147cacd0a8SWyon Bi rockchip_panel_prepare(panel_state->panel); 915186f8572SMark Yao 91649ae8667SWyon Bi if (crtc_funcs->enable) 91749ae8667SWyon Bi crtc_funcs->enable(state); 918186f8572SMark Yao 91949ae8667SWyon Bi if (conn_funcs->enable) 92049ae8667SWyon Bi conn_funcs->enable(state); 921186f8572SMark Yao 9221a8d717cSWyon Bi if (conn_state->bridge) 9231a8d717cSWyon Bi rockchip_bridge_enable(conn_state->bridge); 9241a8d717cSWyon Bi 9257cacd0a8SWyon Bi if (panel_state->panel) 9267cacd0a8SWyon Bi rockchip_panel_enable(panel_state->panel); 927186f8572SMark Yao 928186f8572SMark Yao state->is_enable = true; 929c493d00eSWyon Bi 93049ae8667SWyon Bi return 0; 931186f8572SMark Yao } 932186f8572SMark Yao 933186f8572SMark Yao static int display_disable(struct display_state *state) 934186f8572SMark Yao { 935186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 936186f8572SMark Yao const struct rockchip_connector *conn = conn_state->connector; 937186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 938186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 939186f8572SMark Yao const struct rockchip_crtc *crtc = crtc_state->crtc; 940186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 9417cacd0a8SWyon Bi struct panel_state *panel_state = &state->panel_state; 942186f8572SMark Yao 943186f8572SMark Yao if (!state->is_init) 944186f8572SMark Yao return 0; 945186f8572SMark Yao 946186f8572SMark Yao if (!state->is_enable) 947186f8572SMark Yao return 0; 948186f8572SMark Yao 9497cacd0a8SWyon Bi if (panel_state->panel) 9507cacd0a8SWyon Bi rockchip_panel_disable(panel_state->panel); 951186f8572SMark Yao 9521a8d717cSWyon Bi if (conn_state->bridge) 9531a8d717cSWyon Bi rockchip_bridge_disable(conn_state->bridge); 954186f8572SMark Yao 955186f8572SMark Yao if (conn_funcs->disable) 956186f8572SMark Yao conn_funcs->disable(state); 957186f8572SMark Yao 9581a8d717cSWyon Bi if (crtc_funcs->disable) 9591a8d717cSWyon Bi crtc_funcs->disable(state); 9601a8d717cSWyon Bi 9617cacd0a8SWyon Bi if (panel_state->panel) 9627cacd0a8SWyon Bi rockchip_panel_unprepare(panel_state->panel); 963186f8572SMark Yao 9641a8d717cSWyon Bi if (conn_state->bridge) 9651a8d717cSWyon Bi rockchip_bridge_post_disable(conn_state->bridge); 9661a8d717cSWyon Bi 967186f8572SMark Yao if (conn_funcs->unprepare) 968186f8572SMark Yao conn_funcs->unprepare(state); 969186f8572SMark Yao 970186f8572SMark Yao state->is_enable = 0; 971186f8572SMark Yao state->is_init = 0; 972186f8572SMark Yao 973186f8572SMark Yao return 0; 974186f8572SMark Yao } 975186f8572SMark Yao 976186f8572SMark Yao static int display_logo(struct display_state *state) 977186f8572SMark Yao { 978186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 979186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 980186f8572SMark Yao struct logo_info *logo = &state->logo; 9812d7c136fSSandy Huang int hdisplay, vdisplay, ret; 982186f8572SMark Yao 9832d7c136fSSandy Huang ret = display_init(state); 9842d7c136fSSandy Huang if (!state->is_init || ret) 985186f8572SMark Yao return -ENODEV; 986186f8572SMark Yao 987186f8572SMark Yao switch (logo->bpp) { 988186f8572SMark Yao case 16: 989186f8572SMark Yao crtc_state->format = ROCKCHIP_FMT_RGB565; 990186f8572SMark Yao break; 991186f8572SMark Yao case 24: 992186f8572SMark Yao crtc_state->format = ROCKCHIP_FMT_RGB888; 993186f8572SMark Yao break; 994186f8572SMark Yao case 32: 995186f8572SMark Yao crtc_state->format = ROCKCHIP_FMT_ARGB8888; 996186f8572SMark Yao break; 997186f8572SMark Yao default: 998186f8572SMark Yao printf("can't support bmp bits[%d]\n", logo->bpp); 999186f8572SMark Yao return -EINVAL; 1000186f8572SMark Yao } 1001186f8572SMark Yao hdisplay = conn_state->mode.hdisplay; 1002186f8572SMark Yao vdisplay = conn_state->mode.vdisplay; 1003186f8572SMark Yao crtc_state->src_w = logo->width; 1004186f8572SMark Yao crtc_state->src_h = logo->height; 1005186f8572SMark Yao crtc_state->src_x = 0; 1006186f8572SMark Yao crtc_state->src_y = 0; 1007186f8572SMark Yao crtc_state->ymirror = logo->ymirror; 1008186f8572SMark Yao 10094b8c2ef1SMark Yao crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1010186f8572SMark Yao crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 1011186f8572SMark Yao 1012186f8572SMark Yao if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1013186f8572SMark Yao crtc_state->crtc_x = 0; 1014186f8572SMark Yao crtc_state->crtc_y = 0; 1015186f8572SMark Yao crtc_state->crtc_w = hdisplay; 1016186f8572SMark Yao crtc_state->crtc_h = vdisplay; 1017186f8572SMark Yao } else { 1018186f8572SMark Yao if (crtc_state->src_w >= hdisplay) { 1019186f8572SMark Yao crtc_state->crtc_x = 0; 1020186f8572SMark Yao crtc_state->crtc_w = hdisplay; 1021186f8572SMark Yao } else { 1022186f8572SMark Yao crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 1023186f8572SMark Yao crtc_state->crtc_w = crtc_state->src_w; 1024186f8572SMark Yao } 1025186f8572SMark Yao 1026186f8572SMark Yao if (crtc_state->src_h >= vdisplay) { 1027186f8572SMark Yao crtc_state->crtc_y = 0; 1028186f8572SMark Yao crtc_state->crtc_h = vdisplay; 1029186f8572SMark Yao } else { 1030186f8572SMark Yao crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 1031186f8572SMark Yao crtc_state->crtc_h = crtc_state->src_h; 1032186f8572SMark Yao } 1033186f8572SMark Yao } 1034186f8572SMark Yao 1035186f8572SMark Yao display_set_plane(state); 1036186f8572SMark Yao display_enable(state); 1037186f8572SMark Yao 1038186f8572SMark Yao return 0; 1039186f8572SMark Yao } 1040186f8572SMark Yao 1041e2bce6e4SKever Yang static int get_crtc_id(ofnode connect) 1042186f8572SMark Yao { 1043e2bce6e4SKever Yang int phandle; 1044e2bce6e4SKever Yang struct device_node *remote; 1045186f8572SMark Yao int val; 1046186f8572SMark Yao 1047e2bce6e4SKever Yang phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1); 1048186f8572SMark Yao if (phandle < 0) 1049186f8572SMark Yao goto err; 1050e2bce6e4SKever Yang remote = of_find_node_by_phandle(phandle); 1051e2bce6e4SKever Yang val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1); 1052186f8572SMark Yao if (val < 0) 1053186f8572SMark Yao goto err; 1054186f8572SMark Yao 1055186f8572SMark Yao return val; 1056186f8572SMark Yao err: 1057186f8572SMark Yao printf("Can't get crtc id, default set to id = 0\n"); 1058186f8572SMark Yao return 0; 1059186f8572SMark Yao } 1060186f8572SMark Yao 106167b9012cSSandy Huang static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 106267b9012cSSandy Huang { 106367b9012cSSandy Huang ofnode mcu_node; 106467b9012cSSandy Huang int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 106567b9012cSSandy Huang 106667b9012cSSandy Huang mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1067a196d7fcSKever Yang if (!ofnode_valid(mcu_node)) 1068a196d7fcSKever Yang return -ENODEV; 106967b9012cSSandy Huang 107067b9012cSSandy Huang #define FDT_GET_MCU_INT(val, name) \ 107167b9012cSSandy Huang do { \ 107267b9012cSSandy Huang val = ofnode_read_s32_default(mcu_node, name, -1); \ 107367b9012cSSandy Huang if (val < 0) { \ 107467b9012cSSandy Huang printf("Can't get %s\n", name); \ 107567b9012cSSandy Huang return -ENXIO; \ 107667b9012cSSandy Huang } \ 107767b9012cSSandy Huang } while (0) 107867b9012cSSandy Huang 107967b9012cSSandy Huang FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 108067b9012cSSandy Huang FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 108167b9012cSSandy Huang FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 108267b9012cSSandy Huang FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 108367b9012cSSandy Huang FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 108467b9012cSSandy Huang 108567b9012cSSandy Huang crtc_state->mcu_timing.mcu_pix_total = total_pixel; 108667b9012cSSandy Huang crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 108767b9012cSSandy Huang crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 108867b9012cSSandy Huang crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 108967b9012cSSandy Huang crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 109067b9012cSSandy Huang 109167b9012cSSandy Huang return 0; 109267b9012cSSandy Huang } 109367b9012cSSandy Huang 1094186f8572SMark Yao struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1095186f8572SMark Yao { 1096186f8572SMark Yao struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1097186f8572SMark Yao 1098186f8572SMark Yao list_for_each_entry(tmp, &logo_cache_list, head) { 1099186f8572SMark Yao if (!strcmp(tmp->name, bmp)) { 1100186f8572SMark Yao logo_cache = tmp; 1101186f8572SMark Yao break; 1102186f8572SMark Yao } 1103186f8572SMark Yao } 1104186f8572SMark Yao 1105186f8572SMark Yao if (!logo_cache) { 1106186f8572SMark Yao logo_cache = malloc(sizeof(*logo_cache)); 1107186f8572SMark Yao if (!logo_cache) { 1108186f8572SMark Yao printf("failed to alloc memory for logo cache\n"); 1109186f8572SMark Yao return NULL; 1110186f8572SMark Yao } 1111186f8572SMark Yao memset(logo_cache, 0, sizeof(*logo_cache)); 1112186f8572SMark Yao strcpy(logo_cache->name, bmp); 1113186f8572SMark Yao INIT_LIST_HEAD(&logo_cache->head); 1114186f8572SMark Yao list_add_tail(&logo_cache->head, &logo_cache_list); 1115186f8572SMark Yao } 1116186f8572SMark Yao 1117186f8572SMark Yao return logo_cache; 1118186f8572SMark Yao } 1119186f8572SMark Yao 11205eb61944SSandy Huang /* Note: used only for rkfb kernel driver */ 11215eb61944SSandy Huang static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 11225eb61944SSandy Huang { 11235eb61944SSandy Huang #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 11245eb61944SSandy Huang void *dst = NULL; 11255eb61944SSandy Huang int len, size; 11265eb61944SSandy Huang struct bmp_header *header; 11275eb61944SSandy Huang 11285eb61944SSandy Huang if (!logo || !bmp_name) 11295eb61944SSandy Huang return -EINVAL; 11305eb61944SSandy Huang 11315eb61944SSandy Huang header = malloc(RK_BLK_SIZE); 11325eb61944SSandy Huang if (!header) 11335eb61944SSandy Huang return -ENOMEM; 11345eb61944SSandy Huang 11355eb61944SSandy Huang len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 11365eb61944SSandy Huang if (len != RK_BLK_SIZE) { 11375eb61944SSandy Huang free(header); 11385eb61944SSandy Huang return -EINVAL; 11395eb61944SSandy Huang } 11405eb61944SSandy Huang size = get_unaligned_le32(&header->file_size); 11415eb61944SSandy Huang dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 11425eb61944SSandy Huang len = rockchip_read_resource_file(dst, bmp_name, 0, size); 11435eb61944SSandy Huang if (len != size) { 11445eb61944SSandy Huang printf("failed to load bmp %s\n", bmp_name); 11455eb61944SSandy Huang free(header); 11465eb61944SSandy Huang return -ENOENT; 11475eb61944SSandy Huang } 11485eb61944SSandy Huang 11495eb61944SSandy Huang logo->mem = dst; 115023b55d3dSJoseph Chen #endif 11515eb61944SSandy Huang 11525eb61944SSandy Huang return 0; 11535eb61944SSandy Huang } 11545eb61944SSandy Huang 1155186f8572SMark Yao static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1156186f8572SMark Yao { 11574b8c2ef1SMark Yao #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1158186f8572SMark Yao struct rockchip_logo_cache *logo_cache; 1159186f8572SMark Yao struct bmp_header *header; 1160186f8572SMark Yao void *dst = NULL, *pdst; 11614b8c2ef1SMark Yao int size, len; 11624b8c2ef1SMark Yao int ret = 0; 11637e72214dSShixiang Zheng int reserved = 0; 1164186f8572SMark Yao 1165186f8572SMark Yao if (!logo || !bmp_name) 1166186f8572SMark Yao return -EINVAL; 1167186f8572SMark Yao logo_cache = find_or_alloc_logo_cache(bmp_name); 1168186f8572SMark Yao if (!logo_cache) 1169186f8572SMark Yao return -ENOMEM; 1170186f8572SMark Yao 1171186f8572SMark Yao if (logo_cache->logo.mem) { 1172186f8572SMark Yao memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1173186f8572SMark Yao return 0; 1174186f8572SMark Yao } 1175186f8572SMark Yao 11764b8c2ef1SMark Yao header = malloc(RK_BLK_SIZE); 1177186f8572SMark Yao if (!header) 11784b8c2ef1SMark Yao return -ENOMEM; 11794b8c2ef1SMark Yao 11804b8c2ef1SMark Yao len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 11814b8c2ef1SMark Yao if (len != RK_BLK_SIZE) { 11824b8c2ef1SMark Yao ret = -EINVAL; 11834b8c2ef1SMark Yao goto free_header; 11844b8c2ef1SMark Yao } 1185186f8572SMark Yao 1186186f8572SMark Yao logo->bpp = get_unaligned_le16(&header->bit_count); 1187186f8572SMark Yao logo->width = get_unaligned_le32(&header->width); 1188186f8572SMark Yao logo->height = get_unaligned_le32(&header->height); 11897e72214dSShixiang Zheng reserved = get_unaligned_le32(&header->reserved); 11907e72214dSShixiang Zheng if (logo->height < 0) 11917e72214dSShixiang Zheng logo->height = -logo->height; 1192186f8572SMark Yao size = get_unaligned_le32(&header->file_size); 1193861ce1a0SSandy Huang if (!can_direct_logo(logo->bpp)) { 1194186f8572SMark Yao if (size > MEMORY_POOL_SIZE) { 1195186f8572SMark Yao printf("failed to use boot buf as temp bmp buffer\n"); 11964b8c2ef1SMark Yao ret = -ENOMEM; 11974b8c2ef1SMark Yao goto free_header; 1198186f8572SMark Yao } 1199861ce1a0SSandy Huang pdst = get_display_buffer(size); 1200186f8572SMark Yao 1201861ce1a0SSandy Huang } else { 1202186f8572SMark Yao pdst = get_display_buffer(size); 1203186f8572SMark Yao dst = pdst; 1204861ce1a0SSandy Huang } 1205186f8572SMark Yao 12064b8c2ef1SMark Yao len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 12074b8c2ef1SMark Yao if (len != size) { 1208186f8572SMark Yao printf("failed to load bmp %s\n", bmp_name); 12094b8c2ef1SMark Yao ret = -ENOENT; 12104b8c2ef1SMark Yao goto free_header; 1211186f8572SMark Yao } 121255e2f86dSSandy Huang 1213861ce1a0SSandy Huang if (!can_direct_logo(logo->bpp)) { 1214186f8572SMark Yao int dst_size; 1215186f8572SMark Yao /* 1216186f8572SMark Yao * TODO: force use 16bpp if bpp less than 16; 1217186f8572SMark Yao */ 1218186f8572SMark Yao logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1219186f8572SMark Yao dst_size = logo->width * logo->height * logo->bpp >> 3; 122055e2f86dSSandy Huang 1221186f8572SMark Yao dst = get_display_buffer(dst_size); 12224b8c2ef1SMark Yao if (!dst) { 12234b8c2ef1SMark Yao ret = -ENOMEM; 12244b8c2ef1SMark Yao goto free_header; 12254b8c2ef1SMark Yao } 122655e2f86dSSandy Huang if (bmpdecoder(pdst, dst, logo->bpp)) { 1227186f8572SMark Yao printf("failed to decode bmp %s\n", bmp_name); 12284b8c2ef1SMark Yao ret = -EINVAL; 12294b8c2ef1SMark Yao goto free_header; 1230186f8572SMark Yao } 12314b8c2ef1SMark Yao flush_dcache_range((ulong)dst, 12324b8c2ef1SMark Yao ALIGN((ulong)dst + dst_size, 12334b8c2ef1SMark Yao CONFIG_SYS_CACHELINE_SIZE)); 123455e2f86dSSandy Huang 1235186f8572SMark Yao logo->offset = 0; 123655e2f86dSSandy Huang logo->ymirror = 0; 1237186f8572SMark Yao } else { 1238186f8572SMark Yao logo->offset = get_unaligned_le32(&header->data_offset); 12397e72214dSShixiang Zheng if (reserved == BMP_PROCESSED_FLAG) 12407e72214dSShixiang Zheng logo->ymirror = 0; 12417e72214dSShixiang Zheng else 124255e2f86dSSandy Huang logo->ymirror = 1; 1243186f8572SMark Yao } 12444b8c2ef1SMark Yao logo->mem = dst; 1245186f8572SMark Yao 1246186f8572SMark Yao memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1247186f8572SMark Yao 12484b8c2ef1SMark Yao free_header: 12494b8c2ef1SMark Yao 12504b8c2ef1SMark Yao free(header); 12514b8c2ef1SMark Yao 12524b8c2ef1SMark Yao return ret; 12534b8c2ef1SMark Yao #else 12544b8c2ef1SMark Yao return -EINVAL; 12554b8c2ef1SMark Yao #endif 1256186f8572SMark Yao } 1257186f8572SMark Yao 1258186f8572SMark Yao void rockchip_show_fbbase(ulong fbbase) 1259186f8572SMark Yao { 1260186f8572SMark Yao struct display_state *s; 1261186f8572SMark Yao 1262186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1263186f8572SMark Yao s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 12644b8c2ef1SMark Yao s->logo.mem = (char *)fbbase; 1265186f8572SMark Yao s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1266186f8572SMark Yao s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1267186f8572SMark Yao s->logo.bpp = 32; 1268186f8572SMark Yao s->logo.ymirror = 0; 1269186f8572SMark Yao 1270186f8572SMark Yao display_logo(s); 1271186f8572SMark Yao } 1272186f8572SMark Yao } 1273186f8572SMark Yao 1274a2d2b88eSSandy Huang int rockchip_show_bmp(const char *bmp) 1275186f8572SMark Yao { 1276186f8572SMark Yao struct display_state *s; 1277a2d2b88eSSandy Huang int ret = 0; 1278186f8572SMark Yao 1279186f8572SMark Yao if (!bmp) { 1280186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) 1281186f8572SMark Yao display_disable(s); 1282a2d2b88eSSandy Huang return -ENOENT; 1283186f8572SMark Yao } 1284186f8572SMark Yao 1285186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1286186f8572SMark Yao s->logo.mode = s->charge_logo_mode; 1287186f8572SMark Yao if (load_bmp_logo(&s->logo, bmp)) 1288186f8572SMark Yao continue; 1289a2d2b88eSSandy Huang ret = display_logo(s); 1290186f8572SMark Yao } 1291186f8572SMark Yao 1292a2d2b88eSSandy Huang return ret; 1293a2d2b88eSSandy Huang } 1294a2d2b88eSSandy Huang 1295a2d2b88eSSandy Huang int rockchip_show_logo(void) 1296186f8572SMark Yao { 1297186f8572SMark Yao struct display_state *s; 1298a2d2b88eSSandy Huang int ret = 0; 1299186f8572SMark Yao 1300186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1301186f8572SMark Yao s->logo.mode = s->logo_mode; 1302186f8572SMark Yao if (load_bmp_logo(&s->logo, s->ulogo_name)) 1303186f8572SMark Yao printf("failed to display uboot logo\n"); 1304186f8572SMark Yao else 1305a2d2b88eSSandy Huang ret = display_logo(s); 13065eb61944SSandy Huang 13075eb61944SSandy Huang /* Load kernel bmp in rockchip_display_fixup() later */ 1308186f8572SMark Yao } 1309a2d2b88eSSandy Huang 1310a2d2b88eSSandy Huang return ret; 1311186f8572SMark Yao } 1312186f8572SMark Yao 13131a8d717cSWyon Bi enum { 13141a8d717cSWyon Bi PORT_DIR_IN, 13151a8d717cSWyon Bi PORT_DIR_OUT, 13161a8d717cSWyon Bi }; 13171a8d717cSWyon Bi 13181a8d717cSWyon Bi static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 13191a8d717cSWyon Bi { 13205f0cde79SSandy Huang ofnode panel_node, ports, port, ep, port_parent_node; 13211a8d717cSWyon Bi struct udevice *panel_dev; 13221a8d717cSWyon Bi int ret; 13231a8d717cSWyon Bi 13241a8d717cSWyon Bi panel_node = dev_read_subnode(dev, "panel"); 13251a8d717cSWyon Bi if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 13261a8d717cSWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 13271a8d717cSWyon Bi &panel_dev); 13281a8d717cSWyon Bi if (!ret) 13291a8d717cSWyon Bi goto found; 13301a8d717cSWyon Bi } 13311a8d717cSWyon Bi 13321a8d717cSWyon Bi ports = dev_read_subnode(dev, "ports"); 13331a8d717cSWyon Bi if (!ofnode_valid(ports)) 13341a8d717cSWyon Bi return NULL; 13351a8d717cSWyon Bi 13361a8d717cSWyon Bi ofnode_for_each_subnode(port, ports) { 13371a8d717cSWyon Bi u32 reg; 13381a8d717cSWyon Bi 13391a8d717cSWyon Bi if (ofnode_read_u32(port, "reg", ®)) 13401a8d717cSWyon Bi continue; 13411a8d717cSWyon Bi 13421a8d717cSWyon Bi if (reg != PORT_DIR_OUT) 13431a8d717cSWyon Bi continue; 13441a8d717cSWyon Bi 13451a8d717cSWyon Bi ofnode_for_each_subnode(ep, port) { 13461a8d717cSWyon Bi ofnode _ep, _port; 13471a8d717cSWyon Bi uint phandle; 13485f0cde79SSandy Huang bool is_ports_node = false; 13491a8d717cSWyon Bi 13501a8d717cSWyon Bi if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 13511a8d717cSWyon Bi continue; 13521a8d717cSWyon Bi 13531a8d717cSWyon Bi _ep = ofnode_get_by_phandle(phandle); 13541a8d717cSWyon Bi if (!ofnode_valid(_ep)) 13551a8d717cSWyon Bi continue; 13561a8d717cSWyon Bi 13571a8d717cSWyon Bi _port = ofnode_get_parent(_ep); 13581a8d717cSWyon Bi if (!ofnode_valid(_port)) 13591a8d717cSWyon Bi continue; 13601a8d717cSWyon Bi 13615f0cde79SSandy Huang port_parent_node = ofnode_get_parent(_port); 13625f0cde79SSandy Huang is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0; 13635f0cde79SSandy Huang if (is_ports_node) 13645f0cde79SSandy Huang panel_node = ofnode_get_parent(port_parent_node); 13655f0cde79SSandy Huang else 13661a8d717cSWyon Bi panel_node = ofnode_get_parent(_port); 13671a8d717cSWyon Bi if (!ofnode_valid(panel_node)) 13681a8d717cSWyon Bi continue; 13691a8d717cSWyon Bi 13701a8d717cSWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 13711a8d717cSWyon Bi panel_node, 13721a8d717cSWyon Bi &panel_dev); 13731a8d717cSWyon Bi if (!ret) 13741a8d717cSWyon Bi goto found; 13751a8d717cSWyon Bi } 13761a8d717cSWyon Bi } 13771a8d717cSWyon Bi 13781a8d717cSWyon Bi return NULL; 13791a8d717cSWyon Bi 13801a8d717cSWyon Bi found: 13811a8d717cSWyon Bi return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 13821a8d717cSWyon Bi } 13831a8d717cSWyon Bi 13841a8d717cSWyon Bi static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 13851a8d717cSWyon Bi { 13861a8d717cSWyon Bi ofnode node, ports, port, ep; 13871a8d717cSWyon Bi struct udevice *dev; 13881a8d717cSWyon Bi int ret; 13891a8d717cSWyon Bi 13901a8d717cSWyon Bi ports = dev_read_subnode(conn_dev, "ports"); 13911a8d717cSWyon Bi if (!ofnode_valid(ports)) 13921a8d717cSWyon Bi return NULL; 13931a8d717cSWyon Bi 13941a8d717cSWyon Bi ofnode_for_each_subnode(port, ports) { 13951a8d717cSWyon Bi u32 reg; 13961a8d717cSWyon Bi 13971a8d717cSWyon Bi if (ofnode_read_u32(port, "reg", ®)) 13981a8d717cSWyon Bi continue; 13991a8d717cSWyon Bi 14001a8d717cSWyon Bi if (reg != PORT_DIR_OUT) 14011a8d717cSWyon Bi continue; 14021a8d717cSWyon Bi 14031a8d717cSWyon Bi ofnode_for_each_subnode(ep, port) { 14041a8d717cSWyon Bi ofnode _ep, _port, _ports; 14051a8d717cSWyon Bi uint phandle; 14061a8d717cSWyon Bi 14071a8d717cSWyon Bi if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 14081a8d717cSWyon Bi continue; 14091a8d717cSWyon Bi 14101a8d717cSWyon Bi _ep = ofnode_get_by_phandle(phandle); 14111a8d717cSWyon Bi if (!ofnode_valid(_ep)) 14121a8d717cSWyon Bi continue; 14131a8d717cSWyon Bi 14141a8d717cSWyon Bi _port = ofnode_get_parent(_ep); 14151a8d717cSWyon Bi if (!ofnode_valid(_port)) 14161a8d717cSWyon Bi continue; 14171a8d717cSWyon Bi 14181a8d717cSWyon Bi _ports = ofnode_get_parent(_port); 14191a8d717cSWyon Bi if (!ofnode_valid(_ports)) 14201a8d717cSWyon Bi continue; 14211a8d717cSWyon Bi 14221a8d717cSWyon Bi node = ofnode_get_parent(_ports); 14231a8d717cSWyon Bi if (!ofnode_valid(node)) 14241a8d717cSWyon Bi continue; 14251a8d717cSWyon Bi 14261a8d717cSWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 14271a8d717cSWyon Bi node, &dev); 14281a8d717cSWyon Bi if (!ret) 14291a8d717cSWyon Bi goto found; 14301a8d717cSWyon Bi } 14311a8d717cSWyon Bi } 14321a8d717cSWyon Bi 14331a8d717cSWyon Bi return NULL; 14341a8d717cSWyon Bi 14351a8d717cSWyon Bi found: 14361a8d717cSWyon Bi return (struct rockchip_bridge *)dev_get_driver_data(dev); 14371a8d717cSWyon Bi } 14381a8d717cSWyon Bi 1439f8281ef0SWyon Bi static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1440747dfc26SWyon Bi { 1441f8281ef0SWyon Bi ofnode ep, port, ports, conn; 1442f8281ef0SWyon Bi uint phandle; 1443f8281ef0SWyon Bi struct udevice *dev; 1444747dfc26SWyon Bi int ret; 1445747dfc26SWyon Bi 1446f8281ef0SWyon Bi if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1447f8281ef0SWyon Bi return NULL; 1448f8281ef0SWyon Bi 1449f8281ef0SWyon Bi ep = ofnode_get_by_phandle(phandle); 1450f8281ef0SWyon Bi if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1451f8281ef0SWyon Bi return NULL; 1452f8281ef0SWyon Bi 1453f8281ef0SWyon Bi port = ofnode_get_parent(ep); 1454747dfc26SWyon Bi if (!ofnode_valid(port)) 1455747dfc26SWyon Bi return NULL; 1456747dfc26SWyon Bi 1457f8281ef0SWyon Bi ports = ofnode_get_parent(port); 1458f8281ef0SWyon Bi if (!ofnode_valid(ports)) 1459747dfc26SWyon Bi return NULL; 1460f8281ef0SWyon Bi 1461f8281ef0SWyon Bi conn = ofnode_get_parent(ports); 1462f8281ef0SWyon Bi if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1463f8281ef0SWyon Bi return NULL; 1464f8281ef0SWyon Bi 1465f8281ef0SWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1466f8281ef0SWyon Bi if (ret) 1467f8281ef0SWyon Bi return NULL; 1468f8281ef0SWyon Bi 1469f8281ef0SWyon Bi return dev; 1470747dfc26SWyon Bi } 1471747dfc26SWyon Bi 14726eff7620SSandy Huang static bool rockchip_get_display_path_status(ofnode endpoint) 14736eff7620SSandy Huang { 14746eff7620SSandy Huang ofnode ep; 14756eff7620SSandy Huang uint phandle; 14766eff7620SSandy Huang 14776eff7620SSandy Huang if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 14786eff7620SSandy Huang return false; 14796eff7620SSandy Huang 14806eff7620SSandy Huang ep = ofnode_get_by_phandle(phandle); 14816eff7620SSandy Huang if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 14826eff7620SSandy Huang return false; 14836eff7620SSandy Huang 14846eff7620SSandy Huang return true; 14856eff7620SSandy Huang } 14866eff7620SSandy Huang 14877cacd0a8SWyon Bi static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 14887cacd0a8SWyon Bi { 14897cacd0a8SWyon Bi struct udevice *phy_dev; 14907cacd0a8SWyon Bi int ret; 14917cacd0a8SWyon Bi 14927cacd0a8SWyon Bi ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 14937cacd0a8SWyon Bi if (ret) 14947cacd0a8SWyon Bi return NULL; 14957cacd0a8SWyon Bi 14967cacd0a8SWyon Bi return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 14977cacd0a8SWyon Bi } 14987cacd0a8SWyon Bi 149920618a45SGuochun Huang #if defined(CONFIG_ROCKCHIP_RK3568) 150020618a45SGuochun Huang static int rockchip_display_fixup_dts(void *blob) 150120618a45SGuochun Huang { 150220618a45SGuochun Huang ofnode route_node, route_subnode, conn_ep, conn_port; 150320618a45SGuochun Huang const struct device_node *route_sub_devnode; 150420618a45SGuochun Huang const struct device_node *ep_node, *conn_ep_dev_node; 150520618a45SGuochun Huang u32 phandle; 150620618a45SGuochun Huang int conn_ep_offset; 150720618a45SGuochun Huang const char *route_sub_path, *path; 150820618a45SGuochun Huang 150920618a45SGuochun Huang /* Don't go further if new variant after 151020618a45SGuochun Huang * reading PMUGRF_SOC_CON15 151120618a45SGuochun Huang */ 151220618a45SGuochun Huang if ((readl(0xfdc20100) & GENMASK(15, 14))) 151320618a45SGuochun Huang return 0; 151420618a45SGuochun Huang 151520618a45SGuochun Huang route_node = ofnode_path("/display-subsystem/route"); 151620618a45SGuochun Huang if (!ofnode_valid(route_node)) 151720618a45SGuochun Huang return -EINVAL; 151820618a45SGuochun Huang 151920618a45SGuochun Huang ofnode_for_each_subnode(route_subnode, route_node) { 152020618a45SGuochun Huang if (!ofnode_is_available(route_subnode)) 152120618a45SGuochun Huang continue; 152220618a45SGuochun Huang 152320618a45SGuochun Huang route_sub_devnode = ofnode_to_np(route_subnode); 152420618a45SGuochun Huang route_sub_path = route_sub_devnode->full_name; 152520618a45SGuochun Huang if (!strstr(ofnode_get_name(route_subnode), "dsi") && 152620618a45SGuochun Huang !strstr(ofnode_get_name(route_subnode), "edp")) 152720618a45SGuochun Huang return 0; 152820618a45SGuochun Huang 152920618a45SGuochun Huang phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 153020618a45SGuochun Huang if (phandle < 0) { 153120618a45SGuochun Huang printf("Warn: can't find connect node's handle\n"); 153220618a45SGuochun Huang continue; 153320618a45SGuochun Huang } 153420618a45SGuochun Huang 153520618a45SGuochun Huang ep_node = of_find_node_by_phandle(phandle); 153620618a45SGuochun Huang if (!ofnode_valid(np_to_ofnode(ep_node))) { 153720618a45SGuochun Huang printf("Warn: can't find endpoint node from phandle\n"); 153820618a45SGuochun Huang continue; 153920618a45SGuochun Huang } 154020618a45SGuochun Huang 154120618a45SGuochun Huang ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 154220618a45SGuochun Huang conn_ep = ofnode_get_by_phandle(phandle); 154320618a45SGuochun Huang if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 154420618a45SGuochun Huang return -ENODEV; 154520618a45SGuochun Huang 154620618a45SGuochun Huang conn_port = ofnode_get_parent(conn_ep); 154720618a45SGuochun Huang if (!ofnode_valid(conn_port)) 154820618a45SGuochun Huang return -ENODEV; 154920618a45SGuochun Huang 155020618a45SGuochun Huang ofnode_for_each_subnode(conn_ep, conn_port) { 155120618a45SGuochun Huang conn_ep_dev_node = ofnode_to_np(conn_ep); 155220618a45SGuochun Huang path = conn_ep_dev_node->full_name; 155320618a45SGuochun Huang ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 155420618a45SGuochun Huang conn_ep_offset = fdt_path_offset(blob, path); 155520618a45SGuochun Huang 155620618a45SGuochun Huang if (!ofnode_is_available(conn_ep) && 155720618a45SGuochun Huang strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 155820618a45SGuochun Huang do_fixup_by_path_u32(blob, route_sub_path, 155920618a45SGuochun Huang "connect", phandle, 1); 156020618a45SGuochun Huang fdt_status_okay(blob, conn_ep_offset); 156120618a45SGuochun Huang 156220618a45SGuochun Huang } else if (ofnode_is_available(conn_ep) && 156320618a45SGuochun Huang strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 156420618a45SGuochun Huang fdt_status_disabled(blob, conn_ep_offset); 156520618a45SGuochun Huang } 156620618a45SGuochun Huang } 156720618a45SGuochun Huang } 156820618a45SGuochun Huang 156920618a45SGuochun Huang return 0; 157020618a45SGuochun Huang } 157120618a45SGuochun Huang #endif 157220618a45SGuochun Huang 1573186f8572SMark Yao static int rockchip_display_probe(struct udevice *dev) 1574186f8572SMark Yao { 1575186f8572SMark Yao struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1576186f8572SMark Yao struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1577186f8572SMark Yao const void *blob = gd->fdt_blob; 1578e2bce6e4SKever Yang int phandle; 1579186f8572SMark Yao struct udevice *crtc_dev, *conn_dev; 15802a48727aSAlgea Cao struct rockchip_crtc *crtc; 1581186f8572SMark Yao const struct rockchip_connector *conn; 15821a8d717cSWyon Bi struct rockchip_panel *panel = NULL; 15831a8d717cSWyon Bi struct rockchip_bridge *bridge = NULL; 15847cacd0a8SWyon Bi struct rockchip_phy *phy = NULL; 1585186f8572SMark Yao struct display_state *s; 1586186f8572SMark Yao const char *name; 1587186f8572SMark Yao int ret; 1588e2bce6e4SKever Yang ofnode node, route_node; 1589cdb300bdSSandy Huang struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 15902a48727aSAlgea Cao struct public_phy_data *data; 1591cdb300bdSSandy Huang bool is_ports_node = false; 1592186f8572SMark Yao 159320618a45SGuochun Huang #if defined(CONFIG_ROCKCHIP_RK3568) 159420618a45SGuochun Huang rockchip_display_fixup_dts((void *)blob); 159520618a45SGuochun Huang #endif 159620618a45SGuochun Huang 1597186f8572SMark Yao /* Before relocation we don't need to do anything */ 1598186f8572SMark Yao if (!(gd->flags & GD_FLG_RELOC)) 1599186f8572SMark Yao return 0; 16002a48727aSAlgea Cao 16012a48727aSAlgea Cao data = malloc(sizeof(struct public_phy_data)); 16022a48727aSAlgea Cao if (!data) { 16032a48727aSAlgea Cao printf("failed to alloc phy data\n"); 16042a48727aSAlgea Cao return -ENOMEM; 16052a48727aSAlgea Cao } 16062a48727aSAlgea Cao data->phy_init = false; 16072a48727aSAlgea Cao 16084b8c2ef1SMark Yao init_display_buffer(plat->base); 1609186f8572SMark Yao 1610e2bce6e4SKever Yang route_node = dev_read_subnode(dev, "route"); 1611e2bce6e4SKever Yang if (!ofnode_valid(route_node)) 1612e2bce6e4SKever Yang return -ENODEV; 1613186f8572SMark Yao 1614e2bce6e4SKever Yang ofnode_for_each_subnode(node, route_node) { 16151e44acfcSWyon Bi if (!ofnode_is_available(node)) 16161e44acfcSWyon Bi continue; 1617e2bce6e4SKever Yang phandle = ofnode_read_u32_default(node, "connect", -1); 1618186f8572SMark Yao if (phandle < 0) { 1619e2bce6e4SKever Yang printf("Warn: can't find connect node's handle\n"); 1620186f8572SMark Yao continue; 1621186f8572SMark Yao } 1622e2bce6e4SKever Yang ep_node = of_find_node_by_phandle(phandle); 1623e2bce6e4SKever Yang if (!ofnode_valid(np_to_ofnode(ep_node))) { 1624e2bce6e4SKever Yang printf("Warn: can't find endpoint node from phandle\n"); 1625186f8572SMark Yao continue; 1626186f8572SMark Yao } 1627e2bce6e4SKever Yang port_node = of_get_parent(ep_node); 1628e2bce6e4SKever Yang if (!ofnode_valid(np_to_ofnode(port_node))) { 1629e2bce6e4SKever Yang printf("Warn: can't find port node from phandle\n"); 1630186f8572SMark Yao continue; 1631186f8572SMark Yao } 1632cdb300bdSSandy Huang 1633cdb300bdSSandy Huang port_parent_node = of_get_parent(port_node); 1634cdb300bdSSandy Huang if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1635cdb300bdSSandy Huang printf("Warn: can't find port parent node from phandle\n"); 1636cdb300bdSSandy Huang continue; 1637cdb300bdSSandy Huang } 1638cdb300bdSSandy Huang 1639cdb300bdSSandy Huang is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1640cdb300bdSSandy Huang if (is_ports_node) { 1641cdb300bdSSandy Huang vop_node = of_get_parent(port_parent_node); 1642e2bce6e4SKever Yang if (!ofnode_valid(np_to_ofnode(vop_node))) { 1643e2bce6e4SKever Yang printf("Warn: can't find crtc node from phandle\n"); 1644e2bce6e4SKever Yang continue; 1645e2bce6e4SKever Yang } 1646cdb300bdSSandy Huang } else { 1647cdb300bdSSandy Huang vop_node = port_parent_node; 1648cdb300bdSSandy Huang } 1649cdb300bdSSandy Huang 1650e2bce6e4SKever Yang ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1651e2bce6e4SKever Yang np_to_ofnode(vop_node), 1652e2bce6e4SKever Yang &crtc_dev); 1653186f8572SMark Yao if (ret) { 1654335adcb5SKever Yang printf("Warn: can't find crtc driver %d\n", ret); 1655186f8572SMark Yao continue; 1656186f8572SMark Yao } 16572a48727aSAlgea Cao crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1658186f8572SMark Yao 1659f8281ef0SWyon Bi conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1660747dfc26SWyon Bi if (!conn_dev) { 1661e2bce6e4SKever Yang printf("Warn: can't find connect driver\n"); 1662186f8572SMark Yao continue; 1663186f8572SMark Yao } 1664747dfc26SWyon Bi 1665186f8572SMark Yao conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1666186f8572SMark Yao 16677cacd0a8SWyon Bi phy = rockchip_of_find_phy(conn_dev); 16687cacd0a8SWyon Bi 16691a8d717cSWyon Bi bridge = rockchip_of_find_bridge(conn_dev); 16701a8d717cSWyon Bi if (bridge) 16711a8d717cSWyon Bi panel = rockchip_of_find_panel(bridge->dev); 16721a8d717cSWyon Bi else 16731a8d717cSWyon Bi panel = rockchip_of_find_panel(conn_dev); 16741a8d717cSWyon Bi 1675186f8572SMark Yao s = malloc(sizeof(*s)); 1676186f8572SMark Yao if (!s) 16774b8c2ef1SMark Yao continue; 1678186f8572SMark Yao 1679186f8572SMark Yao memset(s, 0, sizeof(*s)); 1680186f8572SMark Yao 1681186f8572SMark Yao INIT_LIST_HEAD(&s->head); 168254fc9addSSandy Huang ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 168354fc9addSSandy Huang if (!ret) 168454fc9addSSandy Huang memcpy(s->ulogo_name, name, strlen(name)); 168554fc9addSSandy Huang ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 168654fc9addSSandy Huang if (!ret) 168754fc9addSSandy Huang memcpy(s->klogo_name, name, strlen(name)); 1688e2bce6e4SKever Yang ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1689186f8572SMark Yao if (!strcmp(name, "fullscreen")) 1690186f8572SMark Yao s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1691186f8572SMark Yao else 1692186f8572SMark Yao s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1693e2bce6e4SKever Yang ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1694186f8572SMark Yao if (!strcmp(name, "fullscreen")) 1695186f8572SMark Yao s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1696186f8572SMark Yao else 1697186f8572SMark Yao s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1698186f8572SMark Yao 1699186f8572SMark Yao s->blob = blob; 17001a8d717cSWyon Bi s->panel_state.panel = panel; 1701747dfc26SWyon Bi s->conn_state.node = conn_dev->node; 1702186f8572SMark Yao s->conn_state.dev = conn_dev; 1703186f8572SMark Yao s->conn_state.connector = conn; 17047cacd0a8SWyon Bi s->conn_state.phy = phy; 17051a8d717cSWyon Bi s->conn_state.bridge = bridge; 17068a2a3a29SSandy Huang s->conn_state.overscan.left_margin = 100; 17078a2a3a29SSandy Huang s->conn_state.overscan.right_margin = 100; 17088a2a3a29SSandy Huang s->conn_state.overscan.top_margin = 100; 17098a2a3a29SSandy Huang s->conn_state.overscan.bottom_margin = 100; 1710e2bce6e4SKever Yang s->crtc_state.node = np_to_ofnode(vop_node); 1711186f8572SMark Yao s->crtc_state.dev = crtc_dev; 1712186f8572SMark Yao s->crtc_state.crtc = crtc; 1713e2bce6e4SKever Yang s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node)); 1714e2bce6e4SKever Yang s->node = node; 17156eff7620SSandy Huang 17166eff7620SSandy Huang if (is_ports_node) { /* only vop2 will get into here */ 17176eff7620SSandy Huang ofnode vp_node = np_to_ofnode(port_node); 17186eff7620SSandy Huang static bool get_plane_mask_from_dts; 17196eff7620SSandy Huang 1720a5afbabdSSandy Huang s->crtc_state.ports_node = port_parent_node; 17216eff7620SSandy Huang if (!get_plane_mask_from_dts) { 17226eff7620SSandy Huang ofnode vp_sub_node; 17236eff7620SSandy Huang int vp_id = 0; 17246eff7620SSandy Huang bool vp_enable = false; 17256eff7620SSandy Huang 17266eff7620SSandy Huang ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 17276eff7620SSandy Huang vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 17286eff7620SSandy Huang ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 17296eff7620SSandy Huang if (ret) { 17306eff7620SSandy Huang s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 17316eff7620SSandy Huang s->crtc_state.crtc->assign_plane |= true; 17326eff7620SSandy Huang printf("get vp%d plane mask:0x%x from dts\n", vp_id, ret); 17336eff7620SSandy Huang } 17346eff7620SSandy Huang 17356eff7620SSandy Huang /* To check current vp status */ 17366eff7620SSandy Huang vp_enable = false; 17376eff7620SSandy Huang ofnode_for_each_subnode(vp_sub_node, vp_node) 17386eff7620SSandy Huang vp_enable |= rockchip_get_display_path_status(vp_sub_node); 17396eff7620SSandy Huang s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 17406eff7620SSandy Huang } 17416eff7620SSandy Huang get_plane_mask_from_dts = true; 17426eff7620SSandy Huang } 17436eff7620SSandy Huang } 17441a8d717cSWyon Bi 17451a8d717cSWyon Bi if (bridge) 17461a8d717cSWyon Bi bridge->state = s; 17471a8d717cSWyon Bi 17487cacd0a8SWyon Bi if (panel) 17497cacd0a8SWyon Bi panel->state = s; 17507cacd0a8SWyon Bi 175167b9012cSSandy Huang get_crtc_mcu_mode(&s->crtc_state); 1752186f8572SMark Yao 1753289af5f4SSandy Huang ret = ofnode_read_u32_default(s->crtc_state.node, 1754289af5f4SSandy Huang "rockchip,dual-channel-swap", 0); 1755289af5f4SSandy Huang s->crtc_state.dual_channel_swap = ret; 1756e2bce6e4SKever Yang if (connector_panel_init(s)) { 1757e2bce6e4SKever Yang printf("Warn: Failed to init panel drivers\n"); 17584b8c2ef1SMark Yao free(s); 17594b8c2ef1SMark Yao continue; 17604b8c2ef1SMark Yao } 17614b8c2ef1SMark Yao 17622a48727aSAlgea Cao if (connector_phy_init(s, data)) { 1763e2bce6e4SKever Yang printf("Warn: Failed to init phy drivers\n"); 17644b8c2ef1SMark Yao free(s); 17654b8c2ef1SMark Yao continue; 17664b8c2ef1SMark Yao } 1767186f8572SMark Yao list_add_tail(&s->head, &rockchip_display_list); 1768186f8572SMark Yao } 1769186f8572SMark Yao 17704b8c2ef1SMark Yao if (list_empty(&rockchip_display_list)) { 17715cfabef4SWyon Bi debug("Failed to found available display route\n"); 17724b8c2ef1SMark Yao return -ENODEV; 17734b8c2ef1SMark Yao } 177450a9508eSSandy Huang rockchip_get_baseparameter(); 177558c17f51SSandy Huang display_pre_init(); 17764b8c2ef1SMark Yao 1777186f8572SMark Yao uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1778186f8572SMark Yao uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1779186f8572SMark Yao uc_priv->bpix = VIDEO_BPP32; 1780186f8572SMark Yao 17814b8c2ef1SMark Yao #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1782186f8572SMark Yao rockchip_show_fbbase(plat->base); 1783186f8572SMark Yao video_set_flush_dcache(dev, true); 17844b8c2ef1SMark Yao #endif 1785186f8572SMark Yao 1786186f8572SMark Yao return 0; 17874b8c2ef1SMark Yao } 1788186f8572SMark Yao 1789186f8572SMark Yao void rockchip_display_fixup(void *blob) 1790186f8572SMark Yao { 1791186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs; 1792186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs; 1793186f8572SMark Yao const struct rockchip_connector *conn; 1794186f8572SMark Yao const struct rockchip_crtc *crtc; 1795186f8572SMark Yao struct display_state *s; 1796694afdc8SKever Yang int offset; 179751619d03SKever Yang const struct device_node *np; 179851619d03SKever Yang const char *path; 1799186f8572SMark Yao 18005eb61944SSandy Huang if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 18015eb61944SSandy Huang list_for_each_entry(s, &rockchip_display_list, head) 18025eb61944SSandy Huang load_bmp_logo(&s->logo, s->klogo_name); 1803ac6274b3SWyon Bi 1804ac6274b3SWyon Bi if (!get_display_size()) 1805ac6274b3SWyon Bi return; 1806ac6274b3SWyon Bi 180751619d03SKever Yang offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1808186f8572SMark Yao (u64)memory_start, 1809186f8572SMark Yao (u64)get_display_size()); 18105eb61944SSandy Huang if (offset < 0) 18115eb61944SSandy Huang printf("failed to reserve drm-loader-logo memory\n"); 1812*6414e3bcSSandy Huang 1813*6414e3bcSSandy Huang offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 1814*6414e3bcSSandy Huang (u64)cubic_lut_memory_start, 1815*6414e3bcSSandy Huang (u64)get_cubic_memory_size()); 1816*6414e3bcSSandy Huang if (offset < 0) 1817*6414e3bcSSandy Huang printf("failed to reserve drm-cubic-lut memory\n"); 18185eb61944SSandy Huang } else { 18195eb61944SSandy Huang printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1820694afdc8SKever Yang /* Compatible with rkfb display, only need reserve memory */ 1821694afdc8SKever Yang offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1822694afdc8SKever Yang (u64)memory_start, 18235eb61944SSandy Huang MEMORY_POOL_SIZE); 1824694afdc8SKever Yang if (offset < 0) 18255eb61944SSandy Huang printf("failed to reserve fb-loader-logo memory\n"); 18265eb61944SSandy Huang else 18275eb61944SSandy Huang list_for_each_entry(s, &rockchip_display_list, head) 18285eb61944SSandy Huang load_kernel_bmp_logo(&s->logo, s->klogo_name); 1829186f8572SMark Yao return; 1830186f8572SMark Yao } 1831186f8572SMark Yao 1832186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1833186f8572SMark Yao conn = s->conn_state.connector; 1834186f8572SMark Yao if (!conn) 1835186f8572SMark Yao continue; 1836186f8572SMark Yao conn_funcs = conn->funcs; 1837186f8572SMark Yao if (!conn_funcs) { 1838186f8572SMark Yao printf("failed to get exist connector\n"); 1839186f8572SMark Yao continue; 1840186f8572SMark Yao } 1841186f8572SMark Yao 1842186f8572SMark Yao crtc = s->crtc_state.crtc; 1843186f8572SMark Yao if (!crtc) 1844186f8572SMark Yao continue; 1845186f8572SMark Yao 1846186f8572SMark Yao crtc_funcs = crtc->funcs; 1847186f8572SMark Yao if (!crtc_funcs) { 1848186f8572SMark Yao printf("failed to get exist crtc\n"); 1849186f8572SMark Yao continue; 1850186f8572SMark Yao } 1851186f8572SMark Yao 1852186f8572SMark Yao if (crtc_funcs->fixup_dts) 1853186f8572SMark Yao crtc_funcs->fixup_dts(s, blob); 1854186f8572SMark Yao 1855186f8572SMark Yao if (conn_funcs->fixup_dts) 1856186f8572SMark Yao conn_funcs->fixup_dts(s, blob); 1857186f8572SMark Yao 185851619d03SKever Yang np = ofnode_to_np(s->node); 185951619d03SKever Yang path = np->full_name; 186051619d03SKever Yang fdt_increase_size(blob, 0x400); 1861186f8572SMark Yao #define FDT_SET_U32(name, val) \ 1862186f8572SMark Yao do_fixup_by_path_u32(blob, path, name, val, 1); 1863186f8572SMark Yao 186451619d03SKever Yang offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 186551619d03SKever Yang - memory_start; 1866186f8572SMark Yao FDT_SET_U32("logo,offset", offset); 1867186f8572SMark Yao FDT_SET_U32("logo,width", s->logo.width); 1868186f8572SMark Yao FDT_SET_U32("logo,height", s->logo.height); 1869186f8572SMark Yao FDT_SET_U32("logo,bpp", s->logo.bpp); 1870186f8572SMark Yao FDT_SET_U32("logo,ymirror", s->logo.ymirror); 18713fb05486SAlgea Cao FDT_SET_U32("video,clock", s->conn_state.mode.clock); 1872186f8572SMark Yao FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1873186f8572SMark Yao FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1874f11b858fSSandy Huang FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1875f11b858fSSandy Huang FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1876186f8572SMark Yao FDT_SET_U32("video,vrefresh", 1877186f8572SMark Yao drm_mode_vrefresh(&s->conn_state.mode)); 18788a2a3a29SSandy Huang FDT_SET_U32("video,flags", s->conn_state.mode.flags); 187994d85f7bSSandy Huang FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 18808a2a3a29SSandy Huang FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 18818a2a3a29SSandy Huang FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 18828a2a3a29SSandy Huang FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 18838a2a3a29SSandy Huang FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 1884*6414e3bcSSandy Huang 1885*6414e3bcSSandy Huang if (s->conn_state.disp_info->cubic_lut_data.size && 1886*6414e3bcSSandy Huang CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 1887*6414e3bcSSandy Huang FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 1888*6414e3bcSSandy Huang 1889186f8572SMark Yao #undef FDT_SET_U32 1890186f8572SMark Yao } 1891186f8572SMark Yao } 1892186f8572SMark Yao 1893186f8572SMark Yao int rockchip_display_bind(struct udevice *dev) 1894186f8572SMark Yao { 1895186f8572SMark Yao struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1896186f8572SMark Yao 18974b8c2ef1SMark Yao plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 1898186f8572SMark Yao 1899186f8572SMark Yao return 0; 1900186f8572SMark Yao } 1901186f8572SMark Yao 1902186f8572SMark Yao static const struct udevice_id rockchip_display_ids[] = { 1903186f8572SMark Yao { .compatible = "rockchip,display-subsystem" }, 1904186f8572SMark Yao { } 1905186f8572SMark Yao }; 1906186f8572SMark Yao 1907186f8572SMark Yao U_BOOT_DRIVER(rockchip_display) = { 1908186f8572SMark Yao .name = "rockchip_display", 1909186f8572SMark Yao .id = UCLASS_VIDEO, 1910186f8572SMark Yao .of_match = rockchip_display_ids, 1911186f8572SMark Yao .bind = rockchip_display_bind, 1912186f8572SMark Yao .probe = rockchip_display_probe, 1913186f8572SMark Yao }; 19144b8c2ef1SMark Yao 19154b8c2ef1SMark Yao static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 19164b8c2ef1SMark Yao char *const argv[]) 19174b8c2ef1SMark Yao { 19184b8c2ef1SMark Yao if (argc != 1) 19194b8c2ef1SMark Yao return CMD_RET_USAGE; 19204b8c2ef1SMark Yao 19214b8c2ef1SMark Yao rockchip_show_logo(); 19224b8c2ef1SMark Yao 19234b8c2ef1SMark Yao return 0; 19244b8c2ef1SMark Yao } 19254b8c2ef1SMark Yao 19264b8c2ef1SMark Yao static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 19274b8c2ef1SMark Yao char *const argv[]) 19284b8c2ef1SMark Yao { 19294b8c2ef1SMark Yao if (argc != 2) 19304b8c2ef1SMark Yao return CMD_RET_USAGE; 19314b8c2ef1SMark Yao 19324b8c2ef1SMark Yao rockchip_show_bmp(argv[1]); 19334b8c2ef1SMark Yao 19344b8c2ef1SMark Yao return 0; 19354b8c2ef1SMark Yao } 19364b8c2ef1SMark Yao 19374b8c2ef1SMark Yao U_BOOT_CMD( 19384b8c2ef1SMark Yao rockchip_show_logo, 1, 1, do_rockchip_logo_show, 19394b8c2ef1SMark Yao "load and display log from resource partition", 19404b8c2ef1SMark Yao NULL 19414b8c2ef1SMark Yao ); 19424b8c2ef1SMark Yao 19434b8c2ef1SMark Yao U_BOOT_CMD( 19444b8c2ef1SMark Yao rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 19454b8c2ef1SMark Yao "load and display bmp from resource partition", 19464b8c2ef1SMark Yao " <bmp_name>" 19474b8c2ef1SMark Yao ); 1948