1186f8572SMark Yao /* 2186f8572SMark Yao * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3186f8572SMark Yao * 4186f8572SMark Yao * SPDX-License-Identifier: GPL-2.0+ 5186f8572SMark Yao */ 6186f8572SMark Yao 7186f8572SMark Yao #include <asm/unaligned.h> 850a9508eSSandy Huang #include <boot_rkimg.h> 9186f8572SMark Yao #include <config.h> 10186f8572SMark Yao #include <common.h> 11186f8572SMark Yao #include <errno.h> 120e00a84cSMasahiro Yamada #include <linux/libfdt.h> 13186f8572SMark Yao #include <fdtdec.h> 14186f8572SMark Yao #include <fdt_support.h> 158e2bab3fSAlgea Cao #include <linux/hdmi.h> 16186f8572SMark Yao #include <linux/list.h> 17186f8572SMark Yao #include <linux/compat.h> 18186f8572SMark Yao #include <linux/media-bus-format.h> 19186f8572SMark Yao #include <malloc.h> 20186f8572SMark Yao #include <video.h> 21f8a3e587SJoseph Chen #include <video_rockchip.h> 221a8d717cSWyon Bi #include <video_bridge.h> 23186f8572SMark Yao #include <dm/device.h> 24186f8572SMark Yao #include <dm/uclass-internal.h> 254b8c2ef1SMark Yao #include <asm/arch-rockchip/resource_img.h> 26186f8572SMark Yao 27186f8572SMark Yao #include "bmp_helper.h" 28186f8572SMark Yao #include "rockchip_display.h" 29186f8572SMark Yao #include "rockchip_crtc.h" 30186f8572SMark Yao #include "rockchip_connector.h" 311a8d717cSWyon Bi #include "rockchip_bridge.h" 32186f8572SMark Yao #include "rockchip_phy.h" 33186f8572SMark Yao #include "rockchip_panel.h" 34e2bce6e4SKever Yang #include <dm.h> 35e2bce6e4SKever Yang #include <dm/of_access.h> 36e2bce6e4SKever Yang #include <dm/ofnode.h> 3720618a45SGuochun Huang #include <asm/io.h> 38186f8572SMark Yao 391e4c51caSSandy Huang #define DRIVER_VERSION "v1.0.1" 40e559407dSSandy Huang 41e559407dSSandy Huang /*********************************************************************** 42e559407dSSandy Huang * Rockchip UBOOT DRM driver version 43e559407dSSandy Huang * 44e559407dSSandy Huang * v1.0.0 : add basic version for rockchip drm driver(hjc) 451e4c51caSSandy Huang * v1.0.1 : add much dsi update(hjc) 46e559407dSSandy Huang * 47e559407dSSandy Huang **********************************************************************/ 48e559407dSSandy Huang 494b8c2ef1SMark Yao #define RK_BLK_SIZE 512 507e72214dSShixiang Zheng #define BMP_PROCESSED_FLAG 8399 514b8c2ef1SMark Yao 52186f8572SMark Yao DECLARE_GLOBAL_DATA_PTR; 53186f8572SMark Yao static LIST_HEAD(rockchip_display_list); 54186f8572SMark Yao static LIST_HEAD(logo_cache_list); 55186f8572SMark Yao 56186f8572SMark Yao static unsigned long memory_start; 576414e3bcSSandy Huang static unsigned long cubic_lut_memory_start; 58186f8572SMark Yao static unsigned long memory_end; 5950a9508eSSandy Huang static struct base2_info base_parameter; 6050a9508eSSandy Huang static uint32_t crc32_table[256]; 61186f8572SMark Yao 622a48727aSAlgea Cao /* 632a48727aSAlgea Cao * the phy types are used by different connectors in public. 642a48727aSAlgea Cao * The current version only has inno hdmi phy for hdmi and tve. 652a48727aSAlgea Cao */ 662a48727aSAlgea Cao enum public_use_phy { 672a48727aSAlgea Cao NONE, 682a48727aSAlgea Cao INNO_HDMI_PHY 692a48727aSAlgea Cao }; 702a48727aSAlgea Cao 712a48727aSAlgea Cao /* save public phy data */ 722a48727aSAlgea Cao struct public_phy_data { 732a48727aSAlgea Cao const struct rockchip_phy *phy_drv; 742a48727aSAlgea Cao int phy_node; 752a48727aSAlgea Cao int public_phy_type; 762a48727aSAlgea Cao bool phy_init; 772a48727aSAlgea Cao }; 782a48727aSAlgea Cao 7950a9508eSSandy Huang void rockchip_display_make_crc32_table(void) 8050a9508eSSandy Huang { 8150a9508eSSandy Huang uint32_t c; 8250a9508eSSandy Huang int n, k; 8350a9508eSSandy Huang unsigned long poly; /* polynomial exclusive-or pattern */ 8450a9508eSSandy Huang /* terms of polynomial defining this crc (except x^32): */ 8550a9508eSSandy Huang static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26}; 8650a9508eSSandy Huang 8750a9508eSSandy Huang /* make exclusive-or pattern from polynomial (0xedb88320L) */ 8850a9508eSSandy Huang poly = 0L; 8950a9508eSSandy Huang for (n = 0; n < sizeof(p) / sizeof(char); n++) 9050a9508eSSandy Huang poly |= 1L << (31 - p[n]); 9150a9508eSSandy Huang 9250a9508eSSandy Huang for (n = 0; n < 256; n++) { 9350a9508eSSandy Huang c = (unsigned long)n; 9450a9508eSSandy Huang for (k = 0; k < 8; k++) 9550a9508eSSandy Huang c = c & 1 ? poly ^ (c >> 1) : c >> 1; 9650a9508eSSandy Huang crc32_table[n] = cpu_to_le32(c); 9750a9508eSSandy Huang } 9850a9508eSSandy Huang } 9950a9508eSSandy Huang 10050a9508eSSandy Huang uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length) 10150a9508eSSandy Huang { 10250a9508eSSandy Huang int i; 10350a9508eSSandy Huang uint32_t crc; 10450a9508eSSandy Huang crc = 0xFFFFFFFF; 10550a9508eSSandy Huang 10650a9508eSSandy Huang for (i = 0; i < length; i++) { 10750a9508eSSandy Huang crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8); 10850a9508eSSandy Huang data++; 10950a9508eSSandy Huang } 11050a9508eSSandy Huang 11150a9508eSSandy Huang return crc ^ 0xffffffff; 11250a9508eSSandy Huang } 11350a9508eSSandy Huang 11450a9508eSSandy Huang int rockchip_get_baseparameter(void) 11550a9508eSSandy Huang { 11650a9508eSSandy Huang struct blk_desc *dev_desc; 11750a9508eSSandy Huang disk_partition_t part_info; 11850a9508eSSandy Huang int block_num = 2048; 11950a9508eSSandy Huang char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN); 12050a9508eSSandy Huang int ret = 0; 12150a9508eSSandy Huang 12250a9508eSSandy Huang dev_desc = rockchip_get_bootdev(); 12350a9508eSSandy Huang if (!dev_desc) { 12450a9508eSSandy Huang printf("%s: Could not find device\n", __func__); 12550a9508eSSandy Huang return -ENOENT; 12650a9508eSSandy Huang } 12750a9508eSSandy Huang 12850a9508eSSandy Huang if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) { 12950a9508eSSandy Huang printf("Could not find baseparameter partition\n"); 13050a9508eSSandy Huang return -ENOENT; 13150a9508eSSandy Huang } 13250a9508eSSandy Huang 13350a9508eSSandy Huang ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf); 13450a9508eSSandy Huang if (ret < 0) { 13550a9508eSSandy Huang printf("read baseparameter failed\n"); 13650a9508eSSandy Huang return ret; 13750a9508eSSandy Huang } 13850a9508eSSandy Huang 13950a9508eSSandy Huang memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter)); 14050a9508eSSandy Huang if (strncasecmp(base_parameter.head_flag, "BASP", 4)) { 14150a9508eSSandy Huang printf("warning: bad baseparameter\n"); 14250a9508eSSandy Huang memset(&base_parameter, 0, sizeof(base_parameter)); 14350a9508eSSandy Huang } 14450a9508eSSandy Huang rockchip_display_make_crc32_table(); 14550a9508eSSandy Huang 14650a9508eSSandy Huang return ret; 14750a9508eSSandy Huang } 14850a9508eSSandy Huang 14950a9508eSSandy Huang struct base2_disp_info *rockchip_get_disp_info(int type, int id) 15050a9508eSSandy Huang { 15150a9508eSSandy Huang struct base2_disp_info *disp_info; 15237a2a1a7SSandy Huang struct base2_disp_header *disp_header; 15337a2a1a7SSandy Huang int i = 0, offset = -1; 15450a9508eSSandy Huang u32 crc_val; 15537a2a1a7SSandy Huang void *base_parameter_addr = (void *)&base_parameter; 15650a9508eSSandy Huang 15750a9508eSSandy Huang for (i = 0; i < 8; i++) { 15837a2a1a7SSandy Huang disp_header = &base_parameter.disp_header[i]; 15937a2a1a7SSandy Huang if (disp_header->connector_type == type && 16037a2a1a7SSandy Huang disp_header->connector_id == id) { 16150a9508eSSandy Huang printf("disp info %d, type:%d, id:%d\n", i, type, id); 16237a2a1a7SSandy Huang offset = disp_header->offset; 16350a9508eSSandy Huang break; 16450a9508eSSandy Huang } 16550a9508eSSandy Huang } 16637a2a1a7SSandy Huang 16737a2a1a7SSandy Huang if (offset < 0) 16837a2a1a7SSandy Huang return NULL; 16937a2a1a7SSandy Huang disp_info = base_parameter_addr + offset; 17037a2a1a7SSandy Huang if (disp_info->screen_info[0].type != type || 17137a2a1a7SSandy Huang disp_info->screen_info[0].id != id) { 17237a2a1a7SSandy Huang printf("connector type or id is error, type:%d, id:%d\n", 17337a2a1a7SSandy Huang disp_info->screen_info[0].type, 17437a2a1a7SSandy Huang disp_info->screen_info[0].id); 17537a2a1a7SSandy Huang return NULL; 17637a2a1a7SSandy Huang } 17737a2a1a7SSandy Huang 17850a9508eSSandy Huang if (strncasecmp(disp_info->disp_head_flag, "DISP", 4)) 17950a9508eSSandy Huang return NULL; 18050a9508eSSandy Huang 18150a9508eSSandy Huang crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4); 18250a9508eSSandy Huang 18350a9508eSSandy Huang if (crc_val != disp_info->crc) { 18450a9508eSSandy Huang printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id); 18550a9508eSSandy Huang return NULL; 18650a9508eSSandy Huang } 18750a9508eSSandy Huang 18850a9508eSSandy Huang return disp_info; 18950a9508eSSandy Huang } 19050a9508eSSandy Huang 1912a48727aSAlgea Cao /* check which kind of public phy does connector use */ 1922a48727aSAlgea Cao static int check_public_use_phy(struct display_state *state) 1932a48727aSAlgea Cao { 1942a48727aSAlgea Cao int ret = NONE; 1952a48727aSAlgea Cao #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY 1962a48727aSAlgea Cao struct connector_state *conn_state = &state->conn_state; 1972a48727aSAlgea Cao 1982a48727aSAlgea Cao if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) || 1992a48727aSAlgea Cao !strncmp(dev_read_name(conn_state->dev), "hdmi", 4)) 2002a48727aSAlgea Cao ret = INNO_HDMI_PHY; 2012a48727aSAlgea Cao #endif 2022a48727aSAlgea Cao 2032a48727aSAlgea Cao return ret; 2042a48727aSAlgea Cao } 2052a48727aSAlgea Cao 2062a48727aSAlgea Cao /* 2072a48727aSAlgea Cao * get public phy driver and initialize it. 2082a48727aSAlgea Cao * The current version only has inno hdmi phy for hdmi and tve. 2092a48727aSAlgea Cao */ 2102a48727aSAlgea Cao static int get_public_phy(struct display_state *state, 2112a48727aSAlgea Cao struct public_phy_data *data) 2122a48727aSAlgea Cao { 2132a48727aSAlgea Cao struct connector_state *conn_state = &state->conn_state; 21415081c50SWyon Bi struct rockchip_phy *phy; 2152a48727aSAlgea Cao struct udevice *dev; 2162a48727aSAlgea Cao int ret = 0; 2172a48727aSAlgea Cao 2182a48727aSAlgea Cao switch (data->public_phy_type) { 2192a48727aSAlgea Cao case INNO_HDMI_PHY: 2202a48727aSAlgea Cao #if defined(CONFIG_ROCKCHIP_RK3328) 22115081c50SWyon Bi ret = uclass_get_device_by_name(UCLASS_PHY, 2222a48727aSAlgea Cao "hdmiphy@ff430000", &dev); 2232a48727aSAlgea Cao #elif defined(CONFIG_ROCKCHIP_RK322X) 22415081c50SWyon Bi ret = uclass_get_device_by_name(UCLASS_PHY, 2252a48727aSAlgea Cao "hdmi-phy@12030000", &dev); 2262a48727aSAlgea Cao #else 2272a48727aSAlgea Cao ret = -EINVAL; 2282a48727aSAlgea Cao #endif 2292a48727aSAlgea Cao if (ret) { 2302a48727aSAlgea Cao printf("Warn: can't find phy driver\n"); 2312a48727aSAlgea Cao return 0; 2322a48727aSAlgea Cao } 2332a48727aSAlgea Cao 23415081c50SWyon Bi phy = (struct rockchip_phy *)dev_get_driver_data(dev); 2352a48727aSAlgea Cao if (!phy) { 2362a48727aSAlgea Cao printf("failed to get phy driver\n"); 2372a48727aSAlgea Cao return 0; 2382a48727aSAlgea Cao } 2392a48727aSAlgea Cao 24015081c50SWyon Bi ret = rockchip_phy_init(phy); 24115081c50SWyon Bi if (ret) { 2422a48727aSAlgea Cao printf("failed to init phy driver\n"); 24315081c50SWyon Bi return ret; 2442a48727aSAlgea Cao } 2452a48727aSAlgea Cao conn_state->phy = phy; 2462a48727aSAlgea Cao 2474ba1647cSKever Yang debug("inno hdmi phy init success, save it\n"); 2482a48727aSAlgea Cao data->phy_drv = conn_state->phy; 2492a48727aSAlgea Cao data->phy_init = true; 2502a48727aSAlgea Cao return 0; 2512a48727aSAlgea Cao default: 2522a48727aSAlgea Cao return -EINVAL; 2532a48727aSAlgea Cao } 2542a48727aSAlgea Cao } 2552a48727aSAlgea Cao 2564b8c2ef1SMark Yao static void init_display_buffer(ulong base) 257186f8572SMark Yao { 2584b8c2ef1SMark Yao memory_start = base + DRM_ROCKCHIP_FB_SIZE; 259186f8572SMark Yao memory_end = memory_start; 2606414e3bcSSandy Huang cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE; 261186f8572SMark Yao } 262186f8572SMark Yao 26323b55d3dSJoseph Chen void *get_display_buffer(int size) 264186f8572SMark Yao { 265186f8572SMark Yao unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE); 266186f8572SMark Yao void *buf; 267186f8572SMark Yao 268186f8572SMark Yao if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) { 269186f8572SMark Yao printf("failed to alloc %dbyte memory to display\n", size); 270186f8572SMark Yao return NULL; 271186f8572SMark Yao } 272186f8572SMark Yao buf = (void *)roundup_memory; 273186f8572SMark Yao 274186f8572SMark Yao memory_end = roundup_memory + size; 275186f8572SMark Yao 276186f8572SMark Yao return buf; 277186f8572SMark Yao } 278186f8572SMark Yao 279186f8572SMark Yao static unsigned long get_display_size(void) 280186f8572SMark Yao { 281186f8572SMark Yao return memory_end - memory_start; 282186f8572SMark Yao } 283186f8572SMark Yao 2846414e3bcSSandy Huang static unsigned long get_single_cubic_lut_size(void) 2856414e3bcSSandy Huang { 2866414e3bcSSandy Huang ulong cubic_lut_size; 2876414e3bcSSandy Huang int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE; 2886414e3bcSSandy Huang 2896414e3bcSSandy Huang /* This is depend on IC designed */ 2906414e3bcSSandy Huang cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16; 2916414e3bcSSandy Huang cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE); 2926414e3bcSSandy Huang 2936414e3bcSSandy Huang return cubic_lut_size; 2946414e3bcSSandy Huang } 2956414e3bcSSandy Huang 2966414e3bcSSandy Huang static unsigned long get_cubic_lut_offset(int crtc_id) 2976414e3bcSSandy Huang { 2986414e3bcSSandy Huang return crtc_id * get_single_cubic_lut_size(); 2996414e3bcSSandy Huang } 3006414e3bcSSandy Huang 3016414e3bcSSandy Huang unsigned long get_cubic_lut_buffer(int crtc_id) 3026414e3bcSSandy Huang { 3036414e3bcSSandy Huang return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size(); 3046414e3bcSSandy Huang } 3056414e3bcSSandy Huang 3066414e3bcSSandy Huang static unsigned long get_cubic_memory_size(void) 3076414e3bcSSandy Huang { 3086414e3bcSSandy Huang /* Max support 4 cubic lut */ 3096414e3bcSSandy Huang return get_single_cubic_lut_size() * 4; 3106414e3bcSSandy Huang } 3116414e3bcSSandy Huang 31223b55d3dSJoseph Chen bool can_direct_logo(int bpp) 313186f8572SMark Yao { 314861ce1a0SSandy Huang return bpp == 24 || bpp == 32; 315186f8572SMark Yao } 316186f8572SMark Yao 3172a48727aSAlgea Cao static int connector_phy_init(struct display_state *state, 3182a48727aSAlgea Cao struct public_phy_data *data) 319186f8572SMark Yao { 320186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 3217cacd0a8SWyon Bi int type; 322186f8572SMark Yao 3232a48727aSAlgea Cao /* does this connector use public phy with others */ 3242a48727aSAlgea Cao type = check_public_use_phy(state); 3252a48727aSAlgea Cao if (type == INNO_HDMI_PHY) { 3262a48727aSAlgea Cao /* there is no public phy was initialized */ 3272a48727aSAlgea Cao if (!data->phy_init) { 3284ba1647cSKever Yang debug("start get public phy\n"); 3292a48727aSAlgea Cao data->public_phy_type = type; 3302a48727aSAlgea Cao if (get_public_phy(state, data)) { 3312a48727aSAlgea Cao printf("can't find correct public phy type\n"); 3322a48727aSAlgea Cao free(data); 3332a48727aSAlgea Cao return -EINVAL; 3342a48727aSAlgea Cao } 3352a48727aSAlgea Cao return 0; 3362a48727aSAlgea Cao } 3372a48727aSAlgea Cao 3382a48727aSAlgea Cao /* if this phy has been initialized, get it directly */ 33915081c50SWyon Bi conn_state->phy = (struct rockchip_phy *)data->phy_drv; 3402a48727aSAlgea Cao return 0; 3412a48727aSAlgea Cao } 3422a48727aSAlgea Cao 343186f8572SMark Yao return 0; 344186f8572SMark Yao } 345186f8572SMark Yao 346186f8572SMark Yao static int connector_panel_init(struct display_state *state) 347186f8572SMark Yao { 348186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 349186f8572SMark Yao struct panel_state *panel_state = &state->panel_state; 3501a8d717cSWyon Bi const struct rockchip_panel *panel = panel_state->panel; 351e2bce6e4SKever Yang ofnode dsp_lut_node; 352186f8572SMark Yao int ret, len; 353186f8572SMark Yao 3541a8d717cSWyon Bi if (!panel) 3554b8c2ef1SMark Yao return 0; 356186f8572SMark Yao 3571a8d717cSWyon Bi dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut"); 358e2bce6e4SKever Yang if (!ofnode_valid(dsp_lut_node)) { 359861ce1a0SSandy Huang debug("%s can not find dsp-lut node\n", __func__); 3601e44acfcSWyon Bi return 0; 361e2bce6e4SKever Yang } 3621e44acfcSWyon Bi 363e2bce6e4SKever Yang ofnode_get_property(dsp_lut_node, "gamma-lut", &len); 364186f8572SMark Yao if (len > 0) { 365186f8572SMark Yao conn_state->gamma.size = len / sizeof(u32); 366186f8572SMark Yao conn_state->gamma.lut = malloc(len); 367186f8572SMark Yao if (!conn_state->gamma.lut) { 368186f8572SMark Yao printf("malloc gamma lut failed\n"); 369186f8572SMark Yao return -ENOMEM; 370186f8572SMark Yao } 371e2bce6e4SKever Yang ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut", 372186f8572SMark Yao conn_state->gamma.lut, 373e2bce6e4SKever Yang conn_state->gamma.size); 374e2bce6e4SKever Yang if (ret) { 375186f8572SMark Yao printf("Cannot decode gamma_lut\n"); 376186f8572SMark Yao conn_state->gamma.lut = NULL; 377186f8572SMark Yao return -EINVAL; 378186f8572SMark Yao } 379186f8572SMark Yao panel_state->dsp_lut_node = dsp_lut_node; 380186f8572SMark Yao } 381186f8572SMark Yao 382186f8572SMark Yao return 0; 383186f8572SMark Yao } 384186f8572SMark Yao 385186f8572SMark Yao int drm_mode_vrefresh(const struct drm_display_mode *mode) 386186f8572SMark Yao { 387186f8572SMark Yao int refresh = 0; 388186f8572SMark Yao unsigned int calc_val; 389186f8572SMark Yao 390186f8572SMark Yao if (mode->vrefresh > 0) { 391186f8572SMark Yao refresh = mode->vrefresh; 392186f8572SMark Yao } else if (mode->htotal > 0 && mode->vtotal > 0) { 393186f8572SMark Yao int vtotal; 394186f8572SMark Yao 395186f8572SMark Yao vtotal = mode->vtotal; 396186f8572SMark Yao /* work out vrefresh the value will be x1000 */ 397186f8572SMark Yao calc_val = (mode->clock * 1000); 398186f8572SMark Yao calc_val /= mode->htotal; 399186f8572SMark Yao refresh = (calc_val + vtotal / 2) / vtotal; 400186f8572SMark Yao 401186f8572SMark Yao if (mode->flags & DRM_MODE_FLAG_INTERLACE) 402186f8572SMark Yao refresh *= 2; 403186f8572SMark Yao if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 404186f8572SMark Yao refresh /= 2; 405186f8572SMark Yao if (mode->vscan > 1) 406186f8572SMark Yao refresh /= mode->vscan; 407186f8572SMark Yao } 408186f8572SMark Yao return refresh; 409186f8572SMark Yao } 410186f8572SMark Yao 4112bfb6166SSandy Huang static int display_get_detail_timing(ofnode node, struct drm_display_mode *mode) 412186f8572SMark Yao { 413186f8572SMark Yao int hactive, vactive, pixelclock; 414186f8572SMark Yao int hfront_porch, hback_porch, hsync_len; 415186f8572SMark Yao int vfront_porch, vback_porch, vsync_len; 416186f8572SMark Yao int val, flags = 0; 417186f8572SMark Yao 418186f8572SMark Yao #define FDT_GET_INT(val, name) \ 4192bfb6166SSandy Huang val = ofnode_read_s32_default(node, name, -1); \ 420186f8572SMark Yao if (val < 0) { \ 421186f8572SMark Yao printf("Can't get %s\n", name); \ 422186f8572SMark Yao return -ENXIO; \ 423186f8572SMark Yao } 424186f8572SMark Yao 425ffa55e18SShixiang Zheng #define FDT_GET_INT_DEFAULT(val, name, default) \ 4262bfb6166SSandy Huang val = ofnode_read_s32_default(node, name, default); 427ffa55e18SShixiang Zheng 428186f8572SMark Yao FDT_GET_INT(hactive, "hactive"); 429186f8572SMark Yao FDT_GET_INT(vactive, "vactive"); 430186f8572SMark Yao FDT_GET_INT(pixelclock, "clock-frequency"); 431186f8572SMark Yao FDT_GET_INT(hsync_len, "hsync-len"); 432186f8572SMark Yao FDT_GET_INT(hfront_porch, "hfront-porch"); 433186f8572SMark Yao FDT_GET_INT(hback_porch, "hback-porch"); 434186f8572SMark Yao FDT_GET_INT(vsync_len, "vsync-len"); 435186f8572SMark Yao FDT_GET_INT(vfront_porch, "vfront-porch"); 436186f8572SMark Yao FDT_GET_INT(vback_porch, "vback-porch"); 437186f8572SMark Yao FDT_GET_INT(val, "hsync-active"); 438186f8572SMark Yao flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 439186f8572SMark Yao FDT_GET_INT(val, "vsync-active"); 440186f8572SMark Yao flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 4413a06149eSSandy Huang FDT_GET_INT(val, "pixelclk-active"); 4423a06149eSSandy Huang flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0; 443186f8572SMark Yao 444ffa55e18SShixiang Zheng FDT_GET_INT_DEFAULT(val, "screen-rotate", 0); 445ffa55e18SShixiang Zheng if (val == DRM_MODE_FLAG_XMIRROR) { 446ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_XMIRROR; 447ffa55e18SShixiang Zheng } else if (val == DRM_MODE_FLAG_YMIRROR) { 448ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_YMIRROR; 449ffa55e18SShixiang Zheng } else if (val == DRM_MODE_FLAG_XYMIRROR) { 450ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_XMIRROR; 451ffa55e18SShixiang Zheng flags |= DRM_MODE_FLAG_YMIRROR; 452ffa55e18SShixiang Zheng } 453186f8572SMark Yao mode->hdisplay = hactive; 454186f8572SMark Yao mode->hsync_start = mode->hdisplay + hfront_porch; 455186f8572SMark Yao mode->hsync_end = mode->hsync_start + hsync_len; 456186f8572SMark Yao mode->htotal = mode->hsync_end + hback_porch; 457186f8572SMark Yao 458186f8572SMark Yao mode->vdisplay = vactive; 459186f8572SMark Yao mode->vsync_start = mode->vdisplay + vfront_porch; 460186f8572SMark Yao mode->vsync_end = mode->vsync_start + vsync_len; 461186f8572SMark Yao mode->vtotal = mode->vsync_end + vback_porch; 462186f8572SMark Yao 463186f8572SMark Yao mode->clock = pixelclock / 1000; 464186f8572SMark Yao mode->flags = flags; 465186f8572SMark Yao 466186f8572SMark Yao return 0; 467186f8572SMark Yao } 468186f8572SMark Yao 4692bfb6166SSandy Huang static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode) 4702bfb6166SSandy Huang { 4712bfb6166SSandy Huang int ret = 0; 4722bfb6166SSandy Huang 4732bfb6166SSandy Huang ret = display_get_detail_timing(node, mode); 4742bfb6166SSandy Huang 4752bfb6166SSandy Huang if (ret) { 4762bfb6166SSandy Huang mode->clock = 74250; 4772bfb6166SSandy Huang mode->flags = 0x5; 4782bfb6166SSandy Huang mode->hdisplay = 1280; 4792bfb6166SSandy Huang mode->hsync_start = 1390; 4802bfb6166SSandy Huang mode->hsync_end = 1430; 4812bfb6166SSandy Huang mode->htotal = 1650; 4822bfb6166SSandy Huang mode->hskew = 0; 4832bfb6166SSandy Huang mode->vdisplay = 720; 4842bfb6166SSandy Huang mode->vsync_start = 725; 4852bfb6166SSandy Huang mode->vsync_end = 730; 4862bfb6166SSandy Huang mode->vtotal = 750; 4872bfb6166SSandy Huang mode->vrefresh = 60; 4882bfb6166SSandy Huang mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 4892bfb6166SSandy Huang mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 4902bfb6166SSandy Huang } 4912bfb6166SSandy Huang 4922bfb6166SSandy Huang printf("route node %s force_timing, use %dx%dp%d as default mode\n", 4932bfb6166SSandy Huang ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay, 4942bfb6166SSandy Huang mode->vscan); 4952bfb6166SSandy Huang 4962bfb6166SSandy Huang return 0; 4972bfb6166SSandy Huang } 4982bfb6166SSandy Huang 4992bfb6166SSandy Huang static int display_get_timing_from_dts(struct panel_state *panel_state, 5002bfb6166SSandy Huang struct drm_display_mode *mode) 5012bfb6166SSandy Huang { 5022bfb6166SSandy Huang struct rockchip_panel *panel = panel_state->panel; 50372a8959eSWyon Bi struct ofnode_phandle_args args; 50472a8959eSWyon Bi ofnode dt, timing; 50572a8959eSWyon Bi int ret; 5062bfb6166SSandy Huang 50772a8959eSWyon Bi dt = dev_read_subnode(panel->dev, "display-timings"); 50872a8959eSWyon Bi if (ofnode_valid(dt)) { 50972a8959eSWyon Bi ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL, 51072a8959eSWyon Bi 0, 0, &args); 51172a8959eSWyon Bi if (ret) 51272a8959eSWyon Bi return ret; 5132bfb6166SSandy Huang 51472a8959eSWyon Bi timing = args.node; 51572a8959eSWyon Bi } else { 51672a8959eSWyon Bi timing = dev_read_subnode(panel->dev, "panel-timing"); 51772a8959eSWyon Bi } 51872a8959eSWyon Bi 51972a8959eSWyon Bi if (!ofnode_valid(timing)) { 5202bfb6166SSandy Huang printf("failed to get display timings from DT\n"); 5212bfb6166SSandy Huang return -ENXIO; 5222bfb6166SSandy Huang } 5232bfb6166SSandy Huang 52472a8959eSWyon Bi display_get_detail_timing(timing, mode); 5252bfb6166SSandy Huang 5262bfb6166SSandy Huang return 0; 5272bfb6166SSandy Huang } 5282bfb6166SSandy Huang 529ccd843b9SSandy Huang /** 530cf53642aSSandy Huang * drm_mode_max_resolution_filter - mark modes out of vop max resolution 531cf53642aSSandy Huang * @edid_data: structure store mode list 532cf53642aSSandy Huang * @max_output: vop max output resolution 533cf53642aSSandy Huang */ 534cf53642aSSandy Huang void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 535cf53642aSSandy Huang struct vop_rect *max_output) 536cf53642aSSandy Huang { 537cf53642aSSandy Huang int i; 538cf53642aSSandy Huang 539cf53642aSSandy Huang for (i = 0; i < edid_data->modes; i++) { 540cf53642aSSandy Huang if (edid_data->mode_buf[i].hdisplay > max_output->width || 541cf53642aSSandy Huang edid_data->mode_buf[i].vdisplay > max_output->height) 542cf53642aSSandy Huang edid_data->mode_buf[i].invalid = true; 543cf53642aSSandy Huang } 544cf53642aSSandy Huang } 545cf53642aSSandy Huang 546cf53642aSSandy Huang /** 547ccd843b9SSandy Huang * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 548ccd843b9SSandy Huang * @p: mode 549ccd843b9SSandy Huang * @adjust_flags: a combination of adjustment flags 550ccd843b9SSandy Huang * 551ccd843b9SSandy Huang * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 552ccd843b9SSandy Huang * 553ccd843b9SSandy Huang * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 554ccd843b9SSandy Huang * interlaced modes. 555ccd843b9SSandy Huang * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 556ccd843b9SSandy Huang * buffers containing two eyes (only adjust the timings when needed, eg. for 557ccd843b9SSandy Huang * "frame packing" or "side by side full"). 558ccd843b9SSandy Huang * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 559ccd843b9SSandy Huang * be performed for doublescan and vscan > 1 modes respectively. 560ccd843b9SSandy Huang */ 561ccd843b9SSandy Huang void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 562ccd843b9SSandy Huang { 563ccd843b9SSandy Huang if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 564ccd843b9SSandy Huang return; 565ccd843b9SSandy Huang 566ccd843b9SSandy Huang if (p->flags & DRM_MODE_FLAG_DBLCLK) 567ccd843b9SSandy Huang p->crtc_clock = 2 * p->clock; 568ccd843b9SSandy Huang else 569ccd843b9SSandy Huang p->crtc_clock = p->clock; 570ccd843b9SSandy Huang p->crtc_hdisplay = p->hdisplay; 571ccd843b9SSandy Huang p->crtc_hsync_start = p->hsync_start; 572ccd843b9SSandy Huang p->crtc_hsync_end = p->hsync_end; 573ccd843b9SSandy Huang p->crtc_htotal = p->htotal; 574ccd843b9SSandy Huang p->crtc_hskew = p->hskew; 575ccd843b9SSandy Huang p->crtc_vdisplay = p->vdisplay; 576ccd843b9SSandy Huang p->crtc_vsync_start = p->vsync_start; 577ccd843b9SSandy Huang p->crtc_vsync_end = p->vsync_end; 578ccd843b9SSandy Huang p->crtc_vtotal = p->vtotal; 579ccd843b9SSandy Huang 580ccd843b9SSandy Huang if (p->flags & DRM_MODE_FLAG_INTERLACE) { 581ccd843b9SSandy Huang if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 582ccd843b9SSandy Huang p->crtc_vdisplay /= 2; 583ccd843b9SSandy Huang p->crtc_vsync_start /= 2; 584ccd843b9SSandy Huang p->crtc_vsync_end /= 2; 585ccd843b9SSandy Huang p->crtc_vtotal /= 2; 586ccd843b9SSandy Huang } 587ccd843b9SSandy Huang } 588ccd843b9SSandy Huang 589ccd843b9SSandy Huang if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 590ccd843b9SSandy Huang if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 591ccd843b9SSandy Huang p->crtc_vdisplay *= 2; 592ccd843b9SSandy Huang p->crtc_vsync_start *= 2; 593ccd843b9SSandy Huang p->crtc_vsync_end *= 2; 594ccd843b9SSandy Huang p->crtc_vtotal *= 2; 595ccd843b9SSandy Huang } 596ccd843b9SSandy Huang } 597ccd843b9SSandy Huang 598ccd843b9SSandy Huang if (!(adjust_flags & CRTC_NO_VSCAN)) { 599ccd843b9SSandy Huang if (p->vscan > 1) { 600ccd843b9SSandy Huang p->crtc_vdisplay *= p->vscan; 601ccd843b9SSandy Huang p->crtc_vsync_start *= p->vscan; 602ccd843b9SSandy Huang p->crtc_vsync_end *= p->vscan; 603ccd843b9SSandy Huang p->crtc_vtotal *= p->vscan; 604ccd843b9SSandy Huang } 605ccd843b9SSandy Huang } 606ccd843b9SSandy Huang 607ccd843b9SSandy Huang if (adjust_flags & CRTC_STEREO_DOUBLE) { 608ccd843b9SSandy Huang unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 609ccd843b9SSandy Huang 610ccd843b9SSandy Huang switch (layout) { 611ccd843b9SSandy Huang case DRM_MODE_FLAG_3D_FRAME_PACKING: 612ccd843b9SSandy Huang p->crtc_clock *= 2; 613ccd843b9SSandy Huang p->crtc_vdisplay += p->crtc_vtotal; 614ccd843b9SSandy Huang p->crtc_vsync_start += p->crtc_vtotal; 615ccd843b9SSandy Huang p->crtc_vsync_end += p->crtc_vtotal; 616ccd843b9SSandy Huang p->crtc_vtotal += p->crtc_vtotal; 617ccd843b9SSandy Huang break; 618ccd843b9SSandy Huang } 619ccd843b9SSandy Huang } 620ccd843b9SSandy Huang 621ccd843b9SSandy Huang p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 622ccd843b9SSandy Huang p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 623ccd843b9SSandy Huang p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 624ccd843b9SSandy Huang p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 625ccd843b9SSandy Huang } 626ccd843b9SSandy Huang 6278e2bab3fSAlgea Cao /** 6288e2bab3fSAlgea Cao * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420 6298e2bab3fSAlgea Cao * output format 6308e2bab3fSAlgea Cao * 6318e2bab3fSAlgea Cao * @connector: drm connector under action. 6328e2bab3fSAlgea Cao * @mode: video mode to be tested. 6338e2bab3fSAlgea Cao * 6348e2bab3fSAlgea Cao * Returns: 6358e2bab3fSAlgea Cao * true if the mode can be supported in YCBCR420 format 6368e2bab3fSAlgea Cao * false if not. 6378e2bab3fSAlgea Cao */ 6388e2bab3fSAlgea Cao bool drm_mode_is_420_only(const struct drm_display_info *display, 6398e2bab3fSAlgea Cao struct drm_display_mode *mode) 6408e2bab3fSAlgea Cao { 6418e2bab3fSAlgea Cao u8 vic = drm_match_cea_mode(mode); 6428e2bab3fSAlgea Cao 6438e2bab3fSAlgea Cao return test_bit(vic, display->hdmi.y420_vdb_modes); 6448e2bab3fSAlgea Cao } 6458e2bab3fSAlgea Cao 6468e2bab3fSAlgea Cao /** 6478e2bab3fSAlgea Cao * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420 6488e2bab3fSAlgea Cao * output format also (along with RGB/YCBCR444/422) 6498e2bab3fSAlgea Cao * 6508e2bab3fSAlgea Cao * @display: display under action. 6518e2bab3fSAlgea Cao * @mode: video mode to be tested. 6528e2bab3fSAlgea Cao * 6538e2bab3fSAlgea Cao * Returns: 6548e2bab3fSAlgea Cao * true if the mode can be support YCBCR420 format 6558e2bab3fSAlgea Cao * false if not. 6568e2bab3fSAlgea Cao */ 6578e2bab3fSAlgea Cao bool drm_mode_is_420_also(const struct drm_display_info *display, 6588e2bab3fSAlgea Cao struct drm_display_mode *mode) 6598e2bab3fSAlgea Cao { 6608e2bab3fSAlgea Cao u8 vic = drm_match_cea_mode(mode); 6618e2bab3fSAlgea Cao 6628e2bab3fSAlgea Cao return test_bit(vic, display->hdmi.y420_cmdb_modes); 6638e2bab3fSAlgea Cao } 6648e2bab3fSAlgea Cao 6658e2bab3fSAlgea Cao /** 6668e2bab3fSAlgea Cao * drm_mode_is_420 - if a given videomode can be supported in YCBCR420 6678e2bab3fSAlgea Cao * output format 6688e2bab3fSAlgea Cao * 6698e2bab3fSAlgea Cao * @display: display under action. 6708e2bab3fSAlgea Cao * @mode: video mode to be tested. 6718e2bab3fSAlgea Cao * 6728e2bab3fSAlgea Cao * Returns: 6738e2bab3fSAlgea Cao * true if the mode can be supported in YCBCR420 format 6748e2bab3fSAlgea Cao * false if not. 6758e2bab3fSAlgea Cao */ 6768e2bab3fSAlgea Cao bool drm_mode_is_420(const struct drm_display_info *display, 6778e2bab3fSAlgea Cao struct drm_display_mode *mode) 6788e2bab3fSAlgea Cao { 6798e2bab3fSAlgea Cao return drm_mode_is_420_only(display, mode) || 6808e2bab3fSAlgea Cao drm_mode_is_420_also(display, mode); 6818e2bab3fSAlgea Cao } 6828e2bab3fSAlgea Cao 683186f8572SMark Yao static int display_get_timing(struct display_state *state) 684186f8572SMark Yao { 685186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 686186f8572SMark Yao struct drm_display_mode *mode = &conn_state->mode; 687186f8572SMark Yao const struct drm_display_mode *m; 6884b8c2ef1SMark Yao struct panel_state *panel_state = &state->panel_state; 689c493d00eSWyon Bi const struct rockchip_panel *panel = panel_state->panel; 690186f8572SMark Yao 6911a8d717cSWyon Bi if (dev_of_valid(panel->dev) && 6921a8d717cSWyon Bi !display_get_timing_from_dts(panel_state, mode)) { 693186f8572SMark Yao printf("Using display timing dts\n"); 69434d0c224SWyon Bi return 0; 695186f8572SMark Yao } 696186f8572SMark Yao 697c493d00eSWyon Bi if (panel->data) { 698c493d00eSWyon Bi m = (const struct drm_display_mode *)panel->data; 699186f8572SMark Yao memcpy(mode, m, sizeof(*m)); 700c493d00eSWyon Bi printf("Using display timing from compatible panel driver\n"); 70134d0c224SWyon Bi return 0; 702186f8572SMark Yao } 703186f8572SMark Yao 704186f8572SMark Yao return -ENODEV; 705186f8572SMark Yao } 706186f8572SMark Yao 70758c17f51SSandy Huang static int display_pre_init(void) 70858c17f51SSandy Huang { 70958c17f51SSandy Huang struct display_state *state; 71058c17f51SSandy Huang int ret = 0; 71158c17f51SSandy Huang 71258c17f51SSandy Huang list_for_each_entry(state, &rockchip_display_list, head) { 71358c17f51SSandy Huang struct connector_state *conn_state = &state->conn_state; 71458c17f51SSandy Huang const struct rockchip_connector *conn = conn_state->connector; 71558c17f51SSandy Huang const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 71658c17f51SSandy Huang struct crtc_state *crtc_state = &state->crtc_state; 71758c17f51SSandy Huang struct rockchip_crtc *crtc = crtc_state->crtc; 71858c17f51SSandy Huang 71958c17f51SSandy Huang if (conn_funcs->pre_init) { 72058c17f51SSandy Huang ret = conn_funcs->pre_init(state); 72158c17f51SSandy Huang if (ret) 72258c17f51SSandy Huang printf("pre init conn error\n"); 72358c17f51SSandy Huang } 72458c17f51SSandy Huang crtc->vps[crtc_state->crtc_id].output_type = conn_state->type; 72558c17f51SSandy Huang } 72658c17f51SSandy Huang return ret; 72758c17f51SSandy Huang } 72858c17f51SSandy Huang 7292bfb6166SSandy Huang static int display_use_force_mode(struct display_state *state) 7302bfb6166SSandy Huang { 7312bfb6166SSandy Huang struct connector_state *conn_state = &state->conn_state; 7322bfb6166SSandy Huang struct drm_display_mode *mode = &conn_state->mode; 7332bfb6166SSandy Huang 7342bfb6166SSandy Huang conn_state->bpc = 8; 7352bfb6166SSandy Huang memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode)); 7362bfb6166SSandy Huang conn_state->bus_format = state->force_bus_format; 7372bfb6166SSandy Huang 7382bfb6166SSandy Huang return 0; 7392bfb6166SSandy Huang } 7402bfb6166SSandy Huang 7412bfb6166SSandy Huang static int display_get_edid_mode(struct display_state *state) 7422bfb6166SSandy Huang { 7432bfb6166SSandy Huang int ret = 0; 7442bfb6166SSandy Huang struct connector_state *conn_state = &state->conn_state; 7452bfb6166SSandy Huang struct drm_display_mode *mode = &conn_state->mode; 7462bfb6166SSandy Huang int bpc; 7472bfb6166SSandy Huang 7482bfb6166SSandy Huang ret = edid_get_drm_mode(conn_state->edid, ret, mode, &bpc); 7492bfb6166SSandy Huang if (!ret) { 7502bfb6166SSandy Huang conn_state->bpc = bpc; 7512bfb6166SSandy Huang edid_print_info((void *)&conn_state->edid); 7522bfb6166SSandy Huang } else { 7532bfb6166SSandy Huang conn_state->bpc = 8; 7542bfb6166SSandy Huang mode->clock = 74250; 7552bfb6166SSandy Huang mode->flags = 0x5; 7562bfb6166SSandy Huang mode->hdisplay = 1280; 7572bfb6166SSandy Huang mode->hsync_start = 1390; 7582bfb6166SSandy Huang mode->hsync_end = 1430; 7592bfb6166SSandy Huang mode->htotal = 1650; 7602bfb6166SSandy Huang mode->hskew = 0; 7612bfb6166SSandy Huang mode->vdisplay = 720; 7622bfb6166SSandy Huang mode->vsync_start = 725; 7632bfb6166SSandy Huang mode->vsync_end = 730; 7642bfb6166SSandy Huang mode->vtotal = 750; 7652bfb6166SSandy Huang mode->vrefresh = 60; 7662bfb6166SSandy Huang mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9; 7672bfb6166SSandy Huang mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 7682bfb6166SSandy Huang 7692bfb6166SSandy Huang printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name); 7702bfb6166SSandy Huang } 7712bfb6166SSandy Huang 7722bfb6166SSandy Huang return ret; 7732bfb6166SSandy Huang } 7742bfb6166SSandy Huang 775186f8572SMark Yao static int display_init(struct display_state *state) 776186f8572SMark Yao { 777186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 7781a8d717cSWyon Bi struct panel_state *panel_state = &state->panel_state; 779186f8572SMark Yao const struct rockchip_connector *conn = conn_state->connector; 780186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 781186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 7822a48727aSAlgea Cao struct rockchip_crtc *crtc = crtc_state->crtc; 783186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 784ccd843b9SSandy Huang struct drm_display_mode *mode = &conn_state->mode; 785b014c5e2SGuochun Huang const char *compatible; 786186f8572SMark Yao int ret = 0; 78752015e97SSandy Huang static bool __print_once = false; 7882bfb6166SSandy Huang 78952015e97SSandy Huang if (!__print_once) { 79052015e97SSandy Huang __print_once = true; 791e559407dSSandy Huang printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION); 79252015e97SSandy Huang } 793e559407dSSandy Huang 794186f8572SMark Yao if (state->is_init) 795186f8572SMark Yao return 0; 796186f8572SMark Yao 797186f8572SMark Yao if (!conn_funcs || !crtc_funcs) { 798186f8572SMark Yao printf("failed to find connector or crtc functions\n"); 799186f8572SMark Yao return -ENXIO; 800186f8572SMark Yao } 801186f8572SMark Yao 802a5afbabdSSandy Huang if (crtc_state->crtc->active && !crtc_state->ports_node && 8032d7c136fSSandy Huang memcmp(&crtc_state->crtc->active_mode, &conn_state->mode, 8042d7c136fSSandy Huang sizeof(struct drm_display_mode))) { 8052d7c136fSSandy Huang printf("%s has been used for output type: %d, mode: %dx%dp%d\n", 8062d7c136fSSandy Huang crtc_state->dev->name, 8072d7c136fSSandy Huang crtc_state->crtc->active_mode.type, 8082d7c136fSSandy Huang crtc_state->crtc->active_mode.hdisplay, 8092d7c136fSSandy Huang crtc_state->crtc->active_mode.vdisplay, 8102d7c136fSSandy Huang crtc_state->crtc->active_mode.vrefresh); 8112d7c136fSSandy Huang return -ENODEV; 8122d7c136fSSandy Huang } 8132d7c136fSSandy Huang 814cf53642aSSandy Huang if (crtc_funcs->preinit) { 815cf53642aSSandy Huang ret = crtc_funcs->preinit(state); 816cf53642aSSandy Huang if (ret) 817cf53642aSSandy Huang return ret; 818cf53642aSSandy Huang } 819cf53642aSSandy Huang 8207cacd0a8SWyon Bi if (panel_state->panel) 8217cacd0a8SWyon Bi rockchip_panel_init(panel_state->panel); 8227cacd0a8SWyon Bi 823186f8572SMark Yao if (conn_funcs->init) { 824186f8572SMark Yao ret = conn_funcs->init(state); 825186f8572SMark Yao if (ret) 8264b8c2ef1SMark Yao goto deinit; 827186f8572SMark Yao } 8287cacd0a8SWyon Bi 8297cacd0a8SWyon Bi if (conn_state->phy) 8307cacd0a8SWyon Bi rockchip_phy_init(conn_state->phy); 8317cacd0a8SWyon Bi 832186f8572SMark Yao /* 833186f8572SMark Yao * support hotplug, but not connect; 834186f8572SMark Yao */ 8352a48727aSAlgea Cao #ifdef CONFIG_ROCKCHIP_DRM_TVE 8362a48727aSAlgea Cao if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) { 8372a48727aSAlgea Cao printf("hdmi plugin ,skip tve\n"); 8382a48727aSAlgea Cao goto deinit; 8392a48727aSAlgea Cao } 8409c9eff43SAlgea Cao #elif defined(CONFIG_DRM_ROCKCHIP_RK1000) 8412a48727aSAlgea Cao if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) { 8422a48727aSAlgea Cao printf("hdmi plugin ,skip tve\n"); 8432a48727aSAlgea Cao goto deinit; 8442a48727aSAlgea Cao } 8452a48727aSAlgea Cao #endif 846186f8572SMark Yao if (conn_funcs->detect) { 847186f8572SMark Yao ret = conn_funcs->detect(state); 8489c9eff43SAlgea Cao #if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000) 8492a48727aSAlgea Cao if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA) 8502a48727aSAlgea Cao crtc->hdmi_hpd = ret; 8512a48727aSAlgea Cao #endif 8522bfb6166SSandy Huang if (!ret && !state->force_output) { 8532bfb6166SSandy Huang printf("%s disconnected\n", conn_state->dev->name); 854186f8572SMark Yao goto deinit; 855186f8572SMark Yao } 8562bfb6166SSandy Huang } 857186f8572SMark Yao 858005d29a7SWyon Bi if (panel_state->panel) { 859186f8572SMark Yao ret = display_get_timing(state); 8602a74799bSJianqun Xu if (!ret) 8612a74799bSJianqun Xu conn_state->bpc = panel_state->panel->bpc; 86234d0c224SWyon Bi #if defined(CONFIG_I2C_EDID) 86334d0c224SWyon Bi if (ret < 0 && conn_funcs->get_edid) { 86434d0c224SWyon Bi rockchip_panel_prepare(panel_state->panel); 86534d0c224SWyon Bi ret = conn_funcs->get_edid(state); 8662bfb6166SSandy Huang if (!ret) 8672bfb6166SSandy Huang display_get_edid_mode(state); 8682a74799bSJianqun Xu } 86934d0c224SWyon Bi #endif 8701a8d717cSWyon Bi } else if (conn_state->bridge) { 8711a8d717cSWyon Bi ret = video_bridge_read_edid(conn_state->bridge->dev, 8721a8d717cSWyon Bi conn_state->edid, EDID_SIZE); 8731a8d717cSWyon Bi if (ret > 0) { 874081dec1bSAndy Yan #if defined(CONFIG_I2C_EDID) 8752bfb6166SSandy Huang display_get_edid_mode(state); 876081dec1bSAndy Yan #endif 87775eb6fceSAlgea Cao } else { 87875eb6fceSAlgea Cao ret = video_bridge_get_timing(conn_state->bridge->dev); 8791a8d717cSWyon Bi } 880005d29a7SWyon Bi } else if (conn_funcs->get_timing) { 881005d29a7SWyon Bi ret = conn_funcs->get_timing(state); 882005d29a7SWyon Bi } else if (conn_funcs->get_edid) { 883005d29a7SWyon Bi ret = conn_funcs->get_edid(state); 884081dec1bSAndy Yan #if defined(CONFIG_I2C_EDID) 8852bfb6166SSandy Huang if (!ret) 8862bfb6166SSandy Huang display_get_edid_mode(state); 887081dec1bSAndy Yan #endif 8881a8d717cSWyon Bi } 8891a8d717cSWyon Bi 8902bfb6166SSandy Huang if (ret && !state->force_output) 891186f8572SMark Yao goto deinit; 8922bfb6166SSandy Huang if (state->force_output) 8932bfb6166SSandy Huang display_use_force_mode(state); 8941a8d717cSWyon Bi 895b014c5e2SGuochun Huang /* rk356x series drive mipi pixdata on posedge */ 896b014c5e2SGuochun Huang compatible = dev_read_string(conn_state->dev, "compatible"); 897b014c5e2SGuochun Huang if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) 898b014c5e2SGuochun Huang conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA; 899b014c5e2SGuochun Huang 9002bfb6166SSandy Huang printf("%s: %s detailed mode clock %u kHz, flags[%x]\n" 90134d0c224SWyon Bi " H: %04d %04d %04d %04d\n" 90234d0c224SWyon Bi " V: %04d %04d %04d %04d\n" 90334d0c224SWyon Bi "bus_format: %x\n", 9042bfb6166SSandy Huang conn_state->dev->name, 9052bfb6166SSandy Huang state->force_output ? "use force output" : "", 90634d0c224SWyon Bi mode->clock, mode->flags, 90734d0c224SWyon Bi mode->hdisplay, mode->hsync_start, 90834d0c224SWyon Bi mode->hsync_end, mode->htotal, 90934d0c224SWyon Bi mode->vdisplay, mode->vsync_start, 91034d0c224SWyon Bi mode->vsync_end, mode->vtotal, 91134d0c224SWyon Bi conn_state->bus_format); 91234d0c224SWyon Bi 913ccd843b9SSandy Huang drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 914186f8572SMark Yao 915ee937701SWyon Bi if (conn_state->bridge) 916ee937701SWyon Bi rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode); 917ee937701SWyon Bi 918186f8572SMark Yao if (crtc_funcs->init) { 919186f8572SMark Yao ret = crtc_funcs->init(state); 920186f8572SMark Yao if (ret) 921186f8572SMark Yao goto deinit; 922186f8572SMark Yao } 923186f8572SMark Yao state->is_init = 1; 924186f8572SMark Yao 9252d7c136fSSandy Huang crtc_state->crtc->active = true; 9262d7c136fSSandy Huang memcpy(&crtc_state->crtc->active_mode, 9272d7c136fSSandy Huang &conn_state->mode, sizeof(struct drm_display_mode)); 9282d7c136fSSandy Huang 929186f8572SMark Yao return 0; 930186f8572SMark Yao 931186f8572SMark Yao deinit: 932186f8572SMark Yao if (conn_funcs->deinit) 933186f8572SMark Yao conn_funcs->deinit(state); 934186f8572SMark Yao return ret; 935186f8572SMark Yao } 936186f8572SMark Yao 93767b9012cSSandy Huang int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val) 93867b9012cSSandy Huang { 93967b9012cSSandy Huang struct crtc_state *crtc_state = &state->crtc_state; 94067b9012cSSandy Huang const struct rockchip_crtc *crtc = crtc_state->crtc; 94167b9012cSSandy Huang const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 94267b9012cSSandy Huang int ret; 94367b9012cSSandy Huang 94467b9012cSSandy Huang if (!state->is_init) 94567b9012cSSandy Huang return -EINVAL; 94667b9012cSSandy Huang 94767b9012cSSandy Huang if (crtc_funcs->send_mcu_cmd) { 94867b9012cSSandy Huang ret = crtc_funcs->send_mcu_cmd(state, type, val); 94967b9012cSSandy Huang if (ret) 95067b9012cSSandy Huang return ret; 95167b9012cSSandy Huang } 95267b9012cSSandy Huang 95367b9012cSSandy Huang return 0; 95467b9012cSSandy Huang } 95567b9012cSSandy Huang 956186f8572SMark Yao static int display_set_plane(struct display_state *state) 957186f8572SMark Yao { 958186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 959186f8572SMark Yao const struct rockchip_crtc *crtc = crtc_state->crtc; 960186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 961186f8572SMark Yao int ret; 962186f8572SMark Yao 963186f8572SMark Yao if (!state->is_init) 964186f8572SMark Yao return -EINVAL; 965186f8572SMark Yao 966186f8572SMark Yao if (crtc_funcs->set_plane) { 967186f8572SMark Yao ret = crtc_funcs->set_plane(state); 968186f8572SMark Yao if (ret) 969186f8572SMark Yao return ret; 970186f8572SMark Yao } 971186f8572SMark Yao 972186f8572SMark Yao return 0; 973186f8572SMark Yao } 974186f8572SMark Yao 975186f8572SMark Yao static int display_enable(struct display_state *state) 976186f8572SMark Yao { 977186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 978186f8572SMark Yao const struct rockchip_connector *conn = conn_state->connector; 979186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 980186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 981186f8572SMark Yao const struct rockchip_crtc *crtc = crtc_state->crtc; 982186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 9837cacd0a8SWyon Bi struct panel_state *panel_state = &state->panel_state; 984186f8572SMark Yao 985186f8572SMark Yao if (!state->is_init) 986186f8572SMark Yao return -EINVAL; 987186f8572SMark Yao 988186f8572SMark Yao if (state->is_enable) 989186f8572SMark Yao return 0; 990186f8572SMark Yao 99149ae8667SWyon Bi if (crtc_funcs->prepare) 99249ae8667SWyon Bi crtc_funcs->prepare(state); 993186f8572SMark Yao 99449ae8667SWyon Bi if (conn_funcs->prepare) 99549ae8667SWyon Bi conn_funcs->prepare(state); 996186f8572SMark Yao 9971a8d717cSWyon Bi if (conn_state->bridge) 9981a8d717cSWyon Bi rockchip_bridge_pre_enable(conn_state->bridge); 9991a8d717cSWyon Bi 10007cacd0a8SWyon Bi if (panel_state->panel) 10017cacd0a8SWyon Bi rockchip_panel_prepare(panel_state->panel); 1002186f8572SMark Yao 100349ae8667SWyon Bi if (crtc_funcs->enable) 100449ae8667SWyon Bi crtc_funcs->enable(state); 1005186f8572SMark Yao 100649ae8667SWyon Bi if (conn_funcs->enable) 100749ae8667SWyon Bi conn_funcs->enable(state); 1008186f8572SMark Yao 10091a8d717cSWyon Bi if (conn_state->bridge) 10101a8d717cSWyon Bi rockchip_bridge_enable(conn_state->bridge); 10111a8d717cSWyon Bi 10127cacd0a8SWyon Bi if (panel_state->panel) 10137cacd0a8SWyon Bi rockchip_panel_enable(panel_state->panel); 1014186f8572SMark Yao 1015186f8572SMark Yao state->is_enable = true; 1016c493d00eSWyon Bi 101749ae8667SWyon Bi return 0; 1018186f8572SMark Yao } 1019186f8572SMark Yao 1020186f8572SMark Yao static int display_disable(struct display_state *state) 1021186f8572SMark Yao { 1022186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 1023186f8572SMark Yao const struct rockchip_connector *conn = conn_state->connector; 1024186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs = conn->funcs; 1025186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 1026186f8572SMark Yao const struct rockchip_crtc *crtc = crtc_state->crtc; 1027186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs; 10287cacd0a8SWyon Bi struct panel_state *panel_state = &state->panel_state; 1029186f8572SMark Yao 1030186f8572SMark Yao if (!state->is_init) 1031186f8572SMark Yao return 0; 1032186f8572SMark Yao 1033186f8572SMark Yao if (!state->is_enable) 1034186f8572SMark Yao return 0; 1035186f8572SMark Yao 10367cacd0a8SWyon Bi if (panel_state->panel) 10377cacd0a8SWyon Bi rockchip_panel_disable(panel_state->panel); 1038186f8572SMark Yao 10391a8d717cSWyon Bi if (conn_state->bridge) 10401a8d717cSWyon Bi rockchip_bridge_disable(conn_state->bridge); 1041186f8572SMark Yao 1042186f8572SMark Yao if (conn_funcs->disable) 1043186f8572SMark Yao conn_funcs->disable(state); 1044186f8572SMark Yao 10451a8d717cSWyon Bi if (crtc_funcs->disable) 10461a8d717cSWyon Bi crtc_funcs->disable(state); 10471a8d717cSWyon Bi 10487cacd0a8SWyon Bi if (panel_state->panel) 10497cacd0a8SWyon Bi rockchip_panel_unprepare(panel_state->panel); 1050186f8572SMark Yao 10511a8d717cSWyon Bi if (conn_state->bridge) 10521a8d717cSWyon Bi rockchip_bridge_post_disable(conn_state->bridge); 10531a8d717cSWyon Bi 1054186f8572SMark Yao if (conn_funcs->unprepare) 1055186f8572SMark Yao conn_funcs->unprepare(state); 1056186f8572SMark Yao 1057186f8572SMark Yao state->is_enable = 0; 1058186f8572SMark Yao state->is_init = 0; 1059186f8572SMark Yao 1060186f8572SMark Yao return 0; 1061186f8572SMark Yao } 1062186f8572SMark Yao 1063186f8572SMark Yao static int display_logo(struct display_state *state) 1064186f8572SMark Yao { 1065186f8572SMark Yao struct crtc_state *crtc_state = &state->crtc_state; 1066186f8572SMark Yao struct connector_state *conn_state = &state->conn_state; 1067186f8572SMark Yao struct logo_info *logo = &state->logo; 10682d7c136fSSandy Huang int hdisplay, vdisplay, ret; 1069186f8572SMark Yao 10702d7c136fSSandy Huang ret = display_init(state); 10712d7c136fSSandy Huang if (!state->is_init || ret) 1072186f8572SMark Yao return -ENODEV; 1073186f8572SMark Yao 1074186f8572SMark Yao switch (logo->bpp) { 1075186f8572SMark Yao case 16: 1076186f8572SMark Yao crtc_state->format = ROCKCHIP_FMT_RGB565; 1077186f8572SMark Yao break; 1078186f8572SMark Yao case 24: 1079186f8572SMark Yao crtc_state->format = ROCKCHIP_FMT_RGB888; 1080186f8572SMark Yao break; 1081186f8572SMark Yao case 32: 1082186f8572SMark Yao crtc_state->format = ROCKCHIP_FMT_ARGB8888; 1083186f8572SMark Yao break; 1084186f8572SMark Yao default: 1085186f8572SMark Yao printf("can't support bmp bits[%d]\n", logo->bpp); 1086186f8572SMark Yao return -EINVAL; 1087186f8572SMark Yao } 1088186f8572SMark Yao hdisplay = conn_state->mode.hdisplay; 1089186f8572SMark Yao vdisplay = conn_state->mode.vdisplay; 1090186f8572SMark Yao crtc_state->src_w = logo->width; 1091186f8572SMark Yao crtc_state->src_h = logo->height; 1092186f8572SMark Yao crtc_state->src_x = 0; 1093186f8572SMark Yao crtc_state->src_y = 0; 1094186f8572SMark Yao crtc_state->ymirror = logo->ymirror; 1095a5f116a3SDamon Ding crtc_state->rb_swap = 0; 1096186f8572SMark Yao 10974b8c2ef1SMark Yao crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset; 1098186f8572SMark Yao crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5; 1099186f8572SMark Yao 1100186f8572SMark Yao if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) { 1101186f8572SMark Yao crtc_state->crtc_x = 0; 1102186f8572SMark Yao crtc_state->crtc_y = 0; 1103186f8572SMark Yao crtc_state->crtc_w = hdisplay; 1104186f8572SMark Yao crtc_state->crtc_h = vdisplay; 1105186f8572SMark Yao } else { 1106186f8572SMark Yao if (crtc_state->src_w >= hdisplay) { 1107186f8572SMark Yao crtc_state->crtc_x = 0; 1108186f8572SMark Yao crtc_state->crtc_w = hdisplay; 1109186f8572SMark Yao } else { 1110186f8572SMark Yao crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2; 1111186f8572SMark Yao crtc_state->crtc_w = crtc_state->src_w; 1112186f8572SMark Yao } 1113186f8572SMark Yao 1114186f8572SMark Yao if (crtc_state->src_h >= vdisplay) { 1115186f8572SMark Yao crtc_state->crtc_y = 0; 1116186f8572SMark Yao crtc_state->crtc_h = vdisplay; 1117186f8572SMark Yao } else { 1118186f8572SMark Yao crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2; 1119186f8572SMark Yao crtc_state->crtc_h = crtc_state->src_h; 1120186f8572SMark Yao } 1121186f8572SMark Yao } 1122186f8572SMark Yao 1123186f8572SMark Yao display_set_plane(state); 1124186f8572SMark Yao display_enable(state); 1125186f8572SMark Yao 1126186f8572SMark Yao return 0; 1127186f8572SMark Yao } 1128186f8572SMark Yao 1129*2bf72cbbSDamon Ding static int get_crtc_id(struct device_node *connect) 1130186f8572SMark Yao { 1131*2bf72cbbSDamon Ding struct device_node *port_node; 1132186f8572SMark Yao int val; 1133186f8572SMark Yao 1134*2bf72cbbSDamon Ding port_node = of_get_parent(connect); 1135*2bf72cbbSDamon Ding if (!port_node) 1136186f8572SMark Yao goto err; 1137*2bf72cbbSDamon Ding val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1); 1138186f8572SMark Yao if (val < 0) 1139186f8572SMark Yao goto err; 1140186f8572SMark Yao 1141186f8572SMark Yao return val; 1142186f8572SMark Yao err: 1143186f8572SMark Yao printf("Can't get crtc id, default set to id = 0\n"); 1144186f8572SMark Yao return 0; 1145186f8572SMark Yao } 1146186f8572SMark Yao 114767b9012cSSandy Huang static int get_crtc_mcu_mode(struct crtc_state *crtc_state) 114867b9012cSSandy Huang { 114967b9012cSSandy Huang ofnode mcu_node; 115067b9012cSSandy Huang int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend; 115167b9012cSSandy Huang 115267b9012cSSandy Huang mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing"); 1153a196d7fcSKever Yang if (!ofnode_valid(mcu_node)) 1154a196d7fcSKever Yang return -ENODEV; 115567b9012cSSandy Huang 115667b9012cSSandy Huang #define FDT_GET_MCU_INT(val, name) \ 115767b9012cSSandy Huang do { \ 115867b9012cSSandy Huang val = ofnode_read_s32_default(mcu_node, name, -1); \ 115967b9012cSSandy Huang if (val < 0) { \ 116067b9012cSSandy Huang printf("Can't get %s\n", name); \ 116167b9012cSSandy Huang return -ENXIO; \ 116267b9012cSSandy Huang } \ 116367b9012cSSandy Huang } while (0) 116467b9012cSSandy Huang 116567b9012cSSandy Huang FDT_GET_MCU_INT(total_pixel, "mcu-pix-total"); 116667b9012cSSandy Huang FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst"); 116767b9012cSSandy Huang FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend"); 116867b9012cSSandy Huang FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst"); 116967b9012cSSandy Huang FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend"); 117067b9012cSSandy Huang 117167b9012cSSandy Huang crtc_state->mcu_timing.mcu_pix_total = total_pixel; 117267b9012cSSandy Huang crtc_state->mcu_timing.mcu_cs_pst = cs_pst; 117367b9012cSSandy Huang crtc_state->mcu_timing.mcu_cs_pend = cs_pend; 117467b9012cSSandy Huang crtc_state->mcu_timing.mcu_rw_pst = rw_pst; 117567b9012cSSandy Huang crtc_state->mcu_timing.mcu_rw_pend = rw_pend; 117667b9012cSSandy Huang 117767b9012cSSandy Huang return 0; 117867b9012cSSandy Huang } 117967b9012cSSandy Huang 1180186f8572SMark Yao struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp) 1181186f8572SMark Yao { 1182186f8572SMark Yao struct rockchip_logo_cache *tmp, *logo_cache = NULL; 1183186f8572SMark Yao 1184186f8572SMark Yao list_for_each_entry(tmp, &logo_cache_list, head) { 1185186f8572SMark Yao if (!strcmp(tmp->name, bmp)) { 1186186f8572SMark Yao logo_cache = tmp; 1187186f8572SMark Yao break; 1188186f8572SMark Yao } 1189186f8572SMark Yao } 1190186f8572SMark Yao 1191186f8572SMark Yao if (!logo_cache) { 1192186f8572SMark Yao logo_cache = malloc(sizeof(*logo_cache)); 1193186f8572SMark Yao if (!logo_cache) { 1194186f8572SMark Yao printf("failed to alloc memory for logo cache\n"); 1195186f8572SMark Yao return NULL; 1196186f8572SMark Yao } 1197186f8572SMark Yao memset(logo_cache, 0, sizeof(*logo_cache)); 1198186f8572SMark Yao strcpy(logo_cache->name, bmp); 1199186f8572SMark Yao INIT_LIST_HEAD(&logo_cache->head); 1200186f8572SMark Yao list_add_tail(&logo_cache->head, &logo_cache_list); 1201186f8572SMark Yao } 1202186f8572SMark Yao 1203186f8572SMark Yao return logo_cache; 1204186f8572SMark Yao } 1205186f8572SMark Yao 12065eb61944SSandy Huang /* Note: used only for rkfb kernel driver */ 12075eb61944SSandy Huang static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name) 12085eb61944SSandy Huang { 12095eb61944SSandy Huang #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 12105eb61944SSandy Huang void *dst = NULL; 12115eb61944SSandy Huang int len, size; 12125eb61944SSandy Huang struct bmp_header *header; 12135eb61944SSandy Huang 12145eb61944SSandy Huang if (!logo || !bmp_name) 12155eb61944SSandy Huang return -EINVAL; 12165eb61944SSandy Huang 12175eb61944SSandy Huang header = malloc(RK_BLK_SIZE); 12185eb61944SSandy Huang if (!header) 12195eb61944SSandy Huang return -ENOMEM; 12205eb61944SSandy Huang 12215eb61944SSandy Huang len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 12225eb61944SSandy Huang if (len != RK_BLK_SIZE) { 12235eb61944SSandy Huang free(header); 12245eb61944SSandy Huang return -EINVAL; 12255eb61944SSandy Huang } 12265eb61944SSandy Huang size = get_unaligned_le32(&header->file_size); 12275eb61944SSandy Huang dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2); 12285eb61944SSandy Huang len = rockchip_read_resource_file(dst, bmp_name, 0, size); 12295eb61944SSandy Huang if (len != size) { 12305eb61944SSandy Huang printf("failed to load bmp %s\n", bmp_name); 12315eb61944SSandy Huang free(header); 12325eb61944SSandy Huang return -ENOENT; 12335eb61944SSandy Huang } 12345eb61944SSandy Huang 12355eb61944SSandy Huang logo->mem = dst; 123623b55d3dSJoseph Chen #endif 12375eb61944SSandy Huang 12385eb61944SSandy Huang return 0; 12395eb61944SSandy Huang } 12405eb61944SSandy Huang 1241186f8572SMark Yao static int load_bmp_logo(struct logo_info *logo, const char *bmp_name) 1242186f8572SMark Yao { 12434b8c2ef1SMark Yao #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE 1244186f8572SMark Yao struct rockchip_logo_cache *logo_cache; 1245186f8572SMark Yao struct bmp_header *header; 1246186f8572SMark Yao void *dst = NULL, *pdst; 12474b8c2ef1SMark Yao int size, len; 12484b8c2ef1SMark Yao int ret = 0; 12497e72214dSShixiang Zheng int reserved = 0; 12507a589732SChris Zhong int dst_size; 1251186f8572SMark Yao 1252186f8572SMark Yao if (!logo || !bmp_name) 1253186f8572SMark Yao return -EINVAL; 1254186f8572SMark Yao logo_cache = find_or_alloc_logo_cache(bmp_name); 1255186f8572SMark Yao if (!logo_cache) 1256186f8572SMark Yao return -ENOMEM; 1257186f8572SMark Yao 1258186f8572SMark Yao if (logo_cache->logo.mem) { 1259186f8572SMark Yao memcpy(logo, &logo_cache->logo, sizeof(*logo)); 1260186f8572SMark Yao return 0; 1261186f8572SMark Yao } 1262186f8572SMark Yao 12634b8c2ef1SMark Yao header = malloc(RK_BLK_SIZE); 1264186f8572SMark Yao if (!header) 12654b8c2ef1SMark Yao return -ENOMEM; 12664b8c2ef1SMark Yao 12674b8c2ef1SMark Yao len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE); 12684b8c2ef1SMark Yao if (len != RK_BLK_SIZE) { 12694b8c2ef1SMark Yao ret = -EINVAL; 12704b8c2ef1SMark Yao goto free_header; 12714b8c2ef1SMark Yao } 1272186f8572SMark Yao 1273186f8572SMark Yao logo->bpp = get_unaligned_le16(&header->bit_count); 1274186f8572SMark Yao logo->width = get_unaligned_le32(&header->width); 1275186f8572SMark Yao logo->height = get_unaligned_le32(&header->height); 12767a589732SChris Zhong dst_size = logo->width * logo->height * logo->bpp >> 3; 12777e72214dSShixiang Zheng reserved = get_unaligned_le32(&header->reserved); 12787e72214dSShixiang Zheng if (logo->height < 0) 12797e72214dSShixiang Zheng logo->height = -logo->height; 1280186f8572SMark Yao size = get_unaligned_le32(&header->file_size); 1281861ce1a0SSandy Huang if (!can_direct_logo(logo->bpp)) { 1282186f8572SMark Yao if (size > MEMORY_POOL_SIZE) { 1283186f8572SMark Yao printf("failed to use boot buf as temp bmp buffer\n"); 12844b8c2ef1SMark Yao ret = -ENOMEM; 12854b8c2ef1SMark Yao goto free_header; 1286186f8572SMark Yao } 1287861ce1a0SSandy Huang pdst = get_display_buffer(size); 1288186f8572SMark Yao 1289861ce1a0SSandy Huang } else { 1290186f8572SMark Yao pdst = get_display_buffer(size); 1291186f8572SMark Yao dst = pdst; 1292861ce1a0SSandy Huang } 1293186f8572SMark Yao 12944b8c2ef1SMark Yao len = rockchip_read_resource_file(pdst, bmp_name, 0, size); 12954b8c2ef1SMark Yao if (len != size) { 1296186f8572SMark Yao printf("failed to load bmp %s\n", bmp_name); 12974b8c2ef1SMark Yao ret = -ENOENT; 12984b8c2ef1SMark Yao goto free_header; 1299186f8572SMark Yao } 130055e2f86dSSandy Huang 1301861ce1a0SSandy Huang if (!can_direct_logo(logo->bpp)) { 1302186f8572SMark Yao /* 1303186f8572SMark Yao * TODO: force use 16bpp if bpp less than 16; 1304186f8572SMark Yao */ 1305186f8572SMark Yao logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp; 1306186f8572SMark Yao dst_size = logo->width * logo->height * logo->bpp >> 3; 1307186f8572SMark Yao dst = get_display_buffer(dst_size); 13084b8c2ef1SMark Yao if (!dst) { 13094b8c2ef1SMark Yao ret = -ENOMEM; 13104b8c2ef1SMark Yao goto free_header; 13114b8c2ef1SMark Yao } 131255e2f86dSSandy Huang if (bmpdecoder(pdst, dst, logo->bpp)) { 1313186f8572SMark Yao printf("failed to decode bmp %s\n", bmp_name); 13144b8c2ef1SMark Yao ret = -EINVAL; 13154b8c2ef1SMark Yao goto free_header; 1316186f8572SMark Yao } 131755e2f86dSSandy Huang 1318186f8572SMark Yao logo->offset = 0; 131955e2f86dSSandy Huang logo->ymirror = 0; 1320186f8572SMark Yao } else { 1321186f8572SMark Yao logo->offset = get_unaligned_le32(&header->data_offset); 13227e72214dSShixiang Zheng if (reserved == BMP_PROCESSED_FLAG) 13237e72214dSShixiang Zheng logo->ymirror = 0; 13247e72214dSShixiang Zheng else 132555e2f86dSSandy Huang logo->ymirror = 1; 1326186f8572SMark Yao } 13274b8c2ef1SMark Yao logo->mem = dst; 1328186f8572SMark Yao 1329186f8572SMark Yao memcpy(&logo_cache->logo, logo, sizeof(*logo)); 1330186f8572SMark Yao 13317a589732SChris Zhong flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE)); 13327a589732SChris Zhong 13334b8c2ef1SMark Yao free_header: 13344b8c2ef1SMark Yao 13354b8c2ef1SMark Yao free(header); 13364b8c2ef1SMark Yao 13374b8c2ef1SMark Yao return ret; 13384b8c2ef1SMark Yao #else 13394b8c2ef1SMark Yao return -EINVAL; 13404b8c2ef1SMark Yao #endif 1341186f8572SMark Yao } 1342186f8572SMark Yao 1343186f8572SMark Yao void rockchip_show_fbbase(ulong fbbase) 1344186f8572SMark Yao { 1345186f8572SMark Yao struct display_state *s; 1346186f8572SMark Yao 1347186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1348186f8572SMark Yao s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN; 13494b8c2ef1SMark Yao s->logo.mem = (char *)fbbase; 1350186f8572SMark Yao s->logo.width = DRM_ROCKCHIP_FB_WIDTH; 1351186f8572SMark Yao s->logo.height = DRM_ROCKCHIP_FB_HEIGHT; 1352186f8572SMark Yao s->logo.bpp = 32; 1353186f8572SMark Yao s->logo.ymirror = 0; 1354186f8572SMark Yao 1355186f8572SMark Yao display_logo(s); 1356186f8572SMark Yao } 1357186f8572SMark Yao } 1358186f8572SMark Yao 1359a2d2b88eSSandy Huang int rockchip_show_bmp(const char *bmp) 1360186f8572SMark Yao { 1361186f8572SMark Yao struct display_state *s; 1362a2d2b88eSSandy Huang int ret = 0; 1363186f8572SMark Yao 1364186f8572SMark Yao if (!bmp) { 1365186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) 1366186f8572SMark Yao display_disable(s); 1367a2d2b88eSSandy Huang return -ENOENT; 1368186f8572SMark Yao } 1369186f8572SMark Yao 1370186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1371186f8572SMark Yao s->logo.mode = s->charge_logo_mode; 1372186f8572SMark Yao if (load_bmp_logo(&s->logo, bmp)) 1373186f8572SMark Yao continue; 1374a2d2b88eSSandy Huang ret = display_logo(s); 1375186f8572SMark Yao } 1376186f8572SMark Yao 1377a2d2b88eSSandy Huang return ret; 1378a2d2b88eSSandy Huang } 1379a2d2b88eSSandy Huang 1380a2d2b88eSSandy Huang int rockchip_show_logo(void) 1381186f8572SMark Yao { 1382186f8572SMark Yao struct display_state *s; 1383a2d2b88eSSandy Huang int ret = 0; 1384186f8572SMark Yao 1385186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1386186f8572SMark Yao s->logo.mode = s->logo_mode; 1387186f8572SMark Yao if (load_bmp_logo(&s->logo, s->ulogo_name)) 1388186f8572SMark Yao printf("failed to display uboot logo\n"); 1389186f8572SMark Yao else 1390a2d2b88eSSandy Huang ret = display_logo(s); 13915eb61944SSandy Huang 13925eb61944SSandy Huang /* Load kernel bmp in rockchip_display_fixup() later */ 1393186f8572SMark Yao } 1394a2d2b88eSSandy Huang 1395a2d2b88eSSandy Huang return ret; 1396186f8572SMark Yao } 1397186f8572SMark Yao 13981a8d717cSWyon Bi enum { 13991a8d717cSWyon Bi PORT_DIR_IN, 14001a8d717cSWyon Bi PORT_DIR_OUT, 14011a8d717cSWyon Bi }; 14021a8d717cSWyon Bi 14031a8d717cSWyon Bi static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev) 14041a8d717cSWyon Bi { 14055f0cde79SSandy Huang ofnode panel_node, ports, port, ep, port_parent_node; 14061a8d717cSWyon Bi struct udevice *panel_dev; 14071a8d717cSWyon Bi int ret; 14081a8d717cSWyon Bi 14091a8d717cSWyon Bi panel_node = dev_read_subnode(dev, "panel"); 14101a8d717cSWyon Bi if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) { 14111a8d717cSWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node, 14121a8d717cSWyon Bi &panel_dev); 14131a8d717cSWyon Bi if (!ret) 14141a8d717cSWyon Bi goto found; 14151a8d717cSWyon Bi } 14161a8d717cSWyon Bi 14171a8d717cSWyon Bi ports = dev_read_subnode(dev, "ports"); 14181a8d717cSWyon Bi if (!ofnode_valid(ports)) 14191a8d717cSWyon Bi return NULL; 14201a8d717cSWyon Bi 14211a8d717cSWyon Bi ofnode_for_each_subnode(port, ports) { 14221a8d717cSWyon Bi u32 reg; 14231a8d717cSWyon Bi 14241a8d717cSWyon Bi if (ofnode_read_u32(port, "reg", ®)) 14251a8d717cSWyon Bi continue; 14261a8d717cSWyon Bi 14271a8d717cSWyon Bi if (reg != PORT_DIR_OUT) 14281a8d717cSWyon Bi continue; 14291a8d717cSWyon Bi 14301a8d717cSWyon Bi ofnode_for_each_subnode(ep, port) { 14311a8d717cSWyon Bi ofnode _ep, _port; 14321a8d717cSWyon Bi uint phandle; 14335f0cde79SSandy Huang bool is_ports_node = false; 14341a8d717cSWyon Bi 14351a8d717cSWyon Bi if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 14361a8d717cSWyon Bi continue; 14371a8d717cSWyon Bi 14381a8d717cSWyon Bi _ep = ofnode_get_by_phandle(phandle); 14391a8d717cSWyon Bi if (!ofnode_valid(_ep)) 14401a8d717cSWyon Bi continue; 14411a8d717cSWyon Bi 14421a8d717cSWyon Bi _port = ofnode_get_parent(_ep); 14431a8d717cSWyon Bi if (!ofnode_valid(_port)) 14441a8d717cSWyon Bi continue; 14451a8d717cSWyon Bi 14465f0cde79SSandy Huang port_parent_node = ofnode_get_parent(_port); 14475f0cde79SSandy Huang is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0; 14485f0cde79SSandy Huang if (is_ports_node) 14495f0cde79SSandy Huang panel_node = ofnode_get_parent(port_parent_node); 14505f0cde79SSandy Huang else 14511a8d717cSWyon Bi panel_node = ofnode_get_parent(_port); 14521a8d717cSWyon Bi if (!ofnode_valid(panel_node)) 14531a8d717cSWyon Bi continue; 14541a8d717cSWyon Bi 14551a8d717cSWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_PANEL, 14561a8d717cSWyon Bi panel_node, 14571a8d717cSWyon Bi &panel_dev); 14581a8d717cSWyon Bi if (!ret) 14591a8d717cSWyon Bi goto found; 14601a8d717cSWyon Bi } 14611a8d717cSWyon Bi } 14621a8d717cSWyon Bi 14631a8d717cSWyon Bi return NULL; 14641a8d717cSWyon Bi 14651a8d717cSWyon Bi found: 14661a8d717cSWyon Bi return (struct rockchip_panel *)dev_get_driver_data(panel_dev); 14671a8d717cSWyon Bi } 14681a8d717cSWyon Bi 14691a8d717cSWyon Bi static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev) 14701a8d717cSWyon Bi { 14711a8d717cSWyon Bi ofnode node, ports, port, ep; 14721a8d717cSWyon Bi struct udevice *dev; 14731a8d717cSWyon Bi int ret; 14741a8d717cSWyon Bi 14751a8d717cSWyon Bi ports = dev_read_subnode(conn_dev, "ports"); 14761a8d717cSWyon Bi if (!ofnode_valid(ports)) 14771a8d717cSWyon Bi return NULL; 14781a8d717cSWyon Bi 14791a8d717cSWyon Bi ofnode_for_each_subnode(port, ports) { 14801a8d717cSWyon Bi u32 reg; 14811a8d717cSWyon Bi 14821a8d717cSWyon Bi if (ofnode_read_u32(port, "reg", ®)) 14831a8d717cSWyon Bi continue; 14841a8d717cSWyon Bi 14851a8d717cSWyon Bi if (reg != PORT_DIR_OUT) 14861a8d717cSWyon Bi continue; 14871a8d717cSWyon Bi 14881a8d717cSWyon Bi ofnode_for_each_subnode(ep, port) { 14891a8d717cSWyon Bi ofnode _ep, _port, _ports; 14901a8d717cSWyon Bi uint phandle; 14911a8d717cSWyon Bi 14921a8d717cSWyon Bi if (ofnode_read_u32(ep, "remote-endpoint", &phandle)) 14931a8d717cSWyon Bi continue; 14941a8d717cSWyon Bi 14951a8d717cSWyon Bi _ep = ofnode_get_by_phandle(phandle); 14961a8d717cSWyon Bi if (!ofnode_valid(_ep)) 14971a8d717cSWyon Bi continue; 14981a8d717cSWyon Bi 14991a8d717cSWyon Bi _port = ofnode_get_parent(_ep); 15001a8d717cSWyon Bi if (!ofnode_valid(_port)) 15011a8d717cSWyon Bi continue; 15021a8d717cSWyon Bi 15031a8d717cSWyon Bi _ports = ofnode_get_parent(_port); 15041a8d717cSWyon Bi if (!ofnode_valid(_ports)) 15051a8d717cSWyon Bi continue; 15061a8d717cSWyon Bi 15071a8d717cSWyon Bi node = ofnode_get_parent(_ports); 15081a8d717cSWyon Bi if (!ofnode_valid(node)) 15091a8d717cSWyon Bi continue; 15101a8d717cSWyon Bi 15111a8d717cSWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, 15121a8d717cSWyon Bi node, &dev); 15131a8d717cSWyon Bi if (!ret) 15141a8d717cSWyon Bi goto found; 15151a8d717cSWyon Bi } 15161a8d717cSWyon Bi } 15171a8d717cSWyon Bi 15181a8d717cSWyon Bi return NULL; 15191a8d717cSWyon Bi 15201a8d717cSWyon Bi found: 15211a8d717cSWyon Bi return (struct rockchip_bridge *)dev_get_driver_data(dev); 15221a8d717cSWyon Bi } 15231a8d717cSWyon Bi 1524f8281ef0SWyon Bi static struct udevice *rockchip_of_find_connector(ofnode endpoint) 1525747dfc26SWyon Bi { 1526f8281ef0SWyon Bi ofnode ep, port, ports, conn; 1527f8281ef0SWyon Bi uint phandle; 1528f8281ef0SWyon Bi struct udevice *dev; 1529747dfc26SWyon Bi int ret; 1530747dfc26SWyon Bi 1531f8281ef0SWyon Bi if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 1532f8281ef0SWyon Bi return NULL; 1533f8281ef0SWyon Bi 1534f8281ef0SWyon Bi ep = ofnode_get_by_phandle(phandle); 1535f8281ef0SWyon Bi if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 1536f8281ef0SWyon Bi return NULL; 1537f8281ef0SWyon Bi 1538f8281ef0SWyon Bi port = ofnode_get_parent(ep); 1539747dfc26SWyon Bi if (!ofnode_valid(port)) 1540747dfc26SWyon Bi return NULL; 1541747dfc26SWyon Bi 1542f8281ef0SWyon Bi ports = ofnode_get_parent(port); 1543f8281ef0SWyon Bi if (!ofnode_valid(ports)) 1544747dfc26SWyon Bi return NULL; 1545f8281ef0SWyon Bi 1546f8281ef0SWyon Bi conn = ofnode_get_parent(ports); 1547f8281ef0SWyon Bi if (!ofnode_valid(conn) || !ofnode_is_available(conn)) 1548f8281ef0SWyon Bi return NULL; 1549f8281ef0SWyon Bi 1550f8281ef0SWyon Bi ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev); 1551f8281ef0SWyon Bi if (ret) 1552f8281ef0SWyon Bi return NULL; 1553f8281ef0SWyon Bi 1554f8281ef0SWyon Bi return dev; 1555747dfc26SWyon Bi } 1556747dfc26SWyon Bi 15576eff7620SSandy Huang static bool rockchip_get_display_path_status(ofnode endpoint) 15586eff7620SSandy Huang { 15596eff7620SSandy Huang ofnode ep; 15606eff7620SSandy Huang uint phandle; 15616eff7620SSandy Huang 15626eff7620SSandy Huang if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle)) 15636eff7620SSandy Huang return false; 15646eff7620SSandy Huang 15656eff7620SSandy Huang ep = ofnode_get_by_phandle(phandle); 15666eff7620SSandy Huang if (!ofnode_valid(ep) || !ofnode_is_available(ep)) 15676eff7620SSandy Huang return false; 15686eff7620SSandy Huang 15696eff7620SSandy Huang return true; 15706eff7620SSandy Huang } 15716eff7620SSandy Huang 15727cacd0a8SWyon Bi static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev) 15737cacd0a8SWyon Bi { 15747cacd0a8SWyon Bi struct udevice *phy_dev; 15757cacd0a8SWyon Bi int ret; 15767cacd0a8SWyon Bi 15777cacd0a8SWyon Bi ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev); 15787cacd0a8SWyon Bi if (ret) 15797cacd0a8SWyon Bi return NULL; 15807cacd0a8SWyon Bi 15817cacd0a8SWyon Bi return (struct rockchip_phy *)dev_get_driver_data(phy_dev); 15827cacd0a8SWyon Bi } 15837cacd0a8SWyon Bi 158420618a45SGuochun Huang #if defined(CONFIG_ROCKCHIP_RK3568) 158520618a45SGuochun Huang static int rockchip_display_fixup_dts(void *blob) 158620618a45SGuochun Huang { 158720618a45SGuochun Huang ofnode route_node, route_subnode, conn_ep, conn_port; 158820618a45SGuochun Huang const struct device_node *route_sub_devnode; 158920618a45SGuochun Huang const struct device_node *ep_node, *conn_ep_dev_node; 159020618a45SGuochun Huang u32 phandle; 159120618a45SGuochun Huang int conn_ep_offset; 159220618a45SGuochun Huang const char *route_sub_path, *path; 159320618a45SGuochun Huang 159420618a45SGuochun Huang /* Don't go further if new variant after 159520618a45SGuochun Huang * reading PMUGRF_SOC_CON15 159620618a45SGuochun Huang */ 159720618a45SGuochun Huang if ((readl(0xfdc20100) & GENMASK(15, 14))) 159820618a45SGuochun Huang return 0; 159920618a45SGuochun Huang 160020618a45SGuochun Huang route_node = ofnode_path("/display-subsystem/route"); 160120618a45SGuochun Huang if (!ofnode_valid(route_node)) 160220618a45SGuochun Huang return -EINVAL; 160320618a45SGuochun Huang 160420618a45SGuochun Huang ofnode_for_each_subnode(route_subnode, route_node) { 160520618a45SGuochun Huang if (!ofnode_is_available(route_subnode)) 160620618a45SGuochun Huang continue; 160720618a45SGuochun Huang 160820618a45SGuochun Huang route_sub_devnode = ofnode_to_np(route_subnode); 160920618a45SGuochun Huang route_sub_path = route_sub_devnode->full_name; 161020618a45SGuochun Huang if (!strstr(ofnode_get_name(route_subnode), "dsi") && 161120618a45SGuochun Huang !strstr(ofnode_get_name(route_subnode), "edp")) 161220618a45SGuochun Huang return 0; 161320618a45SGuochun Huang 161420618a45SGuochun Huang phandle = ofnode_read_u32_default(route_subnode, "connect", -1); 161520618a45SGuochun Huang if (phandle < 0) { 161620618a45SGuochun Huang printf("Warn: can't find connect node's handle\n"); 161720618a45SGuochun Huang continue; 161820618a45SGuochun Huang } 161920618a45SGuochun Huang 162020618a45SGuochun Huang ep_node = of_find_node_by_phandle(phandle); 162120618a45SGuochun Huang if (!ofnode_valid(np_to_ofnode(ep_node))) { 162220618a45SGuochun Huang printf("Warn: can't find endpoint node from phandle\n"); 162320618a45SGuochun Huang continue; 162420618a45SGuochun Huang } 162520618a45SGuochun Huang 162620618a45SGuochun Huang ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle); 162720618a45SGuochun Huang conn_ep = ofnode_get_by_phandle(phandle); 162820618a45SGuochun Huang if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep)) 162920618a45SGuochun Huang return -ENODEV; 163020618a45SGuochun Huang 163120618a45SGuochun Huang conn_port = ofnode_get_parent(conn_ep); 163220618a45SGuochun Huang if (!ofnode_valid(conn_port)) 163320618a45SGuochun Huang return -ENODEV; 163420618a45SGuochun Huang 163520618a45SGuochun Huang ofnode_for_each_subnode(conn_ep, conn_port) { 163620618a45SGuochun Huang conn_ep_dev_node = ofnode_to_np(conn_ep); 163720618a45SGuochun Huang path = conn_ep_dev_node->full_name; 163820618a45SGuochun Huang ofnode_read_u32(conn_ep, "remote-endpoint", &phandle); 163920618a45SGuochun Huang conn_ep_offset = fdt_path_offset(blob, path); 164020618a45SGuochun Huang 164120618a45SGuochun Huang if (!ofnode_is_available(conn_ep) && 164220618a45SGuochun Huang strstr(ofnode_get_name(conn_ep), "endpoint@0")) { 164320618a45SGuochun Huang do_fixup_by_path_u32(blob, route_sub_path, 164420618a45SGuochun Huang "connect", phandle, 1); 164520618a45SGuochun Huang fdt_status_okay(blob, conn_ep_offset); 164620618a45SGuochun Huang 164720618a45SGuochun Huang } else if (ofnode_is_available(conn_ep) && 164820618a45SGuochun Huang strstr(ofnode_get_name(conn_ep), "endpoint@1")) { 164920618a45SGuochun Huang fdt_status_disabled(blob, conn_ep_offset); 165020618a45SGuochun Huang } 165120618a45SGuochun Huang } 165220618a45SGuochun Huang } 165320618a45SGuochun Huang 165420618a45SGuochun Huang return 0; 165520618a45SGuochun Huang } 165620618a45SGuochun Huang #endif 165720618a45SGuochun Huang 1658186f8572SMark Yao static int rockchip_display_probe(struct udevice *dev) 1659186f8572SMark Yao { 1660186f8572SMark Yao struct video_priv *uc_priv = dev_get_uclass_priv(dev); 1661186f8572SMark Yao struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 1662186f8572SMark Yao const void *blob = gd->fdt_blob; 1663e2bce6e4SKever Yang int phandle; 1664186f8572SMark Yao struct udevice *crtc_dev, *conn_dev; 16652a48727aSAlgea Cao struct rockchip_crtc *crtc; 1666186f8572SMark Yao const struct rockchip_connector *conn; 16671a8d717cSWyon Bi struct rockchip_panel *panel = NULL; 16681a8d717cSWyon Bi struct rockchip_bridge *bridge = NULL; 16697cacd0a8SWyon Bi struct rockchip_phy *phy = NULL; 1670186f8572SMark Yao struct display_state *s; 1671186f8572SMark Yao const char *name; 1672186f8572SMark Yao int ret; 16732bfb6166SSandy Huang ofnode node, route_node, timing_node; 1674cdb300bdSSandy Huang struct device_node *port_node, *vop_node, *ep_node, *port_parent_node; 16752a48727aSAlgea Cao struct public_phy_data *data; 1676cdb300bdSSandy Huang bool is_ports_node = false; 1677186f8572SMark Yao 167820618a45SGuochun Huang #if defined(CONFIG_ROCKCHIP_RK3568) 167920618a45SGuochun Huang rockchip_display_fixup_dts((void *)blob); 168020618a45SGuochun Huang #endif 168120618a45SGuochun Huang 1682186f8572SMark Yao /* Before relocation we don't need to do anything */ 1683186f8572SMark Yao if (!(gd->flags & GD_FLG_RELOC)) 1684186f8572SMark Yao return 0; 16852a48727aSAlgea Cao 16862a48727aSAlgea Cao data = malloc(sizeof(struct public_phy_data)); 16872a48727aSAlgea Cao if (!data) { 16882a48727aSAlgea Cao printf("failed to alloc phy data\n"); 16892a48727aSAlgea Cao return -ENOMEM; 16902a48727aSAlgea Cao } 16912a48727aSAlgea Cao data->phy_init = false; 16922a48727aSAlgea Cao 16934b8c2ef1SMark Yao init_display_buffer(plat->base); 1694186f8572SMark Yao 1695e2bce6e4SKever Yang route_node = dev_read_subnode(dev, "route"); 1696e2bce6e4SKever Yang if (!ofnode_valid(route_node)) 1697e2bce6e4SKever Yang return -ENODEV; 1698186f8572SMark Yao 1699e2bce6e4SKever Yang ofnode_for_each_subnode(node, route_node) { 17001e44acfcSWyon Bi if (!ofnode_is_available(node)) 17011e44acfcSWyon Bi continue; 1702e2bce6e4SKever Yang phandle = ofnode_read_u32_default(node, "connect", -1); 1703186f8572SMark Yao if (phandle < 0) { 1704e2bce6e4SKever Yang printf("Warn: can't find connect node's handle\n"); 1705186f8572SMark Yao continue; 1706186f8572SMark Yao } 1707e2bce6e4SKever Yang ep_node = of_find_node_by_phandle(phandle); 1708e2bce6e4SKever Yang if (!ofnode_valid(np_to_ofnode(ep_node))) { 1709e2bce6e4SKever Yang printf("Warn: can't find endpoint node from phandle\n"); 1710186f8572SMark Yao continue; 1711186f8572SMark Yao } 1712e2bce6e4SKever Yang port_node = of_get_parent(ep_node); 1713e2bce6e4SKever Yang if (!ofnode_valid(np_to_ofnode(port_node))) { 1714e2bce6e4SKever Yang printf("Warn: can't find port node from phandle\n"); 1715186f8572SMark Yao continue; 1716186f8572SMark Yao } 1717cdb300bdSSandy Huang 1718cdb300bdSSandy Huang port_parent_node = of_get_parent(port_node); 1719cdb300bdSSandy Huang if (!ofnode_valid(np_to_ofnode(port_parent_node))) { 1720cdb300bdSSandy Huang printf("Warn: can't find port parent node from phandle\n"); 1721cdb300bdSSandy Huang continue; 1722cdb300bdSSandy Huang } 1723cdb300bdSSandy Huang 1724cdb300bdSSandy Huang is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0; 1725cdb300bdSSandy Huang if (is_ports_node) { 1726cdb300bdSSandy Huang vop_node = of_get_parent(port_parent_node); 1727e2bce6e4SKever Yang if (!ofnode_valid(np_to_ofnode(vop_node))) { 1728e2bce6e4SKever Yang printf("Warn: can't find crtc node from phandle\n"); 1729e2bce6e4SKever Yang continue; 1730e2bce6e4SKever Yang } 1731cdb300bdSSandy Huang } else { 1732cdb300bdSSandy Huang vop_node = port_parent_node; 1733cdb300bdSSandy Huang } 1734cdb300bdSSandy Huang 1735e2bce6e4SKever Yang ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC, 1736e2bce6e4SKever Yang np_to_ofnode(vop_node), 1737e2bce6e4SKever Yang &crtc_dev); 1738186f8572SMark Yao if (ret) { 1739335adcb5SKever Yang printf("Warn: can't find crtc driver %d\n", ret); 1740186f8572SMark Yao continue; 1741186f8572SMark Yao } 17422a48727aSAlgea Cao crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev); 1743186f8572SMark Yao 1744f8281ef0SWyon Bi conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node)); 1745747dfc26SWyon Bi if (!conn_dev) { 1746e2bce6e4SKever Yang printf("Warn: can't find connect driver\n"); 1747186f8572SMark Yao continue; 1748186f8572SMark Yao } 1749747dfc26SWyon Bi 1750186f8572SMark Yao conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev); 1751186f8572SMark Yao 17527cacd0a8SWyon Bi phy = rockchip_of_find_phy(conn_dev); 17537cacd0a8SWyon Bi 17541a8d717cSWyon Bi bridge = rockchip_of_find_bridge(conn_dev); 17551a8d717cSWyon Bi if (bridge) 17561a8d717cSWyon Bi panel = rockchip_of_find_panel(bridge->dev); 17571a8d717cSWyon Bi else 17581a8d717cSWyon Bi panel = rockchip_of_find_panel(conn_dev); 17591a8d717cSWyon Bi 1760186f8572SMark Yao s = malloc(sizeof(*s)); 1761186f8572SMark Yao if (!s) 17624b8c2ef1SMark Yao continue; 1763186f8572SMark Yao 1764186f8572SMark Yao memset(s, 0, sizeof(*s)); 1765186f8572SMark Yao 1766186f8572SMark Yao INIT_LIST_HEAD(&s->head); 176754fc9addSSandy Huang ret = ofnode_read_string_index(node, "logo,uboot", 0, &name); 176854fc9addSSandy Huang if (!ret) 176954fc9addSSandy Huang memcpy(s->ulogo_name, name, strlen(name)); 177054fc9addSSandy Huang ret = ofnode_read_string_index(node, "logo,kernel", 0, &name); 177154fc9addSSandy Huang if (!ret) 177254fc9addSSandy Huang memcpy(s->klogo_name, name, strlen(name)); 1773e2bce6e4SKever Yang ret = ofnode_read_string_index(node, "logo,mode", 0, &name); 1774186f8572SMark Yao if (!strcmp(name, "fullscreen")) 1775186f8572SMark Yao s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1776186f8572SMark Yao else 1777186f8572SMark Yao s->logo_mode = ROCKCHIP_DISPLAY_CENTER; 1778e2bce6e4SKever Yang ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name); 1779186f8572SMark Yao if (!strcmp(name, "fullscreen")) 1780186f8572SMark Yao s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN; 1781186f8572SMark Yao else 1782186f8572SMark Yao s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER; 1783186f8572SMark Yao 17842bfb6166SSandy Huang s->force_output = ofnode_read_bool(node, "force-output"); 17852bfb6166SSandy Huang 17862bfb6166SSandy Huang if (s->force_output) { 17872bfb6166SSandy Huang timing_node = ofnode_find_subnode(node, "force_timing"); 17882bfb6166SSandy Huang ret = display_get_force_timing_from_dts(timing_node, &s->force_mode); 17892bfb6166SSandy Huang if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format)) 17902bfb6166SSandy Huang s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24; 17912bfb6166SSandy Huang } 17922bfb6166SSandy Huang 1793186f8572SMark Yao s->blob = blob; 17941a8d717cSWyon Bi s->panel_state.panel = panel; 1795747dfc26SWyon Bi s->conn_state.node = conn_dev->node; 1796186f8572SMark Yao s->conn_state.dev = conn_dev; 1797186f8572SMark Yao s->conn_state.connector = conn; 17987cacd0a8SWyon Bi s->conn_state.phy = phy; 17991a8d717cSWyon Bi s->conn_state.bridge = bridge; 18008a2a3a29SSandy Huang s->conn_state.overscan.left_margin = 100; 18018a2a3a29SSandy Huang s->conn_state.overscan.right_margin = 100; 18028a2a3a29SSandy Huang s->conn_state.overscan.top_margin = 100; 18038a2a3a29SSandy Huang s->conn_state.overscan.bottom_margin = 100; 1804e2bce6e4SKever Yang s->crtc_state.node = np_to_ofnode(vop_node); 1805186f8572SMark Yao s->crtc_state.dev = crtc_dev; 1806186f8572SMark Yao s->crtc_state.crtc = crtc; 1807*2bf72cbbSDamon Ding s->crtc_state.crtc_id = get_crtc_id(ep_node); 1808e2bce6e4SKever Yang s->node = node; 18096eff7620SSandy Huang 18106eff7620SSandy Huang if (is_ports_node) { /* only vop2 will get into here */ 18116eff7620SSandy Huang ofnode vp_node = np_to_ofnode(port_node); 18126eff7620SSandy Huang static bool get_plane_mask_from_dts; 18136eff7620SSandy Huang 1814a5afbabdSSandy Huang s->crtc_state.ports_node = port_parent_node; 18156eff7620SSandy Huang if (!get_plane_mask_from_dts) { 18166eff7620SSandy Huang ofnode vp_sub_node; 18176eff7620SSandy Huang int vp_id = 0; 18186eff7620SSandy Huang bool vp_enable = false; 18196eff7620SSandy Huang 18206eff7620SSandy Huang ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) { 1821ee008497SSandy Huang int cursor_plane = -1; 1822ee008497SSandy Huang 18236eff7620SSandy Huang vp_id = ofnode_read_u32_default(vp_node, "reg", 0); 18246eff7620SSandy Huang ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0); 1825ee008497SSandy Huang 1826ee008497SSandy Huang cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1); 1827ee008497SSandy Huang s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane; 18286eff7620SSandy Huang if (ret) { 18298b1fe597SSandy Huang int primary_plane = 0; 18308b1fe597SSandy Huang 18316eff7620SSandy Huang s->crtc_state.crtc->vps[vp_id].plane_mask = ret; 18326eff7620SSandy Huang s->crtc_state.crtc->assign_plane |= true; 18338b1fe597SSandy Huang primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0); 1834ee008497SSandy Huang printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n", 18358b1fe597SSandy Huang vp_id, 18368b1fe597SSandy Huang s->crtc_state.crtc->vps[vp_id].plane_mask, 1837ee008497SSandy Huang primary_plane, 1838ee008497SSandy Huang cursor_plane); 18396eff7620SSandy Huang } 18406eff7620SSandy Huang 18416eff7620SSandy Huang /* To check current vp status */ 18426eff7620SSandy Huang vp_enable = false; 18436eff7620SSandy Huang ofnode_for_each_subnode(vp_sub_node, vp_node) 18446eff7620SSandy Huang vp_enable |= rockchip_get_display_path_status(vp_sub_node); 18456eff7620SSandy Huang s->crtc_state.crtc->vps[vp_id].enable = vp_enable; 18466eff7620SSandy Huang } 18476eff7620SSandy Huang get_plane_mask_from_dts = true; 18486eff7620SSandy Huang } 18496eff7620SSandy Huang } 18501a8d717cSWyon Bi 18511a8d717cSWyon Bi if (bridge) 18521a8d717cSWyon Bi bridge->state = s; 18531a8d717cSWyon Bi 18547cacd0a8SWyon Bi if (panel) 18557cacd0a8SWyon Bi panel->state = s; 18567cacd0a8SWyon Bi 185767b9012cSSandy Huang get_crtc_mcu_mode(&s->crtc_state); 1858186f8572SMark Yao 1859289af5f4SSandy Huang ret = ofnode_read_u32_default(s->crtc_state.node, 1860289af5f4SSandy Huang "rockchip,dual-channel-swap", 0); 1861289af5f4SSandy Huang s->crtc_state.dual_channel_swap = ret; 1862e2bce6e4SKever Yang if (connector_panel_init(s)) { 1863e2bce6e4SKever Yang printf("Warn: Failed to init panel drivers\n"); 18644b8c2ef1SMark Yao free(s); 18654b8c2ef1SMark Yao continue; 18664b8c2ef1SMark Yao } 18674b8c2ef1SMark Yao 18682a48727aSAlgea Cao if (connector_phy_init(s, data)) { 1869e2bce6e4SKever Yang printf("Warn: Failed to init phy drivers\n"); 18704b8c2ef1SMark Yao free(s); 18714b8c2ef1SMark Yao continue; 18724b8c2ef1SMark Yao } 1873186f8572SMark Yao list_add_tail(&s->head, &rockchip_display_list); 1874186f8572SMark Yao } 1875186f8572SMark Yao 18764b8c2ef1SMark Yao if (list_empty(&rockchip_display_list)) { 18775cfabef4SWyon Bi debug("Failed to found available display route\n"); 18784b8c2ef1SMark Yao return -ENODEV; 18794b8c2ef1SMark Yao } 188050a9508eSSandy Huang rockchip_get_baseparameter(); 188158c17f51SSandy Huang display_pre_init(); 18824b8c2ef1SMark Yao 1883186f8572SMark Yao uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH; 1884186f8572SMark Yao uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT; 1885186f8572SMark Yao uc_priv->bpix = VIDEO_BPP32; 1886186f8572SMark Yao 18874b8c2ef1SMark Yao #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER 1888186f8572SMark Yao rockchip_show_fbbase(plat->base); 1889186f8572SMark Yao video_set_flush_dcache(dev, true); 18904b8c2ef1SMark Yao #endif 1891186f8572SMark Yao 1892186f8572SMark Yao return 0; 18934b8c2ef1SMark Yao } 1894186f8572SMark Yao 1895186f8572SMark Yao void rockchip_display_fixup(void *blob) 1896186f8572SMark Yao { 1897186f8572SMark Yao const struct rockchip_connector_funcs *conn_funcs; 1898186f8572SMark Yao const struct rockchip_crtc_funcs *crtc_funcs; 1899186f8572SMark Yao const struct rockchip_connector *conn; 1900186f8572SMark Yao const struct rockchip_crtc *crtc; 1901186f8572SMark Yao struct display_state *s; 1902694afdc8SKever Yang int offset; 190351619d03SKever Yang const struct device_node *np; 190451619d03SKever Yang const char *path; 1905186f8572SMark Yao 19065eb61944SSandy Huang if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) { 19075eb61944SSandy Huang list_for_each_entry(s, &rockchip_display_list, head) 19085eb61944SSandy Huang load_bmp_logo(&s->logo, s->klogo_name); 1909ac6274b3SWyon Bi 1910ac6274b3SWyon Bi if (!get_display_size()) 1911ac6274b3SWyon Bi return; 1912ac6274b3SWyon Bi 191351619d03SKever Yang offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo", 1914186f8572SMark Yao (u64)memory_start, 1915186f8572SMark Yao (u64)get_display_size()); 19165eb61944SSandy Huang if (offset < 0) 19175eb61944SSandy Huang printf("failed to reserve drm-loader-logo memory\n"); 19186414e3bcSSandy Huang 19196414e3bcSSandy Huang offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut", 19206414e3bcSSandy Huang (u64)cubic_lut_memory_start, 19216414e3bcSSandy Huang (u64)get_cubic_memory_size()); 19226414e3bcSSandy Huang if (offset < 0) 19236414e3bcSSandy Huang printf("failed to reserve drm-cubic-lut memory\n"); 19245eb61944SSandy Huang } else { 19255eb61944SSandy Huang printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n"); 1926694afdc8SKever Yang /* Compatible with rkfb display, only need reserve memory */ 1927694afdc8SKever Yang offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo", 1928694afdc8SKever Yang (u64)memory_start, 19295eb61944SSandy Huang MEMORY_POOL_SIZE); 1930694afdc8SKever Yang if (offset < 0) 19315eb61944SSandy Huang printf("failed to reserve fb-loader-logo memory\n"); 19325eb61944SSandy Huang else 19335eb61944SSandy Huang list_for_each_entry(s, &rockchip_display_list, head) 19345eb61944SSandy Huang load_kernel_bmp_logo(&s->logo, s->klogo_name); 1935186f8572SMark Yao return; 1936186f8572SMark Yao } 1937186f8572SMark Yao 1938186f8572SMark Yao list_for_each_entry(s, &rockchip_display_list, head) { 1939186f8572SMark Yao conn = s->conn_state.connector; 1940186f8572SMark Yao if (!conn) 1941186f8572SMark Yao continue; 1942186f8572SMark Yao conn_funcs = conn->funcs; 1943186f8572SMark Yao if (!conn_funcs) { 1944186f8572SMark Yao printf("failed to get exist connector\n"); 1945186f8572SMark Yao continue; 1946186f8572SMark Yao } 1947186f8572SMark Yao 1948186f8572SMark Yao crtc = s->crtc_state.crtc; 1949186f8572SMark Yao if (!crtc) 1950186f8572SMark Yao continue; 1951186f8572SMark Yao 1952186f8572SMark Yao crtc_funcs = crtc->funcs; 1953186f8572SMark Yao if (!crtc_funcs) { 1954186f8572SMark Yao printf("failed to get exist crtc\n"); 1955186f8572SMark Yao continue; 1956186f8572SMark Yao } 1957186f8572SMark Yao 1958186f8572SMark Yao if (crtc_funcs->fixup_dts) 1959186f8572SMark Yao crtc_funcs->fixup_dts(s, blob); 1960186f8572SMark Yao 1961186f8572SMark Yao if (conn_funcs->fixup_dts) 1962186f8572SMark Yao conn_funcs->fixup_dts(s, blob); 1963186f8572SMark Yao 196451619d03SKever Yang np = ofnode_to_np(s->node); 196551619d03SKever Yang path = np->full_name; 196651619d03SKever Yang fdt_increase_size(blob, 0x400); 1967186f8572SMark Yao #define FDT_SET_U32(name, val) \ 1968186f8572SMark Yao do_fixup_by_path_u32(blob, path, name, val, 1); 1969186f8572SMark Yao 197051619d03SKever Yang offset = s->logo.offset + (u32)(unsigned long)s->logo.mem 197151619d03SKever Yang - memory_start; 1972186f8572SMark Yao FDT_SET_U32("logo,offset", offset); 1973186f8572SMark Yao FDT_SET_U32("logo,width", s->logo.width); 1974186f8572SMark Yao FDT_SET_U32("logo,height", s->logo.height); 1975186f8572SMark Yao FDT_SET_U32("logo,bpp", s->logo.bpp); 1976186f8572SMark Yao FDT_SET_U32("logo,ymirror", s->logo.ymirror); 19773fb05486SAlgea Cao FDT_SET_U32("video,clock", s->conn_state.mode.clock); 1978186f8572SMark Yao FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay); 1979186f8572SMark Yao FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay); 1980f11b858fSSandy Huang FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end); 1981f11b858fSSandy Huang FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end); 1982186f8572SMark Yao FDT_SET_U32("video,vrefresh", 1983186f8572SMark Yao drm_mode_vrefresh(&s->conn_state.mode)); 19848a2a3a29SSandy Huang FDT_SET_U32("video,flags", s->conn_state.mode.flags); 198594d85f7bSSandy Huang FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio); 19868a2a3a29SSandy Huang FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin); 19878a2a3a29SSandy Huang FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin); 19888a2a3a29SSandy Huang FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin); 19898a2a3a29SSandy Huang FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin); 19906414e3bcSSandy Huang 1991ac500a1fSSandy Huang if (s->conn_state.disp_info) { 1992ac500a1fSSandy Huang FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness); 1993ac500a1fSSandy Huang FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast); 1994ac500a1fSSandy Huang FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation); 1995ac500a1fSSandy Huang FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue); 1996ac500a1fSSandy Huang } 1997ac500a1fSSandy Huang 19986414e3bcSSandy Huang if (s->conn_state.disp_info->cubic_lut_data.size && 19996414e3bcSSandy Huang CONFIG_ROCKCHIP_CUBIC_LUT_SIZE) 20006414e3bcSSandy Huang FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id)); 20016414e3bcSSandy Huang 2002186f8572SMark Yao #undef FDT_SET_U32 2003186f8572SMark Yao } 2004186f8572SMark Yao } 2005186f8572SMark Yao 2006186f8572SMark Yao int rockchip_display_bind(struct udevice *dev) 2007186f8572SMark Yao { 2008186f8572SMark Yao struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); 2009186f8572SMark Yao 20104b8c2ef1SMark Yao plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE; 2011186f8572SMark Yao 2012186f8572SMark Yao return 0; 2013186f8572SMark Yao } 2014186f8572SMark Yao 2015186f8572SMark Yao static const struct udevice_id rockchip_display_ids[] = { 2016186f8572SMark Yao { .compatible = "rockchip,display-subsystem" }, 2017186f8572SMark Yao { } 2018186f8572SMark Yao }; 2019186f8572SMark Yao 2020186f8572SMark Yao U_BOOT_DRIVER(rockchip_display) = { 2021186f8572SMark Yao .name = "rockchip_display", 2022186f8572SMark Yao .id = UCLASS_VIDEO, 2023186f8572SMark Yao .of_match = rockchip_display_ids, 2024186f8572SMark Yao .bind = rockchip_display_bind, 2025186f8572SMark Yao .probe = rockchip_display_probe, 2026186f8572SMark Yao }; 20274b8c2ef1SMark Yao 20284b8c2ef1SMark Yao static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc, 20294b8c2ef1SMark Yao char *const argv[]) 20304b8c2ef1SMark Yao { 20314b8c2ef1SMark Yao if (argc != 1) 20324b8c2ef1SMark Yao return CMD_RET_USAGE; 20334b8c2ef1SMark Yao 20344b8c2ef1SMark Yao rockchip_show_logo(); 20354b8c2ef1SMark Yao 20364b8c2ef1SMark Yao return 0; 20374b8c2ef1SMark Yao } 20384b8c2ef1SMark Yao 20394b8c2ef1SMark Yao static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc, 20404b8c2ef1SMark Yao char *const argv[]) 20414b8c2ef1SMark Yao { 20424b8c2ef1SMark Yao if (argc != 2) 20434b8c2ef1SMark Yao return CMD_RET_USAGE; 20444b8c2ef1SMark Yao 20454b8c2ef1SMark Yao rockchip_show_bmp(argv[1]); 20464b8c2ef1SMark Yao 20474b8c2ef1SMark Yao return 0; 20484b8c2ef1SMark Yao } 20494b8c2ef1SMark Yao 20504b8c2ef1SMark Yao U_BOOT_CMD( 20514b8c2ef1SMark Yao rockchip_show_logo, 1, 1, do_rockchip_logo_show, 20524b8c2ef1SMark Yao "load and display log from resource partition", 20534b8c2ef1SMark Yao NULL 20544b8c2ef1SMark Yao ); 20554b8c2ef1SMark Yao 20564b8c2ef1SMark Yao U_BOOT_CMD( 20574b8c2ef1SMark Yao rockchip_show_bmp, 2, 1, do_rockchip_show_bmp, 20584b8c2ef1SMark Yao "load and display bmp from resource partition", 20594b8c2ef1SMark Yao " <bmp_name>" 20604b8c2ef1SMark Yao ); 2061