1*9c9eff43SAlgea Cao // SPDX-License-Identifier: GPL-2.0
2*9c9eff43SAlgea Cao /*
3*9c9eff43SAlgea Cao * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4*9c9eff43SAlgea Cao */
5*9c9eff43SAlgea Cao
6*9c9eff43SAlgea Cao #include <common.h>
7*9c9eff43SAlgea Cao #include <dm.h>
8*9c9eff43SAlgea Cao #include <errno.h>
9*9c9eff43SAlgea Cao #include <i2c.h>
10*9c9eff43SAlgea Cao #include <dm/pinctrl.h>
11*9c9eff43SAlgea Cao #include <dm/uclass.h>
12*9c9eff43SAlgea Cao #include <dm/uclass-id.h>
13*9c9eff43SAlgea Cao
14*9c9eff43SAlgea Cao #include "rk1000.h"
15*9c9eff43SAlgea Cao
16*9c9eff43SAlgea Cao #define CTRL_ADC 0x00
17*9c9eff43SAlgea Cao #define ADC_OFF 0x88
18*9c9eff43SAlgea Cao #define CTRL_CODEC 0x01
19*9c9eff43SAlgea Cao #define CODEC_OFF 0x0d
20*9c9eff43SAlgea Cao #define CTRL_I2C 0x02
21*9c9eff43SAlgea Cao #define I2C_TIMEOUT_PERIOD 0x22
22*9c9eff43SAlgea Cao #define CTRL_TVE 0x03
23*9c9eff43SAlgea Cao #define TVE_OFF 0x00
24*9c9eff43SAlgea Cao
rk1000_ctl_i2c_write(struct rk1000_ctl * rk1000_ctl,u8 reg,u8 val)25*9c9eff43SAlgea Cao int rk1000_ctl_i2c_write(struct rk1000_ctl *rk1000_ctl, u8 reg, u8 val)
26*9c9eff43SAlgea Cao {
27*9c9eff43SAlgea Cao struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_ctl->dev);
28*9c9eff43SAlgea Cao struct i2c_msg msg;
29*9c9eff43SAlgea Cao u8 buf[2];
30*9c9eff43SAlgea Cao int ret;
31*9c9eff43SAlgea Cao
32*9c9eff43SAlgea Cao buf[0] = reg;
33*9c9eff43SAlgea Cao buf[1] = val;
34*9c9eff43SAlgea Cao msg.addr = chip->chip_addr;
35*9c9eff43SAlgea Cao msg.flags = 0;
36*9c9eff43SAlgea Cao msg.len = 2;
37*9c9eff43SAlgea Cao msg.buf = buf;
38*9c9eff43SAlgea Cao
39*9c9eff43SAlgea Cao ret = dm_i2c_xfer(rk1000_ctl->dev, &msg, 1);
40*9c9eff43SAlgea Cao if (ret) {
41*9c9eff43SAlgea Cao dev_err(rk1000_ctl->dev, "rk1000 ctrl i2c write failed: %d\n",
42*9c9eff43SAlgea Cao ret);
43*9c9eff43SAlgea Cao return ret;
44*9c9eff43SAlgea Cao }
45*9c9eff43SAlgea Cao
46*9c9eff43SAlgea Cao return 0;
47*9c9eff43SAlgea Cao }
48*9c9eff43SAlgea Cao
rk1000_ctl_i2c_read(struct rk1000_ctl * rk1000_ctl,u8 reg,u8 * val)49*9c9eff43SAlgea Cao int rk1000_ctl_i2c_read(struct rk1000_ctl *rk1000_ctl, u8 reg, u8 *val)
50*9c9eff43SAlgea Cao {
51*9c9eff43SAlgea Cao struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_ctl->dev);
52*9c9eff43SAlgea Cao u8 data;
53*9c9eff43SAlgea Cao struct i2c_msg msg[] = {
54*9c9eff43SAlgea Cao {
55*9c9eff43SAlgea Cao .addr = chip->chip_addr,
56*9c9eff43SAlgea Cao .flags = 0,
57*9c9eff43SAlgea Cao .buf = (u8 *)®,
58*9c9eff43SAlgea Cao .len = 1,
59*9c9eff43SAlgea Cao }, {
60*9c9eff43SAlgea Cao .addr = chip->chip_addr,
61*9c9eff43SAlgea Cao .flags = I2C_M_RD,
62*9c9eff43SAlgea Cao .buf = (u8 *)&data,
63*9c9eff43SAlgea Cao .len = 1,
64*9c9eff43SAlgea Cao }
65*9c9eff43SAlgea Cao };
66*9c9eff43SAlgea Cao int ret;
67*9c9eff43SAlgea Cao
68*9c9eff43SAlgea Cao ret = dm_i2c_xfer(rk1000_ctl->dev, msg, 2);
69*9c9eff43SAlgea Cao if (ret) {
70*9c9eff43SAlgea Cao dev_err(rk1000_ctl->dev, "rk1000 ctrl i2c read failed: %d\n",
71*9c9eff43SAlgea Cao ret);
72*9c9eff43SAlgea Cao return ret;
73*9c9eff43SAlgea Cao }
74*9c9eff43SAlgea Cao
75*9c9eff43SAlgea Cao *val = data;
76*9c9eff43SAlgea Cao
77*9c9eff43SAlgea Cao return 0;
78*9c9eff43SAlgea Cao }
79*9c9eff43SAlgea Cao
rk1000_ctl_write_block(struct rk1000_ctl * rk1000_ctl,u8 reg,const u8 * buf,u8 len)80*9c9eff43SAlgea Cao int rk1000_ctl_write_block(struct rk1000_ctl *rk1000_ctl,
81*9c9eff43SAlgea Cao u8 reg, const u8 *buf, u8 len)
82*9c9eff43SAlgea Cao {
83*9c9eff43SAlgea Cao int i, ret;
84*9c9eff43SAlgea Cao
85*9c9eff43SAlgea Cao for (i = 0; i < len; i++) {
86*9c9eff43SAlgea Cao ret = rk1000_ctl_i2c_write(rk1000_ctl, reg + i, buf[i]);
87*9c9eff43SAlgea Cao if (ret)
88*9c9eff43SAlgea Cao break;
89*9c9eff43SAlgea Cao }
90*9c9eff43SAlgea Cao
91*9c9eff43SAlgea Cao return ret;
92*9c9eff43SAlgea Cao }
93*9c9eff43SAlgea Cao
rk1000_ctl_probe(struct udevice * dev)94*9c9eff43SAlgea Cao static int rk1000_ctl_probe(struct udevice *dev)
95*9c9eff43SAlgea Cao {
96*9c9eff43SAlgea Cao struct rk1000_ctl *rk1000_ctl = dev_get_priv(dev);
97*9c9eff43SAlgea Cao int ret;
98*9c9eff43SAlgea Cao
99*9c9eff43SAlgea Cao rk1000_ctl->dev = dev;
100*9c9eff43SAlgea Cao
101*9c9eff43SAlgea Cao ret = gpio_request_by_name(dev, "reset-gpios", 0,
102*9c9eff43SAlgea Cao &rk1000_ctl->reset_gpio, GPIOD_IS_OUT);
103*9c9eff43SAlgea Cao if (ret) {
104*9c9eff43SAlgea Cao dev_err(dev, "Cannot get reset GPIO: %d\n", ret);
105*9c9eff43SAlgea Cao return ret;
106*9c9eff43SAlgea Cao }
107*9c9eff43SAlgea Cao
108*9c9eff43SAlgea Cao ret = clk_get_by_name(dev, "mclk", &rk1000_ctl->mclk);
109*9c9eff43SAlgea Cao if (ret < 0) {
110*9c9eff43SAlgea Cao dev_err(dev, "failed to get clkin: %d\n", ret);
111*9c9eff43SAlgea Cao return ret;
112*9c9eff43SAlgea Cao }
113*9c9eff43SAlgea Cao
114*9c9eff43SAlgea Cao clk_enable(&rk1000_ctl->mclk);
115*9c9eff43SAlgea Cao
116*9c9eff43SAlgea Cao pinctrl_select_state(rk1000_ctl->dev, "default");
117*9c9eff43SAlgea Cao
118*9c9eff43SAlgea Cao dm_gpio_set_value(&rk1000_ctl->reset_gpio, 0);
119*9c9eff43SAlgea Cao mdelay(1);
120*9c9eff43SAlgea Cao dm_gpio_set_value(&rk1000_ctl->reset_gpio, 1);
121*9c9eff43SAlgea Cao mdelay(1);
122*9c9eff43SAlgea Cao dm_gpio_set_value(&rk1000_ctl->reset_gpio, 0);
123*9c9eff43SAlgea Cao
124*9c9eff43SAlgea Cao return 0;
125*9c9eff43SAlgea Cao }
126*9c9eff43SAlgea Cao
127*9c9eff43SAlgea Cao static const struct udevice_id rk1000_ctl_of_match[] = {
128*9c9eff43SAlgea Cao { .compatible = "rockchip,rk1000-ctl" },
129*9c9eff43SAlgea Cao {}
130*9c9eff43SAlgea Cao };
131*9c9eff43SAlgea Cao
132*9c9eff43SAlgea Cao U_BOOT_DRIVER(rk1000) = {
133*9c9eff43SAlgea Cao .name = "rk1000_ctl",
134*9c9eff43SAlgea Cao .id = UCLASS_I2C_GENERIC,
135*9c9eff43SAlgea Cao .of_match = rk1000_ctl_of_match,
136*9c9eff43SAlgea Cao .probe = rk1000_ctl_probe,
137*9c9eff43SAlgea Cao .bind = dm_scan_fdt_dev,
138*9c9eff43SAlgea Cao .priv_auto_alloc_size = sizeof(struct rk1000_ctl),
139*9c9eff43SAlgea Cao };
140