xref: /rk3399_rockchip-uboot/drivers/video/drm/max96745.c (revision 52d98d471bc5afa60a5b6f61d0b749fbb6e0f3f2)
1*52d98d47SWyon Bi // SPDX-License-Identifier: GPL-2.0+
2*52d98d47SWyon Bi /*
3*52d98d47SWyon Bi  * (C) Copyright 2022 Rockchip Electronics Co., Ltd
4*52d98d47SWyon Bi  */
5*52d98d47SWyon Bi 
6*52d98d47SWyon Bi #include <common.h>
7*52d98d47SWyon Bi #include <dm.h>
8*52d98d47SWyon Bi #include <errno.h>
9*52d98d47SWyon Bi #include <i2c.h>
10*52d98d47SWyon Bi #include <max96745.h>
11*52d98d47SWyon Bi #include <video_bridge.h>
12*52d98d47SWyon Bi 
13*52d98d47SWyon Bi #include "rockchip_bridge.h"
14*52d98d47SWyon Bi #include "rockchip_display.h"
15*52d98d47SWyon Bi #include "rockchip_panel.h"
16*52d98d47SWyon Bi 
17*52d98d47SWyon Bi static void max96745_bridge_enable(struct rockchip_bridge *bridge)
18*52d98d47SWyon Bi {
19*52d98d47SWyon Bi 	struct udevice *dev = bridge->dev;
20*52d98d47SWyon Bi 
21*52d98d47SWyon Bi 	dm_i2c_reg_clrset(dev->parent, 0x0100, VID_TX_EN,
22*52d98d47SWyon Bi 			  FIELD_PREP(VID_TX_EN, 1));
23*52d98d47SWyon Bi }
24*52d98d47SWyon Bi 
25*52d98d47SWyon Bi static void max96745_bridge_disable(struct rockchip_bridge *bridge)
26*52d98d47SWyon Bi {
27*52d98d47SWyon Bi 	struct udevice *dev = bridge->dev;
28*52d98d47SWyon Bi 
29*52d98d47SWyon Bi 	dm_i2c_reg_clrset(dev->parent, 0x0100, VID_TX_EN,
30*52d98d47SWyon Bi 			  FIELD_PREP(VID_TX_EN, 0));
31*52d98d47SWyon Bi }
32*52d98d47SWyon Bi 
33*52d98d47SWyon Bi static const struct rockchip_bridge_funcs max96745_bridge_funcs = {
34*52d98d47SWyon Bi 	.enable = max96745_bridge_enable,
35*52d98d47SWyon Bi 	.disable = max96745_bridge_disable,
36*52d98d47SWyon Bi };
37*52d98d47SWyon Bi 
38*52d98d47SWyon Bi static int max96745_bridge_probe(struct udevice *dev)
39*52d98d47SWyon Bi {
40*52d98d47SWyon Bi 	struct rockchip_bridge *bridge;
41*52d98d47SWyon Bi 
42*52d98d47SWyon Bi 	dm_i2c_reg_write(dev->parent, 0x7019, 0x00);
43*52d98d47SWyon Bi 	dm_i2c_reg_write(dev->parent, 0x70a0, 0x04);
44*52d98d47SWyon Bi 	dm_i2c_reg_write(dev->parent, 0x7074, 0x14);
45*52d98d47SWyon Bi 	dm_i2c_reg_write(dev->parent, 0x7070, 0x04);
46*52d98d47SWyon Bi 	dm_i2c_reg_write(dev->parent, 0x7000, 0x01);
47*52d98d47SWyon Bi 
48*52d98d47SWyon Bi 	bridge = calloc(1, sizeof(*bridge));
49*52d98d47SWyon Bi 	if (!bridge)
50*52d98d47SWyon Bi 		return -ENOMEM;
51*52d98d47SWyon Bi 
52*52d98d47SWyon Bi 	dev->driver_data = (ulong)bridge;
53*52d98d47SWyon Bi 	bridge->dev = dev;
54*52d98d47SWyon Bi 	bridge->funcs = &max96745_bridge_funcs;
55*52d98d47SWyon Bi 
56*52d98d47SWyon Bi 	return 0;
57*52d98d47SWyon Bi }
58*52d98d47SWyon Bi 
59*52d98d47SWyon Bi static const struct udevice_id max96745_bridge_of_match[] = {
60*52d98d47SWyon Bi 	{ .compatible = "maxim,max96745-bridge", },
61*52d98d47SWyon Bi 	{ }
62*52d98d47SWyon Bi };
63*52d98d47SWyon Bi 
64*52d98d47SWyon Bi U_BOOT_DRIVER(max96745_bridge) = {
65*52d98d47SWyon Bi 	.name = "max96745_bridge",
66*52d98d47SWyon Bi 	.id = UCLASS_VIDEO_BRIDGE,
67*52d98d47SWyon Bi 	.of_match = max96745_bridge_of_match,
68*52d98d47SWyon Bi 	.probe = max96745_bridge_probe,
69*52d98d47SWyon Bi };
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