1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright © 2009 Keith Packard 4 * 5 * Permission to use, copy, modify, distribute, and sell this software and its 6 * documentation for any purpose is hereby granted without fee, provided that 7 * the above copyright notice appear in all copies and that both that copyright 8 * notice and this permission notice appear in supporting documentation, and 9 * that the name of the copyright holders not be used in advertising or 10 * publicity pertaining to distribution of the software without specific, 11 * written prior permission. The copyright holders make no representations 12 * about the suitability of this software for any purpose. It is provided "as 13 * is" without express or implied warranty. 14 * 15 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 16 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 17 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 19 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 20 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE 21 * OF THIS SOFTWARE. 22 */ 23 24 #include <common.h> 25 #include <drm/drm_dp_helper.h> 26 27 /** 28 * DOC: dp helpers 29 * 30 * These functions contain some common logic and helpers at various abstraction 31 * levels to deal with Display Port sink devices and related things like DP aux 32 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD 33 * blocks, ... 34 */ 35 36 /* Helpers for DP link training */ 37 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) 38 { 39 return link_status[r - DP_LANE0_1_STATUS]; 40 } 41 42 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], 43 int lane) 44 { 45 int i = DP_LANE0_1_STATUS + (lane >> 1); 46 int s = (lane & 1) * 4; 47 u8 l = dp_link_status(link_status, i); 48 49 return (l >> s) & 0xf; 50 } 51 52 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 53 int lane_count) 54 { 55 u8 lane_align; 56 u8 lane_status; 57 int lane; 58 59 lane_align = dp_link_status(link_status, 60 DP_LANE_ALIGN_STATUS_UPDATED); 61 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0) 62 return false; 63 for (lane = 0; lane < lane_count; lane++) { 64 lane_status = dp_get_lane_status(link_status, lane); 65 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS) 66 return false; 67 } 68 return true; 69 } 70 71 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 72 int lane_count) 73 { 74 int lane; 75 u8 lane_status; 76 77 for (lane = 0; lane < lane_count; lane++) { 78 lane_status = dp_get_lane_status(link_status, lane); 79 if ((lane_status & DP_LANE_CR_DONE) == 0) 80 return false; 81 } 82 return true; 83 } 84 85 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], 86 int lane) 87 { 88 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 89 int s = ((lane & 1) ? 90 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : 91 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT); 92 u8 l = dp_link_status(link_status, i); 93 94 return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT; 95 } 96 97 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], 98 int lane) 99 { 100 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 101 int s = ((lane & 1) ? 102 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT : 103 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT); 104 u8 l = dp_link_status(link_status, i); 105 106 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT; 107 } 108 109 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) 110 { 111 int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & 112 DP_TRAINING_AUX_RD_MASK; 113 114 if (rd_interval > 4) 115 printf("AUX interval %d, out of range (max 4)\n", rd_interval); 116 117 if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) 118 udelay(100); 119 else 120 mdelay(rd_interval * 4); 121 } 122 123 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) 124 { 125 int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & 126 DP_TRAINING_AUX_RD_MASK; 127 128 if (rd_interval > 4) 129 printf("AUX interval %d, out of range (max 4)\n", rd_interval); 130 131 if (rd_interval == 0) 132 udelay(400); 133 else 134 mdelay(rd_interval * 4); 135 } 136 137 u8 drm_dp_link_rate_to_bw_code(int link_rate) 138 { 139 switch (link_rate) { 140 default: 141 WARN(1, "unknown DP link rate %d, using %x\n", link_rate, 142 DP_LINK_BW_1_62); 143 case 162000: 144 return DP_LINK_BW_1_62; 145 case 270000: 146 return DP_LINK_BW_2_7; 147 case 540000: 148 return DP_LINK_BW_5_4; 149 case 810000: 150 return DP_LINK_BW_8_1; 151 } 152 } 153 154 int drm_dp_bw_code_to_link_rate(u8 link_bw) 155 { 156 switch (link_bw) { 157 default: 158 WARN(1, "unknown DP link BW code %x, using 162000\n", link_bw); 159 case DP_LINK_BW_1_62: 160 return 162000; 161 case DP_LINK_BW_2_7: 162 return 270000; 163 case DP_LINK_BW_5_4: 164 return 540000; 165 case DP_LINK_BW_8_1: 166 return 810000; 167 } 168 } 169