xref: /rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/maxim-max96755.c (revision cdfefc99d4a0f920a2df8ecf7d104daced0f5586)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * maxim-max96755.c  --  I2C register interface access for max96755 serdes chip
4  *
5  * Copyright (c) 2023-2028 Rockchip Electronics Co. Ltd.
6  *
7  * Author: luowei <lw@rock-chips.com>
8  */
9 #include <serdes-display-core.h>
10 #include "maxim-max96755.h"
11 
12 int max96755_bridge_init(struct serdes *serdes)
13 {
14 	return 0;
15 }
16 
17 static bool max96755_bridge_detect(struct serdes *serdes)
18 {
19 	u32 val;
20 
21 	if (dm_gpio_is_valid(&serdes->lock_gpio)) {
22 		if (!dm_gpio_get_value(&serdes->lock_gpio))
23 			return false;
24 	}
25 
26 	if (serdes_reg_read(serdes, 0x0013, &val))
27 		return false;
28 
29 	if (!FIELD_GET(LOCKED, val))
30 		return false;
31 
32 	return true;
33 }
34 
35 static int max96755_bridge_enable(struct serdes *serdes)
36 {
37 	int ret = 0;
38 
39 	SERDES_DBG_CHIP("%s: serdes chip %s ret=%d\n",
40 			__func__, serdes->chip_data->name, ret);
41 	return ret;
42 }
43 
44 static int max96755_bridge_disable(struct serdes *serdes)
45 {
46 	int ret = 0;
47 
48 	ret = serdes_set_bits(serdes, 0x0002, VID_TX_EN_X,
49 			      FIELD_PREP(VID_TX_EN_X, 0));
50 
51 	return ret;
52 }
53 
54 static struct serdes_chip_bridge_ops max96755_bridge_ops = {
55 	.init	= max96755_bridge_init,
56 	.detect	= max96755_bridge_detect,
57 	.enable	= max96755_bridge_enable,
58 	.disable	= max96755_bridge_disable,
59 };
60 
61 struct serdes_chip_data serdes_max96755_data = {
62 	.name		= "max96755",
63 	.serdes_type	= TYPE_SER,
64 	.serdes_id	= MAXIM_ID_MAX96755,
65 	.bridge_ops	= &max96755_bridge_ops,
66 };
67 EXPORT_SYMBOL_GPL(serdes_max96755_data);
68