xref: /rk3399_rockchip-uboot/drivers/video/da8xx-fb.h (revision 0017f9ee066f8049733ec4d5aacd97dd0cf4e2ec)
1*0017f9eeSHeiko Schocher /*
2*0017f9eeSHeiko Schocher  * Porting to u-boot:
3*0017f9eeSHeiko Schocher  *
4*0017f9eeSHeiko Schocher  * (C) Copyright 2011
5*0017f9eeSHeiko Schocher  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
6*0017f9eeSHeiko Schocher  *
7*0017f9eeSHeiko Schocher  * Copyright (C) 2008-2009 MontaVista Software Inc.
8*0017f9eeSHeiko Schocher  * Copyright (C) 2008-2009 Texas Instruments Inc
9*0017f9eeSHeiko Schocher  *
10*0017f9eeSHeiko Schocher  * Based on the LCD driver for TI Avalanche processors written by
11*0017f9eeSHeiko Schocher  * Ajay Singh and Shalom Hai.
12*0017f9eeSHeiko Schocher  *
13*0017f9eeSHeiko Schocher  * SPDX-License-Identifier:	GPL-2.0+
14*0017f9eeSHeiko Schocher  */
15*0017f9eeSHeiko Schocher 
16*0017f9eeSHeiko Schocher #ifndef DA8XX_FB_H
17*0017f9eeSHeiko Schocher #define DA8XX_FB_H
18*0017f9eeSHeiko Schocher 
19*0017f9eeSHeiko Schocher enum panel_type {
20*0017f9eeSHeiko Schocher 	QVGA = 0,
21*0017f9eeSHeiko Schocher 	WVGA
22*0017f9eeSHeiko Schocher };
23*0017f9eeSHeiko Schocher 
24*0017f9eeSHeiko Schocher enum panel_shade {
25*0017f9eeSHeiko Schocher 	MONOCHROME = 0,
26*0017f9eeSHeiko Schocher 	COLOR_ACTIVE,
27*0017f9eeSHeiko Schocher 	COLOR_PASSIVE,
28*0017f9eeSHeiko Schocher };
29*0017f9eeSHeiko Schocher 
30*0017f9eeSHeiko Schocher enum raster_load_mode {
31*0017f9eeSHeiko Schocher 	LOAD_DATA = 1,
32*0017f9eeSHeiko Schocher 	LOAD_PALETTE,
33*0017f9eeSHeiko Schocher };
34*0017f9eeSHeiko Schocher 
35*0017f9eeSHeiko Schocher struct display_panel {
36*0017f9eeSHeiko Schocher 	enum panel_type panel_type; /* QVGA */
37*0017f9eeSHeiko Schocher 	int max_bpp;
38*0017f9eeSHeiko Schocher 	int min_bpp;
39*0017f9eeSHeiko Schocher 	enum panel_shade panel_shade;
40*0017f9eeSHeiko Schocher };
41*0017f9eeSHeiko Schocher 
42*0017f9eeSHeiko Schocher struct da8xx_panel {
43*0017f9eeSHeiko Schocher 	const char	name[25];	/* Full name <vendor>_<model> */
44*0017f9eeSHeiko Schocher 	unsigned short	width;
45*0017f9eeSHeiko Schocher 	unsigned short	height;
46*0017f9eeSHeiko Schocher 	int		hfp;		/* Horizontal front porch */
47*0017f9eeSHeiko Schocher 	int		hbp;		/* Horizontal back porch */
48*0017f9eeSHeiko Schocher 	int		hsw;		/* Horizontal Sync Pulse Width */
49*0017f9eeSHeiko Schocher 	int		vfp;		/* Vertical front porch */
50*0017f9eeSHeiko Schocher 	int		vbp;		/* Vertical back porch */
51*0017f9eeSHeiko Schocher 	int		vsw;		/* Vertical Sync Pulse Width */
52*0017f9eeSHeiko Schocher 	unsigned int	pxl_clk;	/* Pixel clock */
53*0017f9eeSHeiko Schocher 	unsigned char	invert_pxl_clk;	/* Invert Pixel clock */
54*0017f9eeSHeiko Schocher };
55*0017f9eeSHeiko Schocher 
56*0017f9eeSHeiko Schocher struct da8xx_lcdc_platform_data {
57*0017f9eeSHeiko Schocher 	const char manu_name[10];
58*0017f9eeSHeiko Schocher 	void *controller_data;
59*0017f9eeSHeiko Schocher 	const char type[25];
60*0017f9eeSHeiko Schocher 	void (*panel_power_ctrl)(int);
61*0017f9eeSHeiko Schocher };
62*0017f9eeSHeiko Schocher 
63*0017f9eeSHeiko Schocher struct lcd_ctrl_config {
64*0017f9eeSHeiko Schocher 	const struct display_panel *p_disp_panel;
65*0017f9eeSHeiko Schocher 
66*0017f9eeSHeiko Schocher 	/* AC Bias Pin Frequency */
67*0017f9eeSHeiko Schocher 	int ac_bias;
68*0017f9eeSHeiko Schocher 
69*0017f9eeSHeiko Schocher 	/* AC Bias Pin Transitions per Interrupt */
70*0017f9eeSHeiko Schocher 	int ac_bias_intrpt;
71*0017f9eeSHeiko Schocher 
72*0017f9eeSHeiko Schocher 	/* DMA burst size */
73*0017f9eeSHeiko Schocher 	int dma_burst_sz;
74*0017f9eeSHeiko Schocher 
75*0017f9eeSHeiko Schocher 	/* Bits per pixel */
76*0017f9eeSHeiko Schocher 	int bpp;
77*0017f9eeSHeiko Schocher 
78*0017f9eeSHeiko Schocher 	/* FIFO DMA Request Delay */
79*0017f9eeSHeiko Schocher 	int fdd;
80*0017f9eeSHeiko Schocher 
81*0017f9eeSHeiko Schocher 	/* TFT Alternative Signal Mapping (Only for active) */
82*0017f9eeSHeiko Schocher 	unsigned char tft_alt_mode;
83*0017f9eeSHeiko Schocher 
84*0017f9eeSHeiko Schocher 	/* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
85*0017f9eeSHeiko Schocher 	unsigned char stn_565_mode;
86*0017f9eeSHeiko Schocher 
87*0017f9eeSHeiko Schocher 	/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
88*0017f9eeSHeiko Schocher 	unsigned char mono_8bit_mode;
89*0017f9eeSHeiko Schocher 
90*0017f9eeSHeiko Schocher 	/* Invert line clock */
91*0017f9eeSHeiko Schocher 	unsigned char invert_line_clock;
92*0017f9eeSHeiko Schocher 
93*0017f9eeSHeiko Schocher 	/* Invert frame clock  */
94*0017f9eeSHeiko Schocher 	unsigned char invert_frm_clock;
95*0017f9eeSHeiko Schocher 
96*0017f9eeSHeiko Schocher 	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
97*0017f9eeSHeiko Schocher 	unsigned char sync_edge;
98*0017f9eeSHeiko Schocher 
99*0017f9eeSHeiko Schocher 	/* Horizontal and Vertical Sync: Control: 0=ignore */
100*0017f9eeSHeiko Schocher 	unsigned char sync_ctrl;
101*0017f9eeSHeiko Schocher 
102*0017f9eeSHeiko Schocher 	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
103*0017f9eeSHeiko Schocher 	unsigned char raster_order;
104*0017f9eeSHeiko Schocher };
105*0017f9eeSHeiko Schocher 
106*0017f9eeSHeiko Schocher struct lcd_sync_arg {
107*0017f9eeSHeiko Schocher 	int back_porch;
108*0017f9eeSHeiko Schocher 	int front_porch;
109*0017f9eeSHeiko Schocher 	int pulse_width;
110*0017f9eeSHeiko Schocher };
111*0017f9eeSHeiko Schocher 
112*0017f9eeSHeiko Schocher void da8xx_video_init(const struct da8xx_panel *panel, int bits_pixel);
113*0017f9eeSHeiko Schocher 
114*0017f9eeSHeiko Schocher #endif  /* ifndef DA8XX_FB_H */
115