1f298e4b6STom Rix /* 2f298e4b6STom Rix * Copyright (c) 2009 Wind River Systems, Inc. 3f298e4b6STom Rix * Tom Rix <Tom.Rix@windriver.com> 4f298e4b6STom Rix * 5f298e4b6STom Rix * This is file is based on 6f298e4b6STom Rix * repository git.gitorious.org/u-boot-omap3/mainline.git, 7f298e4b6STom Rix * branch omap3-dev-usb, file drivers/usb/host/omap3530_usb.c 8f298e4b6STom Rix * 9f298e4b6STom Rix * This is the unique part of its copyright : 10f298e4b6STom Rix * 11f298e4b6STom Rix * ------------------------------------------------------------------------ 12f298e4b6STom Rix * 13f298e4b6STom Rix * Copyright (c) 2009 Texas Instruments 14f298e4b6STom Rix * 15f298e4b6STom Rix * ------------------------------------------------------------------------ 16f298e4b6STom Rix * 17f298e4b6STom Rix * This program is free software; you can redistribute it and/or 18f298e4b6STom Rix * modify it under the terms of the GNU General Public License as 19f298e4b6STom Rix * published by the Free Software Foundation; either version 2 of 20f298e4b6STom Rix * the License, or (at your option) any later version. 21f298e4b6STom Rix * 22f298e4b6STom Rix * This program is distributed in the hope that it will be useful, 23f298e4b6STom Rix * but WITHOUT ANY WARRANTY; without even the implied warranty of 24f298e4b6STom Rix * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25f298e4b6STom Rix * GNU General Public License for more details. 26f298e4b6STom Rix * 27f298e4b6STom Rix * You should have received a copy of the GNU General Public License 28f298e4b6STom Rix * along with this program; if not, write to the Free Software 29f298e4b6STom Rix * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30f298e4b6STom Rix * MA 02111-1307 USA 31f298e4b6STom Rix */ 32f298e4b6STom Rix 33f298e4b6STom Rix #include <twl4030.h> 34f298e4b6STom Rix #include "omap3.h" 35f298e4b6STom Rix 36f298e4b6STom Rix static int platform_needs_initialization = 1; 37f298e4b6STom Rix 38f298e4b6STom Rix struct musb_config musb_cfg = { 39f298e4b6STom Rix (struct musb_regs *)MENTOR_USB0_BASE, 40f298e4b6STom Rix OMAP3_USB_TIMEOUT, 41f298e4b6STom Rix 0 42f298e4b6STom Rix }; 43f298e4b6STom Rix 44f298e4b6STom Rix /* 45f298e4b6STom Rix * OMAP3 USB OTG registers. 46f298e4b6STom Rix */ 47f298e4b6STom Rix struct omap3_otg_regs { 48f298e4b6STom Rix u32 revision; 49f298e4b6STom Rix u32 sysconfig; 50f298e4b6STom Rix u32 sysstatus; 51f298e4b6STom Rix u32 interfsel; 52f298e4b6STom Rix u32 simenable; 53f298e4b6STom Rix u32 forcestdby; 54f298e4b6STom Rix }; 55f298e4b6STom Rix 56f298e4b6STom Rix static struct omap3_otg_regs *otg; 57f298e4b6STom Rix 58f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_SMART_STANDBY_MODE 0x2000 59f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_NO_STANDBY_MODE 0x1000 60f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_SMART_IDLE_MODE 0x0010 61f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_NO_IDLE_MODE 0x0008 62f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_ENABLEWAKEUP 0x0004 63f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_SOFTRESET 0x0002 64f298e4b6STom Rix #define OMAP3_OTG_SYSCONFIG_AUTOIDLE 0x0001 65f298e4b6STom Rix 66f298e4b6STom Rix #define OMAP3_OTG_SYSSTATUS_RESETDONE 0x0001 67f298e4b6STom Rix 68f298e4b6STom Rix #define OMAP3_OTG_INTERFSEL_OMAP 0x0001 69f298e4b6STom Rix 70f298e4b6STom Rix #define OMAP3_OTG_FORCESTDBY_STANDBY 0x0001 71f298e4b6STom Rix 72f298e4b6STom Rix 73f298e4b6STom Rix #ifdef DEBUG_MUSB_OMAP3 74f298e4b6STom Rix static void musb_db_otg_regs(void) 75f298e4b6STom Rix { 76f298e4b6STom Rix u32 l; 77f298e4b6STom Rix l = readl(&otg->revision); 78f298e4b6STom Rix serial_printf("OTG_REVISION 0x%x\n", l); 79f298e4b6STom Rix l = readl(&otg->sysconfig); 80f298e4b6STom Rix serial_printf("OTG_SYSCONFIG 0x%x\n", l); 81f298e4b6STom Rix l = readl(&otg->sysstatus); 82f298e4b6STom Rix serial_printf("OTG_SYSSTATUS 0x%x\n", l); 83f298e4b6STom Rix l = readl(&otg->interfsel); 84f298e4b6STom Rix serial_printf("OTG_INTERFSEL 0x%x\n", l); 85f298e4b6STom Rix l = readl(&otg->forcestdby); 86f298e4b6STom Rix serial_printf("OTG_FORCESTDBY 0x%x\n", l); 87f298e4b6STom Rix } 88f298e4b6STom Rix #endif 89f298e4b6STom Rix 90f298e4b6STom Rix int musb_platform_init(void) 91f298e4b6STom Rix { 92f298e4b6STom Rix int ret = -1; 93f298e4b6STom Rix 94f298e4b6STom Rix if (platform_needs_initialization) { 95f298e4b6STom Rix u32 stdby; 96f298e4b6STom Rix 97*ae4caf2fSTom Rix /* 98*ae4caf2fSTom Rix * OMAP3EVM uses ISP1504 phy and so 99*ae4caf2fSTom Rix * twl4030 related init is not required. 100*ae4caf2fSTom Rix */ 101*ae4caf2fSTom Rix #ifdef CONFIG_TWL4030_USB 102f298e4b6STom Rix if (twl4030_usb_ulpi_init()) { 103f298e4b6STom Rix serial_printf("ERROR: %s Could not initialize PHY\n", 104f298e4b6STom Rix __PRETTY_FUNCTION__); 105f298e4b6STom Rix goto end; 106f298e4b6STom Rix } 107*ae4caf2fSTom Rix #endif 108f298e4b6STom Rix otg = (struct omap3_otg_regs *)OMAP3_OTG_BASE; 109f298e4b6STom Rix 110f298e4b6STom Rix /* Set OTG to always be on */ 111f298e4b6STom Rix writel(OMAP3_OTG_SYSCONFIG_NO_STANDBY_MODE | 112f298e4b6STom Rix OMAP3_OTG_SYSCONFIG_NO_IDLE_MODE, &otg->sysconfig); 113f298e4b6STom Rix 114f298e4b6STom Rix /* Set the interface */ 115f298e4b6STom Rix writel(OMAP3_OTG_INTERFSEL_OMAP, &otg->interfsel); 116f298e4b6STom Rix 117f298e4b6STom Rix /* Clear force standby */ 118f298e4b6STom Rix stdby = readl(&otg->forcestdby); 119f298e4b6STom Rix stdby &= ~OMAP3_OTG_FORCESTDBY_STANDBY; 120f298e4b6STom Rix writel(stdby, &otg->forcestdby); 121f298e4b6STom Rix 122f298e4b6STom Rix platform_needs_initialization = 0; 123f298e4b6STom Rix } 124f298e4b6STom Rix 125f298e4b6STom Rix ret = platform_needs_initialization; 126f298e4b6STom Rix end: 127f298e4b6STom Rix return ret; 128f298e4b6STom Rix 129f298e4b6STom Rix } 130f298e4b6STom Rix 131f298e4b6STom Rix void musb_platform_deinit(void) 132f298e4b6STom Rix { 133f298e4b6STom Rix /* noop */ 134f298e4b6STom Rix } 135