xref: /rk3399_rockchip-uboot/drivers/usb/musb-new/omap2430.h (revision 27754d18fc1b5a5c6a6e86ababf44b382a6dc7d9)
1673a524bSIlya Yanok /*
2673a524bSIlya Yanok  * Copyright (C) 2005-2006 by Texas Instruments
3673a524bSIlya Yanok  *
45b8031ccSTom Rini  * SPDX-License-Identifier:	GPL-2.0
5673a524bSIlya Yanok  */
6673a524bSIlya Yanok 
7673a524bSIlya Yanok #ifndef __MUSB_OMAP243X_H__
8673a524bSIlya Yanok #define __MUSB_OMAP243X_H__
9673a524bSIlya Yanok 
10673a524bSIlya Yanok #ifndef __UBOOT__
11673a524bSIlya Yanok #include <plat/usb.h>
12673a524bSIlya Yanok #else
13673a524bSIlya Yanok #undef RESETDONE
14673a524bSIlya Yanok #endif
15673a524bSIlya Yanok 
16673a524bSIlya Yanok /*
17673a524bSIlya Yanok  * OMAP2430-specific definitions
18673a524bSIlya Yanok  */
19673a524bSIlya Yanok 
20673a524bSIlya Yanok #define OTG_REVISION		0x400
21673a524bSIlya Yanok 
22673a524bSIlya Yanok #define OTG_SYSCONFIG		0x404
23673a524bSIlya Yanok #	define	MIDLEMODE	12	/* bit position */
24673a524bSIlya Yanok #	define	FORCESTDBY		(0 << MIDLEMODE)
25673a524bSIlya Yanok #	define	NOSTDBY			(1 << MIDLEMODE)
26673a524bSIlya Yanok #	define	SMARTSTDBY		(2 << MIDLEMODE)
27673a524bSIlya Yanok 
28673a524bSIlya Yanok #	define	SIDLEMODE		3	/* bit position */
29673a524bSIlya Yanok #	define	FORCEIDLE		(0 << SIDLEMODE)
30673a524bSIlya Yanok #	define	NOIDLE			(1 << SIDLEMODE)
31673a524bSIlya Yanok #	define	SMARTIDLE		(2 << SIDLEMODE)
32673a524bSIlya Yanok 
33673a524bSIlya Yanok #	define	ENABLEWAKEUP		(1 << 2)
34673a524bSIlya Yanok #	define	SOFTRST			(1 << 1)
35673a524bSIlya Yanok #	define	AUTOIDLE		(1 << 0)
36673a524bSIlya Yanok 
37673a524bSIlya Yanok #define OTG_SYSSTATUS		0x408
38673a524bSIlya Yanok #	define	RESETDONE		(1 << 0)
39673a524bSIlya Yanok 
40673a524bSIlya Yanok #define OTG_INTERFSEL		0x40c
41673a524bSIlya Yanok #	define	EXTCP			(1 << 2)
42673a524bSIlya Yanok #	define	PHYSEL			0	/* bit position */
43673a524bSIlya Yanok #	define	UTMI_8BIT		(0 << PHYSEL)
44673a524bSIlya Yanok #	define	ULPI_12PIN		(1 << PHYSEL)
45673a524bSIlya Yanok #	define	ULPI_8PIN		(2 << PHYSEL)
46673a524bSIlya Yanok 
47673a524bSIlya Yanok #define OTG_SIMENABLE		0x410
48673a524bSIlya Yanok #	define	TM1			(1 << 0)
49673a524bSIlya Yanok 
50673a524bSIlya Yanok #define OTG_FORCESTDBY		0x414
51673a524bSIlya Yanok #	define	ENABLEFORCE		(1 << 0)
52673a524bSIlya Yanok 
53*27754d18SPaul Kocialkowski /*
54*27754d18SPaul Kocialkowski  * OMAP4-specific definitions
55*27754d18SPaul Kocialkowski  */
56*27754d18SPaul Kocialkowski 
57*27754d18SPaul Kocialkowski #define USBOTGHS_CONTROL_AVALID		(1 << 0)
58*27754d18SPaul Kocialkowski #define USBOTGHS_CONTROL_VBUSVALID	(1 << 2)
59*27754d18SPaul Kocialkowski #define USBOTGHS_CONTROL_IDDIG		(1 << 4)
60*27754d18SPaul Kocialkowski 
61673a524bSIlya Yanok #endif	/* __MUSB_OMAP243X_H__ */
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