xref: /rk3399_rockchip-uboot/drivers/usb/host/xhci-pci.c (revision 1a4f6af8bfd44c8ae6e87a81ff125eed47042cc5)
1316328f5SSimon Glass /*
2316328f5SSimon Glass  * Copyright (c) 2015, Google, Inc
3316328f5SSimon Glass  * Written by Simon Glass <sjg@chromium.org>
4316328f5SSimon Glass  * All rights reserved.
5316328f5SSimon Glass  *
6316328f5SSimon Glass  * SPDX-License-Identifier:	GPL-2.0
7316328f5SSimon Glass  */
8316328f5SSimon Glass 
9316328f5SSimon Glass #include <common.h>
10555a3472SStefan Roese #include <dm.h>
11316328f5SSimon Glass #include <pci.h>
12316328f5SSimon Glass #include <usb.h>
13*143fc13bSJean-Jacques Hiblot #include <usb/xhci.h>
14316328f5SSimon Glass 
xhci_pci_init(struct udevice * dev,struct xhci_hccr ** ret_hccr,struct xhci_hcor ** ret_hcor)15555a3472SStefan Roese static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
16555a3472SStefan Roese 			  struct xhci_hcor **ret_hcor)
17555a3472SStefan Roese {
18555a3472SStefan Roese 	struct xhci_hccr *hccr;
19555a3472SStefan Roese 	struct xhci_hcor *hcor;
20555a3472SStefan Roese 	u32 cmd;
21555a3472SStefan Roese 
22555a3472SStefan Roese 	hccr = (struct xhci_hccr *)dm_pci_map_bar(dev,
23555a3472SStefan Roese 			PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
24555a3472SStefan Roese 	hcor = (struct xhci_hcor *)((uintptr_t) hccr +
25555a3472SStefan Roese 			HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
26555a3472SStefan Roese 
274cdd770bSBin Meng 	debug("XHCI-PCI init hccr %p and hcor %p hc_length %d\n",
284cdd770bSBin Meng 	      hccr, hcor, (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
29555a3472SStefan Roese 
30555a3472SStefan Roese 	*ret_hccr = hccr;
31555a3472SStefan Roese 	*ret_hcor = hcor;
32555a3472SStefan Roese 
33555a3472SStefan Roese 	/* enable busmaster */
34555a3472SStefan Roese 	dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
35555a3472SStefan Roese 	cmd |= PCI_COMMAND_MASTER;
36555a3472SStefan Roese 	dm_pci_write_config32(dev, PCI_COMMAND, cmd);
37555a3472SStefan Roese }
38555a3472SStefan Roese 
xhci_pci_probe(struct udevice * dev)39555a3472SStefan Roese static int xhci_pci_probe(struct udevice *dev)
40555a3472SStefan Roese {
41555a3472SStefan Roese 	struct xhci_hccr *hccr;
42555a3472SStefan Roese 	struct xhci_hcor *hcor;
43555a3472SStefan Roese 
44555a3472SStefan Roese 	xhci_pci_init(dev, &hccr, &hcor);
45555a3472SStefan Roese 
46555a3472SStefan Roese 	return xhci_register(dev, hccr, hcor);
47555a3472SStefan Roese }
48555a3472SStefan Roese 
49555a3472SStefan Roese static const struct udevice_id xhci_pci_ids[] = {
50555a3472SStefan Roese 	{ .compatible = "xhci-pci" },
51555a3472SStefan Roese 	{ }
52555a3472SStefan Roese };
53555a3472SStefan Roese 
54555a3472SStefan Roese U_BOOT_DRIVER(xhci_pci) = {
55555a3472SStefan Roese 	.name	= "xhci_pci",
56555a3472SStefan Roese 	.id	= UCLASS_USB,
57555a3472SStefan Roese 	.probe = xhci_pci_probe,
585e941943SBin Meng 	.remove = xhci_deregister,
59555a3472SStefan Roese 	.of_match = xhci_pci_ids,
60555a3472SStefan Roese 	.ops	= &xhci_usb_ops,
61555a3472SStefan Roese 	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
625e941943SBin Meng 	.priv_auto_alloc_size = sizeof(struct xhci_ctrl),
63555a3472SStefan Roese 	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
64555a3472SStefan Roese };
65555a3472SStefan Roese 
66555a3472SStefan Roese static struct pci_device_id xhci_pci_supported[] = {
67555a3472SStefan Roese 	{ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) },
68555a3472SStefan Roese 	{},
69555a3472SStefan Roese };
70555a3472SStefan Roese 
71555a3472SStefan Roese U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);
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