1*732c7c24SAjay Bhargav /* 2*732c7c24SAjay Bhargav * (C) Copyright 2012 3*732c7c24SAjay Bhargav * eInfochips Ltd. <www.einfochips.com> 4*732c7c24SAjay Bhargav * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com> 5*732c7c24SAjay Bhargav * 6*732c7c24SAjay Bhargav * (C) Copyright 2009 7*732c7c24SAjay Bhargav * Marvell Semiconductor <www.marvell.com> 8*732c7c24SAjay Bhargav * 9*732c7c24SAjay Bhargav * See file CREDITS for list of people who contributed to this 10*732c7c24SAjay Bhargav * project. 11*732c7c24SAjay Bhargav * 12*732c7c24SAjay Bhargav * This program is free software; you can redistribute it and/or 13*732c7c24SAjay Bhargav * modify it under the terms of the GNU General Public License as 14*732c7c24SAjay Bhargav * published by the Free Software Foundation; either version 2 of 15*732c7c24SAjay Bhargav * the License, or (at your option) any later version. 16*732c7c24SAjay Bhargav * 17*732c7c24SAjay Bhargav * This program is distributed in the hope that it will be useful, 18*732c7c24SAjay Bhargav * but WITHOUT ANY WARRANTY; without even the implied warranty of 19*732c7c24SAjay Bhargav * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20*732c7c24SAjay Bhargav * GNU General Public License for more details. 21*732c7c24SAjay Bhargav * 22*732c7c24SAjay Bhargav * You should have received a copy of the GNU General Public License 23*732c7c24SAjay Bhargav * along with this program; if not, write to the Free Software 24*732c7c24SAjay Bhargav * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 25*732c7c24SAjay Bhargav * MA 02110-1301 USA 26*732c7c24SAjay Bhargav */ 27*732c7c24SAjay Bhargav 28*732c7c24SAjay Bhargav #include <common.h> 29*732c7c24SAjay Bhargav #include <asm/io.h> 30*732c7c24SAjay Bhargav #include <usb.h> 31*732c7c24SAjay Bhargav #include <asm/arch/cpu.h> 32*732c7c24SAjay Bhargav #include <asm/arch/armada100.h> 33*732c7c24SAjay Bhargav #include <asm/arch/utmi-armada100.h> 34*732c7c24SAjay Bhargav 35*732c7c24SAjay Bhargav static int utmi_phy_init(void) 36*732c7c24SAjay Bhargav { 37*732c7c24SAjay Bhargav struct armd1usb_phy_reg *phy_regs = 38*732c7c24SAjay Bhargav (struct armd1usb_phy_reg *)UTMI_PHY_BASE; 39*732c7c24SAjay Bhargav int timeout; 40*732c7c24SAjay Bhargav 41*732c7c24SAjay Bhargav setbits_le32(&phy_regs->utmi_ctrl, INPKT_DELAY_SOF | PLL_PWR_UP); 42*732c7c24SAjay Bhargav udelay(1000); 43*732c7c24SAjay Bhargav setbits_le32(&phy_regs->utmi_ctrl, PHY_PWR_UP); 44*732c7c24SAjay Bhargav 45*732c7c24SAjay Bhargav clrbits_le32(&phy_regs->utmi_pll, PLL_FBDIV_MASK | PLL_REFDIV_MASK); 46*732c7c24SAjay Bhargav setbits_le32(&phy_regs->utmi_pll, N_DIVIDER << PLL_FBDIV | M_DIVIDER); 47*732c7c24SAjay Bhargav 48*732c7c24SAjay Bhargav setbits_le32(&phy_regs->utmi_tx, PHSEL_VAL << CK60_PHSEL); 49*732c7c24SAjay Bhargav 50*732c7c24SAjay Bhargav /* Calibrate pll */ 51*732c7c24SAjay Bhargav timeout = 10000; 52*732c7c24SAjay Bhargav while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) 53*732c7c24SAjay Bhargav ; 54*732c7c24SAjay Bhargav if (!timeout) 55*732c7c24SAjay Bhargav return -1; 56*732c7c24SAjay Bhargav 57*732c7c24SAjay Bhargav udelay(200); 58*732c7c24SAjay Bhargav setbits_le32(&phy_regs->utmi_pll, VCOCAL_START); 59*732c7c24SAjay Bhargav udelay(400); 60*732c7c24SAjay Bhargav clrbits_le32(&phy_regs->utmi_pll, VCOCAL_START); 61*732c7c24SAjay Bhargav 62*732c7c24SAjay Bhargav udelay(200); 63*732c7c24SAjay Bhargav setbits_le32(&phy_regs->utmi_tx, RCAL_START); 64*732c7c24SAjay Bhargav udelay(400); 65*732c7c24SAjay Bhargav clrbits_le32(&phy_regs->utmi_tx, RCAL_START); 66*732c7c24SAjay Bhargav 67*732c7c24SAjay Bhargav timeout = 10000; 68*732c7c24SAjay Bhargav while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) 69*732c7c24SAjay Bhargav ; 70*732c7c24SAjay Bhargav if (!timeout) 71*732c7c24SAjay Bhargav return -1; 72*732c7c24SAjay Bhargav 73*732c7c24SAjay Bhargav return 0; 74*732c7c24SAjay Bhargav } 75*732c7c24SAjay Bhargav 76*732c7c24SAjay Bhargav /* 77*732c7c24SAjay Bhargav * Initialize USB host controller's UTMI Physical interface 78*732c7c24SAjay Bhargav */ 79*732c7c24SAjay Bhargav int utmi_init(void) 80*732c7c24SAjay Bhargav { 81*732c7c24SAjay Bhargav struct armd1mpmu_registers *mpmu_regs = 82*732c7c24SAjay Bhargav (struct armd1mpmu_registers *)ARMD1_MPMU_BASE; 83*732c7c24SAjay Bhargav 84*732c7c24SAjay Bhargav struct armd1apmu_registers *apmu_regs = 85*732c7c24SAjay Bhargav (struct armd1apmu_registers *)ARMD1_APMU_BASE; 86*732c7c24SAjay Bhargav 87*732c7c24SAjay Bhargav /* Turn on 26Mhz ref clock for UTMI PLL */ 88*732c7c24SAjay Bhargav setbits_le32(&mpmu_regs->acgr, APB2_26M_EN | AP_26M); 89*732c7c24SAjay Bhargav 90*732c7c24SAjay Bhargav /* USB Clock reset */ 91*732c7c24SAjay Bhargav writel(USB_SPH_AXICLK_EN, &apmu_regs->usbcrc); 92*732c7c24SAjay Bhargav writel(USB_SPH_AXICLK_EN | USB_SPH_AXI_RST, &apmu_regs->usbcrc); 93*732c7c24SAjay Bhargav 94*732c7c24SAjay Bhargav /* Initialize UTMI transceiver */ 95*732c7c24SAjay Bhargav return utmi_phy_init(); 96*732c7c24SAjay Bhargav } 97