1 /* 2 * Sunxi ehci glue 3 * 4 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com> 5 * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com> 6 * 7 * Based on code from 8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <asm/arch/clock.h> 15 #include <asm/arch/usb_phy.h> 16 #include <asm/io.h> 17 #include <dm.h> 18 #include "ehci.h" 19 20 #ifdef CONFIG_SUNXI_GEN_SUN4I 21 #define BASE_DIST 0x8000 22 #define AHB_CLK_DIST 2 23 #else 24 #define BASE_DIST 0x1000 25 #define AHB_CLK_DIST 1 26 #endif 27 28 struct ehci_sunxi_priv { 29 struct ehci_ctrl ehci; 30 struct sunxi_ccm_reg *ccm; 31 int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ 32 int phy_index; /* Index of the usb-phy attached to this hcd */ 33 }; 34 35 static int ehci_usb_probe(struct udevice *dev) 36 { 37 struct usb_platdata *plat = dev_get_platdata(dev); 38 struct ehci_sunxi_priv *priv = dev_get_priv(dev); 39 struct ehci_hccr *hccr = (struct ehci_hccr *)devfdt_get_addr(dev); 40 struct ehci_hcor *hcor; 41 int extra_ahb_gate_mask = 0; 42 43 priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 44 if (IS_ERR(priv->ccm)) 45 return PTR_ERR(priv->ccm); 46 47 /* 48 * This should go away once we've moved to the driver model for 49 * clocks resp. phys. 50 */ 51 priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; 52 #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) 53 extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0; 54 #endif 55 priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST; 56 priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; 57 extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; 58 priv->phy_index++; /* Non otg phys start at 1 */ 59 60 setbits_le32(&priv->ccm->ahb_gate0, 61 priv->ahb_gate_mask | extra_ahb_gate_mask); 62 #ifdef CONFIG_SUNXI_GEN_SUN6I 63 setbits_le32(&priv->ccm->ahb_reset0_cfg, 64 priv->ahb_gate_mask | extra_ahb_gate_mask); 65 #endif 66 67 sunxi_usb_phy_init(priv->phy_index); 68 sunxi_usb_phy_power_on(priv->phy_index); 69 70 hcor = (struct ehci_hcor *)((uintptr_t)hccr + 71 HC_LENGTH(ehci_readl(&hccr->cr_capbase))); 72 73 return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type); 74 } 75 76 static int ehci_usb_remove(struct udevice *dev) 77 { 78 struct ehci_sunxi_priv *priv = dev_get_priv(dev); 79 int ret; 80 81 ret = ehci_deregister(dev); 82 if (ret) 83 return ret; 84 85 sunxi_usb_phy_exit(priv->phy_index); 86 87 #ifdef CONFIG_SUNXI_GEN_SUN6I 88 clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask); 89 #endif 90 clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask); 91 92 return 0; 93 } 94 95 static const struct udevice_id ehci_usb_ids[] = { 96 { .compatible = "allwinner,sun4i-a10-ehci", }, 97 { .compatible = "allwinner,sun5i-a13-ehci", }, 98 { .compatible = "allwinner,sun6i-a31-ehci", }, 99 { .compatible = "allwinner,sun7i-a20-ehci", }, 100 { .compatible = "allwinner,sun8i-a23-ehci", }, 101 { .compatible = "allwinner,sun8i-a83t-ehci", }, 102 { .compatible = "allwinner,sun8i-h3-ehci", }, 103 { .compatible = "allwinner,sun9i-a80-ehci", }, 104 { .compatible = "allwinner,sun50i-a64-ehci", }, 105 { } 106 }; 107 108 U_BOOT_DRIVER(ehci_sunxi) = { 109 .name = "ehci_sunxi", 110 .id = UCLASS_USB, 111 .of_match = ehci_usb_ids, 112 .probe = ehci_usb_probe, 113 .remove = ehci_usb_remove, 114 .ops = &ehci_usb_ops, 115 .platdata_auto_alloc_size = sizeof(struct usb_platdata), 116 .priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv), 117 .flags = DM_FLAG_ALLOC_PRIV_DMA, 118 }; 119