1 /* 2 * Sunxi ehci glue 3 * 4 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com> 5 * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com> 6 * 7 * Based on code from 8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <asm/arch/clock.h> 15 #include <asm/arch/usb_phy.h> 16 #include <asm/io.h> 17 #include <dm.h> 18 #include "ehci.h" 19 20 #ifdef CONFIG_SUNXI_GEN_SUN4I 21 #define BASE_DIST 0x8000 22 #define AHB_CLK_DIST 2 23 #else 24 #define BASE_DIST 0x1000 25 #define AHB_CLK_DIST 1 26 #endif 27 28 struct ehci_sunxi_priv { 29 struct ehci_ctrl ehci; 30 int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ 31 int phy_index; /* Index of the usb-phy attached to this hcd */ 32 }; 33 34 static int ehci_usb_probe(struct udevice *dev) 35 { 36 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 37 struct usb_platdata *plat = dev_get_platdata(dev); 38 struct ehci_sunxi_priv *priv = dev_get_priv(dev); 39 struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev); 40 struct ehci_hcor *hcor; 41 int extra_ahb_gate_mask = 0; 42 43 /* 44 * This should go away once we've moved to the driver model for 45 * clocks resp. phys. 46 */ 47 priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; 48 #ifdef CONFIG_MACH_SUN8I_H3 49 extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0; 50 #endif 51 priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST; 52 priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; 53 extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; 54 priv->phy_index++; /* Non otg phys start at 1 */ 55 56 setbits_le32(&ccm->ahb_gate0, 57 priv->ahb_gate_mask | extra_ahb_gate_mask); 58 #ifdef CONFIG_SUNXI_GEN_SUN6I 59 setbits_le32(&ccm->ahb_reset0_cfg, 60 priv->ahb_gate_mask | extra_ahb_gate_mask); 61 #endif 62 63 sunxi_usb_phy_init(priv->phy_index); 64 sunxi_usb_phy_power_on(priv->phy_index); 65 66 hcor = (struct ehci_hcor *)((uint32_t)hccr + 67 HC_LENGTH(ehci_readl(&hccr->cr_capbase))); 68 69 return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type); 70 } 71 72 static int ehci_usb_remove(struct udevice *dev) 73 { 74 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 75 struct ehci_sunxi_priv *priv = dev_get_priv(dev); 76 int ret; 77 78 ret = ehci_deregister(dev); 79 if (ret) 80 return ret; 81 82 sunxi_usb_phy_exit(priv->phy_index); 83 84 #ifdef CONFIG_SUNXI_GEN_SUN6I 85 clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); 86 #endif 87 clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); 88 89 return 0; 90 } 91 92 static const struct udevice_id ehci_usb_ids[] = { 93 { .compatible = "allwinner,sun4i-a10-ehci", }, 94 { .compatible = "allwinner,sun5i-a13-ehci", }, 95 { .compatible = "allwinner,sun6i-a31-ehci", }, 96 { .compatible = "allwinner,sun7i-a20-ehci", }, 97 { .compatible = "allwinner,sun8i-a23-ehci", }, 98 { .compatible = "allwinner,sun8i-a83t-ehci", }, 99 { .compatible = "allwinner,sun8i-h3-ehci", }, 100 { .compatible = "allwinner,sun9i-a80-ehci", }, 101 { } 102 }; 103 104 U_BOOT_DRIVER(ehci_sunxi) = { 105 .name = "ehci_sunxi", 106 .id = UCLASS_USB, 107 .of_match = ehci_usb_ids, 108 .probe = ehci_usb_probe, 109 .remove = ehci_usb_remove, 110 .ops = &ehci_usb_ops, 111 .platdata_auto_alloc_size = sizeof(struct usb_platdata), 112 .priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv), 113 .flags = DM_FLAG_ALLOC_PRIV_DMA, 114 }; 115