139fd6342SVipin Kumar /* 239fd6342SVipin Kumar * (C) Copyright 2010 339fd6342SVipin Kumar * Armando Visconti, ST Micoelectronics, <armando.visconti@st.com>. 439fd6342SVipin Kumar * 539fd6342SVipin Kumar * (C) Copyright 2009 639fd6342SVipin Kumar * Marvell Semiconductor <www.marvell.com> 739fd6342SVipin Kumar * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 839fd6342SVipin Kumar * 91a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1039fd6342SVipin Kumar */ 1139fd6342SVipin Kumar 1239fd6342SVipin Kumar #include <common.h> 1339fd6342SVipin Kumar #include <asm/io.h> 1439fd6342SVipin Kumar #include <usb.h> 1539fd6342SVipin Kumar #include "ehci.h" 1639fd6342SVipin Kumar #include <asm/arch/hardware.h> 17*e8d05698SStefan Roese #include <asm/arch/spr_misc.h> 1839fd6342SVipin Kumar 19*e8d05698SStefan Roese static void spear6xx_usbh_stop(void) 20*e8d05698SStefan Roese { 21*e8d05698SStefan Roese struct misc_regs *const misc_p = 22*e8d05698SStefan Roese (struct misc_regs *)CONFIG_SPEAR_MISCBASE; 23*e8d05698SStefan Roese u32 periph1_rst = readl(misc_p->periph1_rst); 24*e8d05698SStefan Roese 25*e8d05698SStefan Roese periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2; 26*e8d05698SStefan Roese writel(periph1_rst, misc_p->periph1_rst); 27*e8d05698SStefan Roese 28*e8d05698SStefan Roese udelay(1000); 29*e8d05698SStefan Roese periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2); 30*e8d05698SStefan Roese writel(periph1_rst, misc_p->periph1_rst); 31*e8d05698SStefan Roese } 3239fd6342SVipin Kumar 3339fd6342SVipin Kumar /* 3439fd6342SVipin Kumar * Create the appropriate control structures to manage 3539fd6342SVipin Kumar * a new EHCI host controller. 3639fd6342SVipin Kumar */ 37127efc4fSTroy Kisky int ehci_hcd_init(int index, enum usb_init_type init, 38127efc4fSTroy Kisky struct ehci_hccr **hccr, struct ehci_hcor **hcor) 3939fd6342SVipin Kumar { 40*e8d05698SStefan Roese u32 ehci = 0; 41*e8d05698SStefan Roese 42*e8d05698SStefan Roese switch (index) { 43*e8d05698SStefan Roese case 0: 44*e8d05698SStefan Roese ehci = CONFIG_SYS_UHC0_EHCI_BASE; 45*e8d05698SStefan Roese break; 46*e8d05698SStefan Roese case 1: 47*e8d05698SStefan Roese ehci = CONFIG_SYS_UHC1_EHCI_BASE; 48*e8d05698SStefan Roese break; 49*e8d05698SStefan Roese default: 50*e8d05698SStefan Roese printf("ERROR: wrong controller index!\n"); 51*e8d05698SStefan Roese break; 52*e8d05698SStefan Roese }; 53*e8d05698SStefan Roese 54*e8d05698SStefan Roese *hccr = (struct ehci_hccr *)(ehci + 0x100); 55*e8d05698SStefan Roese *hcor = (struct ehci_hcor *)((uint32_t) *hccr + 56*e8d05698SStefan Roese HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); 5739fd6342SVipin Kumar 5839fd6342SVipin Kumar debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n", 5939fd6342SVipin Kumar (uint32_t)*hccr, (uint32_t)*hcor, 6039fd6342SVipin Kumar (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); 6139fd6342SVipin Kumar 6239fd6342SVipin Kumar return 0; 6339fd6342SVipin Kumar } 6439fd6342SVipin Kumar 6539fd6342SVipin Kumar /* 6639fd6342SVipin Kumar * Destroy the appropriate control structures corresponding 6739fd6342SVipin Kumar * the the EHCI host controller. 6839fd6342SVipin Kumar */ 6939fd6342SVipin Kumar int ehci_hcd_stop(int index) 7039fd6342SVipin Kumar { 71*e8d05698SStefan Roese #if defined(CONFIG_SPEAR600) 72*e8d05698SStefan Roese spear6xx_usbh_stop(); 73*e8d05698SStefan Roese #endif 74*e8d05698SStefan Roese 7539fd6342SVipin Kumar return 0; 7639fd6342SVipin Kumar } 77