1 /*- 2 * Copyright (c) 2007-2008, Juniper Networks, Inc. 3 * Copyright (c) 2008, Excito Elektronik i Skåne AB 4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it> 5 * 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation version 2 of 11 * the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 #include <common.h> 24 #include <asm/byteorder.h> 25 #include <usb.h> 26 #include <asm/io.h> 27 #include <malloc.h> 28 #include <watchdog.h> 29 30 #include "ehci.h" 31 32 int rootdev; 33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ 34 volatile struct ehci_hcor *hcor; 35 36 static uint16_t portreset; 37 static struct QH qh_list __attribute__((aligned(32))); 38 39 static struct descriptor { 40 struct usb_hub_descriptor hub; 41 struct usb_device_descriptor device; 42 struct usb_linux_config_descriptor config; 43 struct usb_linux_interface_descriptor interface; 44 struct usb_endpoint_descriptor endpoint; 45 } __attribute__ ((packed)) descriptor = { 46 { 47 0x8, /* bDescLength */ 48 0x29, /* bDescriptorType: hub descriptor */ 49 2, /* bNrPorts -- runtime modified */ 50 0, /* wHubCharacteristics */ 51 10, /* bPwrOn2PwrGood */ 52 0, /* bHubCntrCurrent */ 53 {}, /* Device removable */ 54 {} /* at most 7 ports! XXX */ 55 }, 56 { 57 0x12, /* bLength */ 58 1, /* bDescriptorType: UDESC_DEVICE */ 59 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 60 9, /* bDeviceClass: UDCLASS_HUB */ 61 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 62 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 63 64, /* bMaxPacketSize: 64 bytes */ 64 0x0000, /* idVendor */ 65 0x0000, /* idProduct */ 66 cpu_to_le16(0x0100), /* bcdDevice */ 67 1, /* iManufacturer */ 68 2, /* iProduct */ 69 0, /* iSerialNumber */ 70 1 /* bNumConfigurations: 1 */ 71 }, 72 { 73 0x9, 74 2, /* bDescriptorType: UDESC_CONFIG */ 75 cpu_to_le16(0x19), 76 1, /* bNumInterface */ 77 1, /* bConfigurationValue */ 78 0, /* iConfiguration */ 79 0x40, /* bmAttributes: UC_SELF_POWER */ 80 0 /* bMaxPower */ 81 }, 82 { 83 0x9, /* bLength */ 84 4, /* bDescriptorType: UDESC_INTERFACE */ 85 0, /* bInterfaceNumber */ 86 0, /* bAlternateSetting */ 87 1, /* bNumEndpoints */ 88 9, /* bInterfaceClass: UICLASS_HUB */ 89 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ 90 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ 91 0 /* iInterface */ 92 }, 93 { 94 0x7, /* bLength */ 95 5, /* bDescriptorType: UDESC_ENDPOINT */ 96 0x81, /* bEndpointAddress: 97 * UE_DIR_IN | EHCI_INTR_ENDPT 98 */ 99 3, /* bmAttributes: UE_INTERRUPT */ 100 8, /* wMaxPacketSize */ 101 255 /* bInterval */ 102 }, 103 }; 104 105 #if defined(CONFIG_EHCI_IS_TDI) 106 #define ehci_is_TDI() (1) 107 #else 108 #define ehci_is_TDI() (0) 109 #endif 110 111 #if defined(CONFIG_EHCI_DCACHE) 112 /* 113 * Routines to handle (flush/invalidate) the dcache for the QH and qTD 114 * structures and data buffers. This is needed on platforms using this 115 * EHCI support with dcache enabled. 116 */ 117 static void flush_invalidate(u32 addr, int size, int flush) 118 { 119 if (flush) 120 flush_dcache_range(addr, addr + size); 121 else 122 invalidate_dcache_range(addr, addr + size); 123 } 124 125 static void cache_qtd(struct qTD *qtd, int flush) 126 { 127 u32 *ptr = (u32 *)qtd->qt_buffer[0]; 128 int len = (qtd->qt_token & 0x7fff0000) >> 16; 129 130 flush_invalidate((u32)qtd, sizeof(struct qTD), flush); 131 if (ptr && len) 132 flush_invalidate((u32)ptr, len, flush); 133 } 134 135 136 static inline struct QH *qh_addr(struct QH *qh) 137 { 138 return (struct QH *)((u32)qh & 0xffffffe0); 139 } 140 141 static void cache_qh(struct QH *qh, int flush) 142 { 143 struct qTD *qtd; 144 struct qTD *next; 145 static struct qTD *first_qtd; 146 147 /* 148 * Walk the QH list and flush/invalidate all entries 149 */ 150 while (1) { 151 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush); 152 if ((u32)qh & QH_LINK_TYPE_QH) 153 break; 154 qh = qh_addr(qh); 155 qh = (struct QH *)qh->qh_link; 156 } 157 qh = qh_addr(qh); 158 159 /* 160 * Save first qTD pointer, needed for invalidating pass on this QH 161 */ 162 if (flush) 163 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay & 164 0xffffffe0); 165 else 166 qtd = first_qtd; 167 168 /* 169 * Walk the qTD list and flush/invalidate all entries 170 */ 171 while (1) { 172 if (qtd == NULL) 173 break; 174 cache_qtd(qtd, flush); 175 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0); 176 if (next == qtd) 177 break; 178 qtd = next; 179 } 180 } 181 182 static inline void ehci_flush_dcache(struct QH *qh) 183 { 184 cache_qh(qh, 1); 185 } 186 187 static inline void ehci_invalidate_dcache(struct QH *qh) 188 { 189 cache_qh(qh, 0); 190 } 191 #else /* CONFIG_EHCI_DCACHE */ 192 /* 193 * 194 */ 195 static inline void ehci_flush_dcache(struct QH *qh) 196 { 197 } 198 199 static inline void ehci_invalidate_dcache(struct QH *qh) 200 { 201 } 202 #endif /* CONFIG_EHCI_DCACHE */ 203 204 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 205 { 206 mdelay(50); 207 } 208 209 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 210 __attribute__((weak, alias("__ehci_powerup_fixup"))); 211 212 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) 213 { 214 uint32_t result; 215 do { 216 result = ehci_readl(ptr); 217 udelay(5); 218 if (result == ~(uint32_t)0) 219 return -1; 220 result &= mask; 221 if (result == done) 222 return 0; 223 usec--; 224 } while (usec > 0); 225 return -1; 226 } 227 228 static int ehci_reset(void) 229 { 230 uint32_t cmd; 231 uint32_t tmp; 232 uint32_t *reg_ptr; 233 int ret = 0; 234 235 cmd = ehci_readl(&hcor->or_usbcmd); 236 cmd = (cmd & ~CMD_RUN) | CMD_RESET; 237 ehci_writel(&hcor->or_usbcmd, cmd); 238 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000); 239 if (ret < 0) { 240 printf("EHCI fail to reset\n"); 241 goto out; 242 } 243 244 if (ehci_is_TDI()) { 245 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE); 246 tmp = ehci_readl(reg_ptr); 247 tmp |= USBMODE_CM_HC; 248 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN) 249 tmp |= USBMODE_BE; 250 #endif 251 ehci_writel(reg_ptr, tmp); 252 } 253 254 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH 255 cmd = ehci_readl(&hcor->or_txfilltuning); 256 cmd &= ~TXFIFO_THRESH(0x3f); 257 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH); 258 ehci_writel(&hcor->or_txfilltuning, cmd); 259 #endif 260 out: 261 return ret; 262 } 263 264 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) 265 { 266 uint32_t addr, delta, next; 267 int idx; 268 269 addr = (uint32_t) buf; 270 idx = 0; 271 while (idx < 5) { 272 td->qt_buffer[idx] = cpu_to_hc32(addr); 273 td->qt_buffer_hi[idx] = 0; 274 next = (addr + 4096) & ~4095; 275 delta = next - addr; 276 if (delta >= sz) 277 break; 278 sz -= delta; 279 addr = next; 280 idx++; 281 } 282 283 if (idx == 5) { 284 debug("out of buffer pointers (%u bytes left)\n", sz); 285 return -1; 286 } 287 288 return 0; 289 } 290 291 static int 292 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, 293 int length, struct devrequest *req) 294 { 295 static struct QH qh __attribute__((aligned(32))); 296 static struct qTD qtd[3] __attribute__((aligned (32))); 297 int qtd_counter = 0; 298 299 volatile struct qTD *vtd; 300 unsigned long ts; 301 uint32_t *tdp; 302 uint32_t endpt, token, usbsts; 303 uint32_t c, toggle; 304 uint32_t cmd; 305 int timeout; 306 int ret = 0; 307 308 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, 309 buffer, length, req); 310 if (req != NULL) 311 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", 312 req->request, req->request, 313 req->requesttype, req->requesttype, 314 le16_to_cpu(req->value), le16_to_cpu(req->value), 315 le16_to_cpu(req->index)); 316 317 memset(&qh, 0, sizeof(struct QH)); 318 memset(qtd, 0, sizeof(qtd)); 319 320 qh.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 321 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && 322 usb_pipeendpoint(pipe) == 0) ? 1 : 0; 323 endpt = (8 << 28) | 324 (c << 27) | 325 (usb_maxpacket(dev, pipe) << 16) | 326 (0 << 15) | 327 (1 << 14) | 328 (usb_pipespeed(pipe) << 12) | 329 (usb_pipeendpoint(pipe) << 8) | 330 (0 << 7) | (usb_pipedevice(pipe) << 0); 331 qh.qh_endpt1 = cpu_to_hc32(endpt); 332 endpt = (1 << 30) | 333 (dev->portnr << 23) | 334 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); 335 qh.qh_endpt2 = cpu_to_hc32(endpt); 336 qh.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 337 338 tdp = &qh.qh_overlay.qt_next; 339 340 toggle = 341 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); 342 343 if (req != NULL) { 344 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 345 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 346 token = (0 << 31) | 347 (sizeof(*req) << 16) | 348 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); 349 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 350 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) { 351 debug("unable construct SETUP td\n"); 352 goto fail; 353 } 354 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 355 tdp = &qtd[qtd_counter++].qt_next; 356 toggle = 1; 357 } 358 359 if (length > 0 || req == NULL) { 360 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 361 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 362 token = (toggle << 31) | 363 (length << 16) | 364 ((req == NULL ? 1 : 0) << 15) | 365 (0 << 12) | 366 (3 << 10) | 367 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); 368 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 369 if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) { 370 debug("unable construct DATA td\n"); 371 goto fail; 372 } 373 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 374 tdp = &qtd[qtd_counter++].qt_next; 375 } 376 377 if (req != NULL) { 378 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 379 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 380 token = (toggle << 31) | 381 (0 << 16) | 382 (1 << 15) | 383 (0 << 12) | 384 (3 << 10) | 385 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); 386 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 387 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 388 tdp = &qtd[qtd_counter++].qt_next; 389 } 390 391 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh | QH_LINK_TYPE_QH); 392 393 /* Flush dcache */ 394 ehci_flush_dcache(&qh_list); 395 396 usbsts = ehci_readl(&hcor->or_usbsts); 397 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); 398 399 /* Enable async. schedule. */ 400 cmd = ehci_readl(&hcor->or_usbcmd); 401 cmd |= CMD_ASE; 402 ehci_writel(&hcor->or_usbcmd, cmd); 403 404 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS, 405 100 * 1000); 406 if (ret < 0) { 407 printf("EHCI fail timeout STD_ASS set\n"); 408 goto fail; 409 } 410 411 /* Wait for TDs to be processed. */ 412 ts = get_timer(0); 413 vtd = &qtd[qtd_counter - 1]; 414 timeout = USB_TIMEOUT_MS(pipe); 415 do { 416 /* Invalidate dcache */ 417 ehci_invalidate_dcache(&qh_list); 418 token = hc32_to_cpu(vtd->qt_token); 419 if (!(token & 0x80)) 420 break; 421 WATCHDOG_RESET(); 422 } while (get_timer(ts) < timeout); 423 424 /* Check that the TD processing happened */ 425 if (token & 0x80) { 426 printf("EHCI timed out on TD - token=%#x\n", token); 427 } 428 429 /* Disable async schedule. */ 430 cmd = ehci_readl(&hcor->or_usbcmd); 431 cmd &= ~CMD_ASE; 432 ehci_writel(&hcor->or_usbcmd, cmd); 433 434 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0, 435 100 * 1000); 436 if (ret < 0) { 437 printf("EHCI fail timeout STD_ASS reset\n"); 438 goto fail; 439 } 440 441 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 442 443 token = hc32_to_cpu(qh.qh_overlay.qt_token); 444 if (!(token & 0x80)) { 445 debug("TOKEN=%#x\n", token); 446 switch (token & 0xfc) { 447 case 0: 448 toggle = token >> 31; 449 usb_settoggle(dev, usb_pipeendpoint(pipe), 450 usb_pipeout(pipe), toggle); 451 dev->status = 0; 452 break; 453 case 0x40: 454 dev->status = USB_ST_STALLED; 455 break; 456 case 0xa0: 457 case 0x20: 458 dev->status = USB_ST_BUF_ERR; 459 break; 460 case 0x50: 461 case 0x10: 462 dev->status = USB_ST_BABBLE_DET; 463 break; 464 default: 465 dev->status = USB_ST_CRC_ERR; 466 if ((token & 0x40) == 0x40) 467 dev->status |= USB_ST_STALLED; 468 break; 469 } 470 dev->act_len = length - ((token >> 16) & 0x7fff); 471 } else { 472 dev->act_len = 0; 473 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", 474 dev->devnum, ehci_readl(&hcor->or_usbsts), 475 ehci_readl(&hcor->or_portsc[0]), 476 ehci_readl(&hcor->or_portsc[1])); 477 } 478 479 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; 480 481 fail: 482 return -1; 483 } 484 485 static inline int min3(int a, int b, int c) 486 { 487 488 if (b < a) 489 a = b; 490 if (c < a) 491 a = c; 492 return a; 493 } 494 495 int 496 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, 497 int length, struct devrequest *req) 498 { 499 uint8_t tmpbuf[4]; 500 u16 typeReq; 501 void *srcptr = NULL; 502 int len, srclen; 503 uint32_t reg; 504 uint32_t *status_reg; 505 506 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { 507 printf("The request port(%d) is not configured\n", 508 le16_to_cpu(req->index) - 1); 509 return -1; 510 } 511 status_reg = (uint32_t *)&hcor->or_portsc[ 512 le16_to_cpu(req->index) - 1]; 513 srclen = 0; 514 515 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", 516 req->request, req->request, 517 req->requesttype, req->requesttype, 518 le16_to_cpu(req->value), le16_to_cpu(req->index)); 519 520 typeReq = req->request | req->requesttype << 8; 521 522 switch (typeReq) { 523 case DeviceRequest | USB_REQ_GET_DESCRIPTOR: 524 switch (le16_to_cpu(req->value) >> 8) { 525 case USB_DT_DEVICE: 526 debug("USB_DT_DEVICE request\n"); 527 srcptr = &descriptor.device; 528 srclen = 0x12; 529 break; 530 case USB_DT_CONFIG: 531 debug("USB_DT_CONFIG config\n"); 532 srcptr = &descriptor.config; 533 srclen = 0x19; 534 break; 535 case USB_DT_STRING: 536 debug("USB_DT_STRING config\n"); 537 switch (le16_to_cpu(req->value) & 0xff) { 538 case 0: /* Language */ 539 srcptr = "\4\3\1\0"; 540 srclen = 4; 541 break; 542 case 1: /* Vendor */ 543 srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; 544 srclen = 14; 545 break; 546 case 2: /* Product */ 547 srcptr = "\52\3E\0H\0C\0I\0 " 548 "\0H\0o\0s\0t\0 " 549 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; 550 srclen = 42; 551 break; 552 default: 553 debug("unknown value DT_STRING %x\n", 554 le16_to_cpu(req->value)); 555 goto unknown; 556 } 557 break; 558 default: 559 debug("unknown value %x\n", le16_to_cpu(req->value)); 560 goto unknown; 561 } 562 break; 563 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): 564 switch (le16_to_cpu(req->value) >> 8) { 565 case USB_DT_HUB: 566 debug("USB_DT_HUB config\n"); 567 srcptr = &descriptor.hub; 568 srclen = 0x8; 569 break; 570 default: 571 debug("unknown value %x\n", le16_to_cpu(req->value)); 572 goto unknown; 573 } 574 break; 575 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): 576 debug("USB_REQ_SET_ADDRESS\n"); 577 rootdev = le16_to_cpu(req->value); 578 break; 579 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: 580 debug("USB_REQ_SET_CONFIGURATION\n"); 581 /* Nothing to do */ 582 break; 583 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): 584 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ 585 tmpbuf[1] = 0; 586 srcptr = tmpbuf; 587 srclen = 2; 588 break; 589 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): 590 memset(tmpbuf, 0, 4); 591 reg = ehci_readl(status_reg); 592 if (reg & EHCI_PS_CS) 593 tmpbuf[0] |= USB_PORT_STAT_CONNECTION; 594 if (reg & EHCI_PS_PE) 595 tmpbuf[0] |= USB_PORT_STAT_ENABLE; 596 if (reg & EHCI_PS_SUSP) 597 tmpbuf[0] |= USB_PORT_STAT_SUSPEND; 598 if (reg & EHCI_PS_OCA) 599 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; 600 if (reg & EHCI_PS_PR) 601 tmpbuf[0] |= USB_PORT_STAT_RESET; 602 if (reg & EHCI_PS_PP) 603 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; 604 605 if (ehci_is_TDI()) { 606 switch ((reg >> 26) & 3) { 607 case 0: 608 break; 609 case 1: 610 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; 611 break; 612 case 2: 613 default: 614 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 615 break; 616 } 617 } else { 618 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 619 } 620 621 if (reg & EHCI_PS_CSC) 622 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; 623 if (reg & EHCI_PS_PEC) 624 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; 625 if (reg & EHCI_PS_OCC) 626 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; 627 if (portreset & (1 << le16_to_cpu(req->index))) 628 tmpbuf[2] |= USB_PORT_STAT_C_RESET; 629 630 srcptr = tmpbuf; 631 srclen = 4; 632 break; 633 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 634 reg = ehci_readl(status_reg); 635 reg &= ~EHCI_PS_CLEAR; 636 switch (le16_to_cpu(req->value)) { 637 case USB_PORT_FEAT_ENABLE: 638 reg |= EHCI_PS_PE; 639 ehci_writel(status_reg, reg); 640 break; 641 case USB_PORT_FEAT_POWER: 642 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) { 643 reg |= EHCI_PS_PP; 644 ehci_writel(status_reg, reg); 645 } 646 break; 647 case USB_PORT_FEAT_RESET: 648 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && 649 !ehci_is_TDI() && 650 EHCI_PS_IS_LOWSPEED(reg)) { 651 /* Low speed device, give up ownership. */ 652 debug("port %d low speed --> companion\n", 653 req->index - 1); 654 reg |= EHCI_PS_PO; 655 ehci_writel(status_reg, reg); 656 break; 657 } else { 658 int ret; 659 660 reg |= EHCI_PS_PR; 661 reg &= ~EHCI_PS_PE; 662 ehci_writel(status_reg, reg); 663 /* 664 * caller must wait, then call GetPortStatus 665 * usb 2.0 specification say 50 ms resets on 666 * root 667 */ 668 ehci_powerup_fixup(status_reg, ®); 669 670 ehci_writel(status_reg, reg & ~EHCI_PS_PR); 671 /* 672 * A host controller must terminate the reset 673 * and stabilize the state of the port within 674 * 2 milliseconds 675 */ 676 ret = handshake(status_reg, EHCI_PS_PR, 0, 677 2 * 1000); 678 if (!ret) 679 portreset |= 680 1 << le16_to_cpu(req->index); 681 else 682 printf("port(%d) reset error\n", 683 le16_to_cpu(req->index) - 1); 684 } 685 break; 686 default: 687 debug("unknown feature %x\n", le16_to_cpu(req->value)); 688 goto unknown; 689 } 690 /* unblock posted writes */ 691 (void) ehci_readl(&hcor->or_usbcmd); 692 break; 693 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 694 reg = ehci_readl(status_reg); 695 switch (le16_to_cpu(req->value)) { 696 case USB_PORT_FEAT_ENABLE: 697 reg &= ~EHCI_PS_PE; 698 break; 699 case USB_PORT_FEAT_C_ENABLE: 700 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; 701 break; 702 case USB_PORT_FEAT_POWER: 703 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) 704 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); 705 case USB_PORT_FEAT_C_CONNECTION: 706 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; 707 break; 708 case USB_PORT_FEAT_OVER_CURRENT: 709 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; 710 break; 711 case USB_PORT_FEAT_C_RESET: 712 portreset &= ~(1 << le16_to_cpu(req->index)); 713 break; 714 default: 715 debug("unknown feature %x\n", le16_to_cpu(req->value)); 716 goto unknown; 717 } 718 ehci_writel(status_reg, reg); 719 /* unblock posted write */ 720 (void) ehci_readl(&hcor->or_usbcmd); 721 break; 722 default: 723 debug("Unknown request\n"); 724 goto unknown; 725 } 726 727 mdelay(1); 728 len = min3(srclen, le16_to_cpu(req->length), length); 729 if (srcptr != NULL && len > 0) 730 memcpy(buffer, srcptr, len); 731 else 732 debug("Len is 0\n"); 733 734 dev->act_len = len; 735 dev->status = 0; 736 return 0; 737 738 unknown: 739 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", 740 req->requesttype, req->request, le16_to_cpu(req->value), 741 le16_to_cpu(req->index), le16_to_cpu(req->length)); 742 743 dev->act_len = 0; 744 dev->status = USB_ST_STALLED; 745 return -1; 746 } 747 748 int usb_lowlevel_stop(void) 749 { 750 return ehci_hcd_stop(); 751 } 752 753 int usb_lowlevel_init(void) 754 { 755 uint32_t reg; 756 uint32_t cmd; 757 758 if (ehci_hcd_init() != 0) 759 return -1; 760 761 /* EHCI spec section 4.1 */ 762 if (ehci_reset() != 0) 763 return -1; 764 765 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) 766 if (ehci_hcd_init() != 0) 767 return -1; 768 #endif 769 770 /* Set head of reclaim list */ 771 memset(&qh_list, 0, sizeof(qh_list)); 772 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 773 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); 774 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); 775 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 776 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 777 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40); 778 779 /* Set async. queue head pointer. */ 780 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list); 781 782 reg = ehci_readl(&hccr->cr_hcsparams); 783 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); 784 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); 785 /* Port Indicators */ 786 if (HCS_INDICATOR(reg)) 787 descriptor.hub.wHubCharacteristics |= 0x80; 788 /* Port Power Control */ 789 if (HCS_PPC(reg)) 790 descriptor.hub.wHubCharacteristics |= 0x01; 791 792 /* Start the host controller. */ 793 cmd = ehci_readl(&hcor->or_usbcmd); 794 /* 795 * Philips, Intel, and maybe others need CMD_RUN before the 796 * root hub will detect new devices (why?); NEC doesn't 797 */ 798 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 799 cmd |= CMD_RUN; 800 ehci_writel(&hcor->or_usbcmd, cmd); 801 802 /* take control over the ports */ 803 cmd = ehci_readl(&hcor->or_configflag); 804 cmd |= FLAG_CF; 805 ehci_writel(&hcor->or_configflag, cmd); 806 /* unblock posted write */ 807 cmd = ehci_readl(&hcor->or_usbcmd); 808 mdelay(5); 809 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); 810 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); 811 812 rootdev = 0; 813 814 return 0; 815 } 816 817 int 818 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 819 int length) 820 { 821 822 if (usb_pipetype(pipe) != PIPE_BULK) { 823 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); 824 return -1; 825 } 826 return ehci_submit_async(dev, pipe, buffer, length, NULL); 827 } 828 829 int 830 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 831 int length, struct devrequest *setup) 832 { 833 834 if (usb_pipetype(pipe) != PIPE_CONTROL) { 835 debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); 836 return -1; 837 } 838 839 if (usb_pipedevice(pipe) == rootdev) { 840 if (rootdev == 0) 841 dev->speed = USB_SPEED_HIGH; 842 return ehci_submit_root(dev, pipe, buffer, length, setup); 843 } 844 return ehci_submit_async(dev, pipe, buffer, length, setup); 845 } 846 847 int 848 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 849 int length, int interval) 850 { 851 852 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", 853 dev, pipe, buffer, length, interval); 854 return ehci_submit_async(dev, pipe, buffer, length, NULL); 855 } 856