1 /*- 2 * Copyright (c) 2007-2008, Juniper Networks, Inc. 3 * Copyright (c) 2008, Excito Elektronik i Skåne AB 4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it> 5 * 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation version 2 of 11 * the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 #include <common.h> 24 #include <asm/byteorder.h> 25 #include <usb.h> 26 #include <asm/io.h> 27 #include <malloc.h> 28 #include <watchdog.h> 29 30 #include "ehci.h" 31 32 int rootdev; 33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ 34 volatile struct ehci_hcor *hcor; 35 36 static uint16_t portreset; 37 static struct QH qh_list __attribute__((aligned(32))); 38 39 static struct descriptor { 40 struct usb_hub_descriptor hub; 41 struct usb_device_descriptor device; 42 struct usb_linux_config_descriptor config; 43 struct usb_linux_interface_descriptor interface; 44 struct usb_endpoint_descriptor endpoint; 45 } __attribute__ ((packed)) descriptor = { 46 { 47 0x8, /* bDescLength */ 48 0x29, /* bDescriptorType: hub descriptor */ 49 2, /* bNrPorts -- runtime modified */ 50 0, /* wHubCharacteristics */ 51 10, /* bPwrOn2PwrGood */ 52 0, /* bHubCntrCurrent */ 53 {}, /* Device removable */ 54 {} /* at most 7 ports! XXX */ 55 }, 56 { 57 0x12, /* bLength */ 58 1, /* bDescriptorType: UDESC_DEVICE */ 59 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 60 9, /* bDeviceClass: UDCLASS_HUB */ 61 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 62 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 63 64, /* bMaxPacketSize: 64 bytes */ 64 0x0000, /* idVendor */ 65 0x0000, /* idProduct */ 66 cpu_to_le16(0x0100), /* bcdDevice */ 67 1, /* iManufacturer */ 68 2, /* iProduct */ 69 0, /* iSerialNumber */ 70 1 /* bNumConfigurations: 1 */ 71 }, 72 { 73 0x9, 74 2, /* bDescriptorType: UDESC_CONFIG */ 75 cpu_to_le16(0x19), 76 1, /* bNumInterface */ 77 1, /* bConfigurationValue */ 78 0, /* iConfiguration */ 79 0x40, /* bmAttributes: UC_SELF_POWER */ 80 0 /* bMaxPower */ 81 }, 82 { 83 0x9, /* bLength */ 84 4, /* bDescriptorType: UDESC_INTERFACE */ 85 0, /* bInterfaceNumber */ 86 0, /* bAlternateSetting */ 87 1, /* bNumEndpoints */ 88 9, /* bInterfaceClass: UICLASS_HUB */ 89 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ 90 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ 91 0 /* iInterface */ 92 }, 93 { 94 0x7, /* bLength */ 95 5, /* bDescriptorType: UDESC_ENDPOINT */ 96 0x81, /* bEndpointAddress: 97 * UE_DIR_IN | EHCI_INTR_ENDPT 98 */ 99 3, /* bmAttributes: UE_INTERRUPT */ 100 8, /* wMaxPacketSize */ 101 255 /* bInterval */ 102 }, 103 }; 104 105 #if defined(CONFIG_EHCI_IS_TDI) 106 #define ehci_is_TDI() (1) 107 #else 108 #define ehci_is_TDI() (0) 109 #endif 110 111 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 112 { 113 mdelay(50); 114 } 115 116 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) 117 __attribute__((weak, alias("__ehci_powerup_fixup"))); 118 119 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) 120 { 121 uint32_t result; 122 do { 123 result = ehci_readl(ptr); 124 udelay(5); 125 if (result == ~(uint32_t)0) 126 return -1; 127 result &= mask; 128 if (result == done) 129 return 0; 130 usec--; 131 } while (usec > 0); 132 return -1; 133 } 134 135 static int ehci_reset(void) 136 { 137 uint32_t cmd; 138 uint32_t tmp; 139 uint32_t *reg_ptr; 140 int ret = 0; 141 142 cmd = ehci_readl(&hcor->or_usbcmd); 143 cmd = (cmd & ~CMD_RUN) | CMD_RESET; 144 ehci_writel(&hcor->or_usbcmd, cmd); 145 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000); 146 if (ret < 0) { 147 printf("EHCI fail to reset\n"); 148 goto out; 149 } 150 151 if (ehci_is_TDI()) { 152 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE); 153 tmp = ehci_readl(reg_ptr); 154 tmp |= USBMODE_CM_HC; 155 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN) 156 tmp |= USBMODE_BE; 157 #endif 158 ehci_writel(reg_ptr, tmp); 159 } 160 161 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH 162 cmd = ehci_readl(&hcor->or_txfilltuning); 163 cmd &= ~TXFIFO_THRESH(0x3f); 164 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH); 165 ehci_writel(&hcor->or_txfilltuning, cmd); 166 #endif 167 out: 168 return ret; 169 } 170 171 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) 172 { 173 uint32_t delta, next; 174 uint32_t addr = (uint32_t)buf; 175 size_t rsz = roundup(sz, 32); 176 int idx; 177 178 if (sz != rsz) 179 debug("EHCI-HCD: Misaligned buffer size (%08x)\n", sz); 180 181 if (addr & 31) 182 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf); 183 184 idx = 0; 185 while (idx < 5) { 186 flush_dcache_range(addr, addr + rsz); 187 td->qt_buffer[idx] = cpu_to_hc32(addr); 188 td->qt_buffer_hi[idx] = 0; 189 next = (addr + 4096) & ~4095; 190 delta = next - addr; 191 if (delta >= sz) 192 break; 193 sz -= delta; 194 addr = next; 195 idx++; 196 } 197 198 if (idx == 5) { 199 debug("out of buffer pointers (%u bytes left)\n", sz); 200 return -1; 201 } 202 203 return 0; 204 } 205 206 static int 207 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, 208 int length, struct devrequest *req) 209 { 210 static struct QH qh __attribute__((aligned(32))); 211 static struct qTD qtd[3] __attribute__((aligned (32))); 212 int qtd_counter = 0; 213 214 volatile struct qTD *vtd; 215 unsigned long ts; 216 uint32_t *tdp; 217 uint32_t endpt, token, usbsts; 218 uint32_t c, toggle; 219 uint32_t cmd; 220 int timeout; 221 int ret = 0; 222 223 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, 224 buffer, length, req); 225 if (req != NULL) 226 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", 227 req->request, req->request, 228 req->requesttype, req->requesttype, 229 le16_to_cpu(req->value), le16_to_cpu(req->value), 230 le16_to_cpu(req->index)); 231 232 memset(&qh, 0, sizeof(struct QH)); 233 memset(qtd, 0, sizeof(qtd)); 234 235 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); 236 237 /* 238 * Setup QH (3.6 in ehci-r10.pdf) 239 * 240 * qh_link ................. 03-00 H 241 * qh_endpt1 ............... 07-04 H 242 * qh_endpt2 ............... 0B-08 H 243 * - qh_curtd 244 * qh_overlay.qt_next ...... 13-10 H 245 * - qh_overlay.qt_altnext 246 */ 247 qh.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 248 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && 249 usb_pipeendpoint(pipe) == 0) ? 1 : 0; 250 endpt = (8 << 28) | 251 (c << 27) | 252 (usb_maxpacket(dev, pipe) << 16) | 253 (0 << 15) | 254 (1 << 14) | 255 (usb_pipespeed(pipe) << 12) | 256 (usb_pipeendpoint(pipe) << 8) | 257 (0 << 7) | (usb_pipedevice(pipe) << 0); 258 qh.qh_endpt1 = cpu_to_hc32(endpt); 259 endpt = (1 << 30) | 260 (dev->portnr << 23) | 261 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); 262 qh.qh_endpt2 = cpu_to_hc32(endpt); 263 qh.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 264 265 tdp = &qh.qh_overlay.qt_next; 266 267 if (req != NULL) { 268 /* 269 * Setup request qTD (3.5 in ehci-r10.pdf) 270 * 271 * qt_next ................ 03-00 H 272 * qt_altnext ............. 07-04 H 273 * qt_token ............... 0B-08 H 274 * 275 * [ buffer, buffer_hi ] loaded with "req". 276 */ 277 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 278 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 279 token = (0 << 31) | 280 (sizeof(*req) << 16) | 281 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); 282 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 283 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) { 284 debug("unable construct SETUP td\n"); 285 goto fail; 286 } 287 /* Update previous qTD! */ 288 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 289 tdp = &qtd[qtd_counter++].qt_next; 290 toggle = 1; 291 } 292 293 if (length > 0 || req == NULL) { 294 /* 295 * Setup request qTD (3.5 in ehci-r10.pdf) 296 * 297 * qt_next ................ 03-00 H 298 * qt_altnext ............. 07-04 H 299 * qt_token ............... 0B-08 H 300 * 301 * [ buffer, buffer_hi ] loaded with "buffer". 302 */ 303 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 304 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 305 token = (toggle << 31) | 306 (length << 16) | 307 ((req == NULL ? 1 : 0) << 15) | 308 (0 << 12) | 309 (3 << 10) | 310 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); 311 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 312 if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) { 313 debug("unable construct DATA td\n"); 314 goto fail; 315 } 316 /* Update previous qTD! */ 317 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 318 tdp = &qtd[qtd_counter++].qt_next; 319 } 320 321 if (req != NULL) { 322 /* 323 * Setup request qTD (3.5 in ehci-r10.pdf) 324 * 325 * qt_next ................ 03-00 H 326 * qt_altnext ............. 07-04 H 327 * qt_token ............... 0B-08 H 328 */ 329 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 330 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 331 token = (toggle << 31) | 332 (0 << 16) | 333 (1 << 15) | 334 (0 << 12) | 335 (3 << 10) | 336 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); 337 qtd[qtd_counter].qt_token = cpu_to_hc32(token); 338 /* Update previous qTD! */ 339 *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]); 340 tdp = &qtd[qtd_counter++].qt_next; 341 } 342 343 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh | QH_LINK_TYPE_QH); 344 345 /* Flush dcache */ 346 flush_dcache_range((uint32_t)&qh_list, 347 (uint32_t)&qh_list + sizeof(struct QH)); 348 flush_dcache_range((uint32_t)&qh, (uint32_t)&qh + sizeof(struct QH)); 349 flush_dcache_range((uint32_t)qtd, (uint32_t)qtd + sizeof(qtd)); 350 351 /* Set async. queue head pointer. */ 352 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list); 353 354 usbsts = ehci_readl(&hcor->or_usbsts); 355 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); 356 357 /* Enable async. schedule. */ 358 cmd = ehci_readl(&hcor->or_usbcmd); 359 cmd |= CMD_ASE; 360 ehci_writel(&hcor->or_usbcmd, cmd); 361 362 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS, 363 100 * 1000); 364 if (ret < 0) { 365 printf("EHCI fail timeout STD_ASS set\n"); 366 goto fail; 367 } 368 369 /* Wait for TDs to be processed. */ 370 ts = get_timer(0); 371 vtd = &qtd[qtd_counter - 1]; 372 timeout = USB_TIMEOUT_MS(pipe); 373 do { 374 /* Invalidate dcache */ 375 invalidate_dcache_range((uint32_t)&qh_list, 376 (uint32_t)&qh_list + sizeof(struct QH)); 377 invalidate_dcache_range((uint32_t)&qh, 378 (uint32_t)&qh + sizeof(struct QH)); 379 invalidate_dcache_range((uint32_t)qtd, 380 (uint32_t)qtd + sizeof(qtd)); 381 382 token = hc32_to_cpu(vtd->qt_token); 383 if (!(token & 0x80)) 384 break; 385 WATCHDOG_RESET(); 386 } while (get_timer(ts) < timeout); 387 388 /* Invalidate the memory area occupied by buffer */ 389 invalidate_dcache_range(((uint32_t)buffer & ~31), 390 ((uint32_t)buffer & ~31) + roundup(length, 32)); 391 392 /* Check that the TD processing happened */ 393 if (token & 0x80) { 394 printf("EHCI timed out on TD - token=%#x\n", token); 395 } 396 397 /* Disable async schedule. */ 398 cmd = ehci_readl(&hcor->or_usbcmd); 399 cmd &= ~CMD_ASE; 400 ehci_writel(&hcor->or_usbcmd, cmd); 401 402 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0, 403 100 * 1000); 404 if (ret < 0) { 405 printf("EHCI fail timeout STD_ASS reset\n"); 406 goto fail; 407 } 408 409 token = hc32_to_cpu(qh.qh_overlay.qt_token); 410 if (!(token & 0x80)) { 411 debug("TOKEN=%#x\n", token); 412 switch (token & 0xfc) { 413 case 0: 414 toggle = token >> 31; 415 usb_settoggle(dev, usb_pipeendpoint(pipe), 416 usb_pipeout(pipe), toggle); 417 dev->status = 0; 418 break; 419 case 0x40: 420 dev->status = USB_ST_STALLED; 421 break; 422 case 0xa0: 423 case 0x20: 424 dev->status = USB_ST_BUF_ERR; 425 break; 426 case 0x50: 427 case 0x10: 428 dev->status = USB_ST_BABBLE_DET; 429 break; 430 default: 431 dev->status = USB_ST_CRC_ERR; 432 if ((token & 0x40) == 0x40) 433 dev->status |= USB_ST_STALLED; 434 break; 435 } 436 dev->act_len = length - ((token >> 16) & 0x7fff); 437 } else { 438 dev->act_len = 0; 439 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", 440 dev->devnum, ehci_readl(&hcor->or_usbsts), 441 ehci_readl(&hcor->or_portsc[0]), 442 ehci_readl(&hcor->or_portsc[1])); 443 } 444 445 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; 446 447 fail: 448 return -1; 449 } 450 451 static inline int min3(int a, int b, int c) 452 { 453 454 if (b < a) 455 a = b; 456 if (c < a) 457 a = c; 458 return a; 459 } 460 461 int 462 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, 463 int length, struct devrequest *req) 464 { 465 uint8_t tmpbuf[4]; 466 u16 typeReq; 467 void *srcptr = NULL; 468 int len, srclen; 469 uint32_t reg; 470 uint32_t *status_reg; 471 472 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { 473 printf("The request port(%d) is not configured\n", 474 le16_to_cpu(req->index) - 1); 475 return -1; 476 } 477 status_reg = (uint32_t *)&hcor->or_portsc[ 478 le16_to_cpu(req->index) - 1]; 479 srclen = 0; 480 481 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", 482 req->request, req->request, 483 req->requesttype, req->requesttype, 484 le16_to_cpu(req->value), le16_to_cpu(req->index)); 485 486 typeReq = req->request | req->requesttype << 8; 487 488 switch (typeReq) { 489 case DeviceRequest | USB_REQ_GET_DESCRIPTOR: 490 switch (le16_to_cpu(req->value) >> 8) { 491 case USB_DT_DEVICE: 492 debug("USB_DT_DEVICE request\n"); 493 srcptr = &descriptor.device; 494 srclen = 0x12; 495 break; 496 case USB_DT_CONFIG: 497 debug("USB_DT_CONFIG config\n"); 498 srcptr = &descriptor.config; 499 srclen = 0x19; 500 break; 501 case USB_DT_STRING: 502 debug("USB_DT_STRING config\n"); 503 switch (le16_to_cpu(req->value) & 0xff) { 504 case 0: /* Language */ 505 srcptr = "\4\3\1\0"; 506 srclen = 4; 507 break; 508 case 1: /* Vendor */ 509 srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; 510 srclen = 14; 511 break; 512 case 2: /* Product */ 513 srcptr = "\52\3E\0H\0C\0I\0 " 514 "\0H\0o\0s\0t\0 " 515 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; 516 srclen = 42; 517 break; 518 default: 519 debug("unknown value DT_STRING %x\n", 520 le16_to_cpu(req->value)); 521 goto unknown; 522 } 523 break; 524 default: 525 debug("unknown value %x\n", le16_to_cpu(req->value)); 526 goto unknown; 527 } 528 break; 529 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): 530 switch (le16_to_cpu(req->value) >> 8) { 531 case USB_DT_HUB: 532 debug("USB_DT_HUB config\n"); 533 srcptr = &descriptor.hub; 534 srclen = 0x8; 535 break; 536 default: 537 debug("unknown value %x\n", le16_to_cpu(req->value)); 538 goto unknown; 539 } 540 break; 541 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): 542 debug("USB_REQ_SET_ADDRESS\n"); 543 rootdev = le16_to_cpu(req->value); 544 break; 545 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: 546 debug("USB_REQ_SET_CONFIGURATION\n"); 547 /* Nothing to do */ 548 break; 549 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): 550 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ 551 tmpbuf[1] = 0; 552 srcptr = tmpbuf; 553 srclen = 2; 554 break; 555 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): 556 memset(tmpbuf, 0, 4); 557 reg = ehci_readl(status_reg); 558 if (reg & EHCI_PS_CS) 559 tmpbuf[0] |= USB_PORT_STAT_CONNECTION; 560 if (reg & EHCI_PS_PE) 561 tmpbuf[0] |= USB_PORT_STAT_ENABLE; 562 if (reg & EHCI_PS_SUSP) 563 tmpbuf[0] |= USB_PORT_STAT_SUSPEND; 564 if (reg & EHCI_PS_OCA) 565 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; 566 if (reg & EHCI_PS_PR) 567 tmpbuf[0] |= USB_PORT_STAT_RESET; 568 if (reg & EHCI_PS_PP) 569 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; 570 571 if (ehci_is_TDI()) { 572 switch ((reg >> 26) & 3) { 573 case 0: 574 break; 575 case 1: 576 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; 577 break; 578 case 2: 579 default: 580 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 581 break; 582 } 583 } else { 584 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 585 } 586 587 if (reg & EHCI_PS_CSC) 588 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; 589 if (reg & EHCI_PS_PEC) 590 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; 591 if (reg & EHCI_PS_OCC) 592 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; 593 if (portreset & (1 << le16_to_cpu(req->index))) 594 tmpbuf[2] |= USB_PORT_STAT_C_RESET; 595 596 srcptr = tmpbuf; 597 srclen = 4; 598 break; 599 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 600 reg = ehci_readl(status_reg); 601 reg &= ~EHCI_PS_CLEAR; 602 switch (le16_to_cpu(req->value)) { 603 case USB_PORT_FEAT_ENABLE: 604 reg |= EHCI_PS_PE; 605 ehci_writel(status_reg, reg); 606 break; 607 case USB_PORT_FEAT_POWER: 608 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) { 609 reg |= EHCI_PS_PP; 610 ehci_writel(status_reg, reg); 611 } 612 break; 613 case USB_PORT_FEAT_RESET: 614 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && 615 !ehci_is_TDI() && 616 EHCI_PS_IS_LOWSPEED(reg)) { 617 /* Low speed device, give up ownership. */ 618 debug("port %d low speed --> companion\n", 619 req->index - 1); 620 reg |= EHCI_PS_PO; 621 ehci_writel(status_reg, reg); 622 break; 623 } else { 624 int ret; 625 626 reg |= EHCI_PS_PR; 627 reg &= ~EHCI_PS_PE; 628 ehci_writel(status_reg, reg); 629 /* 630 * caller must wait, then call GetPortStatus 631 * usb 2.0 specification say 50 ms resets on 632 * root 633 */ 634 ehci_powerup_fixup(status_reg, ®); 635 636 ehci_writel(status_reg, reg & ~EHCI_PS_PR); 637 /* 638 * A host controller must terminate the reset 639 * and stabilize the state of the port within 640 * 2 milliseconds 641 */ 642 ret = handshake(status_reg, EHCI_PS_PR, 0, 643 2 * 1000); 644 if (!ret) 645 portreset |= 646 1 << le16_to_cpu(req->index); 647 else 648 printf("port(%d) reset error\n", 649 le16_to_cpu(req->index) - 1); 650 } 651 break; 652 default: 653 debug("unknown feature %x\n", le16_to_cpu(req->value)); 654 goto unknown; 655 } 656 /* unblock posted writes */ 657 (void) ehci_readl(&hcor->or_usbcmd); 658 break; 659 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 660 reg = ehci_readl(status_reg); 661 switch (le16_to_cpu(req->value)) { 662 case USB_PORT_FEAT_ENABLE: 663 reg &= ~EHCI_PS_PE; 664 break; 665 case USB_PORT_FEAT_C_ENABLE: 666 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; 667 break; 668 case USB_PORT_FEAT_POWER: 669 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) 670 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); 671 case USB_PORT_FEAT_C_CONNECTION: 672 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; 673 break; 674 case USB_PORT_FEAT_OVER_CURRENT: 675 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; 676 break; 677 case USB_PORT_FEAT_C_RESET: 678 portreset &= ~(1 << le16_to_cpu(req->index)); 679 break; 680 default: 681 debug("unknown feature %x\n", le16_to_cpu(req->value)); 682 goto unknown; 683 } 684 ehci_writel(status_reg, reg); 685 /* unblock posted write */ 686 (void) ehci_readl(&hcor->or_usbcmd); 687 break; 688 default: 689 debug("Unknown request\n"); 690 goto unknown; 691 } 692 693 mdelay(1); 694 len = min3(srclen, le16_to_cpu(req->length), length); 695 if (srcptr != NULL && len > 0) 696 memcpy(buffer, srcptr, len); 697 else 698 debug("Len is 0\n"); 699 700 dev->act_len = len; 701 dev->status = 0; 702 return 0; 703 704 unknown: 705 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", 706 req->requesttype, req->request, le16_to_cpu(req->value), 707 le16_to_cpu(req->index), le16_to_cpu(req->length)); 708 709 dev->act_len = 0; 710 dev->status = USB_ST_STALLED; 711 return -1; 712 } 713 714 int usb_lowlevel_stop(void) 715 { 716 return ehci_hcd_stop(); 717 } 718 719 int usb_lowlevel_init(void) 720 { 721 uint32_t reg; 722 uint32_t cmd; 723 724 if (ehci_hcd_init() != 0) 725 return -1; 726 727 /* EHCI spec section 4.1 */ 728 if (ehci_reset() != 0) 729 return -1; 730 731 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) 732 if (ehci_hcd_init() != 0) 733 return -1; 734 #endif 735 736 /* Set head of reclaim list */ 737 memset(&qh_list, 0, sizeof(qh_list)); 738 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 739 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); 740 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); 741 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 742 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 743 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40); 744 745 reg = ehci_readl(&hccr->cr_hcsparams); 746 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); 747 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); 748 /* Port Indicators */ 749 if (HCS_INDICATOR(reg)) 750 descriptor.hub.wHubCharacteristics |= 0x80; 751 /* Port Power Control */ 752 if (HCS_PPC(reg)) 753 descriptor.hub.wHubCharacteristics |= 0x01; 754 755 /* Start the host controller. */ 756 cmd = ehci_readl(&hcor->or_usbcmd); 757 /* 758 * Philips, Intel, and maybe others need CMD_RUN before the 759 * root hub will detect new devices (why?); NEC doesn't 760 */ 761 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 762 cmd |= CMD_RUN; 763 ehci_writel(&hcor->or_usbcmd, cmd); 764 765 /* take control over the ports */ 766 cmd = ehci_readl(&hcor->or_configflag); 767 cmd |= FLAG_CF; 768 ehci_writel(&hcor->or_configflag, cmd); 769 /* unblock posted write */ 770 cmd = ehci_readl(&hcor->or_usbcmd); 771 mdelay(5); 772 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); 773 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); 774 775 rootdev = 0; 776 777 return 0; 778 } 779 780 int 781 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 782 int length) 783 { 784 785 if (usb_pipetype(pipe) != PIPE_BULK) { 786 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); 787 return -1; 788 } 789 return ehci_submit_async(dev, pipe, buffer, length, NULL); 790 } 791 792 int 793 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 794 int length, struct devrequest *setup) 795 { 796 797 if (usb_pipetype(pipe) != PIPE_CONTROL) { 798 debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); 799 return -1; 800 } 801 802 if (usb_pipedevice(pipe) == rootdev) { 803 if (rootdev == 0) 804 dev->speed = USB_SPEED_HIGH; 805 return ehci_submit_root(dev, pipe, buffer, length, setup); 806 } 807 return ehci_submit_async(dev, pipe, buffer, length, setup); 808 } 809 810 int 811 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 812 int length, int interval) 813 { 814 815 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", 816 dev, pipe, buffer, length, interval); 817 return ehci_submit_async(dev, pipe, buffer, length, NULL); 818 } 819