1 /*- 2 * Copyright (c) 2007-2008, Juniper Networks, Inc. 3 * Copyright (c) 2008, Excito Elektronik i Skåne AB 4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it> 5 * 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation version 2 of 11 * the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 #include <common.h> 24 #include <asm/byteorder.h> 25 #include <usb.h> 26 #include <asm/io.h> 27 #include <malloc.h> 28 #include <watchdog.h> 29 #ifdef CONFIG_USB_KEYBOARD 30 #include <stdio_dev.h> 31 extern unsigned char new[]; 32 #endif 33 34 #include "ehci.h" 35 36 int rootdev; 37 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ 38 volatile struct ehci_hcor *hcor; 39 40 static uint16_t portreset; 41 static struct QH qh_list __attribute__((aligned(32))); 42 43 static struct descriptor { 44 struct usb_hub_descriptor hub; 45 struct usb_device_descriptor device; 46 struct usb_linux_config_descriptor config; 47 struct usb_linux_interface_descriptor interface; 48 struct usb_endpoint_descriptor endpoint; 49 } __attribute__ ((packed)) descriptor = { 50 { 51 0x8, /* bDescLength */ 52 0x29, /* bDescriptorType: hub descriptor */ 53 2, /* bNrPorts -- runtime modified */ 54 0, /* wHubCharacteristics */ 55 0xff, /* bPwrOn2PwrGood */ 56 0, /* bHubCntrCurrent */ 57 {}, /* Device removable */ 58 {} /* at most 7 ports! XXX */ 59 }, 60 { 61 0x12, /* bLength */ 62 1, /* bDescriptorType: UDESC_DEVICE */ 63 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */ 64 9, /* bDeviceClass: UDCLASS_HUB */ 65 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ 66 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ 67 64, /* bMaxPacketSize: 64 bytes */ 68 0x0000, /* idVendor */ 69 0x0000, /* idProduct */ 70 cpu_to_le16(0x0100), /* bcdDevice */ 71 1, /* iManufacturer */ 72 2, /* iProduct */ 73 0, /* iSerialNumber */ 74 1 /* bNumConfigurations: 1 */ 75 }, 76 { 77 0x9, 78 2, /* bDescriptorType: UDESC_CONFIG */ 79 cpu_to_le16(0x19), 80 1, /* bNumInterface */ 81 1, /* bConfigurationValue */ 82 0, /* iConfiguration */ 83 0x40, /* bmAttributes: UC_SELF_POWER */ 84 0 /* bMaxPower */ 85 }, 86 { 87 0x9, /* bLength */ 88 4, /* bDescriptorType: UDESC_INTERFACE */ 89 0, /* bInterfaceNumber */ 90 0, /* bAlternateSetting */ 91 1, /* bNumEndpoints */ 92 9, /* bInterfaceClass: UICLASS_HUB */ 93 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ 94 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ 95 0 /* iInterface */ 96 }, 97 { 98 0x7, /* bLength */ 99 5, /* bDescriptorType: UDESC_ENDPOINT */ 100 0x81, /* bEndpointAddress: 101 * UE_DIR_IN | EHCI_INTR_ENDPT 102 */ 103 3, /* bmAttributes: UE_INTERRUPT */ 104 8, /* wMaxPacketSize */ 105 255 /* bInterval */ 106 }, 107 }; 108 109 #if defined(CONFIG_EHCI_IS_TDI) 110 #define ehci_is_TDI() (1) 111 #else 112 #define ehci_is_TDI() (0) 113 #endif 114 115 #if defined(CONFIG_EHCI_DCACHE) 116 /* 117 * Routines to handle (flush/invalidate) the dcache for the QH and qTD 118 * structures and data buffers. This is needed on platforms using this 119 * EHCI support with dcache enabled. 120 */ 121 static void flush_invalidate(u32 addr, int size, int flush) 122 { 123 if (flush) 124 flush_dcache_range(addr, addr + size); 125 else 126 invalidate_dcache_range(addr, addr + size); 127 } 128 129 static void cache_qtd(struct qTD *qtd, int flush) 130 { 131 u32 *ptr = (u32 *)qtd->qt_buffer[0]; 132 int len = (qtd->qt_token & 0x7fff0000) >> 16; 133 134 flush_invalidate((u32)qtd, sizeof(struct qTD), flush); 135 if (ptr && len) 136 flush_invalidate((u32)ptr, len, flush); 137 } 138 139 140 static inline struct QH *qh_addr(struct QH *qh) 141 { 142 return (struct QH *)((u32)qh & 0xffffffe0); 143 } 144 145 static void cache_qh(struct QH *qh, int flush) 146 { 147 struct qTD *qtd; 148 struct qTD *next; 149 static struct qTD *first_qtd; 150 151 /* 152 * Walk the QH list and flush/invalidate all entries 153 */ 154 while (1) { 155 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush); 156 if ((u32)qh & QH_LINK_TYPE_QH) 157 break; 158 qh = qh_addr(qh); 159 qh = (struct QH *)qh->qh_link; 160 } 161 qh = qh_addr(qh); 162 163 /* 164 * Save first qTD pointer, needed for invalidating pass on this QH 165 */ 166 if (flush) 167 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay & 168 0xffffffe0); 169 else 170 qtd = first_qtd; 171 172 /* 173 * Walk the qTD list and flush/invalidate all entries 174 */ 175 while (1) { 176 if (qtd == NULL) 177 break; 178 cache_qtd(qtd, flush); 179 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0); 180 if (next == qtd) 181 break; 182 qtd = next; 183 } 184 } 185 186 static inline void ehci_flush_dcache(struct QH *qh) 187 { 188 cache_qh(qh, 1); 189 } 190 191 static inline void ehci_invalidate_dcache(struct QH *qh) 192 { 193 cache_qh(qh, 0); 194 } 195 #else /* CONFIG_EHCI_DCACHE */ 196 /* 197 * 198 */ 199 static inline void ehci_flush_dcache(struct QH *qh) 200 { 201 } 202 203 static inline void ehci_invalidate_dcache(struct QH *qh) 204 { 205 } 206 #endif /* CONFIG_EHCI_DCACHE */ 207 208 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) 209 { 210 uint32_t result; 211 do { 212 result = ehci_readl(ptr); 213 udelay(5); 214 if (result == ~(uint32_t)0) 215 return -1; 216 result &= mask; 217 if (result == done) 218 return 0; 219 usec--; 220 } while (usec > 0); 221 return -1; 222 } 223 224 static void ehci_free(void *p, size_t sz) 225 { 226 227 } 228 229 static int ehci_reset(void) 230 { 231 uint32_t cmd; 232 uint32_t tmp; 233 uint32_t *reg_ptr; 234 int ret = 0; 235 236 cmd = ehci_readl(&hcor->or_usbcmd); 237 cmd = (cmd & ~CMD_RUN) | CMD_RESET; 238 ehci_writel(&hcor->or_usbcmd, cmd); 239 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000); 240 if (ret < 0) { 241 printf("EHCI fail to reset\n"); 242 goto out; 243 } 244 245 if (ehci_is_TDI()) { 246 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE); 247 tmp = ehci_readl(reg_ptr); 248 tmp |= USBMODE_CM_HC; 249 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN) 250 tmp |= USBMODE_BE; 251 #endif 252 ehci_writel(reg_ptr, tmp); 253 } 254 out: 255 return ret; 256 } 257 258 static void *ehci_alloc(size_t sz, size_t align) 259 { 260 static struct QH qh __attribute__((aligned(32))); 261 static struct qTD td[3] __attribute__((aligned (32))); 262 static int ntds; 263 void *p; 264 265 switch (sz) { 266 case sizeof(struct QH): 267 p = &qh; 268 ntds = 0; 269 break; 270 case sizeof(struct qTD): 271 if (ntds == 3) { 272 debug("out of TDs\n"); 273 return NULL; 274 } 275 p = &td[ntds]; 276 ntds++; 277 break; 278 default: 279 debug("unknown allocation size\n"); 280 return NULL; 281 } 282 283 memset(p, 0, sz); 284 return p; 285 } 286 287 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) 288 { 289 uint32_t addr, delta, next; 290 int idx; 291 292 addr = (uint32_t) buf; 293 idx = 0; 294 while (idx < 5) { 295 td->qt_buffer[idx] = cpu_to_hc32(addr); 296 td->qt_buffer_hi[idx] = 0; 297 next = (addr + 4096) & ~4095; 298 delta = next - addr; 299 if (delta >= sz) 300 break; 301 sz -= delta; 302 addr = next; 303 idx++; 304 } 305 306 if (idx == 5) { 307 debug("out of buffer pointers (%u bytes left)\n", sz); 308 return -1; 309 } 310 311 return 0; 312 } 313 314 static int 315 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, 316 int length, struct devrequest *req) 317 { 318 struct QH *qh; 319 struct qTD *td; 320 volatile struct qTD *vtd; 321 unsigned long ts; 322 uint32_t *tdp; 323 uint32_t endpt, token, usbsts; 324 uint32_t c, toggle; 325 uint32_t cmd; 326 int timeout; 327 int ret = 0; 328 329 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe, 330 buffer, length, req); 331 if (req != NULL) 332 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n", 333 req->request, req->request, 334 req->requesttype, req->requesttype, 335 le16_to_cpu(req->value), le16_to_cpu(req->value), 336 le16_to_cpu(req->index)); 337 338 qh = ehci_alloc(sizeof(struct QH), 32); 339 if (qh == NULL) { 340 debug("unable to allocate QH\n"); 341 return -1; 342 } 343 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 344 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && 345 usb_pipeendpoint(pipe) == 0) ? 1 : 0; 346 endpt = (8 << 28) | 347 (c << 27) | 348 (usb_maxpacket(dev, pipe) << 16) | 349 (0 << 15) | 350 (1 << 14) | 351 (usb_pipespeed(pipe) << 12) | 352 (usb_pipeendpoint(pipe) << 8) | 353 (0 << 7) | (usb_pipedevice(pipe) << 0); 354 qh->qh_endpt1 = cpu_to_hc32(endpt); 355 endpt = (1 << 30) | 356 (dev->portnr << 23) | 357 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0); 358 qh->qh_endpt2 = cpu_to_hc32(endpt); 359 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 360 361 td = NULL; 362 tdp = &qh->qh_overlay.qt_next; 363 364 toggle = 365 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); 366 367 if (req != NULL) { 368 td = ehci_alloc(sizeof(struct qTD), 32); 369 if (td == NULL) { 370 debug("unable to allocate SETUP td\n"); 371 goto fail; 372 } 373 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 374 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 375 token = (0 << 31) | 376 (sizeof(*req) << 16) | 377 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); 378 td->qt_token = cpu_to_hc32(token); 379 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) { 380 debug("unable construct SETUP td\n"); 381 ehci_free(td, sizeof(*td)); 382 goto fail; 383 } 384 *tdp = cpu_to_hc32((uint32_t) td); 385 tdp = &td->qt_next; 386 toggle = 1; 387 } 388 389 if (length > 0 || req == NULL) { 390 td = ehci_alloc(sizeof(struct qTD), 32); 391 if (td == NULL) { 392 debug("unable to allocate DATA td\n"); 393 goto fail; 394 } 395 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 396 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 397 token = (toggle << 31) | 398 (length << 16) | 399 ((req == NULL ? 1 : 0) << 15) | 400 (0 << 12) | 401 (3 << 10) | 402 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); 403 td->qt_token = cpu_to_hc32(token); 404 if (ehci_td_buffer(td, buffer, length) != 0) { 405 debug("unable construct DATA td\n"); 406 ehci_free(td, sizeof(*td)); 407 goto fail; 408 } 409 *tdp = cpu_to_hc32((uint32_t) td); 410 tdp = &td->qt_next; 411 } 412 413 if (req != NULL) { 414 td = ehci_alloc(sizeof(struct qTD), 32); 415 if (td == NULL) { 416 debug("unable to allocate ACK td\n"); 417 goto fail; 418 } 419 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 420 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 421 token = (toggle << 31) | 422 (0 << 16) | 423 (1 << 15) | 424 (0 << 12) | 425 (3 << 10) | 426 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); 427 td->qt_token = cpu_to_hc32(token); 428 *tdp = cpu_to_hc32((uint32_t) td); 429 tdp = &td->qt_next; 430 } 431 432 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH); 433 434 /* Flush dcache */ 435 ehci_flush_dcache(&qh_list); 436 437 usbsts = ehci_readl(&hcor->or_usbsts); 438 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f)); 439 440 /* Enable async. schedule. */ 441 cmd = ehci_readl(&hcor->or_usbcmd); 442 cmd |= CMD_ASE; 443 ehci_writel(&hcor->or_usbcmd, cmd); 444 445 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS, 446 100 * 1000); 447 if (ret < 0) { 448 printf("EHCI fail timeout STD_ASS set\n"); 449 goto fail; 450 } 451 452 /* Wait for TDs to be processed. */ 453 ts = get_timer(0); 454 vtd = td; 455 timeout = USB_TIMEOUT_MS(pipe); 456 do { 457 /* Invalidate dcache */ 458 ehci_invalidate_dcache(&qh_list); 459 token = hc32_to_cpu(vtd->qt_token); 460 if (!(token & 0x80)) 461 break; 462 WATCHDOG_RESET(); 463 } while (get_timer(ts) < timeout); 464 465 /* Check that the TD processing happened */ 466 if (token & 0x80) { 467 printf("EHCI timed out on TD - token=%#x\n", token); 468 } 469 470 /* Disable async schedule. */ 471 cmd = ehci_readl(&hcor->or_usbcmd); 472 cmd &= ~CMD_ASE; 473 ehci_writel(&hcor->or_usbcmd, cmd); 474 475 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0, 476 100 * 1000); 477 if (ret < 0) { 478 printf("EHCI fail timeout STD_ASS reset\n"); 479 goto fail; 480 } 481 482 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 483 484 token = hc32_to_cpu(qh->qh_overlay.qt_token); 485 if (!(token & 0x80)) { 486 debug("TOKEN=%#x\n", token); 487 switch (token & 0xfc) { 488 case 0: 489 toggle = token >> 31; 490 usb_settoggle(dev, usb_pipeendpoint(pipe), 491 usb_pipeout(pipe), toggle); 492 dev->status = 0; 493 break; 494 case 0x40: 495 dev->status = USB_ST_STALLED; 496 break; 497 case 0xa0: 498 case 0x20: 499 dev->status = USB_ST_BUF_ERR; 500 break; 501 case 0x50: 502 case 0x10: 503 dev->status = USB_ST_BABBLE_DET; 504 break; 505 default: 506 dev->status = USB_ST_CRC_ERR; 507 if ((token & 0x40) == 0x40) 508 dev->status |= USB_ST_STALLED; 509 break; 510 } 511 dev->act_len = length - ((token >> 16) & 0x7fff); 512 } else { 513 dev->act_len = 0; 514 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", 515 dev->devnum, ehci_readl(&hcor->or_usbsts), 516 ehci_readl(&hcor->or_portsc[0]), 517 ehci_readl(&hcor->or_portsc[1])); 518 } 519 520 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; 521 522 fail: 523 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next); 524 while (td != (void *)QT_NEXT_TERMINATE) { 525 qh->qh_overlay.qt_next = td->qt_next; 526 ehci_free(td, sizeof(*td)); 527 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next); 528 } 529 ehci_free(qh, sizeof(*qh)); 530 return -1; 531 } 532 533 static inline int min3(int a, int b, int c) 534 { 535 536 if (b < a) 537 a = b; 538 if (c < a) 539 a = c; 540 return a; 541 } 542 543 int 544 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, 545 int length, struct devrequest *req) 546 { 547 uint8_t tmpbuf[4]; 548 u16 typeReq; 549 void *srcptr = NULL; 550 int len, srclen; 551 uint32_t reg; 552 uint32_t *status_reg; 553 554 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) { 555 printf("The request port(%d) is not configured\n", 556 le16_to_cpu(req->index) - 1); 557 return -1; 558 } 559 status_reg = (uint32_t *)&hcor->or_portsc[ 560 le16_to_cpu(req->index) - 1]; 561 srclen = 0; 562 563 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n", 564 req->request, req->request, 565 req->requesttype, req->requesttype, 566 le16_to_cpu(req->value), le16_to_cpu(req->index)); 567 568 typeReq = req->request | req->requesttype << 8; 569 570 switch (typeReq) { 571 case DeviceRequest | USB_REQ_GET_DESCRIPTOR: 572 switch (le16_to_cpu(req->value) >> 8) { 573 case USB_DT_DEVICE: 574 debug("USB_DT_DEVICE request\n"); 575 srcptr = &descriptor.device; 576 srclen = 0x12; 577 break; 578 case USB_DT_CONFIG: 579 debug("USB_DT_CONFIG config\n"); 580 srcptr = &descriptor.config; 581 srclen = 0x19; 582 break; 583 case USB_DT_STRING: 584 debug("USB_DT_STRING config\n"); 585 switch (le16_to_cpu(req->value) & 0xff) { 586 case 0: /* Language */ 587 srcptr = "\4\3\1\0"; 588 srclen = 4; 589 break; 590 case 1: /* Vendor */ 591 srcptr = "\16\3u\0-\0b\0o\0o\0t\0"; 592 srclen = 14; 593 break; 594 case 2: /* Product */ 595 srcptr = "\52\3E\0H\0C\0I\0 " 596 "\0H\0o\0s\0t\0 " 597 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0"; 598 srclen = 42; 599 break; 600 default: 601 debug("unknown value DT_STRING %x\n", 602 le16_to_cpu(req->value)); 603 goto unknown; 604 } 605 break; 606 default: 607 debug("unknown value %x\n", le16_to_cpu(req->value)); 608 goto unknown; 609 } 610 break; 611 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): 612 switch (le16_to_cpu(req->value) >> 8) { 613 case USB_DT_HUB: 614 debug("USB_DT_HUB config\n"); 615 srcptr = &descriptor.hub; 616 srclen = 0x8; 617 break; 618 default: 619 debug("unknown value %x\n", le16_to_cpu(req->value)); 620 goto unknown; 621 } 622 break; 623 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): 624 debug("USB_REQ_SET_ADDRESS\n"); 625 rootdev = le16_to_cpu(req->value); 626 break; 627 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: 628 debug("USB_REQ_SET_CONFIGURATION\n"); 629 /* Nothing to do */ 630 break; 631 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): 632 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ 633 tmpbuf[1] = 0; 634 srcptr = tmpbuf; 635 srclen = 2; 636 break; 637 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): 638 memset(tmpbuf, 0, 4); 639 reg = ehci_readl(status_reg); 640 if (reg & EHCI_PS_CS) 641 tmpbuf[0] |= USB_PORT_STAT_CONNECTION; 642 if (reg & EHCI_PS_PE) 643 tmpbuf[0] |= USB_PORT_STAT_ENABLE; 644 if (reg & EHCI_PS_SUSP) 645 tmpbuf[0] |= USB_PORT_STAT_SUSPEND; 646 if (reg & EHCI_PS_OCA) 647 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; 648 if (reg & EHCI_PS_PR) 649 tmpbuf[0] |= USB_PORT_STAT_RESET; 650 if (reg & EHCI_PS_PP) 651 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; 652 653 if (ehci_is_TDI()) { 654 switch ((reg >> 26) & 3) { 655 case 0: 656 break; 657 case 1: 658 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8; 659 break; 660 case 2: 661 default: 662 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 663 break; 664 } 665 } else { 666 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; 667 } 668 669 if (reg & EHCI_PS_CSC) 670 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; 671 if (reg & EHCI_PS_PEC) 672 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; 673 if (reg & EHCI_PS_OCC) 674 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; 675 if (portreset & (1 << le16_to_cpu(req->index))) 676 tmpbuf[2] |= USB_PORT_STAT_C_RESET; 677 678 srcptr = tmpbuf; 679 srclen = 4; 680 break; 681 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 682 reg = ehci_readl(status_reg); 683 reg &= ~EHCI_PS_CLEAR; 684 switch (le16_to_cpu(req->value)) { 685 case USB_PORT_FEAT_ENABLE: 686 reg |= EHCI_PS_PE; 687 ehci_writel(status_reg, reg); 688 break; 689 case USB_PORT_FEAT_POWER: 690 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) { 691 reg |= EHCI_PS_PP; 692 ehci_writel(status_reg, reg); 693 } 694 break; 695 case USB_PORT_FEAT_RESET: 696 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && 697 !ehci_is_TDI() && 698 EHCI_PS_IS_LOWSPEED(reg)) { 699 /* Low speed device, give up ownership. */ 700 debug("port %d low speed --> companion\n", 701 req->index - 1); 702 reg |= EHCI_PS_PO; 703 ehci_writel(status_reg, reg); 704 break; 705 } else { 706 int ret; 707 708 reg |= EHCI_PS_PR; 709 reg &= ~EHCI_PS_PE; 710 ehci_writel(status_reg, reg); 711 /* 712 * caller must wait, then call GetPortStatus 713 * usb 2.0 specification say 50 ms resets on 714 * root 715 */ 716 wait_ms(50); 717 /* terminate the reset */ 718 ehci_writel(status_reg, reg & ~EHCI_PS_PR); 719 /* 720 * A host controller must terminate the reset 721 * and stabilize the state of the port within 722 * 2 milliseconds 723 */ 724 ret = handshake(status_reg, EHCI_PS_PR, 0, 725 2 * 1000); 726 if (!ret) 727 portreset |= 728 1 << le16_to_cpu(req->index); 729 else 730 printf("port(%d) reset error\n", 731 le16_to_cpu(req->index) - 1); 732 } 733 break; 734 default: 735 debug("unknown feature %x\n", le16_to_cpu(req->value)); 736 goto unknown; 737 } 738 /* unblock posted writes */ 739 (void) ehci_readl(&hcor->or_usbcmd); 740 break; 741 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): 742 reg = ehci_readl(status_reg); 743 switch (le16_to_cpu(req->value)) { 744 case USB_PORT_FEAT_ENABLE: 745 reg &= ~EHCI_PS_PE; 746 break; 747 case USB_PORT_FEAT_C_ENABLE: 748 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; 749 break; 750 case USB_PORT_FEAT_POWER: 751 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) 752 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); 753 case USB_PORT_FEAT_C_CONNECTION: 754 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; 755 break; 756 case USB_PORT_FEAT_OVER_CURRENT: 757 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; 758 break; 759 case USB_PORT_FEAT_C_RESET: 760 portreset &= ~(1 << le16_to_cpu(req->index)); 761 break; 762 default: 763 debug("unknown feature %x\n", le16_to_cpu(req->value)); 764 goto unknown; 765 } 766 ehci_writel(status_reg, reg); 767 /* unblock posted write */ 768 (void) ehci_readl(&hcor->or_usbcmd); 769 break; 770 default: 771 debug("Unknown request\n"); 772 goto unknown; 773 } 774 775 wait_ms(1); 776 len = min3(srclen, le16_to_cpu(req->length), length); 777 if (srcptr != NULL && len > 0) 778 memcpy(buffer, srcptr, len); 779 else 780 debug("Len is 0\n"); 781 782 dev->act_len = len; 783 dev->status = 0; 784 return 0; 785 786 unknown: 787 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n", 788 req->requesttype, req->request, le16_to_cpu(req->value), 789 le16_to_cpu(req->index), le16_to_cpu(req->length)); 790 791 dev->act_len = 0; 792 dev->status = USB_ST_STALLED; 793 return -1; 794 } 795 796 int usb_lowlevel_stop(void) 797 { 798 return ehci_hcd_stop(); 799 } 800 801 int usb_lowlevel_init(void) 802 { 803 uint32_t reg; 804 uint32_t cmd; 805 806 if (ehci_hcd_init() != 0) 807 return -1; 808 809 /* EHCI spec section 4.1 */ 810 if (ehci_reset() != 0) 811 return -1; 812 813 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET) 814 if (ehci_hcd_init() != 0) 815 return -1; 816 #endif 817 818 /* Set head of reclaim list */ 819 memset(&qh_list, 0, sizeof(qh_list)); 820 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH); 821 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12)); 822 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE); 823 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE); 824 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE); 825 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40); 826 827 /* Set async. queue head pointer. */ 828 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list); 829 830 reg = ehci_readl(&hccr->cr_hcsparams); 831 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); 832 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts); 833 /* Port Indicators */ 834 if (HCS_INDICATOR(reg)) 835 descriptor.hub.wHubCharacteristics |= 0x80; 836 /* Port Power Control */ 837 if (HCS_PPC(reg)) 838 descriptor.hub.wHubCharacteristics |= 0x01; 839 840 /* Start the host controller. */ 841 cmd = ehci_readl(&hcor->or_usbcmd); 842 /* 843 * Philips, Intel, and maybe others need CMD_RUN before the 844 * root hub will detect new devices (why?); NEC doesn't 845 */ 846 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 847 cmd |= CMD_RUN; 848 ehci_writel(&hcor->or_usbcmd, cmd); 849 850 /* take control over the ports */ 851 cmd = ehci_readl(&hcor->or_configflag); 852 cmd |= FLAG_CF; 853 ehci_writel(&hcor->or_configflag, cmd); 854 /* unblock posted write */ 855 cmd = ehci_readl(&hcor->or_usbcmd); 856 wait_ms(5); 857 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase)); 858 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff); 859 860 rootdev = 0; 861 862 return 0; 863 } 864 865 int 866 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 867 int length) 868 { 869 870 if (usb_pipetype(pipe) != PIPE_BULK) { 871 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); 872 return -1; 873 } 874 return ehci_submit_async(dev, pipe, buffer, length, NULL); 875 } 876 877 int 878 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 879 int length, struct devrequest *setup) 880 { 881 882 if (usb_pipetype(pipe) != PIPE_CONTROL) { 883 debug("non-control pipe (type=%lu)", usb_pipetype(pipe)); 884 return -1; 885 } 886 887 if (usb_pipedevice(pipe) == rootdev) { 888 if (rootdev == 0) 889 dev->speed = USB_SPEED_HIGH; 890 return ehci_submit_root(dev, pipe, buffer, length, setup); 891 } 892 return ehci_submit_async(dev, pipe, buffer, length, setup); 893 } 894 895 int 896 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, 897 int length, int interval) 898 { 899 900 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", 901 dev, pipe, buffer, length, interval); 902 return ehci_submit_async(dev, pipe, buffer, length, NULL); 903 } 904 905 #ifdef CONFIG_SYS_USB_EVENT_POLL 906 /* 907 * This function polls for USB keyboard data. 908 */ 909 void usb_event_poll() 910 { 911 struct stdio_dev *dev; 912 struct usb_device *usb_kbd_dev; 913 struct usb_interface *iface; 914 struct usb_endpoint_descriptor *ep; 915 int pipe; 916 int maxp; 917 918 /* Get the pointer to USB Keyboard device pointer */ 919 dev = stdio_get_by_name("usbkbd"); 920 usb_kbd_dev = (struct usb_device *)dev->priv; 921 iface = &usb_kbd_dev->config.if_desc[0]; 922 ep = &iface->ep_desc[0]; 923 pipe = usb_rcvintpipe(usb_kbd_dev, ep->bEndpointAddress); 924 925 /* Submit a interrupt transfer request */ 926 maxp = usb_maxpacket(usb_kbd_dev, pipe); 927 usb_submit_int_msg(usb_kbd_dev, pipe, &new[0], 928 maxp > 8 ? 8 : maxp, ep->bInterval); 929 } 930 #endif /* CONFIG_SYS_USB_EVENT_POLL */ 931