1 /* 2 * drivers/usb/gadget/dwc2_udc_otg.c 3 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers 4 * 5 * Copyright (C) 2008 for Samsung Electronics 6 * 7 * BSP Support for Samsung's UDC driver 8 * available at: 9 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git 10 * 11 * State machine bugfixes: 12 * Marek Szyprowski <m.szyprowski@samsung.com> 13 * 14 * Ported to u-boot: 15 * Marek Szyprowski <m.szyprowski@samsung.com> 16 * Lukasz Majewski <l.majewski@samsumg.com> 17 * 18 * SPDX-License-Identifier: GPL-2.0+ 19 */ 20 #undef DEBUG 21 #include <common.h> 22 #include <linux/errno.h> 23 #include <linux/list.h> 24 #include <malloc.h> 25 26 #include <linux/usb/ch9.h> 27 #include <linux/usb/gadget.h> 28 29 #include <asm/byteorder.h> 30 #include <asm/unaligned.h> 31 #include <asm/io.h> 32 33 #include <asm/mach-types.h> 34 35 #include "dwc2_udc_otg_regs.h" 36 #include "dwc2_udc_otg_priv.h" 37 #include <usb/lin_gadget_compat.h> 38 39 /***********************************************************/ 40 41 #define OTG_DMA_MODE 1 42 43 #define DEBUG_SETUP 0 44 #define DEBUG_EP0 0 45 #define DEBUG_ISR 0 46 #define DEBUG_OUT_EP 0 47 #define DEBUG_IN_EP 0 48 49 #include <usb/dwc2_udc.h> 50 51 #define EP0_CON 0 52 #define EP_MASK 0xF 53 54 static char *state_names[] = { 55 "WAIT_FOR_SETUP", 56 "DATA_STATE_XMIT", 57 "DATA_STATE_NEED_ZLP", 58 "WAIT_FOR_OUT_STATUS", 59 "DATA_STATE_RECV", 60 "WAIT_FOR_COMPLETE", 61 "WAIT_FOR_OUT_COMPLETE", 62 "WAIT_FOR_IN_COMPLETE", 63 "WAIT_FOR_NULL_COMPLETE", 64 }; 65 66 #define DRIVER_VERSION "15 March 2009" 67 68 struct dwc2_udc *the_controller; 69 70 static const char driver_name[] = "dwc2-udc"; 71 static const char ep0name[] = "ep0-control"; 72 73 /* Max packet size*/ 74 static unsigned int ep0_fifo_size = 64; 75 static unsigned int ep_fifo_size = 512; 76 static unsigned int ep_fifo_size2 = 1024; 77 static int reset_available = 1; 78 79 static struct usb_ctrlrequest *usb_ctrl; 80 static dma_addr_t usb_ctrl_dma_addr; 81 82 /* 83 Local declarations. 84 */ 85 static int dwc2_ep_enable(struct usb_ep *ep, 86 const struct usb_endpoint_descriptor *); 87 static int dwc2_ep_disable(struct usb_ep *ep); 88 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, 89 gfp_t gfp_flags); 90 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *); 91 92 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags); 93 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *); 94 static int dwc2_fifo_status(struct usb_ep *ep); 95 static void dwc2_fifo_flush(struct usb_ep *ep); 96 static void dwc2_ep0_read(struct dwc2_udc *dev); 97 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep); 98 static void dwc2_handle_ep0(struct dwc2_udc *dev); 99 static int dwc2_ep0_write(struct dwc2_udc *dev); 100 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req); 101 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status); 102 static void stop_activity(struct dwc2_udc *dev, 103 struct usb_gadget_driver *driver); 104 static int udc_enable(struct dwc2_udc *dev); 105 static void udc_set_address(struct dwc2_udc *dev, unsigned char address); 106 static void reconfig_usbd(struct dwc2_udc *dev); 107 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed); 108 static void nuke(struct dwc2_ep *ep, int status); 109 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value); 110 static void dwc2_udc_set_nak(struct dwc2_ep *ep); 111 112 void set_udc_gadget_private_data(void *p) 113 { 114 debug_cond(DEBUG_SETUP != 0, 115 "%s: the_controller: 0x%p, p: 0x%p\n", __func__, 116 the_controller, p); 117 the_controller->gadget.dev.device_data = p; 118 } 119 120 void *get_udc_gadget_private_data(struct usb_gadget *gadget) 121 { 122 return gadget->dev.device_data; 123 } 124 125 static struct usb_ep_ops dwc2_ep_ops = { 126 .enable = dwc2_ep_enable, 127 .disable = dwc2_ep_disable, 128 129 .alloc_request = dwc2_alloc_request, 130 .free_request = dwc2_free_request, 131 132 .queue = dwc2_queue, 133 .dequeue = dwc2_dequeue, 134 135 .set_halt = dwc2_udc_set_halt, 136 .fifo_status = dwc2_fifo_status, 137 .fifo_flush = dwc2_fifo_flush, 138 }; 139 140 #define create_proc_files() do {} while (0) 141 #define remove_proc_files() do {} while (0) 142 143 /***********************************************************/ 144 145 void __iomem *regs_otg; 146 struct dwc2_usbotg_reg *reg; 147 148 bool dfu_usb_get_reset(void) 149 { 150 return !!(readl(®->gintsts) & INT_RESET); 151 } 152 153 __weak void otg_phy_init(struct dwc2_udc *dev) {} 154 __weak void otg_phy_off(struct dwc2_udc *dev) {} 155 156 /***********************************************************/ 157 158 #include "dwc2_udc_otg_xfer_dma.c" 159 160 /* 161 * udc_disable - disable USB device controller 162 */ 163 static void udc_disable(struct dwc2_udc *dev) 164 { 165 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); 166 167 udc_set_address(dev, 0); 168 169 dev->ep0state = WAIT_FOR_SETUP; 170 dev->gadget.speed = USB_SPEED_UNKNOWN; 171 dev->usb_address = 0; 172 dev->connected = 0; 173 174 otg_phy_off(dev); 175 } 176 177 /* 178 * udc_reinit - initialize software state 179 */ 180 static void udc_reinit(struct dwc2_udc *dev) 181 { 182 unsigned int i; 183 184 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); 185 186 /* device/ep0 records init */ 187 INIT_LIST_HEAD(&dev->gadget.ep_list); 188 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); 189 dev->ep0state = WAIT_FOR_SETUP; 190 191 /* basic endpoint records init */ 192 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) { 193 struct dwc2_ep *ep = &dev->ep[i]; 194 195 if (i != 0) 196 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); 197 198 ep->desc = 0; 199 ep->stopped = 0; 200 INIT_LIST_HEAD(&ep->queue); 201 ep->pio_irqs = 0; 202 } 203 204 /* the rest was statically initialized, and is read-only */ 205 } 206 207 #define BYTES2MAXP(x) (x / 8) 208 #define MAXP2BYTES(x) (x * 8) 209 210 /* until it's enabled, this UDC should be completely invisible 211 * to any USB host. 212 */ 213 static int udc_enable(struct dwc2_udc *dev) 214 { 215 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev); 216 217 otg_phy_init(dev); 218 reconfig_usbd(dev); 219 220 debug_cond(DEBUG_SETUP != 0, 221 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n", 222 readl(®->gintmsk)); 223 224 dev->gadget.speed = USB_SPEED_UNKNOWN; 225 226 return 0; 227 } 228 229 /* 230 Register entry point for the peripheral controller driver. 231 */ 232 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 233 { 234 struct dwc2_udc *dev = the_controller; 235 int retval = 0; 236 unsigned long flags = 0; 237 238 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name"); 239 240 if (!driver 241 || (driver->speed != USB_SPEED_FULL 242 && driver->speed != USB_SPEED_HIGH) 243 || !driver->bind || !driver->disconnect || !driver->setup) 244 return -EINVAL; 245 if (!dev) 246 return -ENODEV; 247 if (dev->driver) 248 return -EBUSY; 249 250 spin_lock_irqsave(&dev->lock, flags); 251 /* first hook up the driver ... */ 252 dev->driver = driver; 253 spin_unlock_irqrestore(&dev->lock, flags); 254 255 if (retval) { /* TODO */ 256 printf("target device_add failed, error %d\n", retval); 257 return retval; 258 } 259 260 retval = driver->bind(&dev->gadget); 261 if (retval) { 262 debug_cond(DEBUG_SETUP != 0, 263 "%s: bind to driver --> error %d\n", 264 dev->gadget.name, retval); 265 dev->driver = 0; 266 return retval; 267 } 268 269 enable_irq(IRQ_OTG); 270 271 debug_cond(DEBUG_SETUP != 0, 272 "Registered gadget driver %s\n", dev->gadget.name); 273 udc_enable(dev); 274 275 return 0; 276 } 277 278 /* 279 * Unregister entry point for the peripheral controller driver. 280 */ 281 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 282 { 283 struct dwc2_udc *dev = the_controller; 284 unsigned long flags = 0; 285 286 if (!dev) 287 return -ENODEV; 288 if (!driver || driver != dev->driver) 289 return -EINVAL; 290 291 spin_lock_irqsave(&dev->lock, flags); 292 dev->driver = 0; 293 stop_activity(dev, driver); 294 spin_unlock_irqrestore(&dev->lock, flags); 295 296 driver->unbind(&dev->gadget); 297 298 disable_irq(IRQ_OTG); 299 300 udc_disable(dev); 301 return 0; 302 } 303 304 /* 305 * done - retire a request; caller blocked irqs 306 */ 307 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status) 308 { 309 unsigned int stopped = ep->stopped; 310 311 debug("%s: %s %p, req = %p, stopped = %d\n", 312 __func__, ep->ep.name, ep, &req->req, stopped); 313 314 list_del_init(&req->queue); 315 316 if (likely(req->req.status == -EINPROGRESS)) 317 req->req.status = status; 318 else 319 status = req->req.status; 320 321 if (status && status != -ESHUTDOWN) { 322 debug("complete %s req %p stat %d len %u/%u\n", 323 ep->ep.name, &req->req, status, 324 req->req.actual, req->req.length); 325 } 326 327 /* don't modify queue heads during completion callback */ 328 ep->stopped = 1; 329 330 #ifdef DEBUG 331 printf("calling complete callback\n"); 332 { 333 int i, len = req->req.length; 334 335 printf("pkt[%d] = ", req->req.length); 336 if (len > 64) 337 len = 64; 338 for (i = 0; i < len; i++) { 339 printf("%02x", ((u8 *)req->req.buf)[i]); 340 if ((i & 7) == 7) 341 printf(" "); 342 } 343 printf("\n"); 344 } 345 #endif 346 spin_unlock(&ep->dev->lock); 347 req->req.complete(&ep->ep, &req->req); 348 spin_lock(&ep->dev->lock); 349 350 debug("callback completed\n"); 351 352 ep->stopped = stopped; 353 } 354 355 /* 356 * nuke - dequeue ALL requests 357 */ 358 static void nuke(struct dwc2_ep *ep, int status) 359 { 360 struct dwc2_request *req; 361 362 debug("%s: %s %p\n", __func__, ep->ep.name, ep); 363 364 /* called with irqs blocked */ 365 while (!list_empty(&ep->queue)) { 366 req = list_entry(ep->queue.next, struct dwc2_request, queue); 367 done(ep, req, status); 368 } 369 } 370 371 static void stop_activity(struct dwc2_udc *dev, 372 struct usb_gadget_driver *driver) 373 { 374 int i; 375 376 /* don't disconnect drivers more than once */ 377 if (dev->gadget.speed == USB_SPEED_UNKNOWN) 378 driver = 0; 379 dev->gadget.speed = USB_SPEED_UNKNOWN; 380 381 /* prevent new request submissions, kill any outstanding requests */ 382 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) { 383 struct dwc2_ep *ep = &dev->ep[i]; 384 ep->stopped = 1; 385 nuke(ep, -ESHUTDOWN); 386 } 387 388 /* report disconnect; the driver is already quiesced */ 389 if (driver) { 390 spin_unlock(&dev->lock); 391 driver->disconnect(&dev->gadget); 392 spin_lock(&dev->lock); 393 } 394 395 /* re-init driver-visible data structures */ 396 udc_reinit(dev); 397 } 398 399 static void reconfig_usbd(struct dwc2_udc *dev) 400 { 401 /* 2. Soft-reset OTG Core and then unreset again. */ 402 int i; 403 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl); 404 uint32_t dflt_gusbcfg; 405 uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz; 406 407 debug("Reseting OTG controller\n"); 408 409 dflt_gusbcfg = 410 0<<15 /* PHY Low Power Clock sel*/ 411 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/ 412 |0x5<<10 /* Turnaround time*/ 413 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/ 414 /* 1:SRP enable] H1= 1,1*/ 415 |0<<7 /* Ulpi DDR sel*/ 416 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ 417 |0<<4 /* 0: utmi+, 1:ulpi*/ 418 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 419 |0<<3 /* phy i/f 0:8bit, 1:16bit*/ 420 #else 421 |1<<3 /* phy i/f 0:8bit, 1:16bit*/ 422 #endif 423 |0x7<<0; /* HS/FS Timeout**/ 424 425 if (dev->pdata->usb_gusbcfg) 426 dflt_gusbcfg = dev->pdata->usb_gusbcfg; 427 428 writel(dflt_gusbcfg, ®->gusbcfg); 429 430 /* 3. Put the OTG device core in the disconnected state.*/ 431 uTemp = readl(®->dctl); 432 uTemp |= SOFT_DISCONNECT; 433 writel(uTemp, ®->dctl); 434 435 udelay(20); 436 437 /* 4. Make the OTG device core exit from the disconnected state.*/ 438 uTemp = readl(®->dctl); 439 uTemp = uTemp & ~SOFT_DISCONNECT; 440 writel(uTemp, ®->dctl); 441 442 /* 5. Configure OTG Core to initial settings of device mode.*/ 443 /* [][1: full speed(30Mhz) 0:high speed]*/ 444 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg); 445 446 mdelay(1); 447 448 /* 6. Unmask the core interrupts*/ 449 writel(GINTMSK_INIT, ®->gintmsk); 450 451 /* 7. Set NAK bit of EP0, EP1, EP2*/ 452 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl); 453 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl); 454 455 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) { 456 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl); 457 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl); 458 } 459 460 /* 8. Unmask EPO interrupts*/ 461 writel(((1 << EP0_CON) << DAINT_OUT_BIT) 462 | (1 << EP0_CON), ®->daintmsk); 463 464 /* 9. Unmask device OUT EP common interrupts*/ 465 writel(DOEPMSK_INIT, ®->doepmsk); 466 467 /* 10. Unmask device IN EP common interrupts*/ 468 writel(DIEPMSK_INIT, ®->diepmsk); 469 470 rx_fifo_sz = RX_FIFO_SIZE; 471 np_tx_fifo_sz = NPTX_FIFO_SIZE; 472 tx_fifo_sz = PTX_FIFO_SIZE; 473 474 if (dev->pdata->rx_fifo_sz) 475 rx_fifo_sz = dev->pdata->rx_fifo_sz; 476 if (dev->pdata->np_tx_fifo_sz) 477 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz; 478 if (dev->pdata->tx_fifo_sz) 479 tx_fifo_sz = dev->pdata->tx_fifo_sz; 480 481 /* 11. Set Rx FIFO Size (in 32-bit words) */ 482 writel(rx_fifo_sz, ®->grxfsiz); 483 484 /* 12. Set Non Periodic Tx FIFO Size */ 485 writel((np_tx_fifo_sz << 16) | rx_fifo_sz, 486 ®->gnptxfsiz); 487 488 for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++) 489 writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) | 490 tx_fifo_sz << 16, ®->dieptxf[i-1]); 491 492 /* Flush the RX FIFO */ 493 writel(RX_FIFO_FLUSH, ®->grstctl); 494 while (readl(®->grstctl) & RX_FIFO_FLUSH) 495 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); 496 497 /* Flush all the Tx FIFO's */ 498 writel(TX_FIFO_FLUSH_ALL, ®->grstctl); 499 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); 500 while (readl(®->grstctl) & TX_FIFO_FLUSH) 501 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); 502 503 /* 13. Clear NAK bit of EP0, EP1, EP2*/ 504 /* For Slave mode*/ 505 /* EP0: Control OUT */ 506 writel(DEPCTL_EPDIS | DEPCTL_CNAK, 507 ®->out_endp[EP0_CON].doepctl); 508 509 /* 14. Initialize OTG Link Core.*/ 510 writel(GAHBCFG_INIT, ®->gahbcfg); 511 } 512 513 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) 514 { 515 unsigned int ep_ctrl; 516 int i; 517 518 if (speed == USB_SPEED_HIGH) { 519 ep0_fifo_size = 64; 520 ep_fifo_size = 512; 521 ep_fifo_size2 = 1024; 522 dev->gadget.speed = USB_SPEED_HIGH; 523 } else { 524 ep0_fifo_size = 64; 525 ep_fifo_size = 64; 526 ep_fifo_size2 = 64; 527 dev->gadget.speed = USB_SPEED_FULL; 528 } 529 530 dev->ep[0].ep.maxpacket = ep0_fifo_size; 531 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) 532 dev->ep[i].ep.maxpacket = ep_fifo_size; 533 534 /* EP0 - Control IN (64 bytes)*/ 535 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl); 536 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl); 537 538 /* EP0 - Control OUT (64 bytes)*/ 539 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl); 540 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl); 541 } 542 543 static int dwc2_ep_enable(struct usb_ep *_ep, 544 const struct usb_endpoint_descriptor *desc) 545 { 546 struct dwc2_ep *ep; 547 struct dwc2_udc *dev; 548 unsigned long flags = 0; 549 550 debug("%s: %p\n", __func__, _ep); 551 552 ep = container_of(_ep, struct dwc2_ep, ep); 553 if (!_ep || !desc || ep->desc || _ep->name == ep0name 554 || desc->bDescriptorType != USB_DT_ENDPOINT 555 || ep->bEndpointAddress != desc->bEndpointAddress 556 || ep_maxpacket(ep) < 557 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) { 558 559 debug("%s: bad ep or descriptor\n", __func__); 560 return -EINVAL; 561 } 562 563 /* xfer types must match, except that interrupt ~= bulk */ 564 if (ep->bmAttributes != desc->bmAttributes 565 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK 566 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { 567 568 debug("%s: %s type mismatch\n", __func__, _ep->name); 569 return -EINVAL; 570 } 571 572 /* hardware _could_ do smaller, but driver doesn't */ 573 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK && 574 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) > 575 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) { 576 577 debug("%s: bad %s maxpacket\n", __func__, _ep->name); 578 return -ERANGE; 579 } 580 581 dev = ep->dev; 582 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { 583 584 debug("%s: bogus device state\n", __func__); 585 return -ESHUTDOWN; 586 } 587 588 ep->stopped = 0; 589 ep->desc = desc; 590 ep->pio_irqs = 0; 591 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)); 592 593 /* Reset halt state */ 594 dwc2_udc_set_nak(ep); 595 dwc2_udc_set_halt(_ep, 0); 596 597 spin_lock_irqsave(&ep->dev->lock, flags); 598 dwc2_udc_ep_activate(ep); 599 spin_unlock_irqrestore(&ep->dev->lock, flags); 600 601 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n", 602 __func__, _ep->name, ep->stopped, ep->ep.maxpacket); 603 return 0; 604 } 605 606 /* 607 * Disable EP 608 */ 609 static int dwc2_ep_disable(struct usb_ep *_ep) 610 { 611 struct dwc2_ep *ep; 612 unsigned long flags = 0; 613 614 debug("%s: %p\n", __func__, _ep); 615 616 ep = container_of(_ep, struct dwc2_ep, ep); 617 if (!_ep || !ep->desc) { 618 debug("%s: %s not enabled\n", __func__, 619 _ep ? ep->ep.name : NULL); 620 return -EINVAL; 621 } 622 623 spin_lock_irqsave(&ep->dev->lock, flags); 624 625 /* Nuke all pending requests */ 626 nuke(ep, -ESHUTDOWN); 627 628 ep->desc = 0; 629 ep->stopped = 1; 630 631 spin_unlock_irqrestore(&ep->dev->lock, flags); 632 633 debug("%s: disabled %s\n", __func__, _ep->name); 634 return 0; 635 } 636 637 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep, 638 gfp_t gfp_flags) 639 { 640 struct dwc2_request *req; 641 642 debug("%s: %s %p\n", __func__, ep->name, ep); 643 644 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req)); 645 if (!req) 646 return 0; 647 648 memset(req, 0, sizeof *req); 649 INIT_LIST_HEAD(&req->queue); 650 651 return &req->req; 652 } 653 654 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req) 655 { 656 struct dwc2_request *req; 657 658 debug("%s: %p\n", __func__, ep); 659 660 req = container_of(_req, struct dwc2_request, req); 661 WARN_ON(!list_empty(&req->queue)); 662 kfree(req); 663 } 664 665 /* dequeue JUST ONE request */ 666 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req) 667 { 668 struct dwc2_ep *ep; 669 struct dwc2_request *req; 670 unsigned long flags = 0; 671 672 debug("%s: %p\n", __func__, _ep); 673 674 ep = container_of(_ep, struct dwc2_ep, ep); 675 if (!_ep || ep->ep.name == ep0name) 676 return -EINVAL; 677 678 spin_lock_irqsave(&ep->dev->lock, flags); 679 680 /* make sure it's actually queued on this endpoint */ 681 list_for_each_entry(req, &ep->queue, queue) { 682 if (&req->req == _req) 683 break; 684 } 685 if (&req->req != _req) { 686 spin_unlock_irqrestore(&ep->dev->lock, flags); 687 return -EINVAL; 688 } 689 690 done(ep, req, -ECONNRESET); 691 692 spin_unlock_irqrestore(&ep->dev->lock, flags); 693 return 0; 694 } 695 696 /* 697 * Return bytes in EP FIFO 698 */ 699 static int dwc2_fifo_status(struct usb_ep *_ep) 700 { 701 int count = 0; 702 struct dwc2_ep *ep; 703 704 ep = container_of(_ep, struct dwc2_ep, ep); 705 if (!_ep) { 706 debug("%s: bad ep\n", __func__); 707 return -ENODEV; 708 } 709 710 debug("%s: %d\n", __func__, ep_index(ep)); 711 712 /* LPD can't report unclaimed bytes from IN fifos */ 713 if (ep_is_in(ep)) 714 return -EOPNOTSUPP; 715 716 return count; 717 } 718 719 /* 720 * Flush EP FIFO 721 */ 722 static void dwc2_fifo_flush(struct usb_ep *_ep) 723 { 724 struct dwc2_ep *ep; 725 726 ep = container_of(_ep, struct dwc2_ep, ep); 727 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { 728 debug("%s: bad ep\n", __func__); 729 return; 730 } 731 732 debug("%s: %d\n", __func__, ep_index(ep)); 733 } 734 735 static const struct usb_gadget_ops dwc2_udc_ops = { 736 /* current versions must always be self-powered */ 737 }; 738 739 static struct dwc2_udc memory = { 740 .usb_address = 0, 741 .gadget = { 742 .ops = &dwc2_udc_ops, 743 .ep0 = &memory.ep[0].ep, 744 .name = driver_name, 745 }, 746 747 /* control endpoint */ 748 .ep[0] = { 749 .ep = { 750 .name = ep0name, 751 .ops = &dwc2_ep_ops, 752 .maxpacket = EP0_FIFO_SIZE, 753 }, 754 .dev = &memory, 755 756 .bEndpointAddress = 0, 757 .bmAttributes = 0, 758 759 .ep_type = ep_control, 760 }, 761 762 /* first group of endpoints */ 763 .ep[1] = { 764 .ep = { 765 .name = "ep1in-bulk", 766 .ops = &dwc2_ep_ops, 767 .maxpacket = EP_FIFO_SIZE, 768 }, 769 .dev = &memory, 770 771 .bEndpointAddress = USB_DIR_IN | 1, 772 .bmAttributes = USB_ENDPOINT_XFER_BULK, 773 774 .ep_type = ep_bulk_out, 775 .fifo_num = 1, 776 }, 777 778 .ep[2] = { 779 .ep = { 780 .name = "ep2out-bulk", 781 .ops = &dwc2_ep_ops, 782 .maxpacket = EP_FIFO_SIZE, 783 }, 784 .dev = &memory, 785 786 .bEndpointAddress = USB_DIR_OUT | 2, 787 .bmAttributes = USB_ENDPOINT_XFER_BULK, 788 789 .ep_type = ep_bulk_in, 790 .fifo_num = 2, 791 }, 792 793 .ep[3] = { 794 .ep = { 795 .name = "ep3in-int", 796 .ops = &dwc2_ep_ops, 797 .maxpacket = EP_FIFO_SIZE, 798 }, 799 .dev = &memory, 800 801 .bEndpointAddress = USB_DIR_IN | 3, 802 .bmAttributes = USB_ENDPOINT_XFER_INT, 803 804 .ep_type = ep_interrupt, 805 .fifo_num = 3, 806 }, 807 }; 808 809 /* 810 * probe - binds to the platform device 811 */ 812 813 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata) 814 { 815 struct dwc2_udc *dev = &memory; 816 int retval = 0; 817 818 debug("%s: %p\n", __func__, pdata); 819 820 dev->pdata = pdata; 821 822 reg = (struct dwc2_usbotg_reg *)pdata->regs_otg; 823 824 /* regs_otg = (void *)pdata->regs_otg; */ 825 826 dev->gadget.is_dualspeed = 1; /* Hack only*/ 827 dev->gadget.is_otg = 0; 828 dev->gadget.is_a_peripheral = 0; 829 dev->gadget.b_hnp_enable = 0; 830 dev->gadget.a_hnp_support = 0; 831 dev->gadget.a_alt_hnp_support = 0; 832 833 the_controller = dev; 834 835 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE, 836 ROUND(sizeof(struct usb_ctrlrequest), 837 CONFIG_SYS_CACHELINE_SIZE)); 838 if (!usb_ctrl) { 839 pr_err("No memory available for UDC!\n"); 840 return -ENOMEM; 841 } 842 843 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl; 844 845 udc_reinit(dev); 846 847 return retval; 848 } 849 850 int usb_gadget_handle_interrupts(int index) 851 { 852 u32 intr_status = readl(®->gintsts); 853 u32 gintmsk = readl(®->gintmsk); 854 855 if (intr_status & gintmsk) 856 return dwc2_udc_irq(1, (void *)the_controller); 857 return 0; 858 } 859